viafb: fix OLPC DCON refresh rate

[pandora-kernel.git] / arch / arm / mach-lh7a40x / irq-kev7a400.c

diff --git a/arch/arm/mach-lh7a40x/irq-kev7a400.c b/arch/arm/mach-lh7a40x/irq-kev7a400.c
index 8535764..c7433b3 100644 (file)
--- a/arch/arm/mach-lh7a40x/irq-kev7a400.c
+++ b/arch/arm/mach-lh7a40x/irq-kev7a400.c
@@ -43,21 +43,21 @@ lh7a400_unmask_cpld_irq (u32 irq)
 }
 
 static struct
-irqchip lh7a400_cpld_chip = {
+irq_chip lh7a400_cpld_chip = {
+       .name   = "CPLD",
        .ack    = lh7a400_ack_cpld_irq,
        .mask   = lh7a400_mask_cpld_irq,
        .unmask = lh7a400_unmask_cpld_irq,
 };
 
 static void
-lh7a400_cpld_handler (unsigned int irq, struct irqdesc *desc,
-                     struct pt_regs *regs)
+lh7a400_cpld_handler (unsigned int irq, struct irq_desc *desc)
 {
        u32 mask = CPLD_LATCHED_INTS;
        irq = IRQ_KEV_7A400_CPLD;
        for (; mask; mask >>= 1, ++irq) {
                if (mask & 1)
-                       desc[irq].handle (irq, desc, regs);
+                       desc[irq].handle (irq, desc);
        }
 }
 
@@ -71,7 +71,7 @@ lh7a400_init_board_irq (void)
        for (irq = IRQ_KEV7A400_CPLD;
             irq < IRQ_KEV7A400_CPLD + NR_IRQ_KEV7A400_CPLD; ++irq) {
                set_irq_chip (irq, &lh7a400_cpld_chip);
-               set_irq_handler (irq, do_edge_IRQ);
+               set_irq_handler (irq, handle_edge_irq);
                set_irq_flags (irq, IRQF_VALID);
        }
        set_irq_chained_handler (IRQ_CPLD, kev7a400_cpld_handler);