Merge tag 'mfd-for-linus-3.20' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd

[pandora-kernel.git] / arch / arm / mach-exynos / exynos.c

diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c
index c13d083..2013f73 100644 (file)
--- a/arch/arm/mach-exynos/exynos.c
+++ b/arch/arm/mach-exynos/exynos.c
@@ -27,20 +27,16 @@
 #include <asm/mach/map.h>
 #include <asm/memory.h>
 
+#include <mach/map.h>
+
 #include "common.h"
 #include "mfc.h"
 #include "regs-pmu.h"
-#include "regs-sys.h"
 
 void __iomem *pmu_base_addr;
 
 static struct map_desc exynos4_iodesc[] __initdata = {
        {
-               .virtual        = (unsigned long)S3C_VA_SYS,
-               .pfn            = __phys_to_pfn(EXYNOS4_PA_SYSCON),
-               .length         = SZ_64K,
-               .type           = MT_DEVICE,
-       }, {
                .virtual        = (unsigned long)S5P_VA_SROMC,
                .pfn            = __phys_to_pfn(EXYNOS4_PA_SROMC),
                .length         = SZ_4K,
@@ -70,11 +66,6 @@ static struct map_desc exynos4_iodesc[] __initdata = {
 
 static struct map_desc exynos5_iodesc[] __initdata = {
        {
-               .virtual        = (unsigned long)S3C_VA_SYS,
-               .pfn            = __phys_to_pfn(EXYNOS5_PA_SYSCON),
-               .length         = SZ_64K,
-               .type           = MT_DEVICE,
-       }, {
                .virtual        = (unsigned long)S5P_VA_SROMC,
                .pfn            = __phys_to_pfn(EXYNOS5_PA_SROMC),
                .length         = SZ_4K,
@@ -213,32 +204,6 @@ static void __init exynos_init_irq(void)
 
 static void __init exynos_dt_machine_init(void)
 {
-       struct device_node *i2c_np;
-       const char *i2c_compat = "samsung,s3c2440-i2c";
-       unsigned int tmp;
-       int id;
-
-       /*
-        * Exynos5's legacy i2c controller and new high speed i2c
-        * controller have muxed interrupt sources. By default the
-        * interrupts for 4-channel HS-I2C controller are enabled.
-        * If node for first four channels of legacy i2c controller
-        * are available then re-configure the interrupts via the
-        * system register.
-        */
-       if (soc_is_exynos5()) {
-               for_each_compatible_node(i2c_np, NULL, i2c_compat) {
-                       if (of_device_is_available(i2c_np)) {
-                               id = of_alias_get_id(i2c_np, "i2c");
-                               if (id < 4) {
-                                       tmp = readl(EXYNOS5_SYS_I2C_CFG);
-                                       writel(tmp & ~(0x1 << id),
-                                                       EXYNOS5_SYS_I2C_CFG);
-                               }
-                       }
-               }
-       }
-
        /*
         * This is called from smp_prepare_cpus if we've built for SMP, but
         * we still need to set it up for PM and firmware ops if not.
@@ -246,6 +211,10 @@ static void __init exynos_dt_machine_init(void)
        if (!IS_ENABLED(CONFIG_SMP))
                exynos_sysram_init();
 
+#ifdef CONFIG_ARM_EXYNOS_CPUIDLE
+       if (of_machine_is_compatible("samsung,exynos4210"))
+               exynos_cpuidle.dev.platform_data = &cpuidle_coupled_exynos_data;
+#endif
        if (of_machine_is_compatible("samsung,exynos4210") ||
            of_machine_is_compatible("samsung,exynos4212") ||
            (of_machine_is_compatible("samsung,exynos4412") &&
@@ -282,6 +251,7 @@ static void __init exynos_reserve(void)
                "samsung,mfc-v5",
                "samsung,mfc-v6",
                "samsung,mfc-v7",
+               "samsung,mfc-v8",
        };
 
        for (i = 0; i < ARRAY_SIZE(mfc_mem); i++)