Merge branch 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm

[pandora-kernel.git] / arch / arm / mach-ep93xx / include / mach / ep93xx-regs.h

diff --git a/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h b/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h
index d55194a..b1e096f 100644 (file)
--- a/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h
+++ b/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h
@@ -92,21 +92,6 @@
 
 /* APB peripherals */
 #define EP93XX_TIMER_BASE              EP93XX_APB_IOMEM(0x00010000)
-#define EP93XX_TIMER_REG(x)            (EP93XX_TIMER_BASE + (x))
-#define EP93XX_TIMER1_LOAD             EP93XX_TIMER_REG(0x00)
-#define EP93XX_TIMER1_VALUE            EP93XX_TIMER_REG(0x04)
-#define EP93XX_TIMER1_CONTROL          EP93XX_TIMER_REG(0x08)
-#define EP93XX_TIMER1_CLEAR            EP93XX_TIMER_REG(0x0c)
-#define EP93XX_TIMER2_LOAD             EP93XX_TIMER_REG(0x20)
-#define EP93XX_TIMER2_VALUE            EP93XX_TIMER_REG(0x24)
-#define EP93XX_TIMER2_CONTROL          EP93XX_TIMER_REG(0x28)
-#define EP93XX_TIMER2_CLEAR            EP93XX_TIMER_REG(0x2c)
-#define EP93XX_TIMER4_VALUE_LOW                EP93XX_TIMER_REG(0x60)
-#define EP93XX_TIMER4_VALUE_HIGH       EP93XX_TIMER_REG(0x64)
-#define EP93XX_TIMER3_LOAD             EP93XX_TIMER_REG(0x80)
-#define EP93XX_TIMER3_VALUE            EP93XX_TIMER_REG(0x84)
-#define EP93XX_TIMER3_CONTROL          EP93XX_TIMER_REG(0x88)
-#define EP93XX_TIMER3_CLEAR            EP93XX_TIMER_REG(0x8c)
 
 #define EP93XX_I2S_BASE                        EP93XX_APB_IOMEM(0x00020000)
 
@@ -121,6 +106,7 @@
 
 #define EP93XX_AAC_BASE                        EP93XX_APB_IOMEM(0x00080000)
 
+#define EP93XX_SPI_PHYS_BASE           EP93XX_APB_PHYS(0x000a0000)
 #define EP93XX_SPI_BASE                        EP93XX_APB_IOMEM(0x000a0000)
 
 #define EP93XX_IRDA_BASE               EP93XX_APB_IOMEM(0x000b0000)
@@ -167,8 +153,11 @@
 #define EP93XX_SYSCON_PWRCNT_DMA_M2P1  (1<<16)
 #define EP93XX_SYSCON_HALT             EP93XX_SYSCON_REG(0x08)
 #define EP93XX_SYSCON_STANDBY          EP93XX_SYSCON_REG(0x0c)
-#define EP93XX_SYSCON_CLOCK_SET1       EP93XX_SYSCON_REG(0x20)
-#define EP93XX_SYSCON_CLOCK_SET2       EP93XX_SYSCON_REG(0x24)
+#define EP93XX_SYSCON_CLKSET1          EP93XX_SYSCON_REG(0x20)
+#define EP93XX_SYSCON_CLKSET1_NBYP1    (1<<23)
+#define EP93XX_SYSCON_CLKSET2          EP93XX_SYSCON_REG(0x24)
+#define EP93XX_SYSCON_CLKSET2_NBYP2    (1<<19)
+#define EP93XX_SYSCON_CLKSET2_PLL2_EN  (1<<18)
 #define EP93XX_SYSCON_DEVCFG           EP93XX_SYSCON_REG(0x80)
 #define EP93XX_SYSCON_DEVCFG_SWRST     (1<<31)
 #define EP93XX_SYSCON_DEVCFG_D1ONG     (1<<30)