davinci: use 32-bit accesses for low-level debug macros

[pandora-kernel.git] / arch / arm / mach-davinci / include / mach / irqs.h

diff --git a/arch/arm/mach-davinci/include/mach/irqs.h b/arch/arm/mach-davinci/include/mach/irqs.h
index f4c5ca6..1806607 100644 (file)
--- a/arch/arm/mach-davinci/include/mach/irqs.h
+++ b/arch/arm/mach-davinci/include/mach/irqs.h
@@ -96,10 +96,111 @@
 #define IRQ_EMUINT       63
 
 #define DAVINCI_N_AINTC_IRQ    64
-#define DAVINCI_N_GPIO         71
+#define DAVINCI_N_GPIO         104
 
 #define NR_IRQS                        (DAVINCI_N_AINTC_IRQ + DAVINCI_N_GPIO)
 
 #define ARCH_TIMER_IRQ IRQ_TINT1_TINT34
 
+/* DaVinci DM6467-specific Interrupts */
+#define IRQ_DM646X_VP_VERTINT0  0
+#define IRQ_DM646X_VP_VERTINT1  1
+#define IRQ_DM646X_VP_VERTINT2  2
+#define IRQ_DM646X_VP_VERTINT3  3
+#define IRQ_DM646X_VP_ERRINT    4
+#define IRQ_DM646X_RESERVED_1   5
+#define IRQ_DM646X_RESERVED_2   6
+#define IRQ_DM646X_WDINT        7
+#define IRQ_DM646X_CRGENINT0    8
+#define IRQ_DM646X_CRGENINT1    9
+#define IRQ_DM646X_TSIFINT0     10
+#define IRQ_DM646X_TSIFINT1     11
+#define IRQ_DM646X_VDCEINT      12
+#define IRQ_DM646X_USBINT       13
+#define IRQ_DM646X_USBDMAINT    14
+#define IRQ_DM646X_PCIINT       15
+#define IRQ_DM646X_TCERRINT2    20
+#define IRQ_DM646X_TCERRINT3    21
+#define IRQ_DM646X_IDE          22
+#define IRQ_DM646X_HPIINT       23
+#define IRQ_DM646X_EMACRXTHINT  24
+#define IRQ_DM646X_EMACRXINT    25
+#define IRQ_DM646X_EMACTXINT    26
+#define IRQ_DM646X_EMACMISCINT  27
+#define IRQ_DM646X_MCASP0TXINT  28
+#define IRQ_DM646X_MCASP0RXINT  29
+#define IRQ_DM646X_RESERVED_3   31
+#define IRQ_DM646X_MCASP1TXINT  32
+#define IRQ_DM646X_VLQINT       38
+#define IRQ_DM646X_UARTINT2     42
+#define IRQ_DM646X_SPINT0       43
+#define IRQ_DM646X_SPINT1       44
+#define IRQ_DM646X_DSP2ARMINT   45
+#define IRQ_DM646X_RESERVED_4   46
+#define IRQ_DM646X_PSCINT       47
+#define IRQ_DM646X_GPIO0        48
+#define IRQ_DM646X_GPIO1        49
+#define IRQ_DM646X_GPIO2        50
+#define IRQ_DM646X_GPIO3        51
+#define IRQ_DM646X_GPIO4        52
+#define IRQ_DM646X_GPIO5        53
+#define IRQ_DM646X_GPIO6        54
+#define IRQ_DM646X_GPIO7        55
+#define IRQ_DM646X_GPIOBNK0     56
+#define IRQ_DM646X_GPIOBNK1     57
+#define IRQ_DM646X_GPIOBNK2     58
+#define IRQ_DM646X_DDRINT       59
+#define IRQ_DM646X_AEMIFINT     60
+
+/* DaVinci DM355-specific Interrupts */
+#define IRQ_DM355_CCDC_VDINT0  0
+#define IRQ_DM355_CCDC_VDINT1  1
+#define IRQ_DM355_CCDC_VDINT2  2
+#define IRQ_DM355_IPIPE_HST    3
+#define IRQ_DM355_H3AINT       4
+#define IRQ_DM355_IPIPE_SDR    5
+#define IRQ_DM355_IPIPEIFINT   6
+#define IRQ_DM355_OSDINT       7
+#define IRQ_DM355_VENCINT      8
+#define IRQ_DM355_IMCOPINT     11
+#define IRQ_DM355_RTOINT       13
+#define IRQ_DM355_TINT4                13
+#define IRQ_DM355_TINT2_TINT12 13
+#define IRQ_DM355_UARTINT2     14
+#define IRQ_DM355_TINT5                14
+#define IRQ_DM355_TINT2_TINT34 14
+#define IRQ_DM355_TINT6                15
+#define IRQ_DM355_TINT3_TINT12 15
+#define IRQ_DM355_SPINT1_0     17
+#define IRQ_DM355_SPINT1_1     18
+#define IRQ_DM355_SPINT2_0     19
+#define IRQ_DM355_SPINT2_1     21
+#define IRQ_DM355_TINT7                22
+#define IRQ_DM355_TINT3_TINT34 22
+#define IRQ_DM355_SDIOINT0     23
+#define IRQ_DM355_MMCINT0      26
+#define IRQ_DM355_MSINT                26
+#define IRQ_DM355_MMCINT1      27
+#define IRQ_DM355_PWMINT3      28
+#define IRQ_DM355_SDIOINT1     31
+#define IRQ_DM355_SPINT0_0     42
+#define IRQ_DM355_SPINT0_1     43
+#define IRQ_DM355_GPIO0                44
+#define IRQ_DM355_GPIO1                45
+#define IRQ_DM355_GPIO2                46
+#define IRQ_DM355_GPIO3                47
+#define IRQ_DM355_GPIO4                48
+#define IRQ_DM355_GPIO5                49
+#define IRQ_DM355_GPIO6                50
+#define IRQ_DM355_GPIO7                51
+#define IRQ_DM355_GPIO8                52
+#define IRQ_DM355_GPIO9                53
+#define IRQ_DM355_GPIOBNK0     54
+#define IRQ_DM355_GPIOBNK1     55
+#define IRQ_DM355_GPIOBNK2     56
+#define IRQ_DM355_GPIOBNK3     57
+#define IRQ_DM355_GPIOBNK4     58
+#define IRQ_DM355_GPIOBNK5     59
+#define IRQ_DM355_GPIOBNK6     60
+
 #endif /* __ASM_ARCH_IRQS_H */