at91: introduce commom AT91_BASE_SYS
[pandora-kernel.git] / arch / arm / mach-at91 / at91sam9rl.c
index 6a9d24e..8ff7720 100644 (file)
 #include <mach/at91_rstc.h>
 #include <mach/at91_shdwc.h>
 
+#include "soc.h"
 #include "generic.h"
 #include "clock.h"
 
-static struct map_desc at91sam9rl_io_desc[] __initdata = {
-       {
-               .virtual        = AT91_VA_BASE_SYS,
-               .pfn            = __phys_to_pfn(AT91_BASE_SYS),
-               .length         = SZ_16K,
-               .type           = MT_DEVICE,
-       },
-};
-
 static struct map_desc at91sam9rl_sram_desc[] __initdata = {
        {
                .pfn            = __phys_to_pfn(AT91SAM9RL_SRAM_BASE),
@@ -190,6 +182,24 @@ static struct clk *periph_clocks[] __initdata = {
        // irq0
 };
 
+static struct clk_lookup periph_clocks_lookups[] = {
+       CLKDEV_CON_DEV_ID("hclk", "atmel_usba_udc", &utmi_clk),
+       CLKDEV_CON_DEV_ID("pclk", "atmel_usba_udc", &udphs_clk),
+       CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tc0_clk),
+       CLKDEV_CON_DEV_ID("t1_clk", "atmel_tcb.0", &tc1_clk),
+       CLKDEV_CON_DEV_ID("t2_clk", "atmel_tcb.0", &tc2_clk),
+       CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc0_clk),
+       CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk),
+};
+
+static struct clk_lookup usart_clocks_lookups[] = {
+       CLKDEV_CON_DEV_ID("usart", "atmel_usart.0", &mck),
+       CLKDEV_CON_DEV_ID("usart", "atmel_usart.1", &usart0_clk),
+       CLKDEV_CON_DEV_ID("usart", "atmel_usart.2", &usart1_clk),
+       CLKDEV_CON_DEV_ID("usart", "atmel_usart.3", &usart2_clk),
+       CLKDEV_CON_DEV_ID("usart", "atmel_usart.4", &usart3_clk),
+};
+
 /*
  * The two programmable clocks.
  * You must configure pin multiplexing to bring these signals out.
@@ -214,10 +224,27 @@ static void __init at91sam9rl_register_clocks(void)
        for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
                clk_register(periph_clocks[i]);
 
+       clkdev_add_table(periph_clocks_lookups,
+                        ARRAY_SIZE(periph_clocks_lookups));
+       clkdev_add_table(usart_clocks_lookups,
+                        ARRAY_SIZE(usart_clocks_lookups));
+
        clk_register(&pck0);
        clk_register(&pck1);
 }
 
+static struct clk_lookup console_clock_lookup;
+
+void __init at91sam9rl_set_console_clock(int id)
+{
+       if (id >= ARRAY_SIZE(usart_clocks_lookups))
+               return;
+
+       console_clock_lookup.con_id = "usart";
+       console_clock_lookup.clk = usart_clocks_lookups[id].clk;
+       clkdev_add(&console_clock_lookup);
+}
+
 /* --------------------------------------------------------------------
  *  GPIO
  * -------------------------------------------------------------------- */
@@ -252,13 +279,10 @@ static void at91sam9rl_poweroff(void)
  *  AT91SAM9RL processor initialization
  * -------------------------------------------------------------------- */
 
-void __init at91sam9rl_initialize(unsigned long main_clock)
+static void __init at91sam9rl_map_io(void)
 {
        unsigned long cidr, sram_size;
 
-       /* Map peripherals */
-       iotable_init(at91sam9rl_io_desc, ARRAY_SIZE(at91sam9rl_io_desc));
-
        cidr = at91_sys_read(AT91_DBGU_CIDR);
 
        switch (cidr & AT91_CIDR_SRAMSIZ) {
@@ -275,7 +299,10 @@ void __init at91sam9rl_initialize(unsigned long main_clock)
 
        /* Map SRAM */
        iotable_init(at91sam9rl_sram_desc, ARRAY_SIZE(at91sam9rl_sram_desc));
+}
 
+static void __init at91sam9rl_initialize(unsigned long main_clock)
+{
        at91_arch_reset = at91sam9_alt_reset;
        pm_power_off = at91sam9rl_poweroff;
        at91_extern_irq = (1 << AT91SAM9RL_ID_IRQ0);
@@ -343,3 +370,8 @@ void __init at91sam9rl_init_interrupts(unsigned int priority[NR_AIC_IRQS])
        /* Enable GPIO interrupts */
        at91_gpio_irq_setup();
 }
+
+struct at91_soc __initdata at91sam9rl_soc = {
+       .map_io = at91sam9rl_map_io,
+       .init = at91sam9rl_initialize,
+};