Merge tag 'mfd-for-linus-3.20' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd
[pandora-kernel.git] / arch / arm / boot / dts / r8a7779.dtsi
index ede9a29..5c2219b 100644 (file)
@@ -12,6 +12,7 @@
 /include/ "skeleton.dtsi"
 
 #include <dt-bindings/clock/r8a7779-clock.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/interrupt-controller/irq.h>
 
 / {
                      <0xf0000100 0x100>;
        };
 
+       timer@f0000600 {
+               compatible = "arm,cortex-a9-twd-timer";
+               reg = <0xf0000600 0x20>;
+               interrupts = <GIC_PPI 13
+                       (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+               clocks = <&cpg_clocks R8A7779_CLK_ZS>;
+       };
+
        gpio0: gpio@ffc40000 {
                compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
                reg = <0xffc40000 0x2c>;
                compatible = "renesas,scif-r8a7779", "renesas,scif";
                reg = <0xffe40000 0x100>;
                interrupts = <0 88 IRQ_TYPE_LEVEL_HIGH>;
-               clocks = <&cpg_clocks R8A7779_CLK_P>;
+               clocks = <&mstp0_clks R8A7779_CLK_SCIF0>;
                clock-names = "sci_ick";
                status = "disabled";
        };
                compatible = "renesas,scif-r8a7779", "renesas,scif";
                reg = <0xffe41000 0x100>;
                interrupts = <0 89 IRQ_TYPE_LEVEL_HIGH>;
-               clocks = <&cpg_clocks R8A7779_CLK_P>;
+               clocks = <&mstp0_clks R8A7779_CLK_SCIF1>;
                clock-names = "sci_ick";
                status = "disabled";
        };
                compatible = "renesas,scif-r8a7779", "renesas,scif";
                reg = <0xffe42000 0x100>;
                interrupts = <0 90 IRQ_TYPE_LEVEL_HIGH>;
-               clocks = <&cpg_clocks R8A7779_CLK_P>;
+               clocks = <&mstp0_clks R8A7779_CLK_SCIF2>;
                clock-names = "sci_ick";
                status = "disabled";
        };
                compatible = "renesas,scif-r8a7779", "renesas,scif";
                reg = <0xffe43000 0x100>;
                interrupts = <0 91 IRQ_TYPE_LEVEL_HIGH>;
-               clocks = <&cpg_clocks R8A7779_CLK_P>;
+               clocks = <&mstp0_clks R8A7779_CLK_SCIF3>;
                clock-names = "sci_ick";
                status = "disabled";
        };
                compatible = "renesas,scif-r8a7779", "renesas,scif";
                reg = <0xffe44000 0x100>;
                interrupts = <0 92 IRQ_TYPE_LEVEL_HIGH>;
-               clocks = <&cpg_clocks R8A7779_CLK_P>;
+               clocks = <&mstp0_clks R8A7779_CLK_SCIF4>;
                clock-names = "sci_ick";
                status = "disabled";
        };
                compatible = "renesas,scif-r8a7779", "renesas,scif";
                reg = <0xffe45000 0x100>;
                interrupts = <0 93 IRQ_TYPE_LEVEL_HIGH>;
-               clocks = <&cpg_clocks R8A7779_CLK_P>;
+               clocks = <&mstp0_clks R8A7779_CLK_SCIF5>;
                clock-names = "sci_ick";
                status = "disabled";
        };
                                 <&cpg_clocks R8A7779_CLK_P>,
                                 <&cpg_clocks R8A7779_CLK_S>,
                                 <&cpg_clocks R8A7779_CLK_S>,
-                                <&cpg_clocks R8A7779_CLK_S1>,
-                                <&cpg_clocks R8A7779_CLK_S1>,
-                                <&cpg_clocks R8A7779_CLK_S1>,
-                                <&cpg_clocks R8A7779_CLK_S1>,
-                                <&cpg_clocks R8A7779_CLK_S1>,
-                                <&cpg_clocks R8A7779_CLK_S1>,
+                                <&cpg_clocks R8A7779_CLK_P>,
+                                <&cpg_clocks R8A7779_CLK_P>,
+                                <&cpg_clocks R8A7779_CLK_P>,
+                                <&cpg_clocks R8A7779_CLK_P>,
+                                <&cpg_clocks R8A7779_CLK_P>,
+                                <&cpg_clocks R8A7779_CLK_P>,
                                 <&cpg_clocks R8A7779_CLK_P>,
                                 <&cpg_clocks R8A7779_CLK_P>,
                                 <&cpg_clocks R8A7779_CLK_P>,
                                 <&cpg_clocks R8A7779_CLK_P>;
                        #clock-cells = <1>;
-                       renesas,clock-indices = <
+                       clock-indices = <
                                R8A7779_CLK_HSPI R8A7779_CLK_TMU2
                                R8A7779_CLK_TMU1 R8A7779_CLK_TMU0
                                R8A7779_CLK_HSCIF1 R8A7779_CLK_HSCIF0
                                 <&cpg_clocks R8A7779_CLK_P>,
                                 <&cpg_clocks R8A7779_CLK_S>;
                        #clock-cells = <1>;
-                       renesas,clock-indices = <
+                       clock-indices = <
                                R8A7779_CLK_USB01 R8A7779_CLK_USB2
                                R8A7779_CLK_DU R8A7779_CLK_VIN2
                                R8A7779_CLK_VIN1 R8A7779_CLK_VIN0
                        clocks = <&s4_clk>, <&s4_clk>, <&s4_clk>, <&s4_clk>,
                                 <&s4_clk>, <&s4_clk>;
                        #clock-cells = <1>;
-                       renesas,clock-indices = <
+                       clock-indices = <
                                R8A7779_CLK_SDHI3 R8A7779_CLK_SDHI2
                                R8A7779_CLK_SDHI1 R8A7779_CLK_SDHI0
                                R8A7779_CLK_MMC1 R8A7779_CLK_MMC0