ARM: implement ioremap_prot

[pandora-kernel.git] / arch / arm / Kconfig

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 776d76b..870794a 100644 (file)
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1,9 +1,11 @@
 config ARM
        bool
        default y
 config ARM
        bool
        default y

-       select HAVE_AOUT
+       select ARCH_SUPPORTS_ATOMIC_RMW

        select HAVE_DMA_API_DEBUG
        select HAVE_IDE if PCI || ISA || PCMCIA
        select HAVE_DMA_API_DEBUG
        select HAVE_IDE if PCI || ISA || PCMCIA

+       select HAVE_DMA_ATTRS
+       select HAVE_DMA_CONTIGUOUS if MMU

        select HAVE_MEMBLOCK
        select RTC_LIB
        select SYS_SUPPORTS_APM_EMULATION
        select HAVE_MEMBLOCK
        select RTC_LIB
        select SYS_SUPPORTS_APM_EMULATION


@@ -28,6 +30,7 @@ config ARM
        select HAVE_C_RECORDMCOUNT
        select HAVE_GENERIC_HARDIRQS
        select HAVE_SPARSE_IRQ
        select HAVE_C_RECORDMCOUNT
        select HAVE_GENERIC_HARDIRQS
        select HAVE_SPARSE_IRQ

+       select HAVE_IOREMAP_PROT

        select GENERIC_IRQ_SHOW
        select CPU_PM if (SUSPEND || CPU_IDLE)
        help
        select GENERIC_IRQ_SHOW
        select CPU_PM if (SUSPEND || CPU_IDLE)
        help


@@ -41,6 +44,14 @@ config ARM
 config ARM_HAS_SG_CHAIN
        bool
 
 config ARM_HAS_SG_CHAIN
        bool
 

+config NEED_SG_DMA_LENGTH
+       bool
+
+config ARM_DMA_USE_IOMMU
+       select NEED_SG_DMA_LENGTH
+       select ARM_HAS_SG_CHAIN
+       bool
+

 config HAVE_PWM
        bool
 
 config HAVE_PWM
        bool
 


@@ -178,6 +189,9 @@ config ZONE_DMA
 config NEED_DMA_MAP_STATE
        def_bool y
 
 config NEED_DMA_MAP_STATE
        def_bool y
 

+config ARCH_HAS_DMA_SET_COHERENT_MASK
+       bool
+

 config GENERIC_ISA_DMA
        bool
 
 config GENERIC_ISA_DMA
        bool
 


@@ -518,9 +532,10 @@ config ARCH_IXP2000
 config ARCH_IXP4XX
        bool "IXP4xx-based"
        depends on MMU
 config ARCH_IXP4XX
        bool "IXP4xx-based"
        depends on MMU

+       select ARCH_HAS_DMA_SET_COHERENT_MASK

        select CLKSRC_MMIO
        select CPU_XSCALE
        select CLKSRC_MMIO
        select CPU_XSCALE

-       select GENERIC_GPIO
+       select ARCH_REQUIRE_GPIOLIB

        select GENERIC_CLOCKEVENTS
        select HAVE_SCHED_CLOCK
        select MIGHT_HAVE_PCI
        select GENERIC_CLOCKEVENTS
        select HAVE_SCHED_CLOCK
        select MIGHT_HAVE_PCI


@@ -542,6 +557,7 @@ config ARCH_KIRKWOOD
        bool "Marvell Kirkwood"
        select CPU_FEROCEON
        select PCI
        bool "Marvell Kirkwood"
        select CPU_FEROCEON
        select PCI

+       select PCI_QUIRKS

        select ARCH_REQUIRE_GPIOLIB
        select GENERIC_CLOCKEVENTS
        select PLAT_ORION
        select ARCH_REQUIRE_GPIOLIB
        select GENERIC_CLOCKEVENTS
        select PLAT_ORION


@@ -1155,6 +1171,15 @@ if !MMU
 source "arch/arm/Kconfig-nommu"
 endif
 
 source "arch/arm/Kconfig-nommu"
 endif
 

+config ARM_ERRATA_326103
+       bool "ARM errata: FSR write bit incorrect on a SWP to read-only memory"
+       depends on CPU_V6
+       help
+         Executing a SWP instruction to read-only memory does not set bit 11
+         of the FSR on the ARM 1136 prior to r1p0. This causes the kernel to
+         treat the access as a read, preventing a COW from occurring and
+         causing the faulting task to livelock.
+

 config ARM_ERRATA_411920
        bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
        depends on CPU_V6 || CPU_V6K
 config ARM_ERRATA_411920
        bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
        depends on CPU_V6 || CPU_V6K


@@ -1246,7 +1271,7 @@ config PL310_ERRATA_588369
 
 config ARM_ERRATA_720789
        bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
 
 config ARM_ERRATA_720789
        bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"

-       depends on CPU_V7 && SMP
+       depends on CPU_V7

        help
          This option enables the workaround for the 720789 Cortex-A9 (prior to
          r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
        help
          This option enables the workaround for the 720789 Cortex-A9 (prior to
          r2p0) erratum. A faulty ASID can be sent to the other CPUs for the


@@ -1272,7 +1297,7 @@ config ARM_ERRATA_743622
        depends on CPU_V7
        help
          This option enables the workaround for the 743622 Cortex-A9
        depends on CPU_V7
        help
          This option enables the workaround for the 743622 Cortex-A9

-         (r2p0..r2p2) erratum. Under very rare conditions, a faulty
+         (r2p*) erratum. Under very rare conditions, a faulty

          optimisation in the Cortex-A9 Store Buffer may lead to data
          corruption. This workaround sets a specific bit in the diagnostic
          register of the Cortex-A9 which disables the Store Buffer
          optimisation in the Cortex-A9 Store Buffer may lead to data
          corruption. This workaround sets a specific bit in the diagnostic
          register of the Cortex-A9 which disables the Store Buffer


@@ -1282,7 +1307,7 @@ config ARM_ERRATA_743622
 
 config ARM_ERRATA_751472
        bool "ARM errata: Interrupted ICIALLUIS may prevent completion of broadcasted operation"
 
 config ARM_ERRATA_751472
        bool "ARM errata: Interrupted ICIALLUIS may prevent completion of broadcasted operation"

-       depends on CPU_V7 && SMP
+       depends on CPU_V7

        help
          This option enables the workaround for the 751472 Cortex-A9 (prior
          to r3p0) erratum. An interrupted ICIALLUIS operation may prevent the
        help
          This option enables the workaround for the 751472 Cortex-A9 (prior
          to r3p0) erratum. An interrupted ICIALLUIS operation may prevent the


@@ -1694,6 +1719,14 @@ config HW_PERF_EVENTS
          Enable hardware performance counter support for perf events. If
          disabled, perf events will use software events only.
 
          Enable hardware performance counter support for perf events. If
          disabled, perf events will use software events only.
 

+config SYS_SUPPORTS_HUGETLBFS
+       def_bool y
+       depends on ARM_LPAE || (!CPU_USE_DOMAINS && !MEMORY_FAILURE)
+
+config HAVE_ARCH_TRANSPARENT_HUGEPAGE
+       def_bool y
+       depends on SYS_SUPPORTS_HUGETLBFS
+

 source "mm/Kconfig"
 
 config FORCE_MAX_ZONEORDER
 source "mm/Kconfig"
 
 config FORCE_MAX_ZONEORDER


@@ -1766,7 +1799,7 @@ config LEDS_CPU
          will overrule the CPU usage LED.
 
 config ALIGNMENT_TRAP
          will overrule the CPU usage LED.
 
 config ALIGNMENT_TRAP

-       bool
+       bool "Enable alignment trap"

        depends on CPU_CP15_MMU
        default y if !ARCH_EBSA110
        select HAVE_PROC_CPU if PROC_FS
        depends on CPU_CP15_MMU
        default y if !ARCH_EBSA110
        select HAVE_PROC_CPU if PROC_FS


@@ -1828,6 +1861,11 @@ config DEPRECATED_PARAM_STRUCT
          This was deprecated in 2001 and announced to live on for 5 years.
          Some old boot loaders still use this way.
 
          This was deprecated in 2001 and announced to live on for 5 years.
          Some old boot loaders still use this way.
 

+config CPU_V7_SYSFS
+       bool
+       depends on CPU_V7 && SYSFS
+       default y
+

 endmenu
 
 menu "Boot options"
 endmenu
 
 menu "Boot options"


@@ -1972,7 +2010,7 @@ endchoice
 
 config XIP_KERNEL
        bool "Kernel Execute-In-Place from ROM"
 
 config XIP_KERNEL
        bool "Kernel Execute-In-Place from ROM"

-       depends on !ZBOOT_ROM
+       depends on !ZBOOT_ROM && !ARM_LPAE

        help
          Execute-In-Place allows the kernel to run from non-volatile storage
          directly addressable by the CPU, such as NOR flash. This saves RAM
        help
          Execute-In-Place allows the kernel to run from non-volatile storage
          directly addressable by the CPU, such as NOR flash. This saves RAM


@@ -2002,7 +2040,7 @@ config XIP_PHYS_ADDR
 
 config KEXEC
        bool "Kexec system call (EXPERIMENTAL)"
 
 config KEXEC
        bool "Kexec system call (EXPERIMENTAL)"

-       depends on EXPERIMENTAL
+       depends on EXPERIMENTAL && (!SMP || HOTPLUG_CPU)

        help
          kexec is a system call that implements the ability to shutdown your
          current kernel, and to start another kernel.  It is like a reboot
        help
          kexec is a system call that implements the ability to shutdown your
          current kernel, and to start another kernel.  It is like a reboot


@@ -2056,6 +2094,7 @@ source "drivers/cpufreq/Kconfig"
 config CPU_FREQ_IMX
        tristate "CPUfreq driver for i.MX CPUs"
        depends on ARCH_MXC && CPU_FREQ
 config CPU_FREQ_IMX
        tristate "CPUfreq driver for i.MX CPUs"
        depends on ARCH_MXC && CPU_FREQ

+       select CPU_FREQ_TABLE

        help
          This enables the CPUfreq driver for i.MX CPUs.
 
        help
          This enables the CPUfreq driver for i.MX CPUs.