drivers/usb/otg/twl4030-usb.c

   1 /*
   2  * twl4030_usb - TWL4030 USB transceiver, talking to OMAP OTG controller
   3  *
   4  * Copyright (C) 2004-2007 Texas Instruments
   5  * Copyright (C) 2008 Nokia Corporation
   6  * Contact: Felipe Balbi <felipe.balbi@nokia.com>
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License as published by
  10  * the Free Software Foundation; either version 2 of the License, or
  11  * (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21  *
  22  * Current status:
  23  *      - HS USB ULPI mode works.
  24  *      - 3-pin mode support may be added in future.
  25  */
  26
  27 #include <linux/module.h>
  28 #include <linux/init.h>
  29 #include <linux/interrupt.h>
  30 #include <linux/platform_device.h>
  31 #include <linux/spinlock.h>
  32 #include <linux/workqueue.h>
  33 #include <linux/io.h>
  34 #include <linux/delay.h>
  35 #include <linux/usb/otg.h>
  36 #include <linux/usb/ulpi.h>
  37 #include <linux/i2c/twl.h>
  38 #include <linux/regulator/consumer.h>
  39 #include <linux/err.h>
  40 #include <linux/notifier.h>
  41 #include <linux/slab.h>
  42
  43 /* Register defines */
  44
  45 #define MCPC_CTRL                       0x30
  46 #define MCPC_CTRL_RTSOL                 (1 << 7)
  47 #define MCPC_CTRL_EXTSWR                (1 << 6)
  48 #define MCPC_CTRL_EXTSWC                (1 << 5)
  49 #define MCPC_CTRL_VOICESW               (1 << 4)
  50 #define MCPC_CTRL_OUT64K                (1 << 3)
  51 #define MCPC_CTRL_RTSCTSSW              (1 << 2)
  52 #define MCPC_CTRL_HS_UART               (1 << 0)
  53
  54 #define MCPC_IO_CTRL                    0x33
  55 #define MCPC_IO_CTRL_MICBIASEN          (1 << 5)
  56 #define MCPC_IO_CTRL_CTS_NPU            (1 << 4)
  57 #define MCPC_IO_CTRL_RXD_PU             (1 << 3)
  58 #define MCPC_IO_CTRL_TXDTYP             (1 << 2)
  59 #define MCPC_IO_CTRL_CTSTYP             (1 << 1)
  60 #define MCPC_IO_CTRL_RTSTYP             (1 << 0)
  61
  62 #define MCPC_CTRL2                      0x36
  63 #define MCPC_CTRL2_MCPC_CK_EN           (1 << 0)
  64
  65 #define OTHER_FUNC_CTRL                 0x80
  66 #define OTHER_FUNC_CTRL_BDIS_ACON_EN    (1 << 4)
  67 #define OTHER_FUNC_CTRL_FIVEWIRE_MODE   (1 << 2)
  68
  69 #define OTHER_IFC_CTRL                  0x83
  70 #define OTHER_IFC_CTRL_OE_INT_EN        (1 << 6)
  71 #define OTHER_IFC_CTRL_CEA2011_MODE     (1 << 5)
  72 #define OTHER_IFC_CTRL_FSLSSERIALMODE_4PIN      (1 << 4)
  73 #define OTHER_IFC_CTRL_HIZ_ULPI_60MHZ_OUT       (1 << 3)
  74 #define OTHER_IFC_CTRL_HIZ_ULPI         (1 << 2)
  75 #define OTHER_IFC_CTRL_ALT_INT_REROUTE  (1 << 0)
  76
  77 #define OTHER_INT_EN_RISE               0x86
  78 #define OTHER_INT_EN_FALL               0x89
  79 #define OTHER_INT_STS                   0x8C
  80 #define OTHER_INT_LATCH                 0x8D
  81 #define OTHER_INT_VB_SESS_VLD           (1 << 7)
  82 #define OTHER_INT_DM_HI                 (1 << 6) /* not valid for "latch" reg */
  83 #define OTHER_INT_DP_HI                 (1 << 5) /* not valid for "latch" reg */
  84 #define OTHER_INT_BDIS_ACON             (1 << 3) /* not valid for "fall" regs */
  85 #define OTHER_INT_MANU                  (1 << 1)
  86 #define OTHER_INT_ABNORMAL_STRESS       (1 << 0)
  87
  88 #define ID_STATUS                       0x96
  89 #define ID_RES_FLOAT                    (1 << 4)
  90 #define ID_RES_440K                     (1 << 3)
  91 #define ID_RES_200K                     (1 << 2)
  92 #define ID_RES_102K                     (1 << 1)
  93 #define ID_RES_GND                      (1 << 0)
  94
  95 #define POWER_CTRL                      0xAC
  96 #define POWER_CTRL_OTG_ENAB             (1 << 5)
  97
  98 #define OTHER_IFC_CTRL2                 0xAF
  99 #define OTHER_IFC_CTRL2_ULPI_STP_LOW    (1 << 4)
 100 #define OTHER_IFC_CTRL2_ULPI_TXEN_POL   (1 << 3)
 101 #define OTHER_IFC_CTRL2_ULPI_4PIN_2430  (1 << 2)
 102 #define OTHER_IFC_CTRL2_USB_INT_OUTSEL_MASK     (3 << 0) /* bits 0 and 1 */
 103 #define OTHER_IFC_CTRL2_USB_INT_OUTSEL_INT1N    (0 << 0)
 104 #define OTHER_IFC_CTRL2_USB_INT_OUTSEL_INT2N    (1 << 0)
 105
 106 #define REG_CTRL_EN                     0xB2
 107 #define REG_CTRL_ERROR                  0xB5
 108 #define ULPI_I2C_CONFLICT_INTEN         (1 << 0)
 109
 110 #define OTHER_FUNC_CTRL2                0xB8
 111 #define OTHER_FUNC_CTRL2_VBAT_TIMER_EN  (1 << 0)
 112
 113 /* following registers do not have separate _clr and _set registers */
 114 #define VBUS_DEBOUNCE                   0xC0
 115 #define ID_DEBOUNCE                     0xC1
 116 #define VBAT_TIMER                      0xD3
 117 #define PHY_PWR_CTRL                    0xFD
 118 #define PHY_PWR_PHYPWD                  (1 << 0)
 119 #define PHY_CLK_CTRL                    0xFE
 120 #define PHY_CLK_CTRL_CLOCKGATING_EN     (1 << 2)
 121 #define PHY_CLK_CTRL_CLK32K_EN          (1 << 1)
 122 #define REQ_PHY_DPLL_CLK                (1 << 0)
 123 #define PHY_CLK_CTRL_STS                0xFF
 124 #define PHY_DPLL_CLK                    (1 << 0)
 125
 126 /* In module TWL4030_MODULE_PM_MASTER */
 127 #define STS_HW_CONDITIONS               0x0F
 128
 129 /* In module TWL4030_MODULE_PM_RECEIVER */
 130 #define VUSB_DEDICATED1                 0x7D
 131 #define VUSB_DEDICATED2                 0x7E
 132 #define VUSB1V5_DEV_GRP                 0x71
 133 #define VUSB1V5_TYPE                    0x72
 134 #define VUSB1V5_REMAP                   0x73
 135 #define VUSB1V8_DEV_GRP                 0x74
 136 #define VUSB1V8_TYPE                    0x75
 137 #define VUSB1V8_REMAP                   0x76
 138 #define VUSB3V1_DEV_GRP                 0x77
 139 #define VUSB3V1_TYPE                    0x78
 140 #define VUSB3V1_REMAP                   0x79
 141
 142 /* In module TWL4030_MODULE_INTBR */
 143 #define PMBR1                           0x0D
 144 #define GPIO_USB_4PIN_ULPI_2430C        (3 << 0)
 145
 146 struct twl4030_usb {
 147         struct otg_transceiver  otg;
 148         struct device           *dev;
 149
 150         /* TWL4030 internal USB regulator supplies */
 151         struct regulator        *usb1v5;
 152         struct regulator        *usb1v8;
 153         struct regulator        *usb3v1;
 154
 155         /* for vbus reporting with irqs disabled */
 156         spinlock_t              lock;
 157
 158         /* pin configuration */
 159         enum twl4030_usb_mode   usb_mode;
 160
 161         int                     irq;
 162         u8                      linkstat;
 163         bool                    vbus_supplied;
 164         u8                      asleep;
 165         bool                    irq_enabled;
 166
 167         struct delayed_work     id_workaround_work;
 168 };
 169
 170 /* internal define on top of container_of */
 171 #define xceiv_to_twl(x)         container_of((x), struct twl4030_usb, otg)
 172
 173 /*-------------------------------------------------------------------------*/
 174
 175 static int twl4030_i2c_write_u8_verify(struct twl4030_usb *twl,
 176                 u8 module, u8 data, u8 address)
 177 {
 178         u8 check;
 179
 180         if ((twl_i2c_write_u8(module, data, address) >= 0) &&
 181             (twl_i2c_read_u8(module, &check, address) >= 0) &&
 182                                                 (check == data))
 183                 return 0;
 184         dev_dbg(twl->dev, "Write%d[%d,0x%x] wrote %02x but read %02x\n",
 185                         1, module, address, check, data);
 186
 187         /* Failed once: Try again */
 188         if ((twl_i2c_write_u8(module, data, address) >= 0) &&
 189             (twl_i2c_read_u8(module, &check, address) >= 0) &&
 190                                                 (check == data))
 191                 return 0;
 192         dev_dbg(twl->dev, "Write%d[%d,0x%x] wrote %02x but read %02x\n",
 193                         2, module, address, check, data);
 194
 195         /* Failed again: Return error */
 196         return -EBUSY;
 197 }
 198
 199 #define twl4030_usb_write_verify(twl, address, data)    \
 200         twl4030_i2c_write_u8_verify(twl, TWL4030_MODULE_USB, (data), (address))
 201
 202 static inline int twl4030_usb_write(struct twl4030_usb *twl,
 203                 u8 address, u8 data)
 204 {
 205         int ret = 0;
 206
 207         ret = twl_i2c_write_u8(TWL4030_MODULE_USB, data, address);
 208         if (ret < 0)
 209                 dev_dbg(twl->dev,
 210                         "TWL4030:USB:Write[0x%x] Error %d\n", address, ret);
 211         return ret;
 212 }
 213
 214 static inline int twl4030_readb(struct twl4030_usb *twl, u8 module, u8 address)
 215 {
 216         u8 data;
 217         int ret = 0;
 218
 219         ret = twl_i2c_read_u8(module, &data, address);
 220         if (ret >= 0)
 221                 ret = data;
 222         else
 223                 dev_dbg(twl->dev,
 224                         "TWL4030:readb[0x%x,0x%x] Error %d\n",
 225                                         module, address, ret);
 226
 227         return ret;
 228 }
 229
 230 static inline int twl4030_usb_read(struct twl4030_usb *twl, u8 address)
 231 {
 232         return twl4030_readb(twl, TWL4030_MODULE_USB, address);
 233 }
 234
 235 /*-------------------------------------------------------------------------*/
 236
 237 static inline int
 238 twl4030_usb_set_bits(struct twl4030_usb *twl, u8 reg, u8 bits)
 239 {
 240         return twl4030_usb_write(twl, ULPI_SET(reg), bits);
 241 }
 242
 243 static inline int
 244 twl4030_usb_clear_bits(struct twl4030_usb *twl, u8 reg, u8 bits)
 245 {
 246         return twl4030_usb_write(twl, ULPI_CLR(reg), bits);
 247 }
 248
 249 /*-------------------------------------------------------------------------*/
 250
 251 static bool twl4030_is_driving_vbus(struct twl4030_usb *twl)
 252 {
 253         int ret;
 254
 255         ret = twl4030_usb_read(twl, PHY_CLK_CTRL_STS);
 256         if (ret < 0 || !(ret & PHY_DPLL_CLK))
 257                 /*
 258                  * if clocks are off, registers are not updated,
 259                  * but we can assume we don't drive VBUS in this case
 260                  */
 261                 return false;
 262
 263         ret = twl4030_usb_read(twl, ULPI_OTG_CTRL);
 264         if (ret < 0)
 265                 return false;
 266
 267         return (ret & (ULPI_OTG_DRVVBUS | ULPI_OTG_CHRGVBUS)) ? true : false;
 268 }
 269
 270 static enum usb_xceiv_events twl4030_usb_linkstat(struct twl4030_usb *twl)
 271 {
 272         int     status;
 273         int     linkstat = USB_EVENT_NONE;
 274         bool    driving_vbus = false;
 275
 276         twl->vbus_supplied = false;
 277
 278         /*
 279          * For ID/VBUS sensing, see manual section 15.4.8 ...
 280          * except when using only battery backup power, two
 281          * comparators produce VBUS_PRES and ID_PRES signals,
 282          * which don't match docs elsewhere.  But ... BIT(7)
 283          * and BIT(2) of STS_HW_CONDITIONS, respectively, do
 284          * seem to match up.  If either is true the USB_PRES
 285          * signal is active, the OTG module is activated, and
 286          * its interrupt may be raised (may wake the system).
 287          */
 288         status = twl4030_readb(twl, TWL4030_MODULE_PM_MASTER,
 289                         STS_HW_CONDITIONS);
 290         if (status < 0)
 291                 dev_err(twl->dev, "USB link status err %d\n", status);
 292         else if (status & (BIT(7) | BIT(2))) {
 293                 if (status & BIT(7)) {
 294                         driving_vbus = twl4030_is_driving_vbus(twl);
 295                         if (driving_vbus)
 296                                 status &= ~BIT(7);
 297                 }
 298
 299                 if (status & BIT(2))
 300                         linkstat = USB_EVENT_ID;
 301                 else if (status & BIT(7)) {
 302                         linkstat = USB_EVENT_VBUS;
 303                         twl->vbus_supplied = true;
 304                 }
 305         }
 306
 307         dev_dbg(twl->dev, "HW_CONDITIONS 0x%02x; link %d, driving_vbus %d\n",
 308                         status, linkstat, driving_vbus);
 309
 310         if (twl->otg.last_event == linkstat)
 311                 return linkstat;
 312
 313         twl->otg.last_event = linkstat;
 314
 315         /* REVISIT this assumes host and peripheral controllers
 316          * are registered, and that both are active...
 317          */
 318
 319         spin_lock_irq(&twl->lock);
 320         twl->linkstat = linkstat;
 321         if (linkstat == USB_EVENT_ID) {
 322                 twl->otg.default_a = true;
 323                 twl->otg.state = OTG_STATE_A_IDLE;
 324         } else {
 325                 twl->otg.default_a = false;
 326                 twl->otg.state = OTG_STATE_B_IDLE;
 327         }
 328         spin_unlock_irq(&twl->lock);
 329
 330         return linkstat;
 331 }
 332
 333 static void twl4030_usb_set_mode(struct twl4030_usb *twl, int mode)
 334 {
 335         twl->usb_mode = mode;
 336
 337         switch (mode) {
 338         case T2_USB_MODE_ULPI:
 339                 twl4030_usb_clear_bits(twl, ULPI_IFC_CTRL,
 340                                         ULPI_IFC_CTRL_CARKITMODE);
 341                 twl4030_usb_set_bits(twl, POWER_CTRL, POWER_CTRL_OTG_ENAB);
 342                 twl4030_usb_clear_bits(twl, ULPI_FUNC_CTRL,
 343                                         ULPI_FUNC_CTRL_XCVRSEL_MASK |
 344                                         ULPI_FUNC_CTRL_OPMODE_MASK);
 345                 break;
 346         case -1:
 347                 /* FIXME: power on defaults */
 348                 break;
 349         default:
 350                 dev_err(twl->dev, "unsupported T2 transceiver mode %d\n",
 351                                 mode);
 352                 break;
 353         };
 354 }
 355
 356 static void twl4030_i2c_access(struct twl4030_usb *twl, int on)
 357 {
 358         unsigned long timeout;
 359         int val = twl4030_usb_read(twl, PHY_CLK_CTRL);
 360
 361         if (val >= 0) {
 362                 if (on) {
 363                         /* enable DPLL to access PHY registers over I2C */
 364                         val |= REQ_PHY_DPLL_CLK;
 365                         WARN_ON(twl4030_usb_write_verify(twl, PHY_CLK_CTRL,
 366                                                 (u8)val) < 0);
 367
 368                         timeout = jiffies + HZ;
 369                         while (!(twl4030_usb_read(twl, PHY_CLK_CTRL_STS) &
 370                                                         PHY_DPLL_CLK)
 371                                 && time_before(jiffies, timeout))
 372                                         udelay(10);
 373                         if (!(twl4030_usb_read(twl, PHY_CLK_CTRL_STS) &
 374                                                         PHY_DPLL_CLK))
 375                                 dev_err(twl->dev, "Timeout setting T2 HSUSB "
 376                                                 "PHY DPLL clock\n");
 377                 } else {
 378                         /* let ULPI control the DPLL clock */
 379                         val &= ~REQ_PHY_DPLL_CLK;
 380                         WARN_ON(twl4030_usb_write_verify(twl, PHY_CLK_CTRL,
 381                                                 (u8)val) < 0);
 382                 }
 383         }
 384 }
 385
 386 static void __twl4030_phy_power(struct twl4030_usb *twl, int on)
 387 {
 388         u8 pwr = twl4030_usb_read(twl, PHY_PWR_CTRL);
 389
 390         if (on)
 391                 pwr &= ~PHY_PWR_PHYPWD;
 392         else
 393                 pwr |= PHY_PWR_PHYPWD;
 394
 395         WARN_ON(twl4030_usb_write_verify(twl, PHY_PWR_CTRL, pwr) < 0);
 396 }
 397
 398 static void twl4030_phy_power(struct twl4030_usb *twl, int on)
 399 {
 400         if (on) {
 401                 regulator_enable(twl->usb3v1);
 402                 regulator_enable(twl->usb1v8);
 403                 /*
 404                  * Disabling usb3v1 regulator (= writing 0 to VUSB3V1_DEV_GRP
 405                  * in twl4030) resets the VUSB_DEDICATED2 register. This reset
 406                  * enables VUSB3V1_SLEEP bit that remaps usb3v1 ACTIVE state to
 407                  * SLEEP. We work around this by clearing the bit after usv3v1
 408                  * is re-activated. This ensures that VUSB3V1 is really active.
 409                  */
 410                 twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0,
 411                                                         VUSB_DEDICATED2);
 412                 regulator_enable(twl->usb1v5);
 413                 __twl4030_phy_power(twl, 1);
 414                 twl4030_usb_write(twl, PHY_CLK_CTRL,
 415                                   twl4030_usb_read(twl, PHY_CLK_CTRL) |
 416                                         (PHY_CLK_CTRL_CLOCKGATING_EN |
 417                                                 PHY_CLK_CTRL_CLK32K_EN));
 418         } else {
 419                 __twl4030_phy_power(twl, 0);
 420                 regulator_disable(twl->usb1v5);
 421                 regulator_disable(twl->usb1v8);
 422                 regulator_disable(twl->usb3v1);
 423         }
 424 }
 425
 426 static void twl4030_phy_suspend(struct twl4030_usb *twl, int controller_off)
 427 {
 428         if (twl->asleep)
 429                 return;
 430
 431         twl4030_phy_power(twl, 0);
 432         twl->asleep = 1;
 433         dev_dbg(twl->dev, "%s\n", __func__);
 434 }
 435
 436 static void __twl4030_phy_resume(struct twl4030_usb *twl)
 437 {
 438         twl4030_phy_power(twl, 1);
 439         twl4030_i2c_access(twl, 1);
 440         twl4030_usb_set_mode(twl, twl->usb_mode);
 441         if (twl->usb_mode == T2_USB_MODE_ULPI)
 442                 twl4030_i2c_access(twl, 0);
 443 }
 444
 445 static void twl4030_phy_resume(struct twl4030_usb *twl)
 446 {
 447         if (!twl->asleep)
 448                 return;
 449         __twl4030_phy_resume(twl);
 450         twl->asleep = 0;
 451
 452         /*
 453          * XXX When VBUS gets driven after musb goes to A mode,
 454          * ID_PRES related interrupts no longer arrive, why?
 455          * Register itself is updated fine though, so we must poll.
 456          */
 457         if (twl->otg.last_event == USB_EVENT_ID) {
 458                 cancel_delayed_work(&twl->id_workaround_work);
 459                 schedule_delayed_work(&twl->id_workaround_work, HZ);
 460         }
 461 }
 462
 463 static int twl4030_usb_ldo_init(struct twl4030_usb *twl)
 464 {
 465         /* Enable writing to power configuration registers */
 466         twl_i2c_write_u8(TWL4030_MODULE_PM_MASTER,
 467                         TWL4030_PM_MASTER_KEY_CFG1,
 468                         TWL4030_PM_MASTER_PROTECT_KEY);
 469
 470         twl_i2c_write_u8(TWL4030_MODULE_PM_MASTER,
 471                         TWL4030_PM_MASTER_KEY_CFG2,
 472                         TWL4030_PM_MASTER_PROTECT_KEY);
 473
 474         /* Keep VUSB3V1 LDO in sleep state until VBUS/ID change detected*/
 475         /*twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0, VUSB_DEDICATED2);*/
 476
 477         /* input to VUSB3V1 LDO is from VBAT, not VBUS */
 478         twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0x14, VUSB_DEDICATED1);
 479
 480         /* Initialize 3.1V regulator */
 481         twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0, VUSB3V1_DEV_GRP);
 482
 483         twl->usb3v1 = regulator_get(twl->dev, "usb3v1");
 484         if (IS_ERR(twl->usb3v1))
 485                 return -ENODEV;
 486
 487         twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0, VUSB3V1_TYPE);
 488
 489         /* Initialize 1.5V regulator */
 490         twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0, VUSB1V5_DEV_GRP);
 491
 492         twl->usb1v5 = regulator_get(twl->dev, "usb1v5");
 493         if (IS_ERR(twl->usb1v5))
 494                 goto fail1;
 495
 496         twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0, VUSB1V5_TYPE);
 497
 498         /* Initialize 1.8V regulator */
 499         twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0, VUSB1V8_DEV_GRP);
 500
 501         twl->usb1v8 = regulator_get(twl->dev, "usb1v8");
 502         if (IS_ERR(twl->usb1v8))
 503                 goto fail2;
 504
 505         twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0, VUSB1V8_TYPE);
 506
 507         /* disable access to power configuration registers */
 508         twl_i2c_write_u8(TWL4030_MODULE_PM_MASTER, 0,
 509                         TWL4030_PM_MASTER_PROTECT_KEY);
 510
 511         return 0;
 512
 513 fail2:
 514         regulator_put(twl->usb1v5);
 515         twl->usb1v5 = NULL;
 516 fail1:
 517         regulator_put(twl->usb3v1);
 518         twl->usb3v1 = NULL;
 519         return -ENODEV;
 520 }
 521
 522 static ssize_t twl4030_usb_vbus_show(struct device *dev,
 523                 struct device_attribute *attr, char *buf)
 524 {
 525         struct twl4030_usb *twl = dev_get_drvdata(dev);
 526         unsigned long flags;
 527         int ret = -EINVAL;
 528
 529         spin_lock_irqsave(&twl->lock, flags);
 530         ret = sprintf(buf, "%s\n",
 531                         twl->vbus_supplied ? "on" : "off");
 532         spin_unlock_irqrestore(&twl->lock, flags);
 533
 534         return ret;
 535 }
 536 static DEVICE_ATTR(vbus, 0444, twl4030_usb_vbus_show, NULL);
 537
 538 static ssize_t twl4030_usb_id_show(struct device *dev,
 539                 struct device_attribute *attr, char *buf)
 540 {
 541         int ret;
 542         int n = 0;
 543         struct twl4030_usb *twl = dev_get_drvdata(dev);
 544         twl4030_i2c_access(twl, 1);
 545         ret = twl4030_usb_read(twl, ULPI_OTG_CTRL);
 546         if ((ret < 0) || (!(ret & ULPI_OTG_ID_PULLUP))) {
 547                 /*
 548                  * enable ID pullup so that the id pin state can be measured,
 549                  * seems to be disabled sometimes for some reasons
 550                  */
 551                 dev_dbg(dev, "ULPI_OTG_ID_PULLUP not set (%x)\n", ret);
 552                 twl4030_usb_set_bits(twl, ULPI_OTG_CTRL, ULPI_OTG_ID_PULLUP);
 553                 mdelay(100);
 554         }
 555         ret = twl4030_usb_read(twl, ID_STATUS);
 556         twl4030_i2c_access(twl, 0);
 557         if (ret < 0)
 558                 return ret;
 559         if (ret & ID_RES_FLOAT)
 560                 n = scnprintf(buf, PAGE_SIZE, "%s\n", "floating");
 561         else if (ret & ID_RES_440K)
 562                 n = scnprintf(buf, PAGE_SIZE, "%s\n", "440k");
 563         else if (ret & ID_RES_200K)
 564                 n = scnprintf(buf, PAGE_SIZE, "%s\n", "200k");
 565         else if (ret & ID_RES_102K)
 566                 n = scnprintf(buf, PAGE_SIZE, "%s\n", "102k");
 567         else if (ret & ID_RES_GND)
 568                 n = scnprintf(buf, PAGE_SIZE, "%s\n", "GND");
 569         else
 570                 n = scnprintf(buf, PAGE_SIZE, "unknown: id=0x%x\n", ret);
 571         return n;
 572 }
 573 static DEVICE_ATTR(id, 0444, twl4030_usb_id_show, NULL);
 574
 575 static irqreturn_t twl4030_usb_irq(int irq, void *_twl)
 576 {
 577         struct twl4030_usb *twl = _twl;
 578         int status_old = twl->otg.last_event;
 579         int status;
 580
 581         status = twl4030_usb_linkstat(twl);
 582         if (status >= 0) {
 583                 /* FIXME add a set_power() method so that B-devices can
 584                  * configure the charger appropriately.  It's not always
 585                  * correct to consume VBUS power, and how much current to
 586                  * consume is a function of the USB configuration chosen
 587                  * by the host.
 588                  *
 589                  * REVISIT usb_gadget_vbus_connect(...) as needed, ditto
 590                  * its disconnect() sibling, when changing to/from the
 591                  * USB_LINK_VBUS state.  musb_hdrc won't care until it
 592                  * starts to handle softconnect right.
 593                  */
 594                 if (status != status_old)
 595                         atomic_notifier_call_chain(&twl->otg.notifier, status,
 596                                 twl->otg.gadget);
 597         }
 598         sysfs_notify(&twl->dev->kobj, NULL, "vbus");
 599
 600         return IRQ_HANDLED;
 601 }
 602
 603 static void twl4030_id_workaround_work(struct work_struct *work)
 604 {
 605         struct twl4030_usb *twl = container_of(work, struct twl4030_usb,
 606                 id_workaround_work.work);
 607         int status_old = twl->otg.last_event;
 608         int status;
 609
 610         status = twl4030_usb_linkstat(twl);
 611         if (status != status_old) {
 612                 dev_dbg(twl->dev, "handle missing status change: %d->%d\n",
 613                         status_old, status);
 614                 twl->otg.last_event = status_old;
 615                 twl4030_usb_irq(0, twl);
 616         }
 617
 618         /* don't schedule during sleep - irq works right then */
 619         if (status == USB_EVENT_ID && !twl->asleep) {
 620                 cancel_delayed_work(&twl->id_workaround_work);
 621                 schedule_delayed_work(&twl->id_workaround_work, HZ);
 622         }
 623 }
 624
 625 static void twl4030_usb_phy_init(struct twl4030_usb *twl)
 626 {
 627         int status;
 628
 629         /*
 630          * Start in sleep state, we'll get otg.set_suspend(false) call
 631          * and power up when musb runtime_pm enable kicks in.
 632          */
 633         __twl4030_phy_power(twl, 0);
 634         twl->asleep = 1;
 635
 636         status = twl4030_usb_linkstat(twl);
 637         if (status >= 0 && status != USB_EVENT_NONE)
 638                 atomic_notifier_call_chain(&twl->otg.notifier, status,
 639                         twl->otg.gadget);
 640
 641         sysfs_notify(&twl->dev->kobj, NULL, "vbus");
 642 }
 643
 644 static int twl4030_set_suspend(struct otg_transceiver *x, int suspend)
 645 {
 646         struct twl4030_usb *twl = xceiv_to_twl(x);
 647
 648         if (suspend)
 649                 twl4030_phy_suspend(twl, 1);
 650         else
 651                 twl4030_phy_resume(twl);
 652
 653         return 0;
 654 }
 655
 656 static int twl4030_set_peripheral(struct otg_transceiver *x,
 657                 struct usb_gadget *gadget)
 658 {
 659         struct twl4030_usb *twl;
 660
 661         if (!x)
 662                 return -ENODEV;
 663
 664         twl = xceiv_to_twl(x);
 665         twl->otg.gadget = gadget;
 666         if (!gadget)
 667                 twl->otg.state = OTG_STATE_UNDEFINED;
 668
 669         return 0;
 670 }
 671
 672 static int twl4030_set_host(struct otg_transceiver *x, struct usb_bus *host)
 673 {
 674         struct twl4030_usb *twl;
 675
 676         if (!x)
 677                 return -ENODEV;
 678
 679         twl = xceiv_to_twl(x);
 680         twl->otg.host = host;
 681         if (!host)
 682                 twl->otg.state = OTG_STATE_UNDEFINED;
 683
 684         return 0;
 685 }
 686
 687 static int __devinit twl4030_usb_probe(struct platform_device *pdev)
 688 {
 689         struct twl4030_usb_data *pdata = pdev->dev.platform_data;
 690         struct twl4030_usb      *twl;
 691         int                     status, err;
 692
 693         if (!pdata) {
 694                 dev_dbg(&pdev->dev, "platform_data not available\n");
 695                 return -EINVAL;
 696         }
 697
 698         twl = kzalloc(sizeof *twl, GFP_KERNEL);
 699         if (!twl)
 700                 return -ENOMEM;
 701
 702         twl->dev                = &pdev->dev;
 703         twl->irq                = platform_get_irq(pdev, 0);
 704         twl->otg.dev            = twl->dev;
 705         twl->otg.label          = "twl4030";
 706         twl->otg.set_host       = twl4030_set_host;
 707         twl->otg.set_peripheral = twl4030_set_peripheral;
 708         twl->otg.set_suspend    = twl4030_set_suspend;
 709         twl->usb_mode           = pdata->usb_mode;
 710         twl->vbus_supplied      = false;
 711         twl->asleep = 1;
 712
 713         /* init spinlock for workqueue */
 714         spin_lock_init(&twl->lock);
 715
 716         INIT_DELAYED_WORK(&twl->id_workaround_work, twl4030_id_workaround_work);
 717
 718         err = twl4030_usb_ldo_init(twl);
 719         if (err) {
 720                 dev_err(&pdev->dev, "ldo init failed\n");
 721                 kfree(twl);
 722                 return err;
 723         }
 724         otg_set_transceiver(&twl->otg);
 725
 726         platform_set_drvdata(pdev, twl);
 727         if (device_create_file(&pdev->dev, &dev_attr_vbus))
 728                 dev_warn(&pdev->dev, "could not create sysfs file\n");
 729         if (device_create_file(&pdev->dev, &dev_attr_id))
 730                 dev_warn(&pdev->dev, "could not create sysfs file\n");
 731
 732         ATOMIC_INIT_NOTIFIER_HEAD(&twl->otg.notifier);
 733
 734         /* Our job is to use irqs and status from the power module
 735          * to keep the transceiver disabled when nothing's connected.
 736          *
 737          * FIXME we actually shouldn't start enabling it until the
 738          * USB controller drivers have said they're ready, by calling
 739          * set_host() and/or set_peripheral() ... OTG_capable boards
 740          * need both handles, otherwise just one suffices.
 741          */
 742         twl->irq_enabled = true;
 743         status = request_threaded_irq(twl->irq, NULL, twl4030_usb_irq,
 744                         IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
 745                         "twl4030_usb", twl);
 746         if (status < 0) {
 747                 dev_dbg(&pdev->dev, "can't get IRQ %d, err %d\n",
 748                         twl->irq, status);
 749                 kfree(twl);
 750                 return status;
 751         }
 752
 753         twl4030_usb_phy_init(twl);
 754
 755         dev_info(&pdev->dev, "Initialized TWL4030 USB module\n");
 756         return 0;
 757 }
 758
 759 static int __exit twl4030_usb_remove(struct platform_device *pdev)
 760 {
 761         struct twl4030_usb *twl = platform_get_drvdata(pdev);
 762         int val;
 763
 764         cancel_delayed_work(&twl->id_workaround_work);
 765         free_irq(twl->irq, twl);
 766         device_remove_file(twl->dev, &dev_attr_id);
 767         device_remove_file(twl->dev, &dev_attr_vbus);
 768
 769         /* set transceiver mode to power on defaults */
 770         twl4030_usb_set_mode(twl, -1);
 771
 772         /* autogate 60MHz ULPI clock,
 773          * clear dpll clock request for i2c access,
 774          * disable 32KHz
 775          */
 776         val = twl4030_usb_read(twl, PHY_CLK_CTRL);
 777         if (val >= 0) {
 778                 val |= PHY_CLK_CTRL_CLOCKGATING_EN;
 779                 val &= ~(PHY_CLK_CTRL_CLK32K_EN | REQ_PHY_DPLL_CLK);
 780                 twl4030_usb_write(twl, PHY_CLK_CTRL, (u8)val);
 781         }
 782
 783         /* disable complete OTG block */
 784         twl4030_usb_clear_bits(twl, POWER_CTRL, POWER_CTRL_OTG_ENAB);
 785
 786         if (!twl->asleep)
 787                 twl4030_phy_power(twl, 0);
 788         regulator_put(twl->usb1v5);
 789         regulator_put(twl->usb1v8);
 790         regulator_put(twl->usb3v1);
 791
 792         kfree(twl);
 793
 794         return 0;
 795 }
 796
 797 static struct platform_driver twl4030_usb_driver = {
 798         .probe          = twl4030_usb_probe,
 799         .remove         = __exit_p(twl4030_usb_remove),
 800         .driver         = {
 801                 .name   = "twl4030_usb",
 802                 .owner  = THIS_MODULE,
 803         },
 804 };
 805
 806 static int __init twl4030_usb_init(void)
 807 {
 808         return platform_driver_register(&twl4030_usb_driver);
 809 }
 810 subsys_initcall(twl4030_usb_init);
 811
 812 static void __exit twl4030_usb_exit(void)
 813 {
 814         platform_driver_unregister(&twl4030_usb_driver);
 815 }
 816 module_exit(twl4030_usb_exit);
 817
 818 MODULE_ALIAS("platform:twl4030_usb");
 819 MODULE_AUTHOR("Texas Instruments, Inc, Nokia Corporation");
 820 MODULE_DESCRIPTION("TWL4030 USB transceiver driver");
 821 MODULE_LICENSE("GPL");