2 * xHCI host controller driver
4 * Copyright (C) 2008 Intel Corp.
7 * Some code borrowed from the Linux EHCI driver.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software Foundation,
20 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 #include <linux/pci.h>
24 #include <linux/irq.h>
25 #include <linux/log2.h>
26 #include <linux/module.h>
27 #include <linux/moduleparam.h>
28 #include <linux/slab.h>
29 #include <linux/dmi.h>
33 #define DRIVER_AUTHOR "Sarah Sharp"
34 #define DRIVER_DESC "'eXtensible' Host Controller (xHC) Driver"
36 /* Some 0.95 hardware can't handle the chain bit on a Link TRB being cleared */
37 static int link_quirk;
38 module_param(link_quirk, int, S_IRUGO | S_IWUSR);
39 MODULE_PARM_DESC(link_quirk, "Don't clear the chain bit on a link TRB");
41 /* TODO: copied from ehci-hcd.c - can this be refactored? */
43 * handshake - spin reading hc until handshake completes or fails
44 * @ptr: address of hc register to be read
45 * @mask: bits to look at in result of read
46 * @done: value of those bits when handshake succeeds
47 * @usec: timeout in microseconds
49 * Returns negative errno, or zero on success
51 * Success happens when the "mask" bits have the specified value (hardware
52 * handshake done). There are two failure modes: "usec" have passed (major
53 * hardware flakeout), or the register reads as all-ones (hardware removed).
55 static int handshake(struct xhci_hcd *xhci, void __iomem *ptr,
56 u32 mask, u32 done, int usec)
61 result = xhci_readl(xhci, ptr);
62 if (result == ~(u32)0) /* card removed */
74 * Disable interrupts and begin the xHCI halting process.
76 void xhci_quiesce(struct xhci_hcd *xhci)
83 halted = xhci_readl(xhci, &xhci->op_regs->status) & STS_HALT;
87 cmd = xhci_readl(xhci, &xhci->op_regs->command);
89 xhci_writel(xhci, cmd, &xhci->op_regs->command);
93 * Force HC into halt state.
95 * Disable any IRQs and clear the run/stop bit.
96 * HC will complete any current and actively pipelined transactions, and
97 * should halt within 16 ms of the run/stop bit being cleared.
98 * Read HC Halted bit in the status register to see when the HC is finished.
100 int xhci_halt(struct xhci_hcd *xhci)
103 xhci_dbg(xhci, "// Halt the HC\n");
106 ret = handshake(xhci, &xhci->op_regs->status,
107 STS_HALT, STS_HALT, XHCI_MAX_HALT_USEC);
109 xhci->xhc_state |= XHCI_STATE_HALTED;
111 xhci_warn(xhci, "Host not halted after %u microseconds.\n",
117 * Set the run bit and wait for the host to be running.
119 static int xhci_start(struct xhci_hcd *xhci)
124 temp = xhci_readl(xhci, &xhci->op_regs->command);
126 xhci_dbg(xhci, "// Turn on HC, cmd = 0x%x.\n",
128 xhci_writel(xhci, temp, &xhci->op_regs->command);
131 * Wait for the HCHalted Status bit to be 0 to indicate the host is
134 ret = handshake(xhci, &xhci->op_regs->status,
135 STS_HALT, 0, XHCI_MAX_HALT_USEC);
136 if (ret == -ETIMEDOUT)
137 xhci_err(xhci, "Host took too long to start, "
138 "waited %u microseconds.\n",
141 xhci->xhc_state &= ~XHCI_STATE_HALTED;
148 * This resets pipelines, timers, counters, state machines, etc.
149 * Transactions will be terminated immediately, and operational registers
150 * will be set to their defaults.
152 int xhci_reset(struct xhci_hcd *xhci)
158 state = xhci_readl(xhci, &xhci->op_regs->status);
159 if ((state & STS_HALT) == 0) {
160 xhci_warn(xhci, "Host controller not halted, aborting reset.\n");
164 xhci_dbg(xhci, "// Reset the HC\n");
165 command = xhci_readl(xhci, &xhci->op_regs->command);
166 command |= CMD_RESET;
167 xhci_writel(xhci, command, &xhci->op_regs->command);
169 ret = handshake(xhci, &xhci->op_regs->command,
170 CMD_RESET, 0, 10 * 1000 * 1000);
174 xhci_dbg(xhci, "Wait for controller to be ready for doorbell rings\n");
176 * xHCI cannot write to any doorbells or operational registers other
177 * than status until the "Controller Not Ready" flag is cleared.
179 return handshake(xhci, &xhci->op_regs->status,
180 STS_CNR, 0, 10 * 1000 * 1000);
184 static int xhci_free_msi(struct xhci_hcd *xhci)
188 if (!xhci->msix_entries)
191 for (i = 0; i < xhci->msix_count; i++)
192 if (xhci->msix_entries[i].vector)
193 free_irq(xhci->msix_entries[i].vector,
201 static int xhci_setup_msi(struct xhci_hcd *xhci)
204 struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
206 ret = pci_enable_msi(pdev);
208 xhci_err(xhci, "failed to allocate MSI entry\n");
212 ret = request_irq(pdev->irq, (irq_handler_t)xhci_msi_irq,
213 0, "xhci_hcd", xhci_to_hcd(xhci));
215 xhci_err(xhci, "disable MSI interrupt\n");
216 pci_disable_msi(pdev);
224 * free all IRQs request
226 static void xhci_free_irq(struct xhci_hcd *xhci)
228 struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
231 /* return if using legacy interrupt */
232 if (xhci_to_hcd(xhci)->irq >= 0)
235 ret = xhci_free_msi(xhci);
239 free_irq(pdev->irq, xhci_to_hcd(xhci));
247 static int xhci_setup_msix(struct xhci_hcd *xhci)
250 struct usb_hcd *hcd = xhci_to_hcd(xhci);
251 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
254 * calculate number of msi-x vectors supported.
255 * - HCS_MAX_INTRS: the max number of interrupts the host can handle,
256 * with max number of interrupters based on the xhci HCSPARAMS1.
257 * - num_online_cpus: maximum msi-x vectors per CPUs core.
258 * Add additional 1 vector to ensure always available interrupt.
260 xhci->msix_count = min(num_online_cpus() + 1,
261 HCS_MAX_INTRS(xhci->hcs_params1));
264 kmalloc((sizeof(struct msix_entry))*xhci->msix_count,
266 if (!xhci->msix_entries) {
267 xhci_err(xhci, "Failed to allocate MSI-X entries\n");
271 for (i = 0; i < xhci->msix_count; i++) {
272 xhci->msix_entries[i].entry = i;
273 xhci->msix_entries[i].vector = 0;
276 ret = pci_enable_msix(pdev, xhci->msix_entries, xhci->msix_count);
278 xhci_err(xhci, "Failed to enable MSI-X\n");
282 for (i = 0; i < xhci->msix_count; i++) {
283 ret = request_irq(xhci->msix_entries[i].vector,
284 (irq_handler_t)xhci_msi_irq,
285 0, "xhci_hcd", xhci_to_hcd(xhci));
290 hcd->msix_enabled = 1;
294 xhci_err(xhci, "disable MSI-X interrupt\n");
296 pci_disable_msix(pdev);
298 kfree(xhci->msix_entries);
299 xhci->msix_entries = NULL;
303 /* Free any IRQs and disable MSI-X */
304 static void xhci_cleanup_msix(struct xhci_hcd *xhci)
306 struct usb_hcd *hcd = xhci_to_hcd(xhci);
307 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
311 if (xhci->msix_entries) {
312 pci_disable_msix(pdev);
313 kfree(xhci->msix_entries);
314 xhci->msix_entries = NULL;
316 pci_disable_msi(pdev);
319 hcd->msix_enabled = 0;
323 static void xhci_msix_sync_irqs(struct xhci_hcd *xhci)
327 if (xhci->msix_entries) {
328 for (i = 0; i < xhci->msix_count; i++)
329 synchronize_irq(xhci->msix_entries[i].vector);
333 static int xhci_try_enable_msi(struct usb_hcd *hcd)
335 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
336 struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
340 * Some Fresco Logic host controllers advertise MSI, but fail to
341 * generate interrupts. Don't even try to enable MSI.
343 if (xhci->quirks & XHCI_BROKEN_MSI)
346 /* unregister the legacy interrupt */
348 free_irq(hcd->irq, hcd);
351 ret = xhci_setup_msix(xhci);
353 /* fall back to msi*/
354 ret = xhci_setup_msi(xhci);
357 /* hcd->irq is -1, we have MSI */
361 xhci_err(xhci, "No msi-x/msi found and no IRQ in BIOS\n");
365 /* fall back to legacy interrupt*/
366 ret = request_irq(pdev->irq, &usb_hcd_irq, IRQF_SHARED,
367 hcd->irq_descr, hcd);
369 xhci_err(xhci, "request interrupt %d failed\n",
373 hcd->irq = pdev->irq;
379 static int xhci_try_enable_msi(struct usb_hcd *hcd)
384 static void xhci_cleanup_msix(struct xhci_hcd *xhci)
388 static void xhci_msix_sync_irqs(struct xhci_hcd *xhci)
394 static void compliance_mode_recovery(unsigned long arg)
396 struct xhci_hcd *xhci;
401 xhci = (struct xhci_hcd *)arg;
403 for (i = 0; i < xhci->num_usb3_ports; i++) {
404 temp = xhci_readl(xhci, xhci->usb3_ports[i]);
405 if ((temp & PORT_PLS_MASK) == USB_SS_PORT_LS_COMP_MOD) {
407 * Compliance Mode Detected. Letting USB Core
408 * handle the Warm Reset
410 xhci_dbg(xhci, "Compliance Mode Detected->Port %d!\n",
412 xhci_dbg(xhci, "Attempting Recovery routine!\n");
413 hcd = xhci->shared_hcd;
415 if (hcd->state == HC_STATE_SUSPENDED)
416 usb_hcd_resume_root_hub(hcd);
418 usb_hcd_poll_rh_status(hcd);
422 if (xhci->port_status_u0 != ((1 << xhci->num_usb3_ports)-1))
423 mod_timer(&xhci->comp_mode_recovery_timer,
424 jiffies + msecs_to_jiffies(COMP_MODE_RCVRY_MSECS));
428 * Quirk to work around issue generated by the SN65LVPE502CP USB3.0 re-driver
429 * that causes ports behind that hardware to enter compliance mode sometimes.
430 * The quirk creates a timer that polls every 2 seconds the link state of
431 * each host controller's port and recovers it by issuing a Warm reset
432 * if Compliance mode is detected, otherwise the port will become "dead" (no
433 * device connections or disconnections will be detected anymore). Becasue no
434 * status event is generated when entering compliance mode (per xhci spec),
435 * this quirk is needed on systems that have the failing hardware installed.
437 static void compliance_mode_recovery_timer_init(struct xhci_hcd *xhci)
439 xhci->port_status_u0 = 0;
440 init_timer(&xhci->comp_mode_recovery_timer);
442 xhci->comp_mode_recovery_timer.data = (unsigned long) xhci;
443 xhci->comp_mode_recovery_timer.function = compliance_mode_recovery;
444 xhci->comp_mode_recovery_timer.expires = jiffies +
445 msecs_to_jiffies(COMP_MODE_RCVRY_MSECS);
447 set_timer_slack(&xhci->comp_mode_recovery_timer,
448 msecs_to_jiffies(COMP_MODE_RCVRY_MSECS));
449 add_timer(&xhci->comp_mode_recovery_timer);
450 xhci_dbg(xhci, "Compliance Mode Recovery Timer Initialized.\n");
454 * This function identifies the systems that have installed the SN65LVPE502CP
455 * USB3.0 re-driver and that need the Compliance Mode Quirk.
457 * Vendor: Hewlett-Packard -> System Models: Z420, Z620 and Z820
459 static bool compliance_mode_recovery_timer_quirk_check(void)
461 const char *dmi_product_name, *dmi_sys_vendor;
463 dmi_product_name = dmi_get_system_info(DMI_PRODUCT_NAME);
464 dmi_sys_vendor = dmi_get_system_info(DMI_SYS_VENDOR);
466 if (!(strstr(dmi_sys_vendor, "Hewlett-Packard")))
469 if (strstr(dmi_product_name, "Z420") ||
470 strstr(dmi_product_name, "Z620") ||
471 strstr(dmi_product_name, "Z820"))
477 static int xhci_all_ports_seen_u0(struct xhci_hcd *xhci)
479 return (xhci->port_status_u0 == ((1 << xhci->num_usb3_ports)-1));
484 * Initialize memory for HCD and xHC (one-time init).
486 * Program the PAGESIZE register, initialize the device context array, create
487 * device contexts (?), set up a command ring segment (or two?), create event
488 * ring (one for now).
490 int xhci_init(struct usb_hcd *hcd)
492 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
495 xhci_dbg(xhci, "xhci_init\n");
496 spin_lock_init(&xhci->lock);
497 if (xhci->hci_version == 0x95 && link_quirk) {
498 xhci_dbg(xhci, "QUIRK: Not clearing Link TRB chain bits.\n");
499 xhci->quirks |= XHCI_LINK_TRB_QUIRK;
501 xhci_dbg(xhci, "xHCI doesn't need link TRB QUIRK\n");
503 retval = xhci_mem_init(xhci, GFP_KERNEL);
504 xhci_dbg(xhci, "Finished xhci_init\n");
506 /* Initializing Compliance Mode Recovery Data If Needed */
507 if (compliance_mode_recovery_timer_quirk_check()) {
508 xhci->quirks |= XHCI_COMP_MODE_QUIRK;
509 compliance_mode_recovery_timer_init(xhci);
515 /*-------------------------------------------------------------------------*/
518 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
519 static void xhci_event_ring_work(unsigned long arg)
524 struct xhci_hcd *xhci = (struct xhci_hcd *) arg;
527 xhci_dbg(xhci, "Poll event ring: %lu\n", jiffies);
529 spin_lock_irqsave(&xhci->lock, flags);
530 temp = xhci_readl(xhci, &xhci->op_regs->status);
531 xhci_dbg(xhci, "op reg status = 0x%x\n", temp);
532 if (temp == 0xffffffff || (xhci->xhc_state & XHCI_STATE_DYING) ||
533 (xhci->xhc_state & XHCI_STATE_HALTED)) {
534 xhci_dbg(xhci, "HW died, polling stopped.\n");
535 spin_unlock_irqrestore(&xhci->lock, flags);
539 temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
540 xhci_dbg(xhci, "ir_set 0 pending = 0x%x\n", temp);
541 xhci_dbg(xhci, "HC error bitmask = 0x%x\n", xhci->error_bitmask);
542 xhci->error_bitmask = 0;
543 xhci_dbg(xhci, "Event ring:\n");
544 xhci_debug_segment(xhci, xhci->event_ring->deq_seg);
545 xhci_dbg_ring_ptrs(xhci, xhci->event_ring);
546 temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
547 temp_64 &= ~ERST_PTR_MASK;
548 xhci_dbg(xhci, "ERST deq = 64'h%0lx\n", (long unsigned int) temp_64);
549 xhci_dbg(xhci, "Command ring:\n");
550 xhci_debug_segment(xhci, xhci->cmd_ring->deq_seg);
551 xhci_dbg_ring_ptrs(xhci, xhci->cmd_ring);
552 xhci_dbg_cmd_ptrs(xhci);
553 for (i = 0; i < MAX_HC_SLOTS; ++i) {
556 for (j = 0; j < 31; ++j) {
557 xhci_dbg_ep_rings(xhci, i, j, &xhci->devs[i]->eps[j]);
560 spin_unlock_irqrestore(&xhci->lock, flags);
563 mod_timer(&xhci->event_ring_timer, jiffies + POLL_TIMEOUT * HZ);
565 xhci_dbg(xhci, "Quit polling the event ring.\n");
569 static int xhci_run_finished(struct xhci_hcd *xhci)
571 if (xhci_start(xhci)) {
575 xhci->shared_hcd->state = HC_STATE_RUNNING;
577 if (xhci->quirks & XHCI_NEC_HOST)
578 xhci_ring_cmd_db(xhci);
580 xhci_dbg(xhci, "Finished xhci_run for USB3 roothub\n");
585 * Start the HC after it was halted.
587 * This function is called by the USB core when the HC driver is added.
588 * Its opposite is xhci_stop().
590 * xhci_init() must be called once before this function can be called.
591 * Reset the HC, enable device slot contexts, program DCBAAP, and
592 * set command ring pointer and event ring pointer.
594 * Setup MSI-X vectors and enable interrupts.
596 int xhci_run(struct usb_hcd *hcd)
601 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
603 /* Start the xHCI host controller running only after the USB 2.0 roothub
607 hcd->uses_new_polling = 1;
608 if (!usb_hcd_is_primary_hcd(hcd))
609 return xhci_run_finished(xhci);
611 xhci_dbg(xhci, "xhci_run\n");
613 ret = xhci_try_enable_msi(hcd);
617 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
618 init_timer(&xhci->event_ring_timer);
619 xhci->event_ring_timer.data = (unsigned long) xhci;
620 xhci->event_ring_timer.function = xhci_event_ring_work;
621 /* Poll the event ring */
622 xhci->event_ring_timer.expires = jiffies + POLL_TIMEOUT * HZ;
624 xhci_dbg(xhci, "Setting event ring polling timer\n");
625 add_timer(&xhci->event_ring_timer);
628 xhci_dbg(xhci, "Command ring memory map follows:\n");
629 xhci_debug_ring(xhci, xhci->cmd_ring);
630 xhci_dbg_ring_ptrs(xhci, xhci->cmd_ring);
631 xhci_dbg_cmd_ptrs(xhci);
633 xhci_dbg(xhci, "ERST memory map follows:\n");
634 xhci_dbg_erst(xhci, &xhci->erst);
635 xhci_dbg(xhci, "Event ring:\n");
636 xhci_debug_ring(xhci, xhci->event_ring);
637 xhci_dbg_ring_ptrs(xhci, xhci->event_ring);
638 temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
639 temp_64 &= ~ERST_PTR_MASK;
640 xhci_dbg(xhci, "ERST deq = 64'h%0lx\n", (long unsigned int) temp_64);
642 xhci_dbg(xhci, "// Set the interrupt modulation register\n");
643 temp = xhci_readl(xhci, &xhci->ir_set->irq_control);
644 temp &= ~ER_IRQ_INTERVAL_MASK;
646 xhci_writel(xhci, temp, &xhci->ir_set->irq_control);
648 /* Set the HCD state before we enable the irqs */
649 temp = xhci_readl(xhci, &xhci->op_regs->command);
651 xhci_dbg(xhci, "// Enable interrupts, cmd = 0x%x.\n",
653 xhci_writel(xhci, temp, &xhci->op_regs->command);
655 temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
656 xhci_dbg(xhci, "// Enabling event ring interrupter %p by writing 0x%x to irq_pending\n",
657 xhci->ir_set, (unsigned int) ER_IRQ_ENABLE(temp));
658 xhci_writel(xhci, ER_IRQ_ENABLE(temp),
659 &xhci->ir_set->irq_pending);
660 xhci_print_ir_set(xhci, 0);
662 if (xhci->quirks & XHCI_NEC_HOST)
663 xhci_queue_vendor_command(xhci, 0, 0, 0,
664 TRB_TYPE(TRB_NEC_GET_FW));
666 xhci_dbg(xhci, "Finished xhci_run for USB2 roothub\n");
670 static void xhci_only_stop_hcd(struct usb_hcd *hcd)
672 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
674 spin_lock_irq(&xhci->lock);
677 /* The shared_hcd is going to be deallocated shortly (the USB core only
678 * calls this function when allocation fails in usb_add_hcd(), or
679 * usb_remove_hcd() is called). So we need to unset xHCI's pointer.
681 xhci->shared_hcd = NULL;
682 spin_unlock_irq(&xhci->lock);
688 * This function is called by the USB core when the HC driver is removed.
689 * Its opposite is xhci_run().
691 * Disable device contexts, disable IRQs, and quiesce the HC.
692 * Reset the HC, finish any completed transactions, and cleanup memory.
694 void xhci_stop(struct usb_hcd *hcd)
697 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
699 if (!usb_hcd_is_primary_hcd(hcd)) {
700 xhci_only_stop_hcd(xhci->shared_hcd);
704 spin_lock_irq(&xhci->lock);
705 /* Make sure the xHC is halted for a USB3 roothub
706 * (xhci_stop() could be called as part of failed init).
710 spin_unlock_irq(&xhci->lock);
712 xhci_cleanup_msix(xhci);
714 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
715 /* Tell the event ring poll function not to reschedule */
717 del_timer_sync(&xhci->event_ring_timer);
720 /* Deleting Compliance Mode Recovery Timer */
721 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) &&
722 (!(xhci_all_ports_seen_u0(xhci))))
723 del_timer_sync(&xhci->comp_mode_recovery_timer);
725 if (xhci->quirks & XHCI_AMD_PLL_FIX)
728 xhci_dbg(xhci, "// Disabling event ring interrupts\n");
729 temp = xhci_readl(xhci, &xhci->op_regs->status);
730 xhci_writel(xhci, temp & ~STS_EINT, &xhci->op_regs->status);
731 temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
732 xhci_writel(xhci, ER_IRQ_DISABLE(temp),
733 &xhci->ir_set->irq_pending);
734 xhci_print_ir_set(xhci, 0);
736 xhci_dbg(xhci, "cleaning up memory\n");
737 xhci_mem_cleanup(xhci);
738 xhci_dbg(xhci, "xhci_stop completed - status = %x\n",
739 xhci_readl(xhci, &xhci->op_regs->status));
743 * Shutdown HC (not bus-specific)
745 * This is called when the machine is rebooting or halting. We assume that the
746 * machine will be powered off, and the HC's internal state will be reset.
747 * Don't bother to free memory.
749 * This will only ever be called with the main usb_hcd (the USB3 roothub).
751 void xhci_shutdown(struct usb_hcd *hcd)
753 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
755 if (xhci->quirks & XHCI_SPURIOUS_REBOOT)
756 usb_disable_xhci_ports(to_pci_dev(hcd->self.controller));
758 spin_lock_irq(&xhci->lock);
760 spin_unlock_irq(&xhci->lock);
762 xhci_cleanup_msix(xhci);
764 xhci_dbg(xhci, "xhci_shutdown completed - status = %x\n",
765 xhci_readl(xhci, &xhci->op_regs->status));
769 static void xhci_save_registers(struct xhci_hcd *xhci)
771 xhci->s3.command = xhci_readl(xhci, &xhci->op_regs->command);
772 xhci->s3.dev_nt = xhci_readl(xhci, &xhci->op_regs->dev_notification);
773 xhci->s3.dcbaa_ptr = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr);
774 xhci->s3.config_reg = xhci_readl(xhci, &xhci->op_regs->config_reg);
775 xhci->s3.erst_size = xhci_readl(xhci, &xhci->ir_set->erst_size);
776 xhci->s3.erst_base = xhci_read_64(xhci, &xhci->ir_set->erst_base);
777 xhci->s3.erst_dequeue = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
778 xhci->s3.irq_pending = xhci_readl(xhci, &xhci->ir_set->irq_pending);
779 xhci->s3.irq_control = xhci_readl(xhci, &xhci->ir_set->irq_control);
782 static void xhci_restore_registers(struct xhci_hcd *xhci)
784 xhci_writel(xhci, xhci->s3.command, &xhci->op_regs->command);
785 xhci_writel(xhci, xhci->s3.dev_nt, &xhci->op_regs->dev_notification);
786 xhci_write_64(xhci, xhci->s3.dcbaa_ptr, &xhci->op_regs->dcbaa_ptr);
787 xhci_writel(xhci, xhci->s3.config_reg, &xhci->op_regs->config_reg);
788 xhci_writel(xhci, xhci->s3.erst_size, &xhci->ir_set->erst_size);
789 xhci_write_64(xhci, xhci->s3.erst_base, &xhci->ir_set->erst_base);
790 xhci_write_64(xhci, xhci->s3.erst_dequeue, &xhci->ir_set->erst_dequeue);
791 xhci_writel(xhci, xhci->s3.irq_pending, &xhci->ir_set->irq_pending);
792 xhci_writel(xhci, xhci->s3.irq_control, &xhci->ir_set->irq_control);
795 static void xhci_set_cmd_ring_deq(struct xhci_hcd *xhci)
799 /* step 2: initialize command ring buffer */
800 val_64 = xhci_read_64(xhci, &xhci->op_regs->cmd_ring);
801 val_64 = (val_64 & (u64) CMD_RING_RSVD_BITS) |
802 (xhci_trb_virt_to_dma(xhci->cmd_ring->deq_seg,
803 xhci->cmd_ring->dequeue) &
804 (u64) ~CMD_RING_RSVD_BITS) |
805 xhci->cmd_ring->cycle_state;
806 xhci_dbg(xhci, "// Setting command ring address to 0x%llx\n",
807 (long unsigned long) val_64);
808 xhci_write_64(xhci, val_64, &xhci->op_regs->cmd_ring);
812 * The whole command ring must be cleared to zero when we suspend the host.
814 * The host doesn't save the command ring pointer in the suspend well, so we
815 * need to re-program it on resume. Unfortunately, the pointer must be 64-byte
816 * aligned, because of the reserved bits in the command ring dequeue pointer
817 * register. Therefore, we can't just set the dequeue pointer back in the
818 * middle of the ring (TRBs are 16-byte aligned).
820 static void xhci_clear_command_ring(struct xhci_hcd *xhci)
822 struct xhci_ring *ring;
823 struct xhci_segment *seg;
825 ring = xhci->cmd_ring;
829 sizeof(union xhci_trb) * (TRBS_PER_SEGMENT - 1));
830 seg->trbs[TRBS_PER_SEGMENT - 1].link.control &=
831 cpu_to_le32(~TRB_CYCLE);
833 } while (seg != ring->deq_seg);
835 /* Reset the software enqueue and dequeue pointers */
836 ring->deq_seg = ring->first_seg;
837 ring->dequeue = ring->first_seg->trbs;
838 ring->enq_seg = ring->deq_seg;
839 ring->enqueue = ring->dequeue;
842 * Ring is now zeroed, so the HW should look for change of ownership
843 * when the cycle bit is set to 1.
845 ring->cycle_state = 1;
848 * Reset the hardware dequeue pointer.
849 * Yes, this will need to be re-written after resume, but we're paranoid
850 * and want to make sure the hardware doesn't access bogus memory
851 * because, say, the BIOS or an SMI started the host without changing
852 * the command ring pointers.
854 xhci_set_cmd_ring_deq(xhci);
858 * Stop HC (not bus-specific)
860 * This is called when the machine transition into S3/S4 mode.
863 int xhci_suspend(struct xhci_hcd *xhci)
866 struct usb_hcd *hcd = xhci_to_hcd(xhci);
869 spin_lock_irq(&xhci->lock);
870 clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
871 clear_bit(HCD_FLAG_HW_ACCESSIBLE, &xhci->shared_hcd->flags);
872 /* step 1: stop endpoint */
873 /* skipped assuming that port suspend has done */
875 /* step 2: clear Run/Stop bit */
876 command = xhci_readl(xhci, &xhci->op_regs->command);
878 xhci_writel(xhci, command, &xhci->op_regs->command);
879 if (handshake(xhci, &xhci->op_regs->status,
880 STS_HALT, STS_HALT, 100*100)) {
881 xhci_warn(xhci, "WARN: xHC CMD_RUN timeout\n");
882 spin_unlock_irq(&xhci->lock);
885 xhci_clear_command_ring(xhci);
887 /* step 3: save registers */
888 xhci_save_registers(xhci);
890 /* step 4: set CSS flag */
891 command = xhci_readl(xhci, &xhci->op_regs->command);
893 xhci_writel(xhci, command, &xhci->op_regs->command);
894 if (handshake(xhci, &xhci->op_regs->status, STS_SAVE, 0, 10 * 1000)) {
895 xhci_warn(xhci, "WARN: xHC save state timeout\n");
896 spin_unlock_irq(&xhci->lock);
899 spin_unlock_irq(&xhci->lock);
902 * Deleting Compliance Mode Recovery Timer because the xHCI Host
903 * is about to be suspended.
905 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) &&
906 (!(xhci_all_ports_seen_u0(xhci)))) {
907 del_timer_sync(&xhci->comp_mode_recovery_timer);
908 xhci_dbg(xhci, "Compliance Mode Recovery Timer Deleted!\n");
911 /* step 5: remove core well power */
912 /* synchronize irq when using MSI-X */
913 xhci_msix_sync_irqs(xhci);
919 * start xHC (not bus-specific)
921 * This is called when the machine transition from S3/S4 mode.
924 int xhci_resume(struct xhci_hcd *xhci, bool hibernated)
926 u32 command, temp = 0;
927 struct usb_hcd *hcd = xhci_to_hcd(xhci);
928 struct usb_hcd *secondary_hcd;
931 /* Wait a bit if either of the roothubs need to settle from the
932 * transition into bus suspend.
934 if (time_before(jiffies, xhci->bus_state[0].next_statechange) ||
936 xhci->bus_state[1].next_statechange))
939 set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
940 set_bit(HCD_FLAG_HW_ACCESSIBLE, &xhci->shared_hcd->flags);
942 spin_lock_irq(&xhci->lock);
943 if (xhci->quirks & XHCI_RESET_ON_RESUME)
947 /* step 1: restore register */
948 xhci_restore_registers(xhci);
949 /* step 2: initialize command ring buffer */
950 xhci_set_cmd_ring_deq(xhci);
951 /* step 3: restore state and start state*/
952 /* step 3: set CRS flag */
953 command = xhci_readl(xhci, &xhci->op_regs->command);
955 xhci_writel(xhci, command, &xhci->op_regs->command);
956 if (handshake(xhci, &xhci->op_regs->status,
957 STS_RESTORE, 0, 10 * 1000)) {
958 xhci_warn(xhci, "WARN: xHC restore state timeout\n");
959 spin_unlock_irq(&xhci->lock);
962 temp = xhci_readl(xhci, &xhci->op_regs->status);
965 /* If restore operation fails, re-initialize the HC during resume */
966 if ((temp & STS_SRE) || hibernated) {
967 /* Let the USB core know _both_ roothubs lost power. */
968 usb_root_hub_lost_power(xhci->main_hcd->self.root_hub);
969 usb_root_hub_lost_power(xhci->shared_hcd->self.root_hub);
971 xhci_dbg(xhci, "Stop HCD\n");
974 spin_unlock_irq(&xhci->lock);
975 xhci_cleanup_msix(xhci);
977 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
978 /* Tell the event ring poll function not to reschedule */
980 del_timer_sync(&xhci->event_ring_timer);
983 xhci_dbg(xhci, "// Disabling event ring interrupts\n");
984 temp = xhci_readl(xhci, &xhci->op_regs->status);
985 xhci_writel(xhci, temp & ~STS_EINT, &xhci->op_regs->status);
986 temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
987 xhci_writel(xhci, ER_IRQ_DISABLE(temp),
988 &xhci->ir_set->irq_pending);
989 xhci_print_ir_set(xhci, 0);
991 xhci_dbg(xhci, "cleaning up memory\n");
992 xhci_mem_cleanup(xhci);
993 xhci_dbg(xhci, "xhci_stop completed - status = %x\n",
994 xhci_readl(xhci, &xhci->op_regs->status));
996 /* USB core calls the PCI reinit and start functions twice:
997 * first with the primary HCD, and then with the secondary HCD.
998 * If we don't do the same, the host will never be started.
1000 if (!usb_hcd_is_primary_hcd(hcd))
1001 secondary_hcd = hcd;
1003 secondary_hcd = xhci->shared_hcd;
1005 xhci_dbg(xhci, "Initialize the xhci_hcd\n");
1006 retval = xhci_init(hcd->primary_hcd);
1009 xhci_dbg(xhci, "Start the primary HCD\n");
1010 retval = xhci_run(hcd->primary_hcd);
1012 xhci_dbg(xhci, "Start the secondary HCD\n");
1013 retval = xhci_run(secondary_hcd);
1015 hcd->state = HC_STATE_SUSPENDED;
1016 xhci->shared_hcd->state = HC_STATE_SUSPENDED;
1020 /* step 4: set Run/Stop bit */
1021 command = xhci_readl(xhci, &xhci->op_regs->command);
1023 xhci_writel(xhci, command, &xhci->op_regs->command);
1024 handshake(xhci, &xhci->op_regs->status, STS_HALT,
1027 /* step 5: walk topology and initialize portsc,
1028 * portpmsc and portli
1030 /* this is done in bus_resume */
1032 /* step 6: restart each of the previously
1033 * Running endpoints by ringing their doorbells
1036 spin_unlock_irq(&xhci->lock);
1040 usb_hcd_resume_root_hub(hcd);
1041 usb_hcd_resume_root_hub(xhci->shared_hcd);
1045 * If system is subject to the Quirk, Compliance Mode Timer needs to
1046 * be re-initialized Always after a system resume. Ports are subject
1047 * to suffer the Compliance Mode issue again. It doesn't matter if
1048 * ports have entered previously to U0 before system's suspension.
1050 if (xhci->quirks & XHCI_COMP_MODE_QUIRK)
1051 compliance_mode_recovery_timer_init(xhci);
1055 #endif /* CONFIG_PM */
1057 /*-------------------------------------------------------------------------*/
1060 * xhci_get_endpoint_index - Used for passing endpoint bitmasks between the core and
1061 * HCDs. Find the index for an endpoint given its descriptor. Use the return
1062 * value to right shift 1 for the bitmask.
1064 * Index = (epnum * 2) + direction - 1,
1065 * where direction = 0 for OUT, 1 for IN.
1066 * For control endpoints, the IN index is used (OUT index is unused), so
1067 * index = (epnum * 2) + direction - 1 = (epnum * 2) + 1 - 1 = (epnum * 2)
1069 unsigned int xhci_get_endpoint_index(struct usb_endpoint_descriptor *desc)
1072 if (usb_endpoint_xfer_control(desc))
1073 index = (unsigned int) (usb_endpoint_num(desc)*2);
1075 index = (unsigned int) (usb_endpoint_num(desc)*2) +
1076 (usb_endpoint_dir_in(desc) ? 1 : 0) - 1;
1080 /* Find the flag for this endpoint (for use in the control context). Use the
1081 * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is
1084 unsigned int xhci_get_endpoint_flag(struct usb_endpoint_descriptor *desc)
1086 return 1 << (xhci_get_endpoint_index(desc) + 1);
1089 /* Find the flag for this endpoint (for use in the control context). Use the
1090 * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is
1093 unsigned int xhci_get_endpoint_flag_from_index(unsigned int ep_index)
1095 return 1 << (ep_index + 1);
1098 /* Compute the last valid endpoint context index. Basically, this is the
1099 * endpoint index plus one. For slot contexts with more than valid endpoint,
1100 * we find the most significant bit set in the added contexts flags.
1101 * e.g. ep 1 IN (with epnum 0x81) => added_ctxs = 0b1000
1102 * fls(0b1000) = 4, but the endpoint context index is 3, so subtract one.
1104 unsigned int xhci_last_valid_endpoint(u32 added_ctxs)
1106 return fls(added_ctxs) - 1;
1109 /* Returns 1 if the arguments are OK;
1110 * returns 0 this is a root hub; returns -EINVAL for NULL pointers.
1112 static int xhci_check_args(struct usb_hcd *hcd, struct usb_device *udev,
1113 struct usb_host_endpoint *ep, int check_ep, bool check_virt_dev,
1115 struct xhci_hcd *xhci;
1116 struct xhci_virt_device *virt_dev;
1118 if (!hcd || (check_ep && !ep) || !udev) {
1119 printk(KERN_DEBUG "xHCI %s called with invalid args\n",
1123 if (!udev->parent) {
1124 printk(KERN_DEBUG "xHCI %s called for root hub\n",
1129 xhci = hcd_to_xhci(hcd);
1130 if (xhci->xhc_state & XHCI_STATE_HALTED)
1133 if (check_virt_dev) {
1134 if (!udev->slot_id || !xhci->devs[udev->slot_id]) {
1135 printk(KERN_DEBUG "xHCI %s called with unaddressed "
1140 virt_dev = xhci->devs[udev->slot_id];
1141 if (virt_dev->udev != udev) {
1142 printk(KERN_DEBUG "xHCI %s called with udev and "
1143 "virt_dev does not match\n", func);
1151 static int xhci_configure_endpoint(struct xhci_hcd *xhci,
1152 struct usb_device *udev, struct xhci_command *command,
1153 bool ctx_change, bool must_succeed);
1156 * Full speed devices may have a max packet size greater than 8 bytes, but the
1157 * USB core doesn't know that until it reads the first 8 bytes of the
1158 * descriptor. If the usb_device's max packet size changes after that point,
1159 * we need to issue an evaluate context command and wait on it.
1161 static int xhci_check_maxpacket(struct xhci_hcd *xhci, unsigned int slot_id,
1162 unsigned int ep_index, struct urb *urb)
1164 struct xhci_container_ctx *in_ctx;
1165 struct xhci_container_ctx *out_ctx;
1166 struct xhci_input_control_ctx *ctrl_ctx;
1167 struct xhci_ep_ctx *ep_ctx;
1168 int max_packet_size;
1169 int hw_max_packet_size;
1172 out_ctx = xhci->devs[slot_id]->out_ctx;
1173 ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
1174 hw_max_packet_size = MAX_PACKET_DECODED(le32_to_cpu(ep_ctx->ep_info2));
1175 max_packet_size = usb_endpoint_maxp(&urb->dev->ep0.desc);
1176 if (hw_max_packet_size != max_packet_size) {
1177 xhci_dbg(xhci, "Max Packet Size for ep 0 changed.\n");
1178 xhci_dbg(xhci, "Max packet size in usb_device = %d\n",
1180 xhci_dbg(xhci, "Max packet size in xHCI HW = %d\n",
1181 hw_max_packet_size);
1182 xhci_dbg(xhci, "Issuing evaluate context command.\n");
1184 /* Set up the modified control endpoint 0 */
1185 xhci_endpoint_copy(xhci, xhci->devs[slot_id]->in_ctx,
1186 xhci->devs[slot_id]->out_ctx, ep_index);
1187 in_ctx = xhci->devs[slot_id]->in_ctx;
1188 ep_ctx = xhci_get_ep_ctx(xhci, in_ctx, ep_index);
1189 ep_ctx->ep_info2 &= cpu_to_le32(~MAX_PACKET_MASK);
1190 ep_ctx->ep_info2 |= cpu_to_le32(MAX_PACKET(max_packet_size));
1192 /* Set up the input context flags for the command */
1193 /* FIXME: This won't work if a non-default control endpoint
1194 * changes max packet sizes.
1196 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1197 ctrl_ctx->add_flags = cpu_to_le32(EP0_FLAG);
1198 ctrl_ctx->drop_flags = 0;
1200 xhci_dbg(xhci, "Slot %d input context\n", slot_id);
1201 xhci_dbg_ctx(xhci, in_ctx, ep_index);
1202 xhci_dbg(xhci, "Slot %d output context\n", slot_id);
1203 xhci_dbg_ctx(xhci, out_ctx, ep_index);
1205 ret = xhci_configure_endpoint(xhci, urb->dev, NULL,
1208 /* Clean up the input context for later use by bandwidth
1211 ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG);
1217 * non-error returns are a promise to giveback() the urb later
1218 * we drop ownership so next owner (or urb unlink) can get it
1220 int xhci_urb_enqueue(struct usb_hcd *hcd, struct urb *urb, gfp_t mem_flags)
1222 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
1223 struct xhci_td *buffer;
1224 unsigned long flags;
1226 unsigned int slot_id, ep_index;
1227 struct urb_priv *urb_priv;
1230 if (!urb || xhci_check_args(hcd, urb->dev, urb->ep,
1231 true, true, __func__) <= 0)
1234 slot_id = urb->dev->slot_id;
1235 ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1237 if (!HCD_HW_ACCESSIBLE(hcd)) {
1238 if (!in_interrupt())
1239 xhci_dbg(xhci, "urb submitted during PCI suspend\n");
1244 if (usb_endpoint_xfer_isoc(&urb->ep->desc))
1245 size = urb->number_of_packets;
1249 urb_priv = kzalloc(sizeof(struct urb_priv) +
1250 size * sizeof(struct xhci_td *), mem_flags);
1254 buffer = kzalloc(size * sizeof(struct xhci_td), mem_flags);
1260 for (i = 0; i < size; i++) {
1261 urb_priv->td[i] = buffer;
1265 urb_priv->length = size;
1266 urb_priv->td_cnt = 0;
1267 urb->hcpriv = urb_priv;
1269 if (usb_endpoint_xfer_control(&urb->ep->desc)) {
1270 /* Check to see if the max packet size for the default control
1271 * endpoint changed during FS device enumeration
1273 if (urb->dev->speed == USB_SPEED_FULL) {
1274 ret = xhci_check_maxpacket(xhci, slot_id,
1277 xhci_urb_free_priv(xhci, urb_priv);
1283 /* We have a spinlock and interrupts disabled, so we must pass
1284 * atomic context to this function, which may allocate memory.
1286 spin_lock_irqsave(&xhci->lock, flags);
1287 if (xhci->xhc_state & XHCI_STATE_DYING)
1289 ret = xhci_queue_ctrl_tx(xhci, GFP_ATOMIC, urb,
1293 spin_unlock_irqrestore(&xhci->lock, flags);
1294 } else if (usb_endpoint_xfer_bulk(&urb->ep->desc)) {
1295 spin_lock_irqsave(&xhci->lock, flags);
1296 if (xhci->xhc_state & XHCI_STATE_DYING)
1298 if (xhci->devs[slot_id]->eps[ep_index].ep_state &
1299 EP_GETTING_STREAMS) {
1300 xhci_warn(xhci, "WARN: Can't enqueue URB while bulk ep "
1301 "is transitioning to using streams.\n");
1303 } else if (xhci->devs[slot_id]->eps[ep_index].ep_state &
1304 EP_GETTING_NO_STREAMS) {
1305 xhci_warn(xhci, "WARN: Can't enqueue URB while bulk ep "
1306 "is transitioning to "
1307 "not having streams.\n");
1310 ret = xhci_queue_bulk_tx(xhci, GFP_ATOMIC, urb,
1315 spin_unlock_irqrestore(&xhci->lock, flags);
1316 } else if (usb_endpoint_xfer_int(&urb->ep->desc)) {
1317 spin_lock_irqsave(&xhci->lock, flags);
1318 if (xhci->xhc_state & XHCI_STATE_DYING)
1320 ret = xhci_queue_intr_tx(xhci, GFP_ATOMIC, urb,
1324 spin_unlock_irqrestore(&xhci->lock, flags);
1326 spin_lock_irqsave(&xhci->lock, flags);
1327 if (xhci->xhc_state & XHCI_STATE_DYING)
1329 ret = xhci_queue_isoc_tx_prepare(xhci, GFP_ATOMIC, urb,
1333 spin_unlock_irqrestore(&xhci->lock, flags);
1338 xhci_dbg(xhci, "Ep 0x%x: URB %p submitted for "
1339 "non-responsive xHCI host.\n",
1340 urb->ep->desc.bEndpointAddress, urb);
1343 xhci_urb_free_priv(xhci, urb_priv);
1345 spin_unlock_irqrestore(&xhci->lock, flags);
1349 /* Get the right ring for the given URB.
1350 * If the endpoint supports streams, boundary check the URB's stream ID.
1351 * If the endpoint doesn't support streams, return the singular endpoint ring.
1353 static struct xhci_ring *xhci_urb_to_transfer_ring(struct xhci_hcd *xhci,
1356 unsigned int slot_id;
1357 unsigned int ep_index;
1358 unsigned int stream_id;
1359 struct xhci_virt_ep *ep;
1361 slot_id = urb->dev->slot_id;
1362 ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1363 stream_id = urb->stream_id;
1364 ep = &xhci->devs[slot_id]->eps[ep_index];
1365 /* Common case: no streams */
1366 if (!(ep->ep_state & EP_HAS_STREAMS))
1369 if (stream_id == 0) {
1371 "WARN: Slot ID %u, ep index %u has streams, "
1372 "but URB has no stream ID.\n",
1377 if (stream_id < ep->stream_info->num_streams)
1378 return ep->stream_info->stream_rings[stream_id];
1381 "WARN: Slot ID %u, ep index %u has "
1382 "stream IDs 1 to %u allocated, "
1383 "but stream ID %u is requested.\n",
1385 ep->stream_info->num_streams - 1,
1391 * Remove the URB's TD from the endpoint ring. This may cause the HC to stop
1392 * USB transfers, potentially stopping in the middle of a TRB buffer. The HC
1393 * should pick up where it left off in the TD, unless a Set Transfer Ring
1394 * Dequeue Pointer is issued.
1396 * The TRBs that make up the buffers for the canceled URB will be "removed" from
1397 * the ring. Since the ring is a contiguous structure, they can't be physically
1398 * removed. Instead, there are two options:
1400 * 1) If the HC is in the middle of processing the URB to be canceled, we
1401 * simply move the ring's dequeue pointer past those TRBs using the Set
1402 * Transfer Ring Dequeue Pointer command. This will be the common case,
1403 * when drivers timeout on the last submitted URB and attempt to cancel.
1405 * 2) If the HC is in the middle of a different TD, we turn the TRBs into a
1406 * series of 1-TRB transfer no-op TDs. (No-ops shouldn't be chained.) The
1407 * HC will need to invalidate the any TRBs it has cached after the stop
1408 * endpoint command, as noted in the xHCI 0.95 errata.
1410 * 3) The TD may have completed by the time the Stop Endpoint Command
1411 * completes, so software needs to handle that case too.
1413 * This function should protect against the TD enqueueing code ringing the
1414 * doorbell while this code is waiting for a Stop Endpoint command to complete.
1415 * It also needs to account for multiple cancellations on happening at the same
1416 * time for the same endpoint.
1418 * Note that this function can be called in any context, or so says
1419 * usb_hcd_unlink_urb()
1421 int xhci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
1423 unsigned long flags;
1426 struct xhci_hcd *xhci;
1427 struct urb_priv *urb_priv;
1429 unsigned int ep_index;
1430 struct xhci_ring *ep_ring;
1431 struct xhci_virt_ep *ep;
1433 xhci = hcd_to_xhci(hcd);
1434 spin_lock_irqsave(&xhci->lock, flags);
1435 /* Make sure the URB hasn't completed or been unlinked already */
1436 ret = usb_hcd_check_unlink_urb(hcd, urb, status);
1437 if (ret || !urb->hcpriv)
1439 temp = xhci_readl(xhci, &xhci->op_regs->status);
1440 if (temp == 0xffffffff || (xhci->xhc_state & XHCI_STATE_HALTED)) {
1441 xhci_dbg(xhci, "HW died, freeing TD.\n");
1442 urb_priv = urb->hcpriv;
1443 for (i = urb_priv->td_cnt; i < urb_priv->length; i++) {
1444 td = urb_priv->td[i];
1445 if (!list_empty(&td->td_list))
1446 list_del_init(&td->td_list);
1447 if (!list_empty(&td->cancelled_td_list))
1448 list_del_init(&td->cancelled_td_list);
1451 usb_hcd_unlink_urb_from_ep(hcd, urb);
1452 spin_unlock_irqrestore(&xhci->lock, flags);
1453 usb_hcd_giveback_urb(hcd, urb, -ESHUTDOWN);
1454 xhci_urb_free_priv(xhci, urb_priv);
1457 if ((xhci->xhc_state & XHCI_STATE_DYING) ||
1458 (xhci->xhc_state & XHCI_STATE_HALTED)) {
1459 xhci_dbg(xhci, "Ep 0x%x: URB %p to be canceled on "
1460 "non-responsive xHCI host.\n",
1461 urb->ep->desc.bEndpointAddress, urb);
1462 /* Let the stop endpoint command watchdog timer (which set this
1463 * state) finish cleaning up the endpoint TD lists. We must
1464 * have caught it in the middle of dropping a lock and giving
1470 xhci_dbg(xhci, "Cancel URB %p\n", urb);
1471 xhci_dbg(xhci, "Event ring:\n");
1472 xhci_debug_ring(xhci, xhci->event_ring);
1473 ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1474 ep = &xhci->devs[urb->dev->slot_id]->eps[ep_index];
1475 ep_ring = xhci_urb_to_transfer_ring(xhci, urb);
1481 xhci_dbg(xhci, "Endpoint ring:\n");
1482 xhci_debug_ring(xhci, ep_ring);
1484 urb_priv = urb->hcpriv;
1486 for (i = urb_priv->td_cnt; i < urb_priv->length; i++) {
1487 td = urb_priv->td[i];
1488 list_add_tail(&td->cancelled_td_list, &ep->cancelled_td_list);
1491 /* Queue a stop endpoint command, but only if this is
1492 * the first cancellation to be handled.
1494 if (!(ep->ep_state & EP_HALT_PENDING)) {
1495 ep->ep_state |= EP_HALT_PENDING;
1496 ep->stop_cmds_pending++;
1497 ep->stop_cmd_timer.expires = jiffies +
1498 XHCI_STOP_EP_CMD_TIMEOUT * HZ;
1499 add_timer(&ep->stop_cmd_timer);
1500 xhci_queue_stop_endpoint(xhci, urb->dev->slot_id, ep_index, 0);
1501 xhci_ring_cmd_db(xhci);
1504 spin_unlock_irqrestore(&xhci->lock, flags);
1508 /* Drop an endpoint from a new bandwidth configuration for this device.
1509 * Only one call to this function is allowed per endpoint before
1510 * check_bandwidth() or reset_bandwidth() must be called.
1511 * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1512 * add the endpoint to the schedule with possibly new parameters denoted by a
1513 * different endpoint descriptor in usb_host_endpoint.
1514 * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1517 * The USB core will not allow URBs to be queued to an endpoint that is being
1518 * disabled, so there's no need for mutual exclusion to protect
1519 * the xhci->devs[slot_id] structure.
1521 int xhci_drop_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
1522 struct usb_host_endpoint *ep)
1524 struct xhci_hcd *xhci;
1525 struct xhci_container_ctx *in_ctx, *out_ctx;
1526 struct xhci_input_control_ctx *ctrl_ctx;
1527 struct xhci_slot_ctx *slot_ctx;
1528 unsigned int last_ctx;
1529 unsigned int ep_index;
1530 struct xhci_ep_ctx *ep_ctx;
1532 u32 new_add_flags, new_drop_flags, new_slot_info;
1535 ret = xhci_check_args(hcd, udev, ep, 1, true, __func__);
1538 xhci = hcd_to_xhci(hcd);
1539 if (xhci->xhc_state & XHCI_STATE_DYING)
1542 xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
1543 drop_flag = xhci_get_endpoint_flag(&ep->desc);
1544 if (drop_flag == SLOT_FLAG || drop_flag == EP0_FLAG) {
1545 xhci_dbg(xhci, "xHCI %s - can't drop slot or ep 0 %#x\n",
1546 __func__, drop_flag);
1550 in_ctx = xhci->devs[udev->slot_id]->in_ctx;
1551 out_ctx = xhci->devs[udev->slot_id]->out_ctx;
1552 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1553 ep_index = xhci_get_endpoint_index(&ep->desc);
1554 ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
1555 /* If the HC already knows the endpoint is disabled,
1556 * or the HCD has noted it is disabled, ignore this request
1558 if (((ep_ctx->ep_info & cpu_to_le32(EP_STATE_MASK)) ==
1559 cpu_to_le32(EP_STATE_DISABLED)) ||
1560 le32_to_cpu(ctrl_ctx->drop_flags) &
1561 xhci_get_endpoint_flag(&ep->desc)) {
1562 xhci_warn(xhci, "xHCI %s called with disabled ep %p\n",
1567 ctrl_ctx->drop_flags |= cpu_to_le32(drop_flag);
1568 new_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags);
1570 ctrl_ctx->add_flags &= cpu_to_le32(~drop_flag);
1571 new_add_flags = le32_to_cpu(ctrl_ctx->add_flags);
1573 last_ctx = xhci_last_valid_endpoint(le32_to_cpu(ctrl_ctx->add_flags));
1574 slot_ctx = xhci_get_slot_ctx(xhci, in_ctx);
1575 /* Update the last valid endpoint context, if we deleted the last one */
1576 if ((le32_to_cpu(slot_ctx->dev_info) & LAST_CTX_MASK) >
1577 LAST_CTX(last_ctx)) {
1578 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
1579 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(last_ctx));
1581 new_slot_info = le32_to_cpu(slot_ctx->dev_info);
1583 xhci_endpoint_zero(xhci, xhci->devs[udev->slot_id], ep);
1585 xhci_dbg(xhci, "drop ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
1586 (unsigned int) ep->desc.bEndpointAddress,
1588 (unsigned int) new_drop_flags,
1589 (unsigned int) new_add_flags,
1590 (unsigned int) new_slot_info);
1594 /* Add an endpoint to a new possible bandwidth configuration for this device.
1595 * Only one call to this function is allowed per endpoint before
1596 * check_bandwidth() or reset_bandwidth() must be called.
1597 * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1598 * add the endpoint to the schedule with possibly new parameters denoted by a
1599 * different endpoint descriptor in usb_host_endpoint.
1600 * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1603 * The USB core will not allow URBs to be queued to an endpoint until the
1604 * configuration or alt setting is installed in the device, so there's no need
1605 * for mutual exclusion to protect the xhci->devs[slot_id] structure.
1607 int xhci_add_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
1608 struct usb_host_endpoint *ep)
1610 struct xhci_hcd *xhci;
1611 struct xhci_container_ctx *in_ctx, *out_ctx;
1612 unsigned int ep_index;
1613 struct xhci_ep_ctx *ep_ctx;
1614 struct xhci_slot_ctx *slot_ctx;
1615 struct xhci_input_control_ctx *ctrl_ctx;
1617 unsigned int last_ctx;
1618 u32 new_add_flags, new_drop_flags, new_slot_info;
1619 struct xhci_virt_device *virt_dev;
1622 ret = xhci_check_args(hcd, udev, ep, 1, true, __func__);
1624 /* So we won't queue a reset ep command for a root hub */
1628 xhci = hcd_to_xhci(hcd);
1629 if (xhci->xhc_state & XHCI_STATE_DYING)
1632 added_ctxs = xhci_get_endpoint_flag(&ep->desc);
1633 last_ctx = xhci_last_valid_endpoint(added_ctxs);
1634 if (added_ctxs == SLOT_FLAG || added_ctxs == EP0_FLAG) {
1635 /* FIXME when we have to issue an evaluate endpoint command to
1636 * deal with ep0 max packet size changing once we get the
1639 xhci_dbg(xhci, "xHCI %s - can't add slot or ep 0 %#x\n",
1640 __func__, added_ctxs);
1644 virt_dev = xhci->devs[udev->slot_id];
1645 in_ctx = virt_dev->in_ctx;
1646 out_ctx = virt_dev->out_ctx;
1647 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1648 ep_index = xhci_get_endpoint_index(&ep->desc);
1649 ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
1651 /* If this endpoint is already in use, and the upper layers are trying
1652 * to add it again without dropping it, reject the addition.
1654 if (virt_dev->eps[ep_index].ring &&
1655 !(le32_to_cpu(ctrl_ctx->drop_flags) &
1656 xhci_get_endpoint_flag(&ep->desc))) {
1657 xhci_warn(xhci, "Trying to add endpoint 0x%x "
1658 "without dropping it.\n",
1659 (unsigned int) ep->desc.bEndpointAddress);
1663 /* If the HCD has already noted the endpoint is enabled,
1664 * ignore this request.
1666 if (le32_to_cpu(ctrl_ctx->add_flags) &
1667 xhci_get_endpoint_flag(&ep->desc)) {
1668 xhci_warn(xhci, "xHCI %s called with enabled ep %p\n",
1674 * Configuration and alternate setting changes must be done in
1675 * process context, not interrupt context (or so documenation
1676 * for usb_set_interface() and usb_set_configuration() claim).
1678 if (xhci_endpoint_init(xhci, virt_dev, udev, ep, GFP_NOIO) < 0) {
1679 dev_dbg(&udev->dev, "%s - could not initialize ep %#x\n",
1680 __func__, ep->desc.bEndpointAddress);
1684 ctrl_ctx->add_flags |= cpu_to_le32(added_ctxs);
1685 new_add_flags = le32_to_cpu(ctrl_ctx->add_flags);
1687 /* If xhci_endpoint_disable() was called for this endpoint, but the
1688 * xHC hasn't been notified yet through the check_bandwidth() call,
1689 * this re-adds a new state for the endpoint from the new endpoint
1690 * descriptors. We must drop and re-add this endpoint, so we leave the
1693 new_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags);
1695 slot_ctx = xhci_get_slot_ctx(xhci, in_ctx);
1696 /* Update the last valid endpoint context, if we just added one past */
1697 if ((le32_to_cpu(slot_ctx->dev_info) & LAST_CTX_MASK) <
1698 LAST_CTX(last_ctx)) {
1699 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
1700 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(last_ctx));
1702 new_slot_info = le32_to_cpu(slot_ctx->dev_info);
1704 /* Store the usb_device pointer for later use */
1707 xhci_dbg(xhci, "add ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
1708 (unsigned int) ep->desc.bEndpointAddress,
1710 (unsigned int) new_drop_flags,
1711 (unsigned int) new_add_flags,
1712 (unsigned int) new_slot_info);
1716 static void xhci_zero_in_ctx(struct xhci_hcd *xhci, struct xhci_virt_device *virt_dev)
1718 struct xhci_input_control_ctx *ctrl_ctx;
1719 struct xhci_ep_ctx *ep_ctx;
1720 struct xhci_slot_ctx *slot_ctx;
1723 /* When a device's add flag and drop flag are zero, any subsequent
1724 * configure endpoint command will leave that endpoint's state
1725 * untouched. Make sure we don't leave any old state in the input
1726 * endpoint contexts.
1728 ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
1729 ctrl_ctx->drop_flags = 0;
1730 ctrl_ctx->add_flags = 0;
1731 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
1732 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
1733 /* Endpoint 0 is always valid */
1734 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(1));
1735 for (i = 1; i < 31; ++i) {
1736 ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, i);
1737 ep_ctx->ep_info = 0;
1738 ep_ctx->ep_info2 = 0;
1740 ep_ctx->tx_info = 0;
1744 static int xhci_configure_endpoint_result(struct xhci_hcd *xhci,
1745 struct usb_device *udev, u32 *cmd_status)
1749 switch (*cmd_status) {
1751 dev_warn(&udev->dev, "Not enough host controller resources "
1752 "for new device state.\n");
1754 /* FIXME: can we allocate more resources for the HC? */
1757 case COMP_2ND_BW_ERR:
1758 dev_warn(&udev->dev, "Not enough bandwidth "
1759 "for new device state.\n");
1761 /* FIXME: can we go back to the old state? */
1764 /* the HCD set up something wrong */
1765 dev_warn(&udev->dev, "ERROR: Endpoint drop flag = 0, "
1767 "and endpoint is not disabled.\n");
1771 dev_warn(&udev->dev, "ERROR: Incompatible device for endpoint "
1772 "configure command.\n");
1776 dev_dbg(&udev->dev, "Successful Endpoint Configure command\n");
1780 xhci_err(xhci, "ERROR: unexpected command completion "
1781 "code 0x%x.\n", *cmd_status);
1788 static int xhci_evaluate_context_result(struct xhci_hcd *xhci,
1789 struct usb_device *udev, u32 *cmd_status)
1792 struct xhci_virt_device *virt_dev = xhci->devs[udev->slot_id];
1794 switch (*cmd_status) {
1796 dev_warn(&udev->dev, "WARN: xHCI driver setup invalid evaluate "
1797 "context command.\n");
1801 dev_warn(&udev->dev, "WARN: slot not enabled for"
1802 "evaluate context command.\n");
1803 case COMP_CTX_STATE:
1804 dev_warn(&udev->dev, "WARN: invalid context state for "
1805 "evaluate context command.\n");
1806 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 1);
1810 dev_warn(&udev->dev, "ERROR: Incompatible device for evaluate "
1811 "context command.\n");
1815 /* Max Exit Latency too large error */
1816 dev_warn(&udev->dev, "WARN: Max Exit Latency too large\n");
1820 dev_dbg(&udev->dev, "Successful evaluate context command\n");
1824 xhci_err(xhci, "ERROR: unexpected command completion "
1825 "code 0x%x.\n", *cmd_status);
1832 static u32 xhci_count_num_new_endpoints(struct xhci_hcd *xhci,
1833 struct xhci_container_ctx *in_ctx)
1835 struct xhci_input_control_ctx *ctrl_ctx;
1836 u32 valid_add_flags;
1837 u32 valid_drop_flags;
1839 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1840 /* Ignore the slot flag (bit 0), and the default control endpoint flag
1841 * (bit 1). The default control endpoint is added during the Address
1842 * Device command and is never removed until the slot is disabled.
1844 valid_add_flags = ctrl_ctx->add_flags >> 2;
1845 valid_drop_flags = ctrl_ctx->drop_flags >> 2;
1847 /* Use hweight32 to count the number of ones in the add flags, or
1848 * number of endpoints added. Don't count endpoints that are changed
1849 * (both added and dropped).
1851 return hweight32(valid_add_flags) -
1852 hweight32(valid_add_flags & valid_drop_flags);
1855 static unsigned int xhci_count_num_dropped_endpoints(struct xhci_hcd *xhci,
1856 struct xhci_container_ctx *in_ctx)
1858 struct xhci_input_control_ctx *ctrl_ctx;
1859 u32 valid_add_flags;
1860 u32 valid_drop_flags;
1862 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1863 valid_add_flags = ctrl_ctx->add_flags >> 2;
1864 valid_drop_flags = ctrl_ctx->drop_flags >> 2;
1866 return hweight32(valid_drop_flags) -
1867 hweight32(valid_add_flags & valid_drop_flags);
1871 * We need to reserve the new number of endpoints before the configure endpoint
1872 * command completes. We can't subtract the dropped endpoints from the number
1873 * of active endpoints until the command completes because we can oversubscribe
1874 * the host in this case:
1876 * - the first configure endpoint command drops more endpoints than it adds
1877 * - a second configure endpoint command that adds more endpoints is queued
1878 * - the first configure endpoint command fails, so the config is unchanged
1879 * - the second command may succeed, even though there isn't enough resources
1881 * Must be called with xhci->lock held.
1883 static int xhci_reserve_host_resources(struct xhci_hcd *xhci,
1884 struct xhci_container_ctx *in_ctx)
1888 added_eps = xhci_count_num_new_endpoints(xhci, in_ctx);
1889 if (xhci->num_active_eps + added_eps > xhci->limit_active_eps) {
1890 xhci_dbg(xhci, "Not enough ep ctxs: "
1891 "%u active, need to add %u, limit is %u.\n",
1892 xhci->num_active_eps, added_eps,
1893 xhci->limit_active_eps);
1896 xhci->num_active_eps += added_eps;
1897 xhci_dbg(xhci, "Adding %u ep ctxs, %u now active.\n", added_eps,
1898 xhci->num_active_eps);
1903 * The configure endpoint was failed by the xHC for some other reason, so we
1904 * need to revert the resources that failed configuration would have used.
1906 * Must be called with xhci->lock held.
1908 static void xhci_free_host_resources(struct xhci_hcd *xhci,
1909 struct xhci_container_ctx *in_ctx)
1913 num_failed_eps = xhci_count_num_new_endpoints(xhci, in_ctx);
1914 xhci->num_active_eps -= num_failed_eps;
1915 xhci_dbg(xhci, "Removing %u failed ep ctxs, %u now active.\n",
1917 xhci->num_active_eps);
1921 * Now that the command has completed, clean up the active endpoint count by
1922 * subtracting out the endpoints that were dropped (but not changed).
1924 * Must be called with xhci->lock held.
1926 static void xhci_finish_resource_reservation(struct xhci_hcd *xhci,
1927 struct xhci_container_ctx *in_ctx)
1929 u32 num_dropped_eps;
1931 num_dropped_eps = xhci_count_num_dropped_endpoints(xhci, in_ctx);
1932 xhci->num_active_eps -= num_dropped_eps;
1933 if (num_dropped_eps)
1934 xhci_dbg(xhci, "Removing %u dropped ep ctxs, %u now active.\n",
1936 xhci->num_active_eps);
1939 unsigned int xhci_get_block_size(struct usb_device *udev)
1941 switch (udev->speed) {
1943 case USB_SPEED_FULL:
1945 case USB_SPEED_HIGH:
1947 case USB_SPEED_SUPER:
1949 case USB_SPEED_UNKNOWN:
1950 case USB_SPEED_WIRELESS:
1952 /* Should never happen */
1957 unsigned int xhci_get_largest_overhead(struct xhci_interval_bw *interval_bw)
1959 if (interval_bw->overhead[LS_OVERHEAD_TYPE])
1961 if (interval_bw->overhead[FS_OVERHEAD_TYPE])
1966 /* If we are changing a LS/FS device under a HS hub,
1967 * make sure (if we are activating a new TT) that the HS bus has enough
1968 * bandwidth for this new TT.
1970 static int xhci_check_tt_bw_table(struct xhci_hcd *xhci,
1971 struct xhci_virt_device *virt_dev,
1974 struct xhci_interval_bw_table *bw_table;
1975 struct xhci_tt_bw_info *tt_info;
1977 /* Find the bandwidth table for the root port this TT is attached to. */
1978 bw_table = &xhci->rh_bw[virt_dev->real_port - 1].bw_table;
1979 tt_info = virt_dev->tt_info;
1980 /* If this TT already had active endpoints, the bandwidth for this TT
1981 * has already been added. Removing all periodic endpoints (and thus
1982 * making the TT enactive) will only decrease the bandwidth used.
1986 if (old_active_eps == 0 && tt_info->active_eps != 0) {
1987 if (bw_table->bw_used + TT_HS_OVERHEAD > HS_BW_LIMIT)
1991 /* Not sure why we would have no new active endpoints...
1993 * Maybe because of an Evaluate Context change for a hub update or a
1994 * control endpoint 0 max packet size change?
1995 * FIXME: skip the bandwidth calculation in that case.
2000 static int xhci_check_ss_bw(struct xhci_hcd *xhci,
2001 struct xhci_virt_device *virt_dev)
2003 unsigned int bw_reserved;
2005 bw_reserved = DIV_ROUND_UP(SS_BW_RESERVED*SS_BW_LIMIT_IN, 100);
2006 if (virt_dev->bw_table->ss_bw_in > (SS_BW_LIMIT_IN - bw_reserved))
2009 bw_reserved = DIV_ROUND_UP(SS_BW_RESERVED*SS_BW_LIMIT_OUT, 100);
2010 if (virt_dev->bw_table->ss_bw_out > (SS_BW_LIMIT_OUT - bw_reserved))
2017 * This algorithm is a very conservative estimate of the worst-case scheduling
2018 * scenario for any one interval. The hardware dynamically schedules the
2019 * packets, so we can't tell which microframe could be the limiting factor in
2020 * the bandwidth scheduling. This only takes into account periodic endpoints.
2022 * Obviously, we can't solve an NP complete problem to find the minimum worst
2023 * case scenario. Instead, we come up with an estimate that is no less than
2024 * the worst case bandwidth used for any one microframe, but may be an
2027 * We walk the requirements for each endpoint by interval, starting with the
2028 * smallest interval, and place packets in the schedule where there is only one
2029 * possible way to schedule packets for that interval. In order to simplify
2030 * this algorithm, we record the largest max packet size for each interval, and
2031 * assume all packets will be that size.
2033 * For interval 0, we obviously must schedule all packets for each interval.
2034 * The bandwidth for interval 0 is just the amount of data to be transmitted
2035 * (the sum of all max ESIT payload sizes, plus any overhead per packet times
2036 * the number of packets).
2038 * For interval 1, we have two possible microframes to schedule those packets
2039 * in. For this algorithm, if we can schedule the same number of packets for
2040 * each possible scheduling opportunity (each microframe), we will do so. The
2041 * remaining number of packets will be saved to be transmitted in the gaps in
2042 * the next interval's scheduling sequence.
2044 * As we move those remaining packets to be scheduled with interval 2 packets,
2045 * we have to double the number of remaining packets to transmit. This is
2046 * because the intervals are actually powers of 2, and we would be transmitting
2047 * the previous interval's packets twice in this interval. We also have to be
2048 * sure that when we look at the largest max packet size for this interval, we
2049 * also look at the largest max packet size for the remaining packets and take
2050 * the greater of the two.
2052 * The algorithm continues to evenly distribute packets in each scheduling
2053 * opportunity, and push the remaining packets out, until we get to the last
2054 * interval. Then those packets and their associated overhead are just added
2055 * to the bandwidth used.
2057 static int xhci_check_bw_table(struct xhci_hcd *xhci,
2058 struct xhci_virt_device *virt_dev,
2061 unsigned int bw_reserved;
2062 unsigned int max_bandwidth;
2063 unsigned int bw_used;
2064 unsigned int block_size;
2065 struct xhci_interval_bw_table *bw_table;
2066 unsigned int packet_size = 0;
2067 unsigned int overhead = 0;
2068 unsigned int packets_transmitted = 0;
2069 unsigned int packets_remaining = 0;
2072 if (virt_dev->udev->speed == USB_SPEED_SUPER)
2073 return xhci_check_ss_bw(xhci, virt_dev);
2075 if (virt_dev->udev->speed == USB_SPEED_HIGH) {
2076 max_bandwidth = HS_BW_LIMIT;
2077 /* Convert percent of bus BW reserved to blocks reserved */
2078 bw_reserved = DIV_ROUND_UP(HS_BW_RESERVED * max_bandwidth, 100);
2080 max_bandwidth = FS_BW_LIMIT;
2081 bw_reserved = DIV_ROUND_UP(FS_BW_RESERVED * max_bandwidth, 100);
2084 bw_table = virt_dev->bw_table;
2085 /* We need to translate the max packet size and max ESIT payloads into
2086 * the units the hardware uses.
2088 block_size = xhci_get_block_size(virt_dev->udev);
2090 /* If we are manipulating a LS/FS device under a HS hub, double check
2091 * that the HS bus has enough bandwidth if we are activing a new TT.
2093 if (virt_dev->tt_info) {
2094 xhci_dbg(xhci, "Recalculating BW for rootport %u\n",
2095 virt_dev->real_port);
2096 if (xhci_check_tt_bw_table(xhci, virt_dev, old_active_eps)) {
2097 xhci_warn(xhci, "Not enough bandwidth on HS bus for "
2098 "newly activated TT.\n");
2101 xhci_dbg(xhci, "Recalculating BW for TT slot %u port %u\n",
2102 virt_dev->tt_info->slot_id,
2103 virt_dev->tt_info->ttport);
2105 xhci_dbg(xhci, "Recalculating BW for rootport %u\n",
2106 virt_dev->real_port);
2109 /* Add in how much bandwidth will be used for interval zero, or the
2110 * rounded max ESIT payload + number of packets * largest overhead.
2112 bw_used = DIV_ROUND_UP(bw_table->interval0_esit_payload, block_size) +
2113 bw_table->interval_bw[0].num_packets *
2114 xhci_get_largest_overhead(&bw_table->interval_bw[0]);
2116 for (i = 1; i < XHCI_MAX_INTERVAL; i++) {
2117 unsigned int bw_added;
2118 unsigned int largest_mps;
2119 unsigned int interval_overhead;
2122 * How many packets could we transmit in this interval?
2123 * If packets didn't fit in the previous interval, we will need
2124 * to transmit that many packets twice within this interval.
2126 packets_remaining = 2 * packets_remaining +
2127 bw_table->interval_bw[i].num_packets;
2129 /* Find the largest max packet size of this or the previous
2132 if (list_empty(&bw_table->interval_bw[i].endpoints))
2135 struct xhci_virt_ep *virt_ep;
2136 struct list_head *ep_entry;
2138 ep_entry = bw_table->interval_bw[i].endpoints.next;
2139 virt_ep = list_entry(ep_entry,
2140 struct xhci_virt_ep, bw_endpoint_list);
2141 /* Convert to blocks, rounding up */
2142 largest_mps = DIV_ROUND_UP(
2143 virt_ep->bw_info.max_packet_size,
2146 if (largest_mps > packet_size)
2147 packet_size = largest_mps;
2149 /* Use the larger overhead of this or the previous interval. */
2150 interval_overhead = xhci_get_largest_overhead(
2151 &bw_table->interval_bw[i]);
2152 if (interval_overhead > overhead)
2153 overhead = interval_overhead;
2155 /* How many packets can we evenly distribute across
2156 * (1 << (i + 1)) possible scheduling opportunities?
2158 packets_transmitted = packets_remaining >> (i + 1);
2160 /* Add in the bandwidth used for those scheduled packets */
2161 bw_added = packets_transmitted * (overhead + packet_size);
2163 /* How many packets do we have remaining to transmit? */
2164 packets_remaining = packets_remaining % (1 << (i + 1));
2166 /* What largest max packet size should those packets have? */
2167 /* If we've transmitted all packets, don't carry over the
2168 * largest packet size.
2170 if (packets_remaining == 0) {
2173 } else if (packets_transmitted > 0) {
2174 /* Otherwise if we do have remaining packets, and we've
2175 * scheduled some packets in this interval, take the
2176 * largest max packet size from endpoints with this
2179 packet_size = largest_mps;
2180 overhead = interval_overhead;
2182 /* Otherwise carry over packet_size and overhead from the last
2183 * time we had a remainder.
2185 bw_used += bw_added;
2186 if (bw_used > max_bandwidth) {
2187 xhci_warn(xhci, "Not enough bandwidth. "
2188 "Proposed: %u, Max: %u\n",
2189 bw_used, max_bandwidth);
2194 * Ok, we know we have some packets left over after even-handedly
2195 * scheduling interval 15. We don't know which microframes they will
2196 * fit into, so we over-schedule and say they will be scheduled every
2199 if (packets_remaining > 0)
2200 bw_used += overhead + packet_size;
2202 if (!virt_dev->tt_info && virt_dev->udev->speed == USB_SPEED_HIGH) {
2203 unsigned int port_index = virt_dev->real_port - 1;
2205 /* OK, we're manipulating a HS device attached to a
2206 * root port bandwidth domain. Include the number of active TTs
2207 * in the bandwidth used.
2209 bw_used += TT_HS_OVERHEAD *
2210 xhci->rh_bw[port_index].num_active_tts;
2213 xhci_dbg(xhci, "Final bandwidth: %u, Limit: %u, Reserved: %u, "
2214 "Available: %u " "percent\n",
2215 bw_used, max_bandwidth, bw_reserved,
2216 (max_bandwidth - bw_used - bw_reserved) * 100 /
2219 bw_used += bw_reserved;
2220 if (bw_used > max_bandwidth) {
2221 xhci_warn(xhci, "Not enough bandwidth. Proposed: %u, Max: %u\n",
2222 bw_used, max_bandwidth);
2226 bw_table->bw_used = bw_used;
2230 static bool xhci_is_async_ep(unsigned int ep_type)
2232 return (ep_type != ISOC_OUT_EP && ep_type != INT_OUT_EP &&
2233 ep_type != ISOC_IN_EP &&
2234 ep_type != INT_IN_EP);
2237 static bool xhci_is_sync_in_ep(unsigned int ep_type)
2239 return (ep_type == ISOC_IN_EP || ep_type != INT_IN_EP);
2242 static unsigned int xhci_get_ss_bw_consumed(struct xhci_bw_info *ep_bw)
2244 unsigned int mps = DIV_ROUND_UP(ep_bw->max_packet_size, SS_BLOCK);
2246 if (ep_bw->ep_interval == 0)
2247 return SS_OVERHEAD_BURST +
2248 (ep_bw->mult * ep_bw->num_packets *
2249 (SS_OVERHEAD + mps));
2250 return DIV_ROUND_UP(ep_bw->mult * ep_bw->num_packets *
2251 (SS_OVERHEAD + mps + SS_OVERHEAD_BURST),
2252 1 << ep_bw->ep_interval);
2256 void xhci_drop_ep_from_interval_table(struct xhci_hcd *xhci,
2257 struct xhci_bw_info *ep_bw,
2258 struct xhci_interval_bw_table *bw_table,
2259 struct usb_device *udev,
2260 struct xhci_virt_ep *virt_ep,
2261 struct xhci_tt_bw_info *tt_info)
2263 struct xhci_interval_bw *interval_bw;
2264 int normalized_interval;
2266 if (xhci_is_async_ep(ep_bw->type))
2269 if (udev->speed == USB_SPEED_SUPER) {
2270 if (xhci_is_sync_in_ep(ep_bw->type))
2271 xhci->devs[udev->slot_id]->bw_table->ss_bw_in -=
2272 xhci_get_ss_bw_consumed(ep_bw);
2274 xhci->devs[udev->slot_id]->bw_table->ss_bw_out -=
2275 xhci_get_ss_bw_consumed(ep_bw);
2279 /* SuperSpeed endpoints never get added to intervals in the table, so
2280 * this check is only valid for HS/FS/LS devices.
2282 if (list_empty(&virt_ep->bw_endpoint_list))
2284 /* For LS/FS devices, we need to translate the interval expressed in
2285 * microframes to frames.
2287 if (udev->speed == USB_SPEED_HIGH)
2288 normalized_interval = ep_bw->ep_interval;
2290 normalized_interval = ep_bw->ep_interval - 3;
2292 if (normalized_interval == 0)
2293 bw_table->interval0_esit_payload -= ep_bw->max_esit_payload;
2294 interval_bw = &bw_table->interval_bw[normalized_interval];
2295 interval_bw->num_packets -= ep_bw->num_packets;
2296 switch (udev->speed) {
2298 interval_bw->overhead[LS_OVERHEAD_TYPE] -= 1;
2300 case USB_SPEED_FULL:
2301 interval_bw->overhead[FS_OVERHEAD_TYPE] -= 1;
2303 case USB_SPEED_HIGH:
2304 interval_bw->overhead[HS_OVERHEAD_TYPE] -= 1;
2306 case USB_SPEED_SUPER:
2307 case USB_SPEED_UNKNOWN:
2308 case USB_SPEED_WIRELESS:
2309 /* Should never happen because only LS/FS/HS endpoints will get
2310 * added to the endpoint list.
2315 tt_info->active_eps -= 1;
2316 list_del_init(&virt_ep->bw_endpoint_list);
2319 static void xhci_add_ep_to_interval_table(struct xhci_hcd *xhci,
2320 struct xhci_bw_info *ep_bw,
2321 struct xhci_interval_bw_table *bw_table,
2322 struct usb_device *udev,
2323 struct xhci_virt_ep *virt_ep,
2324 struct xhci_tt_bw_info *tt_info)
2326 struct xhci_interval_bw *interval_bw;
2327 struct xhci_virt_ep *smaller_ep;
2328 int normalized_interval;
2330 if (xhci_is_async_ep(ep_bw->type))
2333 if (udev->speed == USB_SPEED_SUPER) {
2334 if (xhci_is_sync_in_ep(ep_bw->type))
2335 xhci->devs[udev->slot_id]->bw_table->ss_bw_in +=
2336 xhci_get_ss_bw_consumed(ep_bw);
2338 xhci->devs[udev->slot_id]->bw_table->ss_bw_out +=
2339 xhci_get_ss_bw_consumed(ep_bw);
2343 /* For LS/FS devices, we need to translate the interval expressed in
2344 * microframes to frames.
2346 if (udev->speed == USB_SPEED_HIGH)
2347 normalized_interval = ep_bw->ep_interval;
2349 normalized_interval = ep_bw->ep_interval - 3;
2351 if (normalized_interval == 0)
2352 bw_table->interval0_esit_payload += ep_bw->max_esit_payload;
2353 interval_bw = &bw_table->interval_bw[normalized_interval];
2354 interval_bw->num_packets += ep_bw->num_packets;
2355 switch (udev->speed) {
2357 interval_bw->overhead[LS_OVERHEAD_TYPE] += 1;
2359 case USB_SPEED_FULL:
2360 interval_bw->overhead[FS_OVERHEAD_TYPE] += 1;
2362 case USB_SPEED_HIGH:
2363 interval_bw->overhead[HS_OVERHEAD_TYPE] += 1;
2365 case USB_SPEED_SUPER:
2366 case USB_SPEED_UNKNOWN:
2367 case USB_SPEED_WIRELESS:
2368 /* Should never happen because only LS/FS/HS endpoints will get
2369 * added to the endpoint list.
2375 tt_info->active_eps += 1;
2376 /* Insert the endpoint into the list, largest max packet size first. */
2377 list_for_each_entry(smaller_ep, &interval_bw->endpoints,
2379 if (ep_bw->max_packet_size >=
2380 smaller_ep->bw_info.max_packet_size) {
2381 /* Add the new ep before the smaller endpoint */
2382 list_add_tail(&virt_ep->bw_endpoint_list,
2383 &smaller_ep->bw_endpoint_list);
2387 /* Add the new endpoint at the end of the list. */
2388 list_add_tail(&virt_ep->bw_endpoint_list,
2389 &interval_bw->endpoints);
2392 void xhci_update_tt_active_eps(struct xhci_hcd *xhci,
2393 struct xhci_virt_device *virt_dev,
2396 struct xhci_root_port_bw_info *rh_bw_info;
2397 if (!virt_dev->tt_info)
2400 rh_bw_info = &xhci->rh_bw[virt_dev->real_port - 1];
2401 if (old_active_eps == 0 &&
2402 virt_dev->tt_info->active_eps != 0) {
2403 rh_bw_info->num_active_tts += 1;
2404 rh_bw_info->bw_table.bw_used += TT_HS_OVERHEAD;
2405 } else if (old_active_eps != 0 &&
2406 virt_dev->tt_info->active_eps == 0) {
2407 rh_bw_info->num_active_tts -= 1;
2408 rh_bw_info->bw_table.bw_used -= TT_HS_OVERHEAD;
2412 static int xhci_reserve_bandwidth(struct xhci_hcd *xhci,
2413 struct xhci_virt_device *virt_dev,
2414 struct xhci_container_ctx *in_ctx)
2416 struct xhci_bw_info ep_bw_info[31];
2418 struct xhci_input_control_ctx *ctrl_ctx;
2419 int old_active_eps = 0;
2421 if (virt_dev->tt_info)
2422 old_active_eps = virt_dev->tt_info->active_eps;
2424 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
2426 for (i = 0; i < 31; i++) {
2427 if (!EP_IS_ADDED(ctrl_ctx, i) && !EP_IS_DROPPED(ctrl_ctx, i))
2430 /* Make a copy of the BW info in case we need to revert this */
2431 memcpy(&ep_bw_info[i], &virt_dev->eps[i].bw_info,
2432 sizeof(ep_bw_info[i]));
2433 /* Drop the endpoint from the interval table if the endpoint is
2434 * being dropped or changed.
2436 if (EP_IS_DROPPED(ctrl_ctx, i))
2437 xhci_drop_ep_from_interval_table(xhci,
2438 &virt_dev->eps[i].bw_info,
2444 /* Overwrite the information stored in the endpoints' bw_info */
2445 xhci_update_bw_info(xhci, virt_dev->in_ctx, ctrl_ctx, virt_dev);
2446 for (i = 0; i < 31; i++) {
2447 /* Add any changed or added endpoints to the interval table */
2448 if (EP_IS_ADDED(ctrl_ctx, i))
2449 xhci_add_ep_to_interval_table(xhci,
2450 &virt_dev->eps[i].bw_info,
2457 if (!xhci_check_bw_table(xhci, virt_dev, old_active_eps)) {
2458 /* Ok, this fits in the bandwidth we have.
2459 * Update the number of active TTs.
2461 xhci_update_tt_active_eps(xhci, virt_dev, old_active_eps);
2465 /* We don't have enough bandwidth for this, revert the stored info. */
2466 for (i = 0; i < 31; i++) {
2467 if (!EP_IS_ADDED(ctrl_ctx, i) && !EP_IS_DROPPED(ctrl_ctx, i))
2470 /* Drop the new copies of any added or changed endpoints from
2471 * the interval table.
2473 if (EP_IS_ADDED(ctrl_ctx, i)) {
2474 xhci_drop_ep_from_interval_table(xhci,
2475 &virt_dev->eps[i].bw_info,
2481 /* Revert the endpoint back to its old information */
2482 memcpy(&virt_dev->eps[i].bw_info, &ep_bw_info[i],
2483 sizeof(ep_bw_info[i]));
2484 /* Add any changed or dropped endpoints back into the table */
2485 if (EP_IS_DROPPED(ctrl_ctx, i))
2486 xhci_add_ep_to_interval_table(xhci,
2487 &virt_dev->eps[i].bw_info,
2497 /* Issue a configure endpoint command or evaluate context command
2498 * and wait for it to finish.
2500 static int xhci_configure_endpoint(struct xhci_hcd *xhci,
2501 struct usb_device *udev,
2502 struct xhci_command *command,
2503 bool ctx_change, bool must_succeed)
2507 unsigned long flags;
2508 struct xhci_container_ctx *in_ctx;
2509 struct completion *cmd_completion;
2511 struct xhci_virt_device *virt_dev;
2513 spin_lock_irqsave(&xhci->lock, flags);
2514 virt_dev = xhci->devs[udev->slot_id];
2517 in_ctx = command->in_ctx;
2519 in_ctx = virt_dev->in_ctx;
2521 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK) &&
2522 xhci_reserve_host_resources(xhci, in_ctx)) {
2523 spin_unlock_irqrestore(&xhci->lock, flags);
2524 xhci_warn(xhci, "Not enough host resources, "
2525 "active endpoint contexts = %u\n",
2526 xhci->num_active_eps);
2529 if ((xhci->quirks & XHCI_SW_BW_CHECKING) &&
2530 xhci_reserve_bandwidth(xhci, virt_dev, in_ctx)) {
2531 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK))
2532 xhci_free_host_resources(xhci, in_ctx);
2533 spin_unlock_irqrestore(&xhci->lock, flags);
2534 xhci_warn(xhci, "Not enough bandwidth\n");
2539 cmd_completion = command->completion;
2540 cmd_status = &command->status;
2541 command->command_trb = xhci->cmd_ring->enqueue;
2543 /* Enqueue pointer can be left pointing to the link TRB,
2544 * we must handle that
2546 if (TRB_TYPE_LINK_LE32(command->command_trb->link.control))
2547 command->command_trb =
2548 xhci->cmd_ring->enq_seg->next->trbs;
2550 list_add_tail(&command->cmd_list, &virt_dev->cmd_list);
2552 cmd_completion = &virt_dev->cmd_completion;
2553 cmd_status = &virt_dev->cmd_status;
2555 init_completion(cmd_completion);
2558 ret = xhci_queue_configure_endpoint(xhci, in_ctx->dma,
2559 udev->slot_id, must_succeed);
2561 ret = xhci_queue_evaluate_context(xhci, in_ctx->dma,
2565 list_del(&command->cmd_list);
2566 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK))
2567 xhci_free_host_resources(xhci, in_ctx);
2568 spin_unlock_irqrestore(&xhci->lock, flags);
2569 xhci_dbg(xhci, "FIXME allocate a new ring segment\n");
2572 xhci_ring_cmd_db(xhci);
2573 spin_unlock_irqrestore(&xhci->lock, flags);
2575 /* Wait for the configure endpoint command to complete */
2576 timeleft = wait_for_completion_interruptible_timeout(
2578 USB_CTRL_SET_TIMEOUT);
2579 if (timeleft <= 0) {
2580 xhci_warn(xhci, "%s while waiting for %s command\n",
2581 timeleft == 0 ? "Timeout" : "Signal",
2583 "configure endpoint" :
2584 "evaluate context");
2585 /* FIXME cancel the configure endpoint command */
2590 ret = xhci_configure_endpoint_result(xhci, udev, cmd_status);
2592 ret = xhci_evaluate_context_result(xhci, udev, cmd_status);
2594 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
2595 spin_lock_irqsave(&xhci->lock, flags);
2596 /* If the command failed, remove the reserved resources.
2597 * Otherwise, clean up the estimate to include dropped eps.
2600 xhci_free_host_resources(xhci, in_ctx);
2602 xhci_finish_resource_reservation(xhci, in_ctx);
2603 spin_unlock_irqrestore(&xhci->lock, flags);
2608 /* Called after one or more calls to xhci_add_endpoint() or
2609 * xhci_drop_endpoint(). If this call fails, the USB core is expected
2610 * to call xhci_reset_bandwidth().
2612 * Since we are in the middle of changing either configuration or
2613 * installing a new alt setting, the USB core won't allow URBs to be
2614 * enqueued for any endpoint on the old config or interface. Nothing
2615 * else should be touching the xhci->devs[slot_id] structure, so we
2616 * don't need to take the xhci->lock for manipulating that.
2618 int xhci_check_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
2622 struct xhci_hcd *xhci;
2623 struct xhci_virt_device *virt_dev;
2624 struct xhci_input_control_ctx *ctrl_ctx;
2625 struct xhci_slot_ctx *slot_ctx;
2627 ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
2630 xhci = hcd_to_xhci(hcd);
2631 if (xhci->xhc_state & XHCI_STATE_DYING)
2634 xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
2635 virt_dev = xhci->devs[udev->slot_id];
2637 /* See section 4.6.6 - A0 = 1; A1 = D0 = D1 = 0 */
2638 ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
2639 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
2640 ctrl_ctx->add_flags &= cpu_to_le32(~EP0_FLAG);
2641 ctrl_ctx->drop_flags &= cpu_to_le32(~(SLOT_FLAG | EP0_FLAG));
2643 /* Don't issue the command if there's no endpoints to update. */
2644 if (ctrl_ctx->add_flags == cpu_to_le32(SLOT_FLAG) &&
2645 ctrl_ctx->drop_flags == 0)
2648 xhci_dbg(xhci, "New Input Control Context:\n");
2649 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
2650 xhci_dbg_ctx(xhci, virt_dev->in_ctx,
2651 LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx->dev_info)));
2653 ret = xhci_configure_endpoint(xhci, udev, NULL,
2656 /* Callee should call reset_bandwidth() */
2660 xhci_dbg(xhci, "Output context after successful config ep cmd:\n");
2661 xhci_dbg_ctx(xhci, virt_dev->out_ctx,
2662 LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx->dev_info)));
2664 /* Free any rings that were dropped, but not changed. */
2665 for (i = 1; i < 31; ++i) {
2666 if ((le32_to_cpu(ctrl_ctx->drop_flags) & (1 << (i + 1))) &&
2667 !(le32_to_cpu(ctrl_ctx->add_flags) & (1 << (i + 1))))
2668 xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
2670 xhci_zero_in_ctx(xhci, virt_dev);
2672 * Install any rings for completely new endpoints or changed endpoints,
2673 * and free or cache any old rings from changed endpoints.
2675 for (i = 1; i < 31; ++i) {
2676 if (!virt_dev->eps[i].new_ring)
2678 /* Only cache or free the old ring if it exists.
2679 * It may not if this is the first add of an endpoint.
2681 if (virt_dev->eps[i].ring) {
2682 xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
2684 virt_dev->eps[i].ring = virt_dev->eps[i].new_ring;
2685 virt_dev->eps[i].new_ring = NULL;
2691 void xhci_reset_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
2693 struct xhci_hcd *xhci;
2694 struct xhci_virt_device *virt_dev;
2697 ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
2700 xhci = hcd_to_xhci(hcd);
2702 xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
2703 virt_dev = xhci->devs[udev->slot_id];
2704 /* Free any rings allocated for added endpoints */
2705 for (i = 0; i < 31; ++i) {
2706 if (virt_dev->eps[i].new_ring) {
2707 xhci_ring_free(xhci, virt_dev->eps[i].new_ring);
2708 virt_dev->eps[i].new_ring = NULL;
2711 xhci_zero_in_ctx(xhci, virt_dev);
2714 static void xhci_setup_input_ctx_for_config_ep(struct xhci_hcd *xhci,
2715 struct xhci_container_ctx *in_ctx,
2716 struct xhci_container_ctx *out_ctx,
2717 u32 add_flags, u32 drop_flags)
2719 struct xhci_input_control_ctx *ctrl_ctx;
2720 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
2721 ctrl_ctx->add_flags = cpu_to_le32(add_flags);
2722 ctrl_ctx->drop_flags = cpu_to_le32(drop_flags);
2723 xhci_slot_copy(xhci, in_ctx, out_ctx);
2724 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
2726 xhci_dbg(xhci, "Input Context:\n");
2727 xhci_dbg_ctx(xhci, in_ctx, xhci_last_valid_endpoint(add_flags));
2730 static void xhci_setup_input_ctx_for_quirk(struct xhci_hcd *xhci,
2731 unsigned int slot_id, unsigned int ep_index,
2732 struct xhci_dequeue_state *deq_state)
2734 struct xhci_container_ctx *in_ctx;
2735 struct xhci_ep_ctx *ep_ctx;
2739 xhci_endpoint_copy(xhci, xhci->devs[slot_id]->in_ctx,
2740 xhci->devs[slot_id]->out_ctx, ep_index);
2741 in_ctx = xhci->devs[slot_id]->in_ctx;
2742 ep_ctx = xhci_get_ep_ctx(xhci, in_ctx, ep_index);
2743 addr = xhci_trb_virt_to_dma(deq_state->new_deq_seg,
2744 deq_state->new_deq_ptr);
2746 xhci_warn(xhci, "WARN Cannot submit config ep after "
2747 "reset ep command\n");
2748 xhci_warn(xhci, "WARN deq seg = %p, deq ptr = %p\n",
2749 deq_state->new_deq_seg,
2750 deq_state->new_deq_ptr);
2753 ep_ctx->deq = cpu_to_le64(addr | deq_state->new_cycle_state);
2755 added_ctxs = xhci_get_endpoint_flag_from_index(ep_index);
2756 xhci_setup_input_ctx_for_config_ep(xhci, xhci->devs[slot_id]->in_ctx,
2757 xhci->devs[slot_id]->out_ctx, added_ctxs, added_ctxs);
2760 void xhci_cleanup_stalled_ring(struct xhci_hcd *xhci,
2761 struct usb_device *udev, unsigned int ep_index)
2763 struct xhci_dequeue_state deq_state;
2764 struct xhci_virt_ep *ep;
2766 xhci_dbg(xhci, "Cleaning up stalled endpoint ring\n");
2767 ep = &xhci->devs[udev->slot_id]->eps[ep_index];
2768 /* We need to move the HW's dequeue pointer past this TD,
2769 * or it will attempt to resend it on the next doorbell ring.
2771 xhci_find_new_dequeue_state(xhci, udev->slot_id,
2772 ep_index, ep->stopped_stream, ep->stopped_td,
2775 /* HW with the reset endpoint quirk will use the saved dequeue state to
2776 * issue a configure endpoint command later.
2778 if (!(xhci->quirks & XHCI_RESET_EP_QUIRK)) {
2779 xhci_dbg(xhci, "Queueing new dequeue state\n");
2780 xhci_queue_new_dequeue_state(xhci, udev->slot_id,
2781 ep_index, ep->stopped_stream, &deq_state);
2783 /* Better hope no one uses the input context between now and the
2784 * reset endpoint completion!
2785 * XXX: No idea how this hardware will react when stream rings
2788 xhci_dbg(xhci, "Setting up input context for "
2789 "configure endpoint command\n");
2790 xhci_setup_input_ctx_for_quirk(xhci, udev->slot_id,
2791 ep_index, &deq_state);
2795 /* Deal with stalled endpoints. The core should have sent the control message
2796 * to clear the halt condition. However, we need to make the xHCI hardware
2797 * reset its sequence number, since a device will expect a sequence number of
2798 * zero after the halt condition is cleared.
2799 * Context: in_interrupt
2801 void xhci_endpoint_reset(struct usb_hcd *hcd,
2802 struct usb_host_endpoint *ep)
2804 struct xhci_hcd *xhci;
2805 struct usb_device *udev;
2806 unsigned int ep_index;
2807 unsigned long flags;
2809 struct xhci_virt_ep *virt_ep;
2811 xhci = hcd_to_xhci(hcd);
2812 udev = (struct usb_device *) ep->hcpriv;
2813 /* Called with a root hub endpoint (or an endpoint that wasn't added
2814 * with xhci_add_endpoint()
2818 ep_index = xhci_get_endpoint_index(&ep->desc);
2819 virt_ep = &xhci->devs[udev->slot_id]->eps[ep_index];
2820 if (!virt_ep->stopped_td) {
2821 xhci_dbg(xhci, "Endpoint 0x%x not halted, refusing to reset.\n",
2822 ep->desc.bEndpointAddress);
2825 if (usb_endpoint_xfer_control(&ep->desc)) {
2826 xhci_dbg(xhci, "Control endpoint stall already handled.\n");
2830 xhci_dbg(xhci, "Queueing reset endpoint command\n");
2831 spin_lock_irqsave(&xhci->lock, flags);
2832 ret = xhci_queue_reset_ep(xhci, udev->slot_id, ep_index);
2834 * Can't change the ring dequeue pointer until it's transitioned to the
2835 * stopped state, which is only upon a successful reset endpoint
2836 * command. Better hope that last command worked!
2839 xhci_cleanup_stalled_ring(xhci, udev, ep_index);
2840 kfree(virt_ep->stopped_td);
2841 xhci_ring_cmd_db(xhci);
2843 virt_ep->stopped_td = NULL;
2844 virt_ep->stopped_trb = NULL;
2845 virt_ep->stopped_stream = 0;
2846 spin_unlock_irqrestore(&xhci->lock, flags);
2849 xhci_warn(xhci, "FIXME allocate a new ring segment\n");
2852 static int xhci_check_streams_endpoint(struct xhci_hcd *xhci,
2853 struct usb_device *udev, struct usb_host_endpoint *ep,
2854 unsigned int slot_id)
2857 unsigned int ep_index;
2858 unsigned int ep_state;
2862 ret = xhci_check_args(xhci_to_hcd(xhci), udev, ep, 1, true, __func__);
2865 if (ep->ss_ep_comp.bmAttributes == 0) {
2866 xhci_warn(xhci, "WARN: SuperSpeed Endpoint Companion"
2867 " descriptor for ep 0x%x does not support streams\n",
2868 ep->desc.bEndpointAddress);
2872 ep_index = xhci_get_endpoint_index(&ep->desc);
2873 ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state;
2874 if (ep_state & EP_HAS_STREAMS ||
2875 ep_state & EP_GETTING_STREAMS) {
2876 xhci_warn(xhci, "WARN: SuperSpeed bulk endpoint 0x%x "
2877 "already has streams set up.\n",
2878 ep->desc.bEndpointAddress);
2879 xhci_warn(xhci, "Send email to xHCI maintainer and ask for "
2880 "dynamic stream context array reallocation.\n");
2883 if (!list_empty(&xhci->devs[slot_id]->eps[ep_index].ring->td_list)) {
2884 xhci_warn(xhci, "Cannot setup streams for SuperSpeed bulk "
2885 "endpoint 0x%x; URBs are pending.\n",
2886 ep->desc.bEndpointAddress);
2892 static void xhci_calculate_streams_entries(struct xhci_hcd *xhci,
2893 unsigned int *num_streams, unsigned int *num_stream_ctxs)
2895 unsigned int max_streams;
2897 /* The stream context array size must be a power of two */
2898 *num_stream_ctxs = roundup_pow_of_two(*num_streams);
2900 * Find out how many primary stream array entries the host controller
2901 * supports. Later we may use secondary stream arrays (similar to 2nd
2902 * level page entries), but that's an optional feature for xHCI host
2903 * controllers. xHCs must support at least 4 stream IDs.
2905 max_streams = HCC_MAX_PSA(xhci->hcc_params);
2906 if (*num_stream_ctxs > max_streams) {
2907 xhci_dbg(xhci, "xHCI HW only supports %u stream ctx entries.\n",
2909 *num_stream_ctxs = max_streams;
2910 *num_streams = max_streams;
2914 /* Returns an error code if one of the endpoint already has streams.
2915 * This does not change any data structures, it only checks and gathers
2918 static int xhci_calculate_streams_and_bitmask(struct xhci_hcd *xhci,
2919 struct usb_device *udev,
2920 struct usb_host_endpoint **eps, unsigned int num_eps,
2921 unsigned int *num_streams, u32 *changed_ep_bitmask)
2923 unsigned int max_streams;
2924 unsigned int endpoint_flag;
2928 for (i = 0; i < num_eps; i++) {
2929 ret = xhci_check_streams_endpoint(xhci, udev,
2930 eps[i], udev->slot_id);
2934 max_streams = usb_ss_max_streams(&eps[i]->ss_ep_comp);
2935 if (max_streams < (*num_streams - 1)) {
2936 xhci_dbg(xhci, "Ep 0x%x only supports %u stream IDs.\n",
2937 eps[i]->desc.bEndpointAddress,
2939 *num_streams = max_streams+1;
2942 endpoint_flag = xhci_get_endpoint_flag(&eps[i]->desc);
2943 if (*changed_ep_bitmask & endpoint_flag)
2945 *changed_ep_bitmask |= endpoint_flag;
2950 static u32 xhci_calculate_no_streams_bitmask(struct xhci_hcd *xhci,
2951 struct usb_device *udev,
2952 struct usb_host_endpoint **eps, unsigned int num_eps)
2954 u32 changed_ep_bitmask = 0;
2955 unsigned int slot_id;
2956 unsigned int ep_index;
2957 unsigned int ep_state;
2960 slot_id = udev->slot_id;
2961 if (!xhci->devs[slot_id])
2964 for (i = 0; i < num_eps; i++) {
2965 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2966 ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state;
2967 /* Are streams already being freed for the endpoint? */
2968 if (ep_state & EP_GETTING_NO_STREAMS) {
2969 xhci_warn(xhci, "WARN Can't disable streams for "
2971 "streams are being disabled already.",
2972 eps[i]->desc.bEndpointAddress);
2975 /* Are there actually any streams to free? */
2976 if (!(ep_state & EP_HAS_STREAMS) &&
2977 !(ep_state & EP_GETTING_STREAMS)) {
2978 xhci_warn(xhci, "WARN Can't disable streams for "
2980 "streams are already disabled!",
2981 eps[i]->desc.bEndpointAddress);
2982 xhci_warn(xhci, "WARN xhci_free_streams() called "
2983 "with non-streams endpoint\n");
2986 changed_ep_bitmask |= xhci_get_endpoint_flag(&eps[i]->desc);
2988 return changed_ep_bitmask;
2992 * The USB device drivers use this function (though the HCD interface in USB
2993 * core) to prepare a set of bulk endpoints to use streams. Streams are used to
2994 * coordinate mass storage command queueing across multiple endpoints (basically
2995 * a stream ID == a task ID).
2997 * Setting up streams involves allocating the same size stream context array
2998 * for each endpoint and issuing a configure endpoint command for all endpoints.
3000 * Don't allow the call to succeed if one endpoint only supports one stream
3001 * (which means it doesn't support streams at all).
3003 * Drivers may get less stream IDs than they asked for, if the host controller
3004 * hardware or endpoints claim they can't support the number of requested
3007 int xhci_alloc_streams(struct usb_hcd *hcd, struct usb_device *udev,
3008 struct usb_host_endpoint **eps, unsigned int num_eps,
3009 unsigned int num_streams, gfp_t mem_flags)
3012 struct xhci_hcd *xhci;
3013 struct xhci_virt_device *vdev;
3014 struct xhci_command *config_cmd;
3015 unsigned int ep_index;
3016 unsigned int num_stream_ctxs;
3017 unsigned long flags;
3018 u32 changed_ep_bitmask = 0;
3023 /* Add one to the number of streams requested to account for
3024 * stream 0 that is reserved for xHCI usage.
3027 xhci = hcd_to_xhci(hcd);
3028 xhci_dbg(xhci, "Driver wants %u stream IDs (including stream 0).\n",
3031 config_cmd = xhci_alloc_command(xhci, true, true, mem_flags);
3033 xhci_dbg(xhci, "Could not allocate xHCI command structure.\n");
3037 /* Check to make sure all endpoints are not already configured for
3038 * streams. While we're at it, find the maximum number of streams that
3039 * all the endpoints will support and check for duplicate endpoints.
3041 spin_lock_irqsave(&xhci->lock, flags);
3042 ret = xhci_calculate_streams_and_bitmask(xhci, udev, eps,
3043 num_eps, &num_streams, &changed_ep_bitmask);
3045 xhci_free_command(xhci, config_cmd);
3046 spin_unlock_irqrestore(&xhci->lock, flags);
3049 if (num_streams <= 1) {
3050 xhci_warn(xhci, "WARN: endpoints can't handle "
3051 "more than one stream.\n");
3052 xhci_free_command(xhci, config_cmd);
3053 spin_unlock_irqrestore(&xhci->lock, flags);
3056 vdev = xhci->devs[udev->slot_id];
3057 /* Mark each endpoint as being in transition, so
3058 * xhci_urb_enqueue() will reject all URBs.
3060 for (i = 0; i < num_eps; i++) {
3061 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3062 vdev->eps[ep_index].ep_state |= EP_GETTING_STREAMS;
3064 spin_unlock_irqrestore(&xhci->lock, flags);
3066 /* Setup internal data structures and allocate HW data structures for
3067 * streams (but don't install the HW structures in the input context
3068 * until we're sure all memory allocation succeeded).
3070 xhci_calculate_streams_entries(xhci, &num_streams, &num_stream_ctxs);
3071 xhci_dbg(xhci, "Need %u stream ctx entries for %u stream IDs.\n",
3072 num_stream_ctxs, num_streams);
3074 for (i = 0; i < num_eps; i++) {
3075 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3076 vdev->eps[ep_index].stream_info = xhci_alloc_stream_info(xhci,
3078 num_streams, mem_flags);
3079 if (!vdev->eps[ep_index].stream_info)
3081 /* Set maxPstreams in endpoint context and update deq ptr to
3082 * point to stream context array. FIXME
3086 /* Set up the input context for a configure endpoint command. */
3087 for (i = 0; i < num_eps; i++) {
3088 struct xhci_ep_ctx *ep_ctx;
3090 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3091 ep_ctx = xhci_get_ep_ctx(xhci, config_cmd->in_ctx, ep_index);
3093 xhci_endpoint_copy(xhci, config_cmd->in_ctx,
3094 vdev->out_ctx, ep_index);
3095 xhci_setup_streams_ep_input_ctx(xhci, ep_ctx,
3096 vdev->eps[ep_index].stream_info);
3098 /* Tell the HW to drop its old copy of the endpoint context info
3099 * and add the updated copy from the input context.
3101 xhci_setup_input_ctx_for_config_ep(xhci, config_cmd->in_ctx,
3102 vdev->out_ctx, changed_ep_bitmask, changed_ep_bitmask);
3104 /* Issue and wait for the configure endpoint command */
3105 ret = xhci_configure_endpoint(xhci, udev, config_cmd,
3108 /* xHC rejected the configure endpoint command for some reason, so we
3109 * leave the old ring intact and free our internal streams data
3115 spin_lock_irqsave(&xhci->lock, flags);
3116 for (i = 0; i < num_eps; i++) {
3117 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3118 vdev->eps[ep_index].ep_state &= ~EP_GETTING_STREAMS;
3119 xhci_dbg(xhci, "Slot %u ep ctx %u now has streams.\n",
3120 udev->slot_id, ep_index);
3121 vdev->eps[ep_index].ep_state |= EP_HAS_STREAMS;
3123 xhci_free_command(xhci, config_cmd);
3124 spin_unlock_irqrestore(&xhci->lock, flags);
3126 /* Subtract 1 for stream 0, which drivers can't use */
3127 return num_streams - 1;
3130 /* If it didn't work, free the streams! */
3131 for (i = 0; i < num_eps; i++) {
3132 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3133 xhci_free_stream_info(xhci, vdev->eps[ep_index].stream_info);
3134 vdev->eps[ep_index].stream_info = NULL;
3135 /* FIXME Unset maxPstreams in endpoint context and
3136 * update deq ptr to point to normal string ring.
3138 vdev->eps[ep_index].ep_state &= ~EP_GETTING_STREAMS;
3139 vdev->eps[ep_index].ep_state &= ~EP_HAS_STREAMS;
3140 xhci_endpoint_zero(xhci, vdev, eps[i]);
3142 xhci_free_command(xhci, config_cmd);
3146 /* Transition the endpoint from using streams to being a "normal" endpoint
3149 * Modify the endpoint context state, submit a configure endpoint command,
3150 * and free all endpoint rings for streams if that completes successfully.
3152 int xhci_free_streams(struct usb_hcd *hcd, struct usb_device *udev,
3153 struct usb_host_endpoint **eps, unsigned int num_eps,
3157 struct xhci_hcd *xhci;
3158 struct xhci_virt_device *vdev;
3159 struct xhci_command *command;
3160 unsigned int ep_index;
3161 unsigned long flags;
3162 u32 changed_ep_bitmask;
3164 xhci = hcd_to_xhci(hcd);
3165 vdev = xhci->devs[udev->slot_id];
3167 /* Set up a configure endpoint command to remove the streams rings */
3168 spin_lock_irqsave(&xhci->lock, flags);
3169 changed_ep_bitmask = xhci_calculate_no_streams_bitmask(xhci,
3170 udev, eps, num_eps);
3171 if (changed_ep_bitmask == 0) {
3172 spin_unlock_irqrestore(&xhci->lock, flags);
3176 /* Use the xhci_command structure from the first endpoint. We may have
3177 * allocated too many, but the driver may call xhci_free_streams() for
3178 * each endpoint it grouped into one call to xhci_alloc_streams().
3180 ep_index = xhci_get_endpoint_index(&eps[0]->desc);
3181 command = vdev->eps[ep_index].stream_info->free_streams_command;
3182 for (i = 0; i < num_eps; i++) {
3183 struct xhci_ep_ctx *ep_ctx;
3185 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3186 ep_ctx = xhci_get_ep_ctx(xhci, command->in_ctx, ep_index);
3187 xhci->devs[udev->slot_id]->eps[ep_index].ep_state |=
3188 EP_GETTING_NO_STREAMS;
3190 xhci_endpoint_copy(xhci, command->in_ctx,
3191 vdev->out_ctx, ep_index);
3192 xhci_setup_no_streams_ep_input_ctx(xhci, ep_ctx,
3193 &vdev->eps[ep_index]);
3195 xhci_setup_input_ctx_for_config_ep(xhci, command->in_ctx,
3196 vdev->out_ctx, changed_ep_bitmask, changed_ep_bitmask);
3197 spin_unlock_irqrestore(&xhci->lock, flags);
3199 /* Issue and wait for the configure endpoint command,
3200 * which must succeed.
3202 ret = xhci_configure_endpoint(xhci, udev, command,
3205 /* xHC rejected the configure endpoint command for some reason, so we
3206 * leave the streams rings intact.
3211 spin_lock_irqsave(&xhci->lock, flags);
3212 for (i = 0; i < num_eps; i++) {
3213 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3214 xhci_free_stream_info(xhci, vdev->eps[ep_index].stream_info);
3215 vdev->eps[ep_index].stream_info = NULL;
3216 /* FIXME Unset maxPstreams in endpoint context and
3217 * update deq ptr to point to normal string ring.
3219 vdev->eps[ep_index].ep_state &= ~EP_GETTING_NO_STREAMS;
3220 vdev->eps[ep_index].ep_state &= ~EP_HAS_STREAMS;
3222 spin_unlock_irqrestore(&xhci->lock, flags);
3228 * Deletes endpoint resources for endpoints that were active before a Reset
3229 * Device command, or a Disable Slot command. The Reset Device command leaves
3230 * the control endpoint intact, whereas the Disable Slot command deletes it.
3232 * Must be called with xhci->lock held.
3234 void xhci_free_device_endpoint_resources(struct xhci_hcd *xhci,
3235 struct xhci_virt_device *virt_dev, bool drop_control_ep)
3238 unsigned int num_dropped_eps = 0;
3239 unsigned int drop_flags = 0;
3241 for (i = (drop_control_ep ? 0 : 1); i < 31; i++) {
3242 if (virt_dev->eps[i].ring) {
3243 drop_flags |= 1 << i;
3247 xhci->num_active_eps -= num_dropped_eps;
3248 if (num_dropped_eps)
3249 xhci_dbg(xhci, "Dropped %u ep ctxs, flags = 0x%x, "
3251 num_dropped_eps, drop_flags,
3252 xhci->num_active_eps);
3256 * This submits a Reset Device Command, which will set the device state to 0,
3257 * set the device address to 0, and disable all the endpoints except the default
3258 * control endpoint. The USB core should come back and call
3259 * xhci_address_device(), and then re-set up the configuration. If this is
3260 * called because of a usb_reset_and_verify_device(), then the old alternate
3261 * settings will be re-installed through the normal bandwidth allocation
3264 * Wait for the Reset Device command to finish. Remove all structures
3265 * associated with the endpoints that were disabled. Clear the input device
3266 * structure? Cache the rings? Reset the control endpoint 0 max packet size?
3268 * If the virt_dev to be reset does not exist or does not match the udev,
3269 * it means the device is lost, possibly due to the xHC restore error and
3270 * re-initialization during S3/S4. In this case, call xhci_alloc_dev() to
3271 * re-allocate the device.
3273 int xhci_discover_or_reset_device(struct usb_hcd *hcd, struct usb_device *udev)
3276 unsigned long flags;
3277 struct xhci_hcd *xhci;
3278 unsigned int slot_id;
3279 struct xhci_virt_device *virt_dev;
3280 struct xhci_command *reset_device_cmd;
3282 int last_freed_endpoint;
3283 struct xhci_slot_ctx *slot_ctx;
3284 int old_active_eps = 0;
3286 ret = xhci_check_args(hcd, udev, NULL, 0, false, __func__);
3289 xhci = hcd_to_xhci(hcd);
3290 slot_id = udev->slot_id;
3291 virt_dev = xhci->devs[slot_id];
3293 xhci_dbg(xhci, "The device to be reset with slot ID %u does "
3294 "not exist. Re-allocate the device\n", slot_id);
3295 ret = xhci_alloc_dev(hcd, udev);
3302 if (virt_dev->udev != udev) {
3303 /* If the virt_dev and the udev does not match, this virt_dev
3304 * may belong to another udev.
3305 * Re-allocate the device.
3307 xhci_dbg(xhci, "The device to be reset with slot ID %u does "
3308 "not match the udev. Re-allocate the device\n",
3310 ret = xhci_alloc_dev(hcd, udev);
3317 /* If device is not setup, there is no point in resetting it */
3318 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx);
3319 if (GET_SLOT_STATE(le32_to_cpu(slot_ctx->dev_state)) ==
3320 SLOT_STATE_DISABLED)
3323 xhci_dbg(xhci, "Resetting device with slot ID %u\n", slot_id);
3324 /* Allocate the command structure that holds the struct completion.
3325 * Assume we're in process context, since the normal device reset
3326 * process has to wait for the device anyway. Storage devices are
3327 * reset as part of error handling, so use GFP_NOIO instead of
3330 reset_device_cmd = xhci_alloc_command(xhci, false, true, GFP_NOIO);
3331 if (!reset_device_cmd) {
3332 xhci_dbg(xhci, "Couldn't allocate command structure.\n");
3336 /* Attempt to submit the Reset Device command to the command ring */
3337 spin_lock_irqsave(&xhci->lock, flags);
3338 reset_device_cmd->command_trb = xhci->cmd_ring->enqueue;
3340 /* Enqueue pointer can be left pointing to the link TRB,
3341 * we must handle that
3343 if (TRB_TYPE_LINK_LE32(reset_device_cmd->command_trb->link.control))
3344 reset_device_cmd->command_trb =
3345 xhci->cmd_ring->enq_seg->next->trbs;
3347 list_add_tail(&reset_device_cmd->cmd_list, &virt_dev->cmd_list);
3348 ret = xhci_queue_reset_device(xhci, slot_id);
3350 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
3351 list_del(&reset_device_cmd->cmd_list);
3352 spin_unlock_irqrestore(&xhci->lock, flags);
3353 goto command_cleanup;
3355 xhci_ring_cmd_db(xhci);
3356 spin_unlock_irqrestore(&xhci->lock, flags);
3358 /* Wait for the Reset Device command to finish */
3359 timeleft = wait_for_completion_interruptible_timeout(
3360 reset_device_cmd->completion,
3361 USB_CTRL_SET_TIMEOUT);
3362 if (timeleft <= 0) {
3363 xhci_warn(xhci, "%s while waiting for reset device command\n",
3364 timeleft == 0 ? "Timeout" : "Signal");
3365 spin_lock_irqsave(&xhci->lock, flags);
3366 /* The timeout might have raced with the event ring handler, so
3367 * only delete from the list if the item isn't poisoned.
3369 if (reset_device_cmd->cmd_list.next != LIST_POISON1)
3370 list_del(&reset_device_cmd->cmd_list);
3371 spin_unlock_irqrestore(&xhci->lock, flags);
3373 goto command_cleanup;
3376 /* The Reset Device command can't fail, according to the 0.95/0.96 spec,
3377 * unless we tried to reset a slot ID that wasn't enabled,
3378 * or the device wasn't in the addressed or configured state.
3380 ret = reset_device_cmd->status;
3382 case COMP_EBADSLT: /* 0.95 completion code for bad slot ID */
3383 case COMP_CTX_STATE: /* 0.96 completion code for same thing */
3384 xhci_info(xhci, "Can't reset device (slot ID %u) in %s state\n",
3386 xhci_get_slot_state(xhci, virt_dev->out_ctx));
3387 xhci_info(xhci, "Not freeing device rings.\n");
3388 /* Don't treat this as an error. May change my mind later. */
3390 goto command_cleanup;
3392 xhci_dbg(xhci, "Successful reset device command.\n");
3395 if (xhci_is_vendor_info_code(xhci, ret))
3397 xhci_warn(xhci, "Unknown completion code %u for "
3398 "reset device command.\n", ret);
3400 goto command_cleanup;
3403 /* Free up host controller endpoint resources */
3404 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
3405 spin_lock_irqsave(&xhci->lock, flags);
3406 /* Don't delete the default control endpoint resources */
3407 xhci_free_device_endpoint_resources(xhci, virt_dev, false);
3408 spin_unlock_irqrestore(&xhci->lock, flags);
3411 /* Everything but endpoint 0 is disabled, so free or cache the rings. */
3412 last_freed_endpoint = 1;
3413 for (i = 1; i < 31; ++i) {
3414 struct xhci_virt_ep *ep = &virt_dev->eps[i];
3416 if (ep->ep_state & EP_HAS_STREAMS) {
3417 xhci_free_stream_info(xhci, ep->stream_info);
3418 ep->stream_info = NULL;
3419 ep->ep_state &= ~EP_HAS_STREAMS;
3423 xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
3424 last_freed_endpoint = i;
3426 if (!list_empty(&virt_dev->eps[i].bw_endpoint_list))
3427 xhci_drop_ep_from_interval_table(xhci,
3428 &virt_dev->eps[i].bw_info,
3433 xhci_clear_endpoint_bw_info(&virt_dev->eps[i].bw_info);
3435 /* If necessary, update the number of active TTs on this root port */
3436 xhci_update_tt_active_eps(xhci, virt_dev, old_active_eps);
3438 xhci_dbg(xhci, "Output context after successful reset device cmd:\n");
3439 xhci_dbg_ctx(xhci, virt_dev->out_ctx, last_freed_endpoint);
3443 xhci_free_command(xhci, reset_device_cmd);
3448 * At this point, the struct usb_device is about to go away, the device has
3449 * disconnected, and all traffic has been stopped and the endpoints have been
3450 * disabled. Free any HC data structures associated with that device.
3452 void xhci_free_dev(struct usb_hcd *hcd, struct usb_device *udev)
3454 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3455 struct xhci_virt_device *virt_dev;
3456 unsigned long flags;
3460 ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
3461 /* If the host is halted due to driver unload, we still need to free the
3464 if (ret <= 0 && ret != -ENODEV)
3467 virt_dev = xhci->devs[udev->slot_id];
3469 /* Stop any wayward timer functions (which may grab the lock) */
3470 for (i = 0; i < 31; ++i) {
3471 virt_dev->eps[i].ep_state &= ~EP_HALT_PENDING;
3472 del_timer_sync(&virt_dev->eps[i].stop_cmd_timer);
3475 if (udev->usb2_hw_lpm_enabled) {
3476 xhci_set_usb2_hardware_lpm(hcd, udev, 0);
3477 udev->usb2_hw_lpm_enabled = 0;
3480 spin_lock_irqsave(&xhci->lock, flags);
3481 /* Don't disable the slot if the host controller is dead. */
3482 state = xhci_readl(xhci, &xhci->op_regs->status);
3483 if (state == 0xffffffff || (xhci->xhc_state & XHCI_STATE_DYING) ||
3484 (xhci->xhc_state & XHCI_STATE_HALTED)) {
3485 xhci_free_virt_device(xhci, udev->slot_id);
3486 spin_unlock_irqrestore(&xhci->lock, flags);
3490 if (xhci_queue_slot_control(xhci, TRB_DISABLE_SLOT, udev->slot_id)) {
3491 spin_unlock_irqrestore(&xhci->lock, flags);
3492 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
3495 xhci_ring_cmd_db(xhci);
3496 spin_unlock_irqrestore(&xhci->lock, flags);
3498 * Event command completion handler will free any data structures
3499 * associated with the slot. XXX Can free sleep?
3504 * Checks if we have enough host controller resources for the default control
3507 * Must be called with xhci->lock held.
3509 static int xhci_reserve_host_control_ep_resources(struct xhci_hcd *xhci)
3511 if (xhci->num_active_eps + 1 > xhci->limit_active_eps) {
3512 xhci_dbg(xhci, "Not enough ep ctxs: "
3513 "%u active, need to add 1, limit is %u.\n",
3514 xhci->num_active_eps, xhci->limit_active_eps);
3517 xhci->num_active_eps += 1;
3518 xhci_dbg(xhci, "Adding 1 ep ctx, %u now active.\n",
3519 xhci->num_active_eps);
3525 * Returns 0 if the xHC ran out of device slots, the Enable Slot command
3526 * timed out, or allocating memory failed. Returns 1 on success.
3528 int xhci_alloc_dev(struct usb_hcd *hcd, struct usb_device *udev)
3530 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3531 unsigned long flags;
3535 spin_lock_irqsave(&xhci->lock, flags);
3536 ret = xhci_queue_slot_control(xhci, TRB_ENABLE_SLOT, 0);
3538 spin_unlock_irqrestore(&xhci->lock, flags);
3539 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
3542 xhci_ring_cmd_db(xhci);
3543 spin_unlock_irqrestore(&xhci->lock, flags);
3545 /* XXX: how much time for xHC slot assignment? */
3546 timeleft = wait_for_completion_interruptible_timeout(&xhci->addr_dev,
3547 USB_CTRL_SET_TIMEOUT);
3548 if (timeleft <= 0) {
3549 xhci_warn(xhci, "%s while waiting for a slot\n",
3550 timeleft == 0 ? "Timeout" : "Signal");
3551 /* FIXME cancel the enable slot request */
3555 if (!xhci->slot_id) {
3556 xhci_err(xhci, "Error while assigning device slot ID\n");
3560 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
3561 spin_lock_irqsave(&xhci->lock, flags);
3562 ret = xhci_reserve_host_control_ep_resources(xhci);
3564 spin_unlock_irqrestore(&xhci->lock, flags);
3565 xhci_warn(xhci, "Not enough host resources, "
3566 "active endpoint contexts = %u\n",
3567 xhci->num_active_eps);
3570 spin_unlock_irqrestore(&xhci->lock, flags);
3572 /* Use GFP_NOIO, since this function can be called from
3573 * xhci_discover_or_reset_device(), which may be called as part of
3574 * mass storage driver error handling.
3576 if (!xhci_alloc_virt_device(xhci, xhci->slot_id, udev, GFP_NOIO)) {
3577 xhci_warn(xhci, "Could not allocate xHCI USB device data structures\n");
3580 udev->slot_id = xhci->slot_id;
3581 /* Is this a LS or FS device under a HS hub? */
3582 /* Hub or peripherial? */
3586 /* Disable slot, if we can do it without mem alloc */
3587 spin_lock_irqsave(&xhci->lock, flags);
3588 if (!xhci_queue_slot_control(xhci, TRB_DISABLE_SLOT, udev->slot_id))
3589 xhci_ring_cmd_db(xhci);
3590 spin_unlock_irqrestore(&xhci->lock, flags);
3595 * Issue an Address Device command (which will issue a SetAddress request to
3597 * We should be protected by the usb_address0_mutex in khubd's hub_port_init, so
3598 * we should only issue and wait on one address command at the same time.
3600 * We add one to the device address issued by the hardware because the USB core
3601 * uses address 1 for the root hubs (even though they're not really devices).
3603 int xhci_address_device(struct usb_hcd *hcd, struct usb_device *udev)
3605 unsigned long flags;
3607 struct xhci_virt_device *virt_dev;
3609 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3610 struct xhci_slot_ctx *slot_ctx;
3611 struct xhci_input_control_ctx *ctrl_ctx;
3614 if (!udev->slot_id) {
3615 xhci_dbg(xhci, "Bad Slot ID %d\n", udev->slot_id);
3619 virt_dev = xhci->devs[udev->slot_id];
3621 if (WARN_ON(!virt_dev)) {
3623 * In plug/unplug torture test with an NEC controller,
3624 * a zero-dereference was observed once due to virt_dev = 0.
3625 * Print useful debug rather than crash if it is observed again!
3627 xhci_warn(xhci, "Virt dev invalid for slot_id 0x%x!\n",
3632 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
3634 * If this is the first Set Address since device plug-in or
3635 * virt_device realloaction after a resume with an xHCI power loss,
3636 * then set up the slot context.
3638 if (!slot_ctx->dev_info)
3639 xhci_setup_addressable_virt_dev(xhci, udev);
3640 /* Otherwise, update the control endpoint ring enqueue pointer. */
3642 xhci_copy_ep0_dequeue_into_input_ctx(xhci, udev);
3643 ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
3644 ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG | EP0_FLAG);
3645 ctrl_ctx->drop_flags = 0;
3647 xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id);
3648 xhci_dbg_ctx(xhci, virt_dev->in_ctx, 2);
3650 spin_lock_irqsave(&xhci->lock, flags);
3651 ret = xhci_queue_address_device(xhci, virt_dev->in_ctx->dma,
3654 spin_unlock_irqrestore(&xhci->lock, flags);
3655 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
3658 xhci_ring_cmd_db(xhci);
3659 spin_unlock_irqrestore(&xhci->lock, flags);
3661 /* ctrl tx can take up to 5 sec; XXX: need more time for xHC? */
3662 timeleft = wait_for_completion_interruptible_timeout(&xhci->addr_dev,
3663 USB_CTRL_SET_TIMEOUT);
3664 /* FIXME: From section 4.3.4: "Software shall be responsible for timing
3665 * the SetAddress() "recovery interval" required by USB and aborting the
3666 * command on a timeout.
3668 if (timeleft <= 0) {
3669 xhci_warn(xhci, "%s while waiting for address device command\n",
3670 timeleft == 0 ? "Timeout" : "Signal");
3671 /* FIXME cancel the address device command */
3675 switch (virt_dev->cmd_status) {
3676 case COMP_CTX_STATE:
3678 xhci_err(xhci, "Setup ERROR: address device command for slot %d.\n",
3683 dev_warn(&udev->dev, "Device not responding to set address.\n");
3687 dev_warn(&udev->dev, "ERROR: Incompatible device for address "
3688 "device command.\n");
3692 xhci_dbg(xhci, "Successful Address Device command\n");
3695 xhci_err(xhci, "ERROR: unexpected command completion "
3696 "code 0x%x.\n", virt_dev->cmd_status);
3697 xhci_dbg(xhci, "Slot ID %d Output Context:\n", udev->slot_id);
3698 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 2);
3705 temp_64 = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr);
3706 xhci_dbg(xhci, "Op regs DCBAA ptr = %#016llx\n", temp_64);
3707 xhci_dbg(xhci, "Slot ID %d dcbaa entry @%p = %#016llx\n",
3709 &xhci->dcbaa->dev_context_ptrs[udev->slot_id],
3710 (unsigned long long)
3711 le64_to_cpu(xhci->dcbaa->dev_context_ptrs[udev->slot_id]));
3712 xhci_dbg(xhci, "Output Context DMA address = %#08llx\n",
3713 (unsigned long long)virt_dev->out_ctx->dma);
3714 xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id);
3715 xhci_dbg_ctx(xhci, virt_dev->in_ctx, 2);
3716 xhci_dbg(xhci, "Slot ID %d Output Context:\n", udev->slot_id);
3717 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 2);
3719 * USB core uses address 1 for the roothubs, so we add one to the
3720 * address given back to us by the HC.
3722 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx);
3723 /* Use kernel assigned address for devices; store xHC assigned
3724 * address locally. */
3725 virt_dev->address = (le32_to_cpu(slot_ctx->dev_state) & DEV_ADDR_MASK)
3727 /* Zero the input context control for later use */
3728 ctrl_ctx->add_flags = 0;
3729 ctrl_ctx->drop_flags = 0;
3731 xhci_dbg(xhci, "Internal device address = %d\n", virt_dev->address);
3736 #ifdef CONFIG_USB_SUSPEND
3738 /* BESL to HIRD Encoding array for USB2 LPM */
3739 static int xhci_besl_encoding[16] = {125, 150, 200, 300, 400, 500, 1000, 2000,
3740 3000, 4000, 5000, 6000, 7000, 8000, 9000, 10000};
3742 /* Calculate HIRD/BESL for USB2 PORTPMSC*/
3743 static int xhci_calculate_hird_besl(int u2del, bool use_besl)
3748 for (hird = 0; hird < 16; hird++) {
3749 if (xhci_besl_encoding[hird] >= u2del)
3756 hird = (u2del - 51) / 75 + 1;
3765 static int xhci_usb2_software_lpm_test(struct usb_hcd *hcd,
3766 struct usb_device *udev)
3768 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3769 struct dev_info *dev_info;
3770 __le32 __iomem **port_array;
3771 __le32 __iomem *addr, *pm_addr;
3773 unsigned int port_num;
3774 unsigned long flags;
3778 if (hcd->speed == HCD_USB3 || !xhci->sw_lpm_support ||
3782 /* we only support lpm for non-hub device connected to root hub yet */
3783 if (!udev->parent || udev->parent->parent ||
3784 udev->descriptor.bDeviceClass == USB_CLASS_HUB)
3787 spin_lock_irqsave(&xhci->lock, flags);
3789 /* Look for devices in lpm_failed_devs list */
3790 dev_id = le16_to_cpu(udev->descriptor.idVendor) << 16 |
3791 le16_to_cpu(udev->descriptor.idProduct);
3792 list_for_each_entry(dev_info, &xhci->lpm_failed_devs, list) {
3793 if (dev_info->dev_id == dev_id) {
3799 port_array = xhci->usb2_ports;
3800 port_num = udev->portnum - 1;
3802 if (port_num > HCS_MAX_PORTS(xhci->hcs_params1)) {
3803 xhci_dbg(xhci, "invalid port number %d\n", udev->portnum);
3809 * Test USB 2.0 software LPM.
3810 * FIXME: some xHCI 1.0 hosts may implement a new register to set up
3811 * hardware-controlled USB 2.0 LPM. See section 5.4.11 and 4.23.5.1.1.1
3812 * in the June 2011 errata release.
3814 xhci_dbg(xhci, "test port %d software LPM\n", port_num);
3816 * Set L1 Device Slot and HIRD/BESL.
3817 * Check device's USB 2.0 extension descriptor to determine whether
3818 * HIRD or BESL shoule be used. See USB2.0 LPM errata.
3820 pm_addr = port_array[port_num] + 1;
3821 u2del = HCS_U2_LATENCY(xhci->hcs_params3);
3822 if (le32_to_cpu(udev->bos->ext_cap->bmAttributes) & (1 << 2))
3823 hird = xhci_calculate_hird_besl(u2del, 1);
3825 hird = xhci_calculate_hird_besl(u2del, 0);
3827 temp = PORT_L1DS(udev->slot_id) | PORT_HIRD(hird);
3828 xhci_writel(xhci, temp, pm_addr);
3830 /* Set port link state to U2(L1) */
3831 addr = port_array[port_num];
3832 xhci_set_link_state(xhci, port_array, port_num, XDEV_U2);
3835 spin_unlock_irqrestore(&xhci->lock, flags);
3837 spin_lock_irqsave(&xhci->lock, flags);
3839 /* Check L1 Status */
3840 ret = handshake(xhci, pm_addr, PORT_L1S_MASK, PORT_L1S_SUCCESS, 125);
3841 if (ret != -ETIMEDOUT) {
3842 /* enter L1 successfully */
3843 temp = xhci_readl(xhci, addr);
3844 xhci_dbg(xhci, "port %d entered L1 state, port status 0x%x\n",
3848 temp = xhci_readl(xhci, pm_addr);
3849 xhci_dbg(xhci, "port %d software lpm failed, L1 status %d\n",
3850 port_num, temp & PORT_L1S_MASK);
3854 /* Resume the port */
3855 xhci_set_link_state(xhci, port_array, port_num, XDEV_U0);
3857 spin_unlock_irqrestore(&xhci->lock, flags);
3859 spin_lock_irqsave(&xhci->lock, flags);
3862 xhci_test_and_clear_bit(xhci, port_array, port_num, PORT_PLC);
3864 /* Check PORTSC to make sure the device is in the right state */
3866 temp = xhci_readl(xhci, addr);
3867 xhci_dbg(xhci, "resumed port %d status 0x%x\n", port_num, temp);
3868 if (!(temp & PORT_CONNECT) || !(temp & PORT_PE) ||
3869 (temp & PORT_PLS_MASK) != XDEV_U0) {
3870 xhci_dbg(xhci, "port L1 resume fail\n");
3876 /* Insert dev to lpm_failed_devs list */
3877 xhci_warn(xhci, "device LPM test failed, may disconnect and "
3879 dev_info = kzalloc(sizeof(struct dev_info), GFP_ATOMIC);
3884 dev_info->dev_id = dev_id;
3885 INIT_LIST_HEAD(&dev_info->list);
3886 list_add(&dev_info->list, &xhci->lpm_failed_devs);
3888 xhci_ring_device(xhci, udev->slot_id);
3892 spin_unlock_irqrestore(&xhci->lock, flags);
3896 int xhci_set_usb2_hardware_lpm(struct usb_hcd *hcd,
3897 struct usb_device *udev, int enable)
3899 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3900 __le32 __iomem **port_array;
3901 __le32 __iomem *pm_addr;
3903 unsigned int port_num;
3904 unsigned long flags;
3907 if (hcd->speed == HCD_USB3 || !xhci->hw_lpm_support ||
3911 if (!udev->parent || udev->parent->parent ||
3912 udev->descriptor.bDeviceClass == USB_CLASS_HUB)
3915 if (udev->usb2_hw_lpm_capable != 1)
3918 spin_lock_irqsave(&xhci->lock, flags);
3920 port_array = xhci->usb2_ports;
3921 port_num = udev->portnum - 1;
3922 pm_addr = port_array[port_num] + 1;
3923 temp = xhci_readl(xhci, pm_addr);
3925 xhci_dbg(xhci, "%s port %d USB2 hardware LPM\n",
3926 enable ? "enable" : "disable", port_num);
3928 u2del = HCS_U2_LATENCY(xhci->hcs_params3);
3929 if (le32_to_cpu(udev->bos->ext_cap->bmAttributes) & (1 << 2))
3930 hird = xhci_calculate_hird_besl(u2del, 1);
3932 hird = xhci_calculate_hird_besl(u2del, 0);
3935 temp &= ~PORT_HIRD_MASK;
3936 temp |= PORT_HIRD(hird) | PORT_RWE;
3937 xhci_writel(xhci, temp, pm_addr);
3938 temp = xhci_readl(xhci, pm_addr);
3940 xhci_writel(xhci, temp, pm_addr);
3942 temp &= ~(PORT_HLE | PORT_RWE | PORT_HIRD_MASK);
3943 xhci_writel(xhci, temp, pm_addr);
3946 spin_unlock_irqrestore(&xhci->lock, flags);
3950 int xhci_update_device(struct usb_hcd *hcd, struct usb_device *udev)
3952 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3955 ret = xhci_usb2_software_lpm_test(hcd, udev);
3957 xhci_dbg(xhci, "software LPM test succeed\n");
3958 if (xhci->hw_lpm_support == 1) {
3959 udev->usb2_hw_lpm_capable = 1;
3960 ret = xhci_set_usb2_hardware_lpm(hcd, udev, 1);
3962 udev->usb2_hw_lpm_enabled = 1;
3971 int xhci_set_usb2_hardware_lpm(struct usb_hcd *hcd,
3972 struct usb_device *udev, int enable)
3977 int xhci_update_device(struct usb_hcd *hcd, struct usb_device *udev)
3982 #endif /* CONFIG_USB_SUSPEND */
3984 /* Once a hub descriptor is fetched for a device, we need to update the xHC's
3985 * internal data structures for the device.
3987 int xhci_update_hub_device(struct usb_hcd *hcd, struct usb_device *hdev,
3988 struct usb_tt *tt, gfp_t mem_flags)
3990 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3991 struct xhci_virt_device *vdev;
3992 struct xhci_command *config_cmd;
3993 struct xhci_input_control_ctx *ctrl_ctx;
3994 struct xhci_slot_ctx *slot_ctx;
3995 unsigned long flags;
3996 unsigned think_time;
3999 /* Ignore root hubs */
4003 vdev = xhci->devs[hdev->slot_id];
4005 xhci_warn(xhci, "Cannot update hub desc for unknown device.\n");
4008 config_cmd = xhci_alloc_command(xhci, true, true, mem_flags);
4010 xhci_dbg(xhci, "Could not allocate xHCI command structure.\n");
4014 spin_lock_irqsave(&xhci->lock, flags);
4015 if (hdev->speed == USB_SPEED_HIGH &&
4016 xhci_alloc_tt_info(xhci, vdev, hdev, tt, GFP_ATOMIC)) {
4017 xhci_dbg(xhci, "Could not allocate xHCI TT structure.\n");
4018 xhci_free_command(xhci, config_cmd);
4019 spin_unlock_irqrestore(&xhci->lock, flags);
4023 xhci_slot_copy(xhci, config_cmd->in_ctx, vdev->out_ctx);
4024 ctrl_ctx = xhci_get_input_control_ctx(xhci, config_cmd->in_ctx);
4025 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
4026 slot_ctx = xhci_get_slot_ctx(xhci, config_cmd->in_ctx);
4027 slot_ctx->dev_info |= cpu_to_le32(DEV_HUB);
4029 slot_ctx->dev_info |= cpu_to_le32(DEV_MTT);
4030 if (xhci->hci_version > 0x95) {
4031 xhci_dbg(xhci, "xHCI version %x needs hub "
4032 "TT think time and number of ports\n",
4033 (unsigned int) xhci->hci_version);
4034 slot_ctx->dev_info2 |= cpu_to_le32(XHCI_MAX_PORTS(hdev->maxchild));
4035 /* Set TT think time - convert from ns to FS bit times.
4036 * 0 = 8 FS bit times, 1 = 16 FS bit times,
4037 * 2 = 24 FS bit times, 3 = 32 FS bit times.
4039 * xHCI 1.0: this field shall be 0 if the device is not a
4042 think_time = tt->think_time;
4043 if (think_time != 0)
4044 think_time = (think_time / 666) - 1;
4045 if (xhci->hci_version < 0x100 || hdev->speed == USB_SPEED_HIGH)
4046 slot_ctx->tt_info |=
4047 cpu_to_le32(TT_THINK_TIME(think_time));
4049 xhci_dbg(xhci, "xHCI version %x doesn't need hub "
4050 "TT think time or number of ports\n",
4051 (unsigned int) xhci->hci_version);
4053 slot_ctx->dev_state = 0;
4054 spin_unlock_irqrestore(&xhci->lock, flags);
4056 xhci_dbg(xhci, "Set up %s for hub device.\n",
4057 (xhci->hci_version > 0x95) ?
4058 "configure endpoint" : "evaluate context");
4059 xhci_dbg(xhci, "Slot %u Input Context:\n", hdev->slot_id);
4060 xhci_dbg_ctx(xhci, config_cmd->in_ctx, 0);
4062 /* Issue and wait for the configure endpoint or
4063 * evaluate context command.
4065 if (xhci->hci_version > 0x95)
4066 ret = xhci_configure_endpoint(xhci, hdev, config_cmd,
4069 ret = xhci_configure_endpoint(xhci, hdev, config_cmd,
4072 xhci_dbg(xhci, "Slot %u Output Context:\n", hdev->slot_id);
4073 xhci_dbg_ctx(xhci, vdev->out_ctx, 0);
4075 xhci_free_command(xhci, config_cmd);
4079 int xhci_get_frame(struct usb_hcd *hcd)
4081 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4082 /* EHCI mods by the periodic size. Why? */
4083 return xhci_readl(xhci, &xhci->run_regs->microframe_index) >> 3;
4086 int xhci_gen_setup(struct usb_hcd *hcd, xhci_get_quirks_t get_quirks)
4088 struct xhci_hcd *xhci;
4089 struct device *dev = hcd->self.controller;
4093 hcd->self.sg_tablesize = TRBS_PER_SEGMENT - 2;
4095 if (usb_hcd_is_primary_hcd(hcd)) {
4096 xhci = kzalloc(sizeof(struct xhci_hcd), GFP_KERNEL);
4099 *((struct xhci_hcd **) hcd->hcd_priv) = xhci;
4100 xhci->main_hcd = hcd;
4101 /* Mark the first roothub as being USB 2.0.
4102 * The xHCI driver will register the USB 3.0 roothub.
4104 hcd->speed = HCD_USB2;
4105 hcd->self.root_hub->speed = USB_SPEED_HIGH;
4107 * USB 2.0 roothub under xHCI has an integrated TT,
4108 * (rate matching hub) as opposed to having an OHCI/UHCI
4109 * companion controller.
4113 /* xHCI private pointer was set in xhci_pci_probe for the second
4114 * registered roothub.
4116 xhci = hcd_to_xhci(hcd);
4117 temp = xhci_readl(xhci, &xhci->cap_regs->hcc_params);
4118 if (HCC_64BIT_ADDR(temp)) {
4119 xhci_dbg(xhci, "Enabling 64-bit DMA addresses.\n");
4120 dma_set_mask(hcd->self.controller, DMA_BIT_MASK(64));
4122 dma_set_mask(hcd->self.controller, DMA_BIT_MASK(32));
4127 xhci->cap_regs = hcd->regs;
4128 xhci->op_regs = hcd->regs +
4129 HC_LENGTH(xhci_readl(xhci, &xhci->cap_regs->hc_capbase));
4130 xhci->run_regs = hcd->regs +
4131 (xhci_readl(xhci, &xhci->cap_regs->run_regs_off) & RTSOFF_MASK);
4132 /* Cache read-only capability registers */
4133 xhci->hcs_params1 = xhci_readl(xhci, &xhci->cap_regs->hcs_params1);
4134 xhci->hcs_params2 = xhci_readl(xhci, &xhci->cap_regs->hcs_params2);
4135 xhci->hcs_params3 = xhci_readl(xhci, &xhci->cap_regs->hcs_params3);
4136 xhci->hcc_params = xhci_readl(xhci, &xhci->cap_regs->hc_capbase);
4137 xhci->hci_version = HC_VERSION(xhci->hcc_params);
4138 xhci->hcc_params = xhci_readl(xhci, &xhci->cap_regs->hcc_params);
4139 xhci_print_registers(xhci);
4141 get_quirks(dev, xhci);
4143 /* Make sure the HC is halted. */
4144 retval = xhci_halt(xhci);
4148 xhci_dbg(xhci, "Resetting HCD\n");
4149 /* Reset the internal HC memory state and registers. */
4150 retval = xhci_reset(xhci);
4153 xhci_dbg(xhci, "Reset complete\n");
4155 temp = xhci_readl(xhci, &xhci->cap_regs->hcc_params);
4156 if (HCC_64BIT_ADDR(temp)) {
4157 xhci_dbg(xhci, "Enabling 64-bit DMA addresses.\n");
4158 dma_set_mask(hcd->self.controller, DMA_BIT_MASK(64));
4160 dma_set_mask(hcd->self.controller, DMA_BIT_MASK(32));
4163 xhci_dbg(xhci, "Calling HCD init\n");
4164 /* Initialize HCD and host controller data structures. */
4165 retval = xhci_init(hcd);
4168 xhci_dbg(xhci, "Called HCD init\n");
4175 MODULE_DESCRIPTION(DRIVER_DESC);
4176 MODULE_AUTHOR(DRIVER_AUTHOR);
4177 MODULE_LICENSE("GPL");
4179 static int __init xhci_hcd_init(void)
4183 retval = xhci_register_pci();
4185 printk(KERN_DEBUG "Problem registering PCI driver.");
4189 * Check the compiler generated sizes of structures that must be laid
4190 * out in specific ways for hardware access.
4192 BUILD_BUG_ON(sizeof(struct xhci_doorbell_array) != 256*32/8);
4193 BUILD_BUG_ON(sizeof(struct xhci_slot_ctx) != 8*32/8);
4194 BUILD_BUG_ON(sizeof(struct xhci_ep_ctx) != 8*32/8);
4195 /* xhci_device_control has eight fields, and also
4196 * embeds one xhci_slot_ctx and 31 xhci_ep_ctx
4198 BUILD_BUG_ON(sizeof(struct xhci_stream_ctx) != 4*32/8);
4199 BUILD_BUG_ON(sizeof(union xhci_trb) != 4*32/8);
4200 BUILD_BUG_ON(sizeof(struct xhci_erst_entry) != 4*32/8);
4201 BUILD_BUG_ON(sizeof(struct xhci_cap_regs) != 7*32/8);
4202 BUILD_BUG_ON(sizeof(struct xhci_intr_reg) != 8*32/8);
4203 /* xhci_run_regs has eight fields and embeds 128 xhci_intr_regs */
4204 BUILD_BUG_ON(sizeof(struct xhci_run_regs) != (8+8*128)*32/8);
4205 BUILD_BUG_ON(sizeof(struct xhci_doorbell_array) != 256*32/8);
4208 module_init(xhci_hcd_init);
4210 static void __exit xhci_hcd_cleanup(void)
4212 xhci_unregister_pci();
4214 module_exit(xhci_hcd_cleanup);