bc5ee840125a265bf581741c1e9c20d768357f84
[pandora-kernel.git] / drivers / usb / host / xhci-ring.c
1 /*
2  * xHCI host controller driver
3  *
4  * Copyright (C) 2008 Intel Corp.
5  *
6  * Author: Sarah Sharp
7  * Some code borrowed from the Linux EHCI driver.
8  *
9  * This program is free software; you can redistribute it and/or modify
10  * it under the terms of the GNU General Public License version 2 as
11  * published by the Free Software Foundation.
12  *
13  * This program is distributed in the hope that it will be useful, but
14  * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15  * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
16  * for more details.
17  *
18  * You should have received a copy of the GNU General Public License
19  * along with this program; if not, write to the Free Software Foundation,
20  * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21  */
22
23 /*
24  * Ring initialization rules:
25  * 1. Each segment is initialized to zero, except for link TRBs.
26  * 2. Ring cycle state = 0.  This represents Producer Cycle State (PCS) or
27  *    Consumer Cycle State (CCS), depending on ring function.
28  * 3. Enqueue pointer = dequeue pointer = address of first TRB in the segment.
29  *
30  * Ring behavior rules:
31  * 1. A ring is empty if enqueue == dequeue.  This means there will always be at
32  *    least one free TRB in the ring.  This is useful if you want to turn that
33  *    into a link TRB and expand the ring.
34  * 2. When incrementing an enqueue or dequeue pointer, if the next TRB is a
35  *    link TRB, then load the pointer with the address in the link TRB.  If the
36  *    link TRB had its toggle bit set, you may need to update the ring cycle
37  *    state (see cycle bit rules).  You may have to do this multiple times
38  *    until you reach a non-link TRB.
39  * 3. A ring is full if enqueue++ (for the definition of increment above)
40  *    equals the dequeue pointer.
41  *
42  * Cycle bit rules:
43  * 1. When a consumer increments a dequeue pointer and encounters a toggle bit
44  *    in a link TRB, it must toggle the ring cycle state.
45  * 2. When a producer increments an enqueue pointer and encounters a toggle bit
46  *    in a link TRB, it must toggle the ring cycle state.
47  *
48  * Producer rules:
49  * 1. Check if ring is full before you enqueue.
50  * 2. Write the ring cycle state to the cycle bit in the TRB you're enqueuing.
51  *    Update enqueue pointer between each write (which may update the ring
52  *    cycle state).
53  * 3. Notify consumer.  If SW is producer, it rings the doorbell for command
54  *    and endpoint rings.  If HC is the producer for the event ring,
55  *    and it generates an interrupt according to interrupt modulation rules.
56  *
57  * Consumer rules:
58  * 1. Check if TRB belongs to you.  If the cycle bit == your ring cycle state,
59  *    the TRB is owned by the consumer.
60  * 2. Update dequeue pointer (which may update the ring cycle state) and
61  *    continue processing TRBs until you reach a TRB which is not owned by you.
62  * 3. Notify the producer.  SW is the consumer for the event ring, and it
63  *   updates event ring dequeue pointer.  HC is the consumer for the command and
64  *   endpoint rings; it generates events on the event ring for these.
65  */
66
67 #include <linux/scatterlist.h>
68 #include <linux/slab.h>
69 #include "xhci.h"
70
71 static int handle_cmd_in_cmd_wait_list(struct xhci_hcd *xhci,
72                 struct xhci_virt_device *virt_dev,
73                 struct xhci_event_cmd *event);
74
75 /*
76  * Returns zero if the TRB isn't in this segment, otherwise it returns the DMA
77  * address of the TRB.
78  */
79 dma_addr_t xhci_trb_virt_to_dma(struct xhci_segment *seg,
80                 union xhci_trb *trb)
81 {
82         unsigned long segment_offset;
83
84         if (!seg || !trb || trb < seg->trbs)
85                 return 0;
86         /* offset in TRBs */
87         segment_offset = trb - seg->trbs;
88         if (segment_offset > TRBS_PER_SEGMENT)
89                 return 0;
90         return seg->dma + (segment_offset * sizeof(*trb));
91 }
92
93 /* Does this link TRB point to the first segment in a ring,
94  * or was the previous TRB the last TRB on the last segment in the ERST?
95  */
96 static bool last_trb_on_last_seg(struct xhci_hcd *xhci, struct xhci_ring *ring,
97                 struct xhci_segment *seg, union xhci_trb *trb)
98 {
99         if (ring == xhci->event_ring)
100                 return (trb == &seg->trbs[TRBS_PER_SEGMENT]) &&
101                         (seg->next == xhci->event_ring->first_seg);
102         else
103                 return le32_to_cpu(trb->link.control) & LINK_TOGGLE;
104 }
105
106 /* Is this TRB a link TRB or was the last TRB the last TRB in this event ring
107  * segment?  I.e. would the updated event TRB pointer step off the end of the
108  * event seg?
109  */
110 static int last_trb(struct xhci_hcd *xhci, struct xhci_ring *ring,
111                 struct xhci_segment *seg, union xhci_trb *trb)
112 {
113         if (ring == xhci->event_ring)
114                 return trb == &seg->trbs[TRBS_PER_SEGMENT];
115         else
116                 return TRB_TYPE_LINK_LE32(trb->link.control);
117 }
118
119 static int enqueue_is_link_trb(struct xhci_ring *ring)
120 {
121         struct xhci_link_trb *link = &ring->enqueue->link;
122         return TRB_TYPE_LINK_LE32(link->control);
123 }
124
125 /* Updates trb to point to the next TRB in the ring, and updates seg if the next
126  * TRB is in a new segment.  This does not skip over link TRBs, and it does not
127  * effect the ring dequeue or enqueue pointers.
128  */
129 static void next_trb(struct xhci_hcd *xhci,
130                 struct xhci_ring *ring,
131                 struct xhci_segment **seg,
132                 union xhci_trb **trb)
133 {
134         if (last_trb(xhci, ring, *seg, *trb)) {
135                 *seg = (*seg)->next;
136                 *trb = ((*seg)->trbs);
137         } else {
138                 (*trb)++;
139         }
140 }
141
142 /*
143  * See Cycle bit rules. SW is the consumer for the event ring only.
144  * Don't make a ring full of link TRBs.  That would be dumb and this would loop.
145  */
146 static void inc_deq(struct xhci_hcd *xhci, struct xhci_ring *ring, bool consumer)
147 {
148         unsigned long long addr;
149
150         ring->deq_updates++;
151
152         do {
153                 /*
154                  * Update the dequeue pointer further if that was a link TRB or
155                  * we're at the end of an event ring segment (which doesn't have
156                  * link TRBS)
157                  */
158                 if (last_trb(xhci, ring, ring->deq_seg, ring->dequeue)) {
159                         if (consumer && last_trb_on_last_seg(xhci, ring,
160                                                 ring->deq_seg, ring->dequeue)) {
161                                 if (!in_interrupt())
162                                         xhci_dbg(xhci, "Toggle cycle state "
163                                                         "for ring %p = %i\n",
164                                                         ring,
165                                                         (unsigned int)
166                                                         ring->cycle_state);
167                                 ring->cycle_state = (ring->cycle_state ? 0 : 1);
168                         }
169                         ring->deq_seg = ring->deq_seg->next;
170                         ring->dequeue = ring->deq_seg->trbs;
171                 } else {
172                         ring->dequeue++;
173                 }
174         } while (last_trb(xhci, ring, ring->deq_seg, ring->dequeue));
175
176         addr = (unsigned long long) xhci_trb_virt_to_dma(ring->deq_seg, ring->dequeue);
177 }
178
179 /*
180  * See Cycle bit rules. SW is the consumer for the event ring only.
181  * Don't make a ring full of link TRBs.  That would be dumb and this would loop.
182  *
183  * If we've just enqueued a TRB that is in the middle of a TD (meaning the
184  * chain bit is set), then set the chain bit in all the following link TRBs.
185  * If we've enqueued the last TRB in a TD, make sure the following link TRBs
186  * have their chain bit cleared (so that each Link TRB is a separate TD).
187  *
188  * Section 6.4.4.1 of the 0.95 spec says link TRBs cannot have the chain bit
189  * set, but other sections talk about dealing with the chain bit set.  This was
190  * fixed in the 0.96 specification errata, but we have to assume that all 0.95
191  * xHCI hardware can't handle the chain bit being cleared on a link TRB.
192  *
193  * @more_trbs_coming:   Will you enqueue more TRBs before calling
194  *                      prepare_transfer()?
195  */
196 static void inc_enq(struct xhci_hcd *xhci, struct xhci_ring *ring,
197                 bool consumer, bool more_trbs_coming, bool isoc)
198 {
199         u32 chain;
200         union xhci_trb *next;
201         unsigned long long addr;
202
203         chain = le32_to_cpu(ring->enqueue->generic.field[3]) & TRB_CHAIN;
204         next = ++(ring->enqueue);
205
206         ring->enq_updates++;
207         /* Update the dequeue pointer further if that was a link TRB or we're at
208          * the end of an event ring segment (which doesn't have link TRBS)
209          */
210         while (last_trb(xhci, ring, ring->enq_seg, next)) {
211                 if (!consumer) {
212                         if (ring != xhci->event_ring) {
213                                 /*
214                                  * If the caller doesn't plan on enqueueing more
215                                  * TDs before ringing the doorbell, then we
216                                  * don't want to give the link TRB to the
217                                  * hardware just yet.  We'll give the link TRB
218                                  * back in prepare_ring() just before we enqueue
219                                  * the TD at the top of the ring.
220                                  */
221                                 if (!chain && !more_trbs_coming)
222                                         break;
223
224                                 /* If we're not dealing with 0.95 hardware or
225                                  * isoc rings on AMD 0.96 host,
226                                  * carry over the chain bit of the previous TRB
227                                  * (which may mean the chain bit is cleared).
228                                  */
229                                 if (!(isoc && (xhci->quirks & XHCI_AMD_0x96_HOST))
230                                                 && !xhci_link_trb_quirk(xhci)) {
231                                         next->link.control &=
232                                                 cpu_to_le32(~TRB_CHAIN);
233                                         next->link.control |=
234                                                 cpu_to_le32(chain);
235                                 }
236                                 /* Give this link TRB to the hardware */
237                                 wmb();
238                                 next->link.control ^= cpu_to_le32(TRB_CYCLE);
239                         }
240                         /* Toggle the cycle bit after the last ring segment. */
241                         if (last_trb_on_last_seg(xhci, ring, ring->enq_seg, next)) {
242                                 ring->cycle_state = (ring->cycle_state ? 0 : 1);
243                                 if (!in_interrupt())
244                                         xhci_dbg(xhci, "Toggle cycle state for ring %p = %i\n",
245                                                         ring,
246                                                         (unsigned int) ring->cycle_state);
247                         }
248                 }
249                 ring->enq_seg = ring->enq_seg->next;
250                 ring->enqueue = ring->enq_seg->trbs;
251                 next = ring->enqueue;
252         }
253         addr = (unsigned long long) xhci_trb_virt_to_dma(ring->enq_seg, ring->enqueue);
254 }
255
256 /*
257  * Check to see if there's room to enqueue num_trbs on the ring.  See rules
258  * above.
259  * FIXME: this would be simpler and faster if we just kept track of the number
260  * of free TRBs in a ring.
261  */
262 static int room_on_ring(struct xhci_hcd *xhci, struct xhci_ring *ring,
263                 unsigned int num_trbs)
264 {
265         int i;
266         union xhci_trb *enq = ring->enqueue;
267         struct xhci_segment *enq_seg = ring->enq_seg;
268         struct xhci_segment *cur_seg;
269         unsigned int left_on_ring;
270
271         /* If we are currently pointing to a link TRB, advance the
272          * enqueue pointer before checking for space */
273         while (last_trb(xhci, ring, enq_seg, enq)) {
274                 enq_seg = enq_seg->next;
275                 enq = enq_seg->trbs;
276         }
277
278         /* Check if ring is empty */
279         if (enq == ring->dequeue) {
280                 /* Can't use link trbs */
281                 left_on_ring = TRBS_PER_SEGMENT - 1;
282                 for (cur_seg = enq_seg->next; cur_seg != enq_seg;
283                                 cur_seg = cur_seg->next)
284                         left_on_ring += TRBS_PER_SEGMENT - 1;
285
286                 /* Always need one TRB free in the ring. */
287                 left_on_ring -= 1;
288                 if (num_trbs > left_on_ring) {
289                         xhci_warn(xhci, "Not enough room on ring; "
290                                         "need %u TRBs, %u TRBs left\n",
291                                         num_trbs, left_on_ring);
292                         return 0;
293                 }
294                 return 1;
295         }
296         /* Make sure there's an extra empty TRB available */
297         for (i = 0; i <= num_trbs; ++i) {
298                 if (enq == ring->dequeue)
299                         return 0;
300                 enq++;
301                 while (last_trb(xhci, ring, enq_seg, enq)) {
302                         enq_seg = enq_seg->next;
303                         enq = enq_seg->trbs;
304                 }
305         }
306         return 1;
307 }
308
309 /* Ring the host controller doorbell after placing a command on the ring */
310 void xhci_ring_cmd_db(struct xhci_hcd *xhci)
311 {
312         if (!(xhci->cmd_ring_state & CMD_RING_STATE_RUNNING))
313                 return;
314
315         xhci_dbg(xhci, "// Ding dong!\n");
316         xhci_writel(xhci, DB_VALUE_HOST, &xhci->dba->doorbell[0]);
317         /* Flush PCI posted writes */
318         xhci_readl(xhci, &xhci->dba->doorbell[0]);
319 }
320
321 static int xhci_abort_cmd_ring(struct xhci_hcd *xhci)
322 {
323         u64 temp_64;
324         int ret;
325
326         xhci_dbg(xhci, "Abort command ring\n");
327
328         if (!(xhci->cmd_ring_state & CMD_RING_STATE_RUNNING)) {
329                 xhci_dbg(xhci, "The command ring isn't running, "
330                                 "Have the command ring been stopped?\n");
331                 return 0;
332         }
333
334         temp_64 = xhci_read_64(xhci, &xhci->op_regs->cmd_ring);
335         if (!(temp_64 & CMD_RING_RUNNING)) {
336                 xhci_dbg(xhci, "Command ring had been stopped\n");
337                 return 0;
338         }
339         xhci->cmd_ring_state = CMD_RING_STATE_ABORTED;
340         xhci_write_64(xhci, temp_64 | CMD_RING_ABORT,
341                         &xhci->op_regs->cmd_ring);
342
343         /* Section 4.6.1.2 of xHCI 1.0 spec says software should
344          * time the completion od all xHCI commands, including
345          * the Command Abort operation. If software doesn't see
346          * CRR negated in a timely manner (e.g. longer than 5
347          * seconds), then it should assume that the there are
348          * larger problems with the xHC and assert HCRST.
349          */
350         ret = handshake(xhci, &xhci->op_regs->cmd_ring,
351                         CMD_RING_RUNNING, 0, 5 * 1000 * 1000);
352         if (ret < 0) {
353                 xhci_err(xhci, "Stopped the command ring failed, "
354                                 "maybe the host is dead\n");
355                 xhci->xhc_state |= XHCI_STATE_DYING;
356                 xhci_quiesce(xhci);
357                 xhci_halt(xhci);
358                 return -ESHUTDOWN;
359         }
360
361         return 0;
362 }
363
364 static int xhci_queue_cd(struct xhci_hcd *xhci,
365                 struct xhci_command *command,
366                 union xhci_trb *cmd_trb)
367 {
368         struct xhci_cd *cd;
369         cd = kzalloc(sizeof(struct xhci_cd), GFP_ATOMIC);
370         if (!cd)
371                 return -ENOMEM;
372         INIT_LIST_HEAD(&cd->cancel_cmd_list);
373
374         cd->command = command;
375         cd->cmd_trb = cmd_trb;
376         list_add_tail(&cd->cancel_cmd_list, &xhci->cancel_cmd_list);
377
378         return 0;
379 }
380
381 /*
382  * Cancel the command which has issue.
383  *
384  * Some commands may hang due to waiting for acknowledgement from
385  * usb device. It is outside of the xHC's ability to control and
386  * will cause the command ring is blocked. When it occurs software
387  * should intervene to recover the command ring.
388  * See Section 4.6.1.1 and 4.6.1.2
389  */
390 int xhci_cancel_cmd(struct xhci_hcd *xhci, struct xhci_command *command,
391                 union xhci_trb *cmd_trb)
392 {
393         int retval = 0;
394         unsigned long flags;
395
396         spin_lock_irqsave(&xhci->lock, flags);
397
398         if (xhci->xhc_state & XHCI_STATE_DYING) {
399                 xhci_warn(xhci, "Abort the command ring,"
400                                 " but the xHCI is dead.\n");
401                 retval = -ESHUTDOWN;
402                 goto fail;
403         }
404
405         /* queue the cmd desriptor to cancel_cmd_list */
406         retval = xhci_queue_cd(xhci, command, cmd_trb);
407         if (retval) {
408                 xhci_warn(xhci, "Queuing command descriptor failed.\n");
409                 goto fail;
410         }
411
412         /* abort command ring */
413         retval = xhci_abort_cmd_ring(xhci);
414         if (retval) {
415                 xhci_err(xhci, "Abort command ring failed\n");
416                 if (unlikely(retval == -ESHUTDOWN)) {
417                         spin_unlock_irqrestore(&xhci->lock, flags);
418                         usb_hc_died(xhci_to_hcd(xhci)->primary_hcd);
419                         xhci_dbg(xhci, "xHCI host controller is dead.\n");
420                         return retval;
421                 }
422         }
423
424 fail:
425         spin_unlock_irqrestore(&xhci->lock, flags);
426         return retval;
427 }
428
429 void xhci_ring_ep_doorbell(struct xhci_hcd *xhci,
430                 unsigned int slot_id,
431                 unsigned int ep_index,
432                 unsigned int stream_id)
433 {
434         __le32 __iomem *db_addr = &xhci->dba->doorbell[slot_id];
435         struct xhci_virt_ep *ep = &xhci->devs[slot_id]->eps[ep_index];
436         unsigned int ep_state = ep->ep_state;
437
438         /* Don't ring the doorbell for this endpoint if there are pending
439          * cancellations because we don't want to interrupt processing.
440          * We don't want to restart any stream rings if there's a set dequeue
441          * pointer command pending because the device can choose to start any
442          * stream once the endpoint is on the HW schedule.
443          * FIXME - check all the stream rings for pending cancellations.
444          */
445         if ((ep_state & EP_HALT_PENDING) || (ep_state & SET_DEQ_PENDING) ||
446             (ep_state & EP_HALTED))
447                 return;
448         xhci_writel(xhci, DB_VALUE(ep_index, stream_id), db_addr);
449         /* The CPU has better things to do at this point than wait for a
450          * write-posting flush.  It'll get there soon enough.
451          */
452 }
453
454 /* Ring the doorbell for any rings with pending URBs */
455 static void ring_doorbell_for_active_rings(struct xhci_hcd *xhci,
456                 unsigned int slot_id,
457                 unsigned int ep_index)
458 {
459         unsigned int stream_id;
460         struct xhci_virt_ep *ep;
461
462         ep = &xhci->devs[slot_id]->eps[ep_index];
463
464         /* A ring has pending URBs if its TD list is not empty */
465         if (!(ep->ep_state & EP_HAS_STREAMS)) {
466                 if (ep->ring && !(list_empty(&ep->ring->td_list)))
467                         xhci_ring_ep_doorbell(xhci, slot_id, ep_index, 0);
468                 return;
469         }
470
471         for (stream_id = 1; stream_id < ep->stream_info->num_streams;
472                         stream_id++) {
473                 struct xhci_stream_info *stream_info = ep->stream_info;
474                 if (!list_empty(&stream_info->stream_rings[stream_id]->td_list))
475                         xhci_ring_ep_doorbell(xhci, slot_id, ep_index,
476                                                 stream_id);
477         }
478 }
479
480 /*
481  * Find the segment that trb is in.  Start searching in start_seg.
482  * If we must move past a segment that has a link TRB with a toggle cycle state
483  * bit set, then we will toggle the value pointed at by cycle_state.
484  */
485 static struct xhci_segment *find_trb_seg(
486                 struct xhci_segment *start_seg,
487                 union xhci_trb  *trb, int *cycle_state)
488 {
489         struct xhci_segment *cur_seg = start_seg;
490         struct xhci_generic_trb *generic_trb;
491
492         while (cur_seg->trbs > trb ||
493                         &cur_seg->trbs[TRBS_PER_SEGMENT - 1] < trb) {
494                 generic_trb = &cur_seg->trbs[TRBS_PER_SEGMENT - 1].generic;
495                 if (generic_trb->field[3] & cpu_to_le32(LINK_TOGGLE))
496                         *cycle_state ^= 0x1;
497                 cur_seg = cur_seg->next;
498                 if (cur_seg == start_seg)
499                         /* Looped over the entire list.  Oops! */
500                         return NULL;
501         }
502         return cur_seg;
503 }
504
505
506 static struct xhci_ring *xhci_triad_to_transfer_ring(struct xhci_hcd *xhci,
507                 unsigned int slot_id, unsigned int ep_index,
508                 unsigned int stream_id)
509 {
510         struct xhci_virt_ep *ep;
511
512         ep = &xhci->devs[slot_id]->eps[ep_index];
513         /* Common case: no streams */
514         if (!(ep->ep_state & EP_HAS_STREAMS))
515                 return ep->ring;
516
517         if (stream_id == 0) {
518                 xhci_warn(xhci,
519                                 "WARN: Slot ID %u, ep index %u has streams, "
520                                 "but URB has no stream ID.\n",
521                                 slot_id, ep_index);
522                 return NULL;
523         }
524
525         if (stream_id < ep->stream_info->num_streams)
526                 return ep->stream_info->stream_rings[stream_id];
527
528         xhci_warn(xhci,
529                         "WARN: Slot ID %u, ep index %u has "
530                         "stream IDs 1 to %u allocated, "
531                         "but stream ID %u is requested.\n",
532                         slot_id, ep_index,
533                         ep->stream_info->num_streams - 1,
534                         stream_id);
535         return NULL;
536 }
537
538 /* Get the right ring for the given URB.
539  * If the endpoint supports streams, boundary check the URB's stream ID.
540  * If the endpoint doesn't support streams, return the singular endpoint ring.
541  */
542 static struct xhci_ring *xhci_urb_to_transfer_ring(struct xhci_hcd *xhci,
543                 struct urb *urb)
544 {
545         return xhci_triad_to_transfer_ring(xhci, urb->dev->slot_id,
546                 xhci_get_endpoint_index(&urb->ep->desc), urb->stream_id);
547 }
548
549 /*
550  * Move the xHC's endpoint ring dequeue pointer past cur_td.
551  * Record the new state of the xHC's endpoint ring dequeue segment,
552  * dequeue pointer, and new consumer cycle state in state.
553  * Update our internal representation of the ring's dequeue pointer.
554  *
555  * We do this in three jumps:
556  *  - First we update our new ring state to be the same as when the xHC stopped.
557  *  - Then we traverse the ring to find the segment that contains
558  *    the last TRB in the TD.  We toggle the xHC's new cycle state when we pass
559  *    any link TRBs with the toggle cycle bit set.
560  *  - Finally we move the dequeue state one TRB further, toggling the cycle bit
561  *    if we've moved it past a link TRB with the toggle cycle bit set.
562  *
563  * Some of the uses of xhci_generic_trb are grotty, but if they're done
564  * with correct __le32 accesses they should work fine.  Only users of this are
565  * in here.
566  */
567 void xhci_find_new_dequeue_state(struct xhci_hcd *xhci,
568                 unsigned int slot_id, unsigned int ep_index,
569                 unsigned int stream_id, struct xhci_td *cur_td,
570                 struct xhci_dequeue_state *state)
571 {
572         struct xhci_virt_device *dev = xhci->devs[slot_id];
573         struct xhci_virt_ep *ep = &dev->eps[ep_index];
574         struct xhci_ring *ep_ring;
575         struct xhci_generic_trb *trb;
576         dma_addr_t addr;
577         u64 hw_dequeue;
578
579         ep_ring = xhci_triad_to_transfer_ring(xhci, slot_id,
580                         ep_index, stream_id);
581         if (!ep_ring) {
582                 xhci_warn(xhci, "WARN can't find new dequeue state "
583                                 "for invalid stream ID %u.\n",
584                                 stream_id);
585                 return;
586         }
587
588         /* Dig out the cycle state saved by the xHC during the stop ep cmd */
589         xhci_dbg(xhci, "Finding endpoint context\n");
590         /* 4.6.9 the css flag is written to the stream context for streams */
591         if (ep->ep_state & EP_HAS_STREAMS) {
592                 struct xhci_stream_ctx *ctx =
593                         &ep->stream_info->stream_ctx_array[stream_id];
594                 hw_dequeue = le64_to_cpu(ctx->stream_ring);
595         } else {
596                 struct xhci_ep_ctx *ep_ctx
597                         = xhci_get_ep_ctx(xhci, dev->out_ctx, ep_index);
598                 hw_dequeue = le64_to_cpu(ep_ctx->deq);
599         }
600
601         /* Find virtual address and segment of hardware dequeue pointer */
602         state->new_deq_seg = ep_ring->deq_seg;
603         state->new_deq_ptr = ep_ring->dequeue;
604         while (xhci_trb_virt_to_dma(state->new_deq_seg, state->new_deq_ptr)
605                         != (dma_addr_t)(hw_dequeue & ~0xf)) {
606                 next_trb(xhci, ep_ring, &state->new_deq_seg,
607                                         &state->new_deq_ptr);
608                 if (state->new_deq_ptr == ep_ring->dequeue) {
609                         WARN_ON(1);
610                         return;
611                 }
612         }
613         /*
614          * Find cycle state for last_trb, starting at old cycle state of
615          * hw_dequeue. If there is only one segment ring, find_trb_seg() will
616          * return immediately and cannot toggle the cycle state if this search
617          * wraps around, so add one more toggle manually in that case.
618          */
619         state->new_cycle_state = hw_dequeue & 0x1;
620         if (ep_ring->first_seg == ep_ring->first_seg->next &&
621                         cur_td->last_trb < state->new_deq_ptr)
622                 state->new_cycle_state ^= 0x1;
623
624         state->new_deq_ptr = cur_td->last_trb;
625         xhci_dbg(xhci, "Finding segment containing last TRB in TD.\n");
626         state->new_deq_seg = find_trb_seg(state->new_deq_seg,
627                         state->new_deq_ptr, &state->new_cycle_state);
628         if (!state->new_deq_seg) {
629                 WARN_ON(1);
630                 return;
631         }
632
633         /* Increment to find next TRB after last_trb. Cycle if appropriate. */
634         trb = &state->new_deq_ptr->generic;
635         if (TRB_TYPE_LINK_LE32(trb->field[3]) &&
636             (trb->field[3] & cpu_to_le32(LINK_TOGGLE)))
637                 state->new_cycle_state ^= 0x1;
638         next_trb(xhci, ep_ring, &state->new_deq_seg, &state->new_deq_ptr);
639
640         /* Don't update the ring cycle state for the producer (us). */
641         xhci_dbg(xhci, "Cycle state = 0x%x\n", state->new_cycle_state);
642
643         xhci_dbg(xhci, "New dequeue segment = %p (virtual)\n",
644                         state->new_deq_seg);
645         addr = xhci_trb_virt_to_dma(state->new_deq_seg, state->new_deq_ptr);
646         xhci_dbg(xhci, "New dequeue pointer = 0x%llx (DMA)\n",
647                         (unsigned long long) addr);
648 }
649
650 /* flip_cycle means flip the cycle bit of all but the first and last TRB.
651  * (The last TRB actually points to the ring enqueue pointer, which is not part
652  * of this TD.)  This is used to remove partially enqueued isoc TDs from a ring.
653  */
654 static void td_to_noop(struct xhci_hcd *xhci, struct xhci_ring *ep_ring,
655                 struct xhci_td *cur_td, bool flip_cycle)
656 {
657         struct xhci_segment *cur_seg;
658         union xhci_trb *cur_trb;
659
660         for (cur_seg = cur_td->start_seg, cur_trb = cur_td->first_trb;
661                         true;
662                         next_trb(xhci, ep_ring, &cur_seg, &cur_trb)) {
663                 if (TRB_TYPE_LINK_LE32(cur_trb->generic.field[3])) {
664                         /* Unchain any chained Link TRBs, but
665                          * leave the pointers intact.
666                          */
667                         cur_trb->generic.field[3] &= cpu_to_le32(~TRB_CHAIN);
668                         /* Flip the cycle bit (link TRBs can't be the first
669                          * or last TRB).
670                          */
671                         if (flip_cycle)
672                                 cur_trb->generic.field[3] ^=
673                                         cpu_to_le32(TRB_CYCLE);
674                         xhci_dbg(xhci, "Cancel (unchain) link TRB\n");
675                         xhci_dbg(xhci, "Address = %p (0x%llx dma); "
676                                         "in seg %p (0x%llx dma)\n",
677                                         cur_trb,
678                                         (unsigned long long)xhci_trb_virt_to_dma(cur_seg, cur_trb),
679                                         cur_seg,
680                                         (unsigned long long)cur_seg->dma);
681                 } else {
682                         cur_trb->generic.field[0] = 0;
683                         cur_trb->generic.field[1] = 0;
684                         cur_trb->generic.field[2] = 0;
685                         /* Preserve only the cycle bit of this TRB */
686                         cur_trb->generic.field[3] &= cpu_to_le32(TRB_CYCLE);
687                         /* Flip the cycle bit except on the first or last TRB */
688                         if (flip_cycle && cur_trb != cur_td->first_trb &&
689                                         cur_trb != cur_td->last_trb)
690                                 cur_trb->generic.field[3] ^=
691                                         cpu_to_le32(TRB_CYCLE);
692                         cur_trb->generic.field[3] |= cpu_to_le32(
693                                 TRB_TYPE(TRB_TR_NOOP));
694                         xhci_dbg(xhci, "Cancel TRB %p (0x%llx dma) "
695                                         "in seg %p (0x%llx dma)\n",
696                                         cur_trb,
697                                         (unsigned long long)xhci_trb_virt_to_dma(cur_seg, cur_trb),
698                                         cur_seg,
699                                         (unsigned long long)cur_seg->dma);
700                 }
701                 if (cur_trb == cur_td->last_trb)
702                         break;
703         }
704 }
705
706 static int queue_set_tr_deq(struct xhci_hcd *xhci, int slot_id,
707                 unsigned int ep_index, unsigned int stream_id,
708                 struct xhci_segment *deq_seg,
709                 union xhci_trb *deq_ptr, u32 cycle_state);
710
711 void xhci_queue_new_dequeue_state(struct xhci_hcd *xhci,
712                 unsigned int slot_id, unsigned int ep_index,
713                 unsigned int stream_id,
714                 struct xhci_dequeue_state *deq_state)
715 {
716         struct xhci_virt_ep *ep = &xhci->devs[slot_id]->eps[ep_index];
717
718         xhci_dbg(xhci, "Set TR Deq Ptr cmd, new deq seg = %p (0x%llx dma), "
719                         "new deq ptr = %p (0x%llx dma), new cycle = %u\n",
720                         deq_state->new_deq_seg,
721                         (unsigned long long)deq_state->new_deq_seg->dma,
722                         deq_state->new_deq_ptr,
723                         (unsigned long long)xhci_trb_virt_to_dma(deq_state->new_deq_seg, deq_state->new_deq_ptr),
724                         deq_state->new_cycle_state);
725         queue_set_tr_deq(xhci, slot_id, ep_index, stream_id,
726                         deq_state->new_deq_seg,
727                         deq_state->new_deq_ptr,
728                         (u32) deq_state->new_cycle_state);
729         /* Stop the TD queueing code from ringing the doorbell until
730          * this command completes.  The HC won't set the dequeue pointer
731          * if the ring is running, and ringing the doorbell starts the
732          * ring running.
733          */
734         ep->ep_state |= SET_DEQ_PENDING;
735 }
736
737 static void xhci_stop_watchdog_timer_in_irq(struct xhci_hcd *xhci,
738                 struct xhci_virt_ep *ep)
739 {
740         ep->ep_state &= ~EP_HALT_PENDING;
741         /* Can't del_timer_sync in interrupt, so we attempt to cancel.  If the
742          * timer is running on another CPU, we don't decrement stop_cmds_pending
743          * (since we didn't successfully stop the watchdog timer).
744          */
745         if (del_timer(&ep->stop_cmd_timer))
746                 ep->stop_cmds_pending--;
747 }
748
749 /* Must be called with xhci->lock held in interrupt context */
750 static void xhci_giveback_urb_in_irq(struct xhci_hcd *xhci,
751                 struct xhci_td *cur_td, int status, char *adjective)
752 {
753         struct usb_hcd *hcd;
754         struct urb      *urb;
755         struct urb_priv *urb_priv;
756
757         urb = cur_td->urb;
758         urb_priv = urb->hcpriv;
759         urb_priv->td_cnt++;
760         hcd = bus_to_hcd(urb->dev->bus);
761
762         /* Only giveback urb when this is the last td in urb */
763         if (urb_priv->td_cnt == urb_priv->length) {
764                 if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) {
765                         xhci_to_hcd(xhci)->self.bandwidth_isoc_reqs--;
766                         if (xhci_to_hcd(xhci)->self.bandwidth_isoc_reqs == 0) {
767                                 if (xhci->quirks & XHCI_AMD_PLL_FIX)
768                                         usb_amd_quirk_pll_enable();
769                         }
770                 }
771                 usb_hcd_unlink_urb_from_ep(hcd, urb);
772
773                 spin_unlock(&xhci->lock);
774                 usb_hcd_giveback_urb(hcd, urb, status);
775                 xhci_urb_free_priv(xhci, urb_priv);
776                 spin_lock(&xhci->lock);
777         }
778 }
779
780 /*
781  * When we get a command completion for a Stop Endpoint Command, we need to
782  * unlink any cancelled TDs from the ring.  There are two ways to do that:
783  *
784  *  1. If the HW was in the middle of processing the TD that needs to be
785  *     cancelled, then we must move the ring's dequeue pointer past the last TRB
786  *     in the TD with a Set Dequeue Pointer Command.
787  *  2. Otherwise, we turn all the TRBs in the TD into No-op TRBs (with the chain
788  *     bit cleared) so that the HW will skip over them.
789  */
790 static void handle_stopped_endpoint(struct xhci_hcd *xhci,
791                 union xhci_trb *trb, struct xhci_event_cmd *event)
792 {
793         unsigned int slot_id;
794         unsigned int ep_index;
795         struct xhci_virt_device *virt_dev;
796         struct xhci_ring *ep_ring;
797         struct xhci_virt_ep *ep;
798         struct list_head *entry;
799         struct xhci_td *cur_td = NULL;
800         struct xhci_td *last_unlinked_td;
801
802         struct xhci_dequeue_state deq_state;
803
804         if (unlikely(TRB_TO_SUSPEND_PORT(
805                              le32_to_cpu(xhci->cmd_ring->dequeue->generic.field[3])))) {
806                 slot_id = TRB_TO_SLOT_ID(
807                         le32_to_cpu(xhci->cmd_ring->dequeue->generic.field[3]));
808                 virt_dev = xhci->devs[slot_id];
809                 if (virt_dev)
810                         handle_cmd_in_cmd_wait_list(xhci, virt_dev,
811                                 event);
812                 else
813                         xhci_warn(xhci, "Stop endpoint command "
814                                 "completion for disabled slot %u\n",
815                                 slot_id);
816                 return;
817         }
818
819         memset(&deq_state, 0, sizeof(deq_state));
820         slot_id = TRB_TO_SLOT_ID(le32_to_cpu(trb->generic.field[3]));
821         ep_index = TRB_TO_EP_INDEX(le32_to_cpu(trb->generic.field[3]));
822         ep = &xhci->devs[slot_id]->eps[ep_index];
823
824         if (list_empty(&ep->cancelled_td_list)) {
825                 xhci_stop_watchdog_timer_in_irq(xhci, ep);
826                 ep->stopped_td = NULL;
827                 ring_doorbell_for_active_rings(xhci, slot_id, ep_index);
828                 return;
829         }
830
831         /* Fix up the ep ring first, so HW stops executing cancelled TDs.
832          * We have the xHCI lock, so nothing can modify this list until we drop
833          * it.  We're also in the event handler, so we can't get re-interrupted
834          * if another Stop Endpoint command completes
835          */
836         list_for_each(entry, &ep->cancelled_td_list) {
837                 cur_td = list_entry(entry, struct xhci_td, cancelled_td_list);
838                 xhci_dbg(xhci, "Cancelling TD starting at %p, 0x%llx (dma).\n",
839                                 cur_td->first_trb,
840                                 (unsigned long long)xhci_trb_virt_to_dma(cur_td->start_seg, cur_td->first_trb));
841                 ep_ring = xhci_urb_to_transfer_ring(xhci, cur_td->urb);
842                 if (!ep_ring) {
843                         /* This shouldn't happen unless a driver is mucking
844                          * with the stream ID after submission.  This will
845                          * leave the TD on the hardware ring, and the hardware
846                          * will try to execute it, and may access a buffer
847                          * that has already been freed.  In the best case, the
848                          * hardware will execute it, and the event handler will
849                          * ignore the completion event for that TD, since it was
850                          * removed from the td_list for that endpoint.  In
851                          * short, don't muck with the stream ID after
852                          * submission.
853                          */
854                         xhci_warn(xhci, "WARN Cancelled URB %p "
855                                         "has invalid stream ID %u.\n",
856                                         cur_td->urb,
857                                         cur_td->urb->stream_id);
858                         goto remove_finished_td;
859                 }
860                 /*
861                  * If we stopped on the TD we need to cancel, then we have to
862                  * move the xHC endpoint ring dequeue pointer past this TD.
863                  */
864                 if (cur_td == ep->stopped_td)
865                         xhci_find_new_dequeue_state(xhci, slot_id, ep_index,
866                                         cur_td->urb->stream_id,
867                                         cur_td, &deq_state);
868                 else
869                         td_to_noop(xhci, ep_ring, cur_td, false);
870 remove_finished_td:
871                 /*
872                  * The event handler won't see a completion for this TD anymore,
873                  * so remove it from the endpoint ring's TD list.  Keep it in
874                  * the cancelled TD list for URB completion later.
875                  */
876                 list_del_init(&cur_td->td_list);
877         }
878         last_unlinked_td = cur_td;
879         xhci_stop_watchdog_timer_in_irq(xhci, ep);
880
881         /* If necessary, queue a Set Transfer Ring Dequeue Pointer command */
882         if (deq_state.new_deq_ptr && deq_state.new_deq_seg) {
883                 xhci_queue_new_dequeue_state(xhci,
884                                 slot_id, ep_index,
885                                 ep->stopped_td->urb->stream_id,
886                                 &deq_state);
887                 xhci_ring_cmd_db(xhci);
888         } else {
889                 /* Otherwise ring the doorbell(s) to restart queued transfers */
890                 ring_doorbell_for_active_rings(xhci, slot_id, ep_index);
891         }
892
893         /* Clear stopped_td if endpoint is not halted */
894         if (!(ep->ep_state & EP_HALTED))
895                 ep->stopped_td = NULL;
896
897         /*
898          * Drop the lock and complete the URBs in the cancelled TD list.
899          * New TDs to be cancelled might be added to the end of the list before
900          * we can complete all the URBs for the TDs we already unlinked.
901          * So stop when we've completed the URB for the last TD we unlinked.
902          */
903         do {
904                 cur_td = list_entry(ep->cancelled_td_list.next,
905                                 struct xhci_td, cancelled_td_list);
906                 list_del_init(&cur_td->cancelled_td_list);
907
908                 /* Clean up the cancelled URB */
909                 /* Doesn't matter what we pass for status, since the core will
910                  * just overwrite it (because the URB has been unlinked).
911                  */
912                 xhci_giveback_urb_in_irq(xhci, cur_td, 0, "cancelled");
913
914                 /* Stop processing the cancelled list if the watchdog timer is
915                  * running.
916                  */
917                 if (xhci->xhc_state & XHCI_STATE_DYING)
918                         return;
919         } while (cur_td != last_unlinked_td);
920
921         /* Return to the event handler with xhci->lock re-acquired */
922 }
923
924 /* Watchdog timer function for when a stop endpoint command fails to complete.
925  * In this case, we assume the host controller is broken or dying or dead.  The
926  * host may still be completing some other events, so we have to be careful to
927  * let the event ring handler and the URB dequeueing/enqueueing functions know
928  * through xhci->state.
929  *
930  * The timer may also fire if the host takes a very long time to respond to the
931  * command, and the stop endpoint command completion handler cannot delete the
932  * timer before the timer function is called.  Another endpoint cancellation may
933  * sneak in before the timer function can grab the lock, and that may queue
934  * another stop endpoint command and add the timer back.  So we cannot use a
935  * simple flag to say whether there is a pending stop endpoint command for a
936  * particular endpoint.
937  *
938  * Instead we use a combination of that flag and a counter for the number of
939  * pending stop endpoint commands.  If the timer is the tail end of the last
940  * stop endpoint command, and the endpoint's command is still pending, we assume
941  * the host is dying.
942  */
943 void xhci_stop_endpoint_command_watchdog(unsigned long arg)
944 {
945         struct xhci_hcd *xhci;
946         struct xhci_virt_ep *ep;
947         struct xhci_virt_ep *temp_ep;
948         struct xhci_ring *ring;
949         struct xhci_td *cur_td;
950         int ret, i, j;
951         unsigned long flags;
952
953         ep = (struct xhci_virt_ep *) arg;
954         xhci = ep->xhci;
955
956         spin_lock_irqsave(&xhci->lock, flags);
957
958         ep->stop_cmds_pending--;
959         if (xhci->xhc_state & XHCI_STATE_DYING) {
960                 xhci_dbg(xhci, "Stop EP timer ran, but another timer marked "
961                                 "xHCI as DYING, exiting.\n");
962                 spin_unlock_irqrestore(&xhci->lock, flags);
963                 return;
964         }
965         if (!(ep->stop_cmds_pending == 0 && (ep->ep_state & EP_HALT_PENDING))) {
966                 xhci_dbg(xhci, "Stop EP timer ran, but no command pending, "
967                                 "exiting.\n");
968                 spin_unlock_irqrestore(&xhci->lock, flags);
969                 return;
970         }
971
972         xhci_warn(xhci, "xHCI host not responding to stop endpoint command.\n");
973         xhci_warn(xhci, "Assuming host is dying, halting host.\n");
974         /* Oops, HC is dead or dying or at least not responding to the stop
975          * endpoint command.
976          */
977         xhci->xhc_state |= XHCI_STATE_DYING;
978         /* Disable interrupts from the host controller and start halting it */
979         xhci_quiesce(xhci);
980         spin_unlock_irqrestore(&xhci->lock, flags);
981
982         ret = xhci_halt(xhci);
983
984         spin_lock_irqsave(&xhci->lock, flags);
985         if (ret < 0) {
986                 /* This is bad; the host is not responding to commands and it's
987                  * not allowing itself to be halted.  At least interrupts are
988                  * disabled. If we call usb_hc_died(), it will attempt to
989                  * disconnect all device drivers under this host.  Those
990                  * disconnect() methods will wait for all URBs to be unlinked,
991                  * so we must complete them.
992                  */
993                 xhci_warn(xhci, "Non-responsive xHCI host is not halting.\n");
994                 xhci_warn(xhci, "Completing active URBs anyway.\n");
995                 /* We could turn all TDs on the rings to no-ops.  This won't
996                  * help if the host has cached part of the ring, and is slow if
997                  * we want to preserve the cycle bit.  Skip it and hope the host
998                  * doesn't touch the memory.
999                  */
1000         }
1001         for (i = 0; i < MAX_HC_SLOTS; i++) {
1002                 if (!xhci->devs[i])
1003                         continue;
1004                 for (j = 0; j < 31; j++) {
1005                         temp_ep = &xhci->devs[i]->eps[j];
1006                         ring = temp_ep->ring;
1007                         if (!ring)
1008                                 continue;
1009                         xhci_dbg(xhci, "Killing URBs for slot ID %u, "
1010                                         "ep index %u\n", i, j);
1011                         while (!list_empty(&ring->td_list)) {
1012                                 cur_td = list_first_entry(&ring->td_list,
1013                                                 struct xhci_td,
1014                                                 td_list);
1015                                 list_del_init(&cur_td->td_list);
1016                                 if (!list_empty(&cur_td->cancelled_td_list))
1017                                         list_del_init(&cur_td->cancelled_td_list);
1018                                 xhci_giveback_urb_in_irq(xhci, cur_td,
1019                                                 -ESHUTDOWN, "killed");
1020                         }
1021                         while (!list_empty(&temp_ep->cancelled_td_list)) {
1022                                 cur_td = list_first_entry(
1023                                                 &temp_ep->cancelled_td_list,
1024                                                 struct xhci_td,
1025                                                 cancelled_td_list);
1026                                 list_del_init(&cur_td->cancelled_td_list);
1027                                 xhci_giveback_urb_in_irq(xhci, cur_td,
1028                                                 -ESHUTDOWN, "killed");
1029                         }
1030                 }
1031         }
1032         spin_unlock_irqrestore(&xhci->lock, flags);
1033         xhci_dbg(xhci, "Calling usb_hc_died()\n");
1034         usb_hc_died(xhci_to_hcd(xhci)->primary_hcd);
1035         xhci_dbg(xhci, "xHCI host controller is dead.\n");
1036 }
1037
1038 /*
1039  * When we get a completion for a Set Transfer Ring Dequeue Pointer command,
1040  * we need to clear the set deq pending flag in the endpoint ring state, so that
1041  * the TD queueing code can ring the doorbell again.  We also need to ring the
1042  * endpoint doorbell to restart the ring, but only if there aren't more
1043  * cancellations pending.
1044  */
1045 static void handle_set_deq_completion(struct xhci_hcd *xhci,
1046                 struct xhci_event_cmd *event,
1047                 union xhci_trb *trb)
1048 {
1049         unsigned int slot_id;
1050         unsigned int ep_index;
1051         unsigned int stream_id;
1052         struct xhci_ring *ep_ring;
1053         struct xhci_virt_device *dev;
1054         struct xhci_ep_ctx *ep_ctx;
1055         struct xhci_slot_ctx *slot_ctx;
1056
1057         slot_id = TRB_TO_SLOT_ID(le32_to_cpu(trb->generic.field[3]));
1058         ep_index = TRB_TO_EP_INDEX(le32_to_cpu(trb->generic.field[3]));
1059         stream_id = TRB_TO_STREAM_ID(le32_to_cpu(trb->generic.field[2]));
1060         dev = xhci->devs[slot_id];
1061
1062         ep_ring = xhci_stream_id_to_ring(dev, ep_index, stream_id);
1063         if (!ep_ring) {
1064                 xhci_warn(xhci, "WARN Set TR deq ptr command for "
1065                                 "freed stream ID %u\n",
1066                                 stream_id);
1067                 /* XXX: Harmless??? */
1068                 dev->eps[ep_index].ep_state &= ~SET_DEQ_PENDING;
1069                 return;
1070         }
1071
1072         ep_ctx = xhci_get_ep_ctx(xhci, dev->out_ctx, ep_index);
1073         slot_ctx = xhci_get_slot_ctx(xhci, dev->out_ctx);
1074
1075         if (GET_COMP_CODE(le32_to_cpu(event->status)) != COMP_SUCCESS) {
1076                 unsigned int ep_state;
1077                 unsigned int slot_state;
1078
1079                 switch (GET_COMP_CODE(le32_to_cpu(event->status))) {
1080                 case COMP_TRB_ERR:
1081                         xhci_warn(xhci, "WARN Set TR Deq Ptr cmd invalid because "
1082                                         "of stream ID configuration\n");
1083                         break;
1084                 case COMP_CTX_STATE:
1085                         xhci_warn(xhci, "WARN Set TR Deq Ptr cmd failed due "
1086                                         "to incorrect slot or ep state.\n");
1087                         ep_state = le32_to_cpu(ep_ctx->ep_info);
1088                         ep_state &= EP_STATE_MASK;
1089                         slot_state = le32_to_cpu(slot_ctx->dev_state);
1090                         slot_state = GET_SLOT_STATE(slot_state);
1091                         xhci_dbg(xhci, "Slot state = %u, EP state = %u\n",
1092                                         slot_state, ep_state);
1093                         break;
1094                 case COMP_EBADSLT:
1095                         xhci_warn(xhci, "WARN Set TR Deq Ptr cmd failed because "
1096                                         "slot %u was not enabled.\n", slot_id);
1097                         break;
1098                 default:
1099                         xhci_warn(xhci, "WARN Set TR Deq Ptr cmd with unknown "
1100                                         "completion code of %u.\n",
1101                                   GET_COMP_CODE(le32_to_cpu(event->status)));
1102                         break;
1103                 }
1104                 /* OK what do we do now?  The endpoint state is hosed, and we
1105                  * should never get to this point if the synchronization between
1106                  * queueing, and endpoint state are correct.  This might happen
1107                  * if the device gets disconnected after we've finished
1108                  * cancelling URBs, which might not be an error...
1109                  */
1110         } else {
1111                 xhci_dbg(xhci, "Successful Set TR Deq Ptr cmd, deq = @%08llx\n",
1112                          le64_to_cpu(ep_ctx->deq));
1113                 if (xhci_trb_virt_to_dma(dev->eps[ep_index].queued_deq_seg,
1114                                          dev->eps[ep_index].queued_deq_ptr) ==
1115                     (le64_to_cpu(ep_ctx->deq) & ~(EP_CTX_CYCLE_MASK))) {
1116                         /* Update the ring's dequeue segment and dequeue pointer
1117                          * to reflect the new position.
1118                          */
1119                         ep_ring->deq_seg = dev->eps[ep_index].queued_deq_seg;
1120                         ep_ring->dequeue = dev->eps[ep_index].queued_deq_ptr;
1121                 } else {
1122                         xhci_warn(xhci, "Mismatch between completed Set TR Deq "
1123                                         "Ptr command & xHCI internal state.\n");
1124                         xhci_warn(xhci, "ep deq seg = %p, deq ptr = %p\n",
1125                                         dev->eps[ep_index].queued_deq_seg,
1126                                         dev->eps[ep_index].queued_deq_ptr);
1127                 }
1128         }
1129
1130         dev->eps[ep_index].ep_state &= ~SET_DEQ_PENDING;
1131         dev->eps[ep_index].queued_deq_seg = NULL;
1132         dev->eps[ep_index].queued_deq_ptr = NULL;
1133         /* Restart any rings with pending URBs */
1134         ring_doorbell_for_active_rings(xhci, slot_id, ep_index);
1135 }
1136
1137 static void handle_reset_ep_completion(struct xhci_hcd *xhci,
1138                 struct xhci_event_cmd *event,
1139                 union xhci_trb *trb)
1140 {
1141         int slot_id;
1142         unsigned int ep_index;
1143
1144         slot_id = TRB_TO_SLOT_ID(le32_to_cpu(trb->generic.field[3]));
1145         ep_index = TRB_TO_EP_INDEX(le32_to_cpu(trb->generic.field[3]));
1146         /* This command will only fail if the endpoint wasn't halted,
1147          * but we don't care.
1148          */
1149         xhci_dbg(xhci, "Ignoring reset ep completion code of %u\n",
1150                  GET_COMP_CODE(le32_to_cpu(event->status)));
1151
1152         /* HW with the reset endpoint quirk needs to have a configure endpoint
1153          * command complete before the endpoint can be used.  Queue that here
1154          * because the HW can't handle two commands being queued in a row.
1155          */
1156         if (xhci->quirks & XHCI_RESET_EP_QUIRK) {
1157                 xhci_dbg(xhci, "Queueing configure endpoint command\n");
1158                 xhci_queue_configure_endpoint(xhci,
1159                                 xhci->devs[slot_id]->in_ctx->dma, slot_id,
1160                                 false);
1161                 xhci_ring_cmd_db(xhci);
1162         } else {
1163                 /* Clear our internal halted state and restart the ring(s) */
1164                 xhci->devs[slot_id]->eps[ep_index].ep_state &= ~EP_HALTED;
1165                 ring_doorbell_for_active_rings(xhci, slot_id, ep_index);
1166         }
1167 }
1168
1169 /* Complete the command and detele it from the devcie's command queue.
1170  */
1171 static void xhci_complete_cmd_in_cmd_wait_list(struct xhci_hcd *xhci,
1172                 struct xhci_command *command, u32 status)
1173 {
1174         command->status = status;
1175         list_del(&command->cmd_list);
1176         if (command->completion)
1177                 complete(command->completion);
1178         else
1179                 xhci_free_command(xhci, command);
1180 }
1181
1182
1183 /* Check to see if a command in the device's command queue matches this one.
1184  * Signal the completion or free the command, and return 1.  Return 0 if the
1185  * completed command isn't at the head of the command list.
1186  */
1187 static int handle_cmd_in_cmd_wait_list(struct xhci_hcd *xhci,
1188                 struct xhci_virt_device *virt_dev,
1189                 struct xhci_event_cmd *event)
1190 {
1191         struct xhci_command *command;
1192
1193         if (list_empty(&virt_dev->cmd_list))
1194                 return 0;
1195
1196         command = list_entry(virt_dev->cmd_list.next,
1197                         struct xhci_command, cmd_list);
1198         if (xhci->cmd_ring->dequeue != command->command_trb)
1199                 return 0;
1200
1201         xhci_complete_cmd_in_cmd_wait_list(xhci, command,
1202                         GET_COMP_CODE(le32_to_cpu(event->status)));
1203         return 1;
1204 }
1205
1206 /*
1207  * Finding the command trb need to be cancelled and modifying it to
1208  * NO OP command. And if the command is in device's command wait
1209  * list, finishing and freeing it.
1210  *
1211  * If we can't find the command trb, we think it had already been
1212  * executed.
1213  */
1214 static void xhci_cmd_to_noop(struct xhci_hcd *xhci, struct xhci_cd *cur_cd)
1215 {
1216         struct xhci_segment *cur_seg;
1217         union xhci_trb *cmd_trb;
1218         u32 cycle_state;
1219
1220         if (xhci->cmd_ring->dequeue == xhci->cmd_ring->enqueue)
1221                 return;
1222
1223         /* find the current segment of command ring */
1224         cur_seg = find_trb_seg(xhci->cmd_ring->first_seg,
1225                         xhci->cmd_ring->dequeue, &cycle_state);
1226
1227         if (!cur_seg) {
1228                 xhci_warn(xhci, "Command ring mismatch, dequeue = %p %llx (dma)\n",
1229                                 xhci->cmd_ring->dequeue,
1230                                 (unsigned long long)
1231                                 xhci_trb_virt_to_dma(xhci->cmd_ring->deq_seg,
1232                                         xhci->cmd_ring->dequeue));
1233                 xhci_debug_ring(xhci, xhci->cmd_ring);
1234                 xhci_dbg_ring_ptrs(xhci, xhci->cmd_ring);
1235                 return;
1236         }
1237
1238         /* find the command trb matched by cd from command ring */
1239         for (cmd_trb = xhci->cmd_ring->dequeue;
1240                         cmd_trb != xhci->cmd_ring->enqueue;
1241                         next_trb(xhci, xhci->cmd_ring, &cur_seg, &cmd_trb)) {
1242                 /* If the trb is link trb, continue */
1243                 if (TRB_TYPE_LINK_LE32(cmd_trb->generic.field[3]))
1244                         continue;
1245
1246                 if (cur_cd->cmd_trb == cmd_trb) {
1247
1248                         /* If the command in device's command list, we should
1249                          * finish it and free the command structure.
1250                          */
1251                         if (cur_cd->command)
1252                                 xhci_complete_cmd_in_cmd_wait_list(xhci,
1253                                         cur_cd->command, COMP_CMD_STOP);
1254
1255                         /* get cycle state from the origin command trb */
1256                         cycle_state = le32_to_cpu(cmd_trb->generic.field[3])
1257                                 & TRB_CYCLE;
1258
1259                         /* modify the command trb to NO OP command */
1260                         cmd_trb->generic.field[0] = 0;
1261                         cmd_trb->generic.field[1] = 0;
1262                         cmd_trb->generic.field[2] = 0;
1263                         cmd_trb->generic.field[3] = cpu_to_le32(
1264                                         TRB_TYPE(TRB_CMD_NOOP) | cycle_state);
1265                         break;
1266                 }
1267         }
1268 }
1269
1270 static void xhci_cancel_cmd_in_cd_list(struct xhci_hcd *xhci)
1271 {
1272         struct xhci_cd *cur_cd, *next_cd;
1273
1274         if (list_empty(&xhci->cancel_cmd_list))
1275                 return;
1276
1277         list_for_each_entry_safe(cur_cd, next_cd,
1278                         &xhci->cancel_cmd_list, cancel_cmd_list) {
1279                 xhci_cmd_to_noop(xhci, cur_cd);
1280                 list_del(&cur_cd->cancel_cmd_list);
1281                 kfree(cur_cd);
1282         }
1283 }
1284
1285 /*
1286  * traversing the cancel_cmd_list. If the command descriptor according
1287  * to cmd_trb is found, the function free it and return 1, otherwise
1288  * return 0.
1289  */
1290 static int xhci_search_cmd_trb_in_cd_list(struct xhci_hcd *xhci,
1291                 union xhci_trb *cmd_trb)
1292 {
1293         struct xhci_cd *cur_cd, *next_cd;
1294
1295         if (list_empty(&xhci->cancel_cmd_list))
1296                 return 0;
1297
1298         list_for_each_entry_safe(cur_cd, next_cd,
1299                         &xhci->cancel_cmd_list, cancel_cmd_list) {
1300                 if (cur_cd->cmd_trb == cmd_trb) {
1301                         if (cur_cd->command)
1302                                 xhci_complete_cmd_in_cmd_wait_list(xhci,
1303                                         cur_cd->command, COMP_CMD_STOP);
1304                         list_del(&cur_cd->cancel_cmd_list);
1305                         kfree(cur_cd);
1306                         return 1;
1307                 }
1308         }
1309
1310         return 0;
1311 }
1312
1313 /*
1314  * If the cmd_trb_comp_code is COMP_CMD_ABORT, we just check whether the
1315  * trb pointed by the command ring dequeue pointer is the trb we want to
1316  * cancel or not. And if the cmd_trb_comp_code is COMP_CMD_STOP, we will
1317  * traverse the cancel_cmd_list to trun the all of the commands according
1318  * to command descriptor to NO-OP trb.
1319  */
1320 static int handle_stopped_cmd_ring(struct xhci_hcd *xhci,
1321                 int cmd_trb_comp_code)
1322 {
1323         int cur_trb_is_good = 0;
1324
1325         /* Searching the cmd trb pointed by the command ring dequeue
1326          * pointer in command descriptor list. If it is found, free it.
1327          */
1328         cur_trb_is_good = xhci_search_cmd_trb_in_cd_list(xhci,
1329                         xhci->cmd_ring->dequeue);
1330
1331         if (cmd_trb_comp_code == COMP_CMD_ABORT)
1332                 xhci->cmd_ring_state = CMD_RING_STATE_STOPPED;
1333         else if (cmd_trb_comp_code == COMP_CMD_STOP) {
1334                 /* traversing the cancel_cmd_list and canceling
1335                  * the command according to command descriptor
1336                  */
1337                 xhci_cancel_cmd_in_cd_list(xhci);
1338
1339                 xhci->cmd_ring_state = CMD_RING_STATE_RUNNING;
1340                 /*
1341                  * ring command ring doorbell again to restart the
1342                  * command ring
1343                  */
1344                 if (xhci->cmd_ring->dequeue != xhci->cmd_ring->enqueue)
1345                         xhci_ring_cmd_db(xhci);
1346         }
1347         return cur_trb_is_good;
1348 }
1349
1350 static void handle_cmd_completion(struct xhci_hcd *xhci,
1351                 struct xhci_event_cmd *event)
1352 {
1353         int slot_id = TRB_TO_SLOT_ID(le32_to_cpu(event->flags));
1354         u64 cmd_dma;
1355         dma_addr_t cmd_dequeue_dma;
1356         struct xhci_input_control_ctx *ctrl_ctx;
1357         struct xhci_virt_device *virt_dev;
1358         unsigned int ep_index;
1359         struct xhci_ring *ep_ring;
1360         unsigned int ep_state;
1361
1362         cmd_dma = le64_to_cpu(event->cmd_trb);
1363         cmd_dequeue_dma = xhci_trb_virt_to_dma(xhci->cmd_ring->deq_seg,
1364                         xhci->cmd_ring->dequeue);
1365         /* Is the command ring deq ptr out of sync with the deq seg ptr? */
1366         if (cmd_dequeue_dma == 0) {
1367                 xhci->error_bitmask |= 1 << 4;
1368                 return;
1369         }
1370         /* Does the DMA address match our internal dequeue pointer address? */
1371         if (cmd_dma != (u64) cmd_dequeue_dma) {
1372                 xhci->error_bitmask |= 1 << 5;
1373                 return;
1374         }
1375
1376         if ((GET_COMP_CODE(le32_to_cpu(event->status)) == COMP_CMD_ABORT) ||
1377                 (GET_COMP_CODE(le32_to_cpu(event->status)) == COMP_CMD_STOP)) {
1378                 /* If the return value is 0, we think the trb pointed by
1379                  * command ring dequeue pointer is a good trb. The good
1380                  * trb means we don't want to cancel the trb, but it have
1381                  * been stopped by host. So we should handle it normally.
1382                  * Otherwise, driver should invoke inc_deq() and return.
1383                  */
1384                 if (handle_stopped_cmd_ring(xhci,
1385                                 GET_COMP_CODE(le32_to_cpu(event->status)))) {
1386                         inc_deq(xhci, xhci->cmd_ring, false);
1387                         return;
1388                 }
1389         }
1390
1391         switch (le32_to_cpu(xhci->cmd_ring->dequeue->generic.field[3])
1392                 & TRB_TYPE_BITMASK) {
1393         case TRB_TYPE(TRB_ENABLE_SLOT):
1394                 if (GET_COMP_CODE(le32_to_cpu(event->status)) == COMP_SUCCESS)
1395                         xhci->slot_id = slot_id;
1396                 else
1397                         xhci->slot_id = 0;
1398                 complete(&xhci->addr_dev);
1399                 break;
1400         case TRB_TYPE(TRB_DISABLE_SLOT):
1401                 if (xhci->devs[slot_id]) {
1402                         if (xhci->quirks & XHCI_EP_LIMIT_QUIRK)
1403                                 /* Delete default control endpoint resources */
1404                                 xhci_free_device_endpoint_resources(xhci,
1405                                                 xhci->devs[slot_id], true);
1406                         xhci_free_virt_device(xhci, slot_id);
1407                 }
1408                 break;
1409         case TRB_TYPE(TRB_CONFIG_EP):
1410                 virt_dev = xhci->devs[slot_id];
1411                 if (handle_cmd_in_cmd_wait_list(xhci, virt_dev, event))
1412                         break;
1413                 /*
1414                  * Configure endpoint commands can come from the USB core
1415                  * configuration or alt setting changes, or because the HW
1416                  * needed an extra configure endpoint command after a reset
1417                  * endpoint command or streams were being configured.
1418                  * If the command was for a halted endpoint, the xHCI driver
1419                  * is not waiting on the configure endpoint command.
1420                  */
1421                 ctrl_ctx = xhci_get_input_control_ctx(xhci,
1422                                 virt_dev->in_ctx);
1423                 /* Input ctx add_flags are the endpoint index plus one */
1424                 ep_index = xhci_last_valid_endpoint(le32_to_cpu(ctrl_ctx->add_flags)) - 1;
1425                 /* A usb_set_interface() call directly after clearing a halted
1426                  * condition may race on this quirky hardware.  Not worth
1427                  * worrying about, since this is prototype hardware.  Not sure
1428                  * if this will work for streams, but streams support was
1429                  * untested on this prototype.
1430                  */
1431                 if (xhci->quirks & XHCI_RESET_EP_QUIRK &&
1432                                 ep_index != (unsigned int) -1 &&
1433                     le32_to_cpu(ctrl_ctx->add_flags) - SLOT_FLAG ==
1434                     le32_to_cpu(ctrl_ctx->drop_flags)) {
1435                         ep_ring = xhci->devs[slot_id]->eps[ep_index].ring;
1436                         ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state;
1437                         if (!(ep_state & EP_HALTED))
1438                                 goto bandwidth_change;
1439                         xhci_dbg(xhci, "Completed config ep cmd - "
1440                                         "last ep index = %d, state = %d\n",
1441                                         ep_index, ep_state);
1442                         /* Clear internal halted state and restart ring(s) */
1443                         xhci->devs[slot_id]->eps[ep_index].ep_state &=
1444                                 ~EP_HALTED;
1445                         ring_doorbell_for_active_rings(xhci, slot_id, ep_index);
1446                         break;
1447                 }
1448 bandwidth_change:
1449                 xhci_dbg(xhci, "Completed config ep cmd\n");
1450                 xhci->devs[slot_id]->cmd_status =
1451                         GET_COMP_CODE(le32_to_cpu(event->status));
1452                 complete(&xhci->devs[slot_id]->cmd_completion);
1453                 break;
1454         case TRB_TYPE(TRB_EVAL_CONTEXT):
1455                 virt_dev = xhci->devs[slot_id];
1456                 if (handle_cmd_in_cmd_wait_list(xhci, virt_dev, event))
1457                         break;
1458                 xhci->devs[slot_id]->cmd_status = GET_COMP_CODE(le32_to_cpu(event->status));
1459                 complete(&xhci->devs[slot_id]->cmd_completion);
1460                 break;
1461         case TRB_TYPE(TRB_ADDR_DEV):
1462                 xhci->devs[slot_id]->cmd_status = GET_COMP_CODE(le32_to_cpu(event->status));
1463                 complete(&xhci->addr_dev);
1464                 break;
1465         case TRB_TYPE(TRB_STOP_RING):
1466                 handle_stopped_endpoint(xhci, xhci->cmd_ring->dequeue, event);
1467                 break;
1468         case TRB_TYPE(TRB_SET_DEQ):
1469                 handle_set_deq_completion(xhci, event, xhci->cmd_ring->dequeue);
1470                 break;
1471         case TRB_TYPE(TRB_CMD_NOOP):
1472                 break;
1473         case TRB_TYPE(TRB_RESET_EP):
1474                 handle_reset_ep_completion(xhci, event, xhci->cmd_ring->dequeue);
1475                 break;
1476         case TRB_TYPE(TRB_RESET_DEV):
1477                 xhci_dbg(xhci, "Completed reset device command.\n");
1478                 slot_id = TRB_TO_SLOT_ID(
1479                         le32_to_cpu(xhci->cmd_ring->dequeue->generic.field[3]));
1480                 virt_dev = xhci->devs[slot_id];
1481                 if (virt_dev)
1482                         handle_cmd_in_cmd_wait_list(xhci, virt_dev, event);
1483                 else
1484                         xhci_warn(xhci, "Reset device command completion "
1485                                         "for disabled slot %u\n", slot_id);
1486                 break;
1487         case TRB_TYPE(TRB_NEC_GET_FW):
1488                 if (!(xhci->quirks & XHCI_NEC_HOST)) {
1489                         xhci->error_bitmask |= 1 << 6;
1490                         break;
1491                 }
1492                 xhci_dbg(xhci, "NEC firmware version %2x.%02x\n",
1493                          NEC_FW_MAJOR(le32_to_cpu(event->status)),
1494                          NEC_FW_MINOR(le32_to_cpu(event->status)));
1495                 break;
1496         default:
1497                 /* Skip over unknown commands on the event ring */
1498                 xhci->error_bitmask |= 1 << 6;
1499                 break;
1500         }
1501         inc_deq(xhci, xhci->cmd_ring, false);
1502 }
1503
1504 static void handle_vendor_event(struct xhci_hcd *xhci,
1505                 union xhci_trb *event)
1506 {
1507         u32 trb_type;
1508
1509         trb_type = TRB_FIELD_TO_TYPE(le32_to_cpu(event->generic.field[3]));
1510         xhci_dbg(xhci, "Vendor specific event TRB type = %u\n", trb_type);
1511         if (trb_type == TRB_NEC_CMD_COMP && (xhci->quirks & XHCI_NEC_HOST))
1512                 handle_cmd_completion(xhci, &event->event_cmd);
1513 }
1514
1515 /* @port_id: the one-based port ID from the hardware (indexed from array of all
1516  * port registers -- USB 3.0 and USB 2.0).
1517  *
1518  * Returns a zero-based port number, which is suitable for indexing into each of
1519  * the split roothubs' port arrays and bus state arrays.
1520  * Add one to it in order to call xhci_find_slot_id_by_port.
1521  */
1522 static unsigned int find_faked_portnum_from_hw_portnum(struct usb_hcd *hcd,
1523                 struct xhci_hcd *xhci, u32 port_id)
1524 {
1525         unsigned int i;
1526         unsigned int num_similar_speed_ports = 0;
1527
1528         /* port_id from the hardware is 1-based, but port_array[], usb3_ports[],
1529          * and usb2_ports are 0-based indexes.  Count the number of similar
1530          * speed ports, up to 1 port before this port.
1531          */
1532         for (i = 0; i < (port_id - 1); i++) {
1533                 u8 port_speed = xhci->port_array[i];
1534
1535                 /*
1536                  * Skip ports that don't have known speeds, or have duplicate
1537                  * Extended Capabilities port speed entries.
1538                  */
1539                 if (port_speed == 0 || port_speed == DUPLICATE_ENTRY)
1540                         continue;
1541
1542                 /*
1543                  * USB 3.0 ports are always under a USB 3.0 hub.  USB 2.0 and
1544                  * 1.1 ports are under the USB 2.0 hub.  If the port speed
1545                  * matches the device speed, it's a similar speed port.
1546                  */
1547                 if ((port_speed == 0x03) == (hcd->speed == HCD_USB3))
1548                         num_similar_speed_ports++;
1549         }
1550         return num_similar_speed_ports;
1551 }
1552
1553 static void handle_port_status(struct xhci_hcd *xhci,
1554                 union xhci_trb *event)
1555 {
1556         struct usb_hcd *hcd;
1557         u32 port_id;
1558         u32 temp, temp1;
1559         int max_ports;
1560         int slot_id;
1561         unsigned int faked_port_index;
1562         u8 major_revision;
1563         struct xhci_bus_state *bus_state;
1564         __le32 __iomem **port_array;
1565         bool bogus_port_status = false;
1566
1567         /* Port status change events always have a successful completion code */
1568         if (GET_COMP_CODE(le32_to_cpu(event->generic.field[2])) != COMP_SUCCESS) {
1569                 xhci_warn(xhci, "WARN: xHC returned failed port status event\n");
1570                 xhci->error_bitmask |= 1 << 8;
1571         }
1572         port_id = GET_PORT_ID(le32_to_cpu(event->generic.field[0]));
1573         xhci_dbg(xhci, "Port Status Change Event for port %d\n", port_id);
1574
1575         max_ports = HCS_MAX_PORTS(xhci->hcs_params1);
1576         if ((port_id <= 0) || (port_id > max_ports)) {
1577                 xhci_warn(xhci, "Invalid port id %d\n", port_id);
1578                 bogus_port_status = true;
1579                 goto cleanup;
1580         }
1581
1582         /* Figure out which usb_hcd this port is attached to:
1583          * is it a USB 3.0 port or a USB 2.0/1.1 port?
1584          */
1585         major_revision = xhci->port_array[port_id - 1];
1586         if (major_revision == 0) {
1587                 xhci_warn(xhci, "Event for port %u not in "
1588                                 "Extended Capabilities, ignoring.\n",
1589                                 port_id);
1590                 bogus_port_status = true;
1591                 goto cleanup;
1592         }
1593         if (major_revision == DUPLICATE_ENTRY) {
1594                 xhci_warn(xhci, "Event for port %u duplicated in"
1595                                 "Extended Capabilities, ignoring.\n",
1596                                 port_id);
1597                 bogus_port_status = true;
1598                 goto cleanup;
1599         }
1600
1601         /*
1602          * Hardware port IDs reported by a Port Status Change Event include USB
1603          * 3.0 and USB 2.0 ports.  We want to check if the port has reported a
1604          * resume event, but we first need to translate the hardware port ID
1605          * into the index into the ports on the correct split roothub, and the
1606          * correct bus_state structure.
1607          */
1608         /* Find the right roothub. */
1609         hcd = xhci_to_hcd(xhci);
1610         if ((major_revision == 0x03) != (hcd->speed == HCD_USB3))
1611                 hcd = xhci->shared_hcd;
1612         bus_state = &xhci->bus_state[hcd_index(hcd)];
1613         if (hcd->speed == HCD_USB3)
1614                 port_array = xhci->usb3_ports;
1615         else
1616                 port_array = xhci->usb2_ports;
1617         /* Find the faked port hub number */
1618         faked_port_index = find_faked_portnum_from_hw_portnum(hcd, xhci,
1619                         port_id);
1620
1621         temp = xhci_readl(xhci, port_array[faked_port_index]);
1622         if (hcd->state == HC_STATE_SUSPENDED) {
1623                 xhci_dbg(xhci, "resume root hub\n");
1624                 usb_hcd_resume_root_hub(hcd);
1625         }
1626
1627         if ((temp & PORT_PLC) && (temp & PORT_PLS_MASK) == XDEV_RESUME) {
1628                 xhci_dbg(xhci, "port resume event for port %d\n", port_id);
1629
1630                 temp1 = xhci_readl(xhci, &xhci->op_regs->command);
1631                 if (!(temp1 & CMD_RUN)) {
1632                         xhci_warn(xhci, "xHC is not running.\n");
1633                         goto cleanup;
1634                 }
1635
1636                 if (DEV_SUPERSPEED(temp)) {
1637                         xhci_dbg(xhci, "resume SS port %d\n", port_id);
1638                         xhci_set_link_state(xhci, port_array, faked_port_index,
1639                                                 XDEV_U0);
1640                         slot_id = xhci_find_slot_id_by_port(hcd, xhci,
1641                                         faked_port_index + 1);
1642                         if (!slot_id) {
1643                                 xhci_dbg(xhci, "slot_id is zero\n");
1644                                 goto cleanup;
1645                         }
1646                         xhci_ring_device(xhci, slot_id);
1647                         xhci_dbg(xhci, "resume SS port %d finished\n", port_id);
1648                         /* Clear PORT_PLC */
1649                         xhci_test_and_clear_bit(xhci, port_array,
1650                                                 faked_port_index, PORT_PLC);
1651                 } else {
1652                         xhci_dbg(xhci, "resume HS port %d\n", port_id);
1653                         bus_state->resume_done[faked_port_index] = jiffies +
1654                                 msecs_to_jiffies(20);
1655                         mod_timer(&hcd->rh_timer,
1656                                   bus_state->resume_done[faked_port_index]);
1657                         /* Do the rest in GetPortStatus */
1658                 }
1659         }
1660
1661         if (hcd->speed != HCD_USB3)
1662                 xhci_test_and_clear_bit(xhci, port_array, faked_port_index,
1663                                         PORT_PLC);
1664
1665 cleanup:
1666         /* Update event ring dequeue pointer before dropping the lock */
1667         inc_deq(xhci, xhci->event_ring, true);
1668
1669         /* Don't make the USB core poll the roothub if we got a bad port status
1670          * change event.  Besides, at that point we can't tell which roothub
1671          * (USB 2.0 or USB 3.0) to kick.
1672          */
1673         if (bogus_port_status)
1674                 return;
1675
1676         /*
1677          * xHCI port-status-change events occur when the "or" of all the
1678          * status-change bits in the portsc register changes from 0 to 1.
1679          * New status changes won't cause an event if any other change
1680          * bits are still set.  When an event occurs, switch over to
1681          * polling to avoid losing status changes.
1682          */
1683         xhci_dbg(xhci, "%s: starting port polling.\n", __func__);
1684         set_bit(HCD_FLAG_POLL_RH, &hcd->flags);
1685         spin_unlock(&xhci->lock);
1686         /* Pass this up to the core */
1687         usb_hcd_poll_rh_status(hcd);
1688         spin_lock(&xhci->lock);
1689 }
1690
1691 /*
1692  * This TD is defined by the TRBs starting at start_trb in start_seg and ending
1693  * at end_trb, which may be in another segment.  If the suspect DMA address is a
1694  * TRB in this TD, this function returns that TRB's segment.  Otherwise it
1695  * returns 0.
1696  */
1697 struct xhci_segment *trb_in_td(struct xhci_segment *start_seg,
1698                 union xhci_trb  *start_trb,
1699                 union xhci_trb  *end_trb,
1700                 dma_addr_t      suspect_dma)
1701 {
1702         dma_addr_t start_dma;
1703         dma_addr_t end_seg_dma;
1704         dma_addr_t end_trb_dma;
1705         struct xhci_segment *cur_seg;
1706
1707         start_dma = xhci_trb_virt_to_dma(start_seg, start_trb);
1708         cur_seg = start_seg;
1709
1710         do {
1711                 if (start_dma == 0)
1712                         return NULL;
1713                 /* We may get an event for a Link TRB in the middle of a TD */
1714                 end_seg_dma = xhci_trb_virt_to_dma(cur_seg,
1715                                 &cur_seg->trbs[TRBS_PER_SEGMENT - 1]);
1716                 /* If the end TRB isn't in this segment, this is set to 0 */
1717                 end_trb_dma = xhci_trb_virt_to_dma(cur_seg, end_trb);
1718
1719                 if (end_trb_dma > 0) {
1720                         /* The end TRB is in this segment, so suspect should be here */
1721                         if (start_dma <= end_trb_dma) {
1722                                 if (suspect_dma >= start_dma && suspect_dma <= end_trb_dma)
1723                                         return cur_seg;
1724                         } else {
1725                                 /* Case for one segment with
1726                                  * a TD wrapped around to the top
1727                                  */
1728                                 if ((suspect_dma >= start_dma &&
1729                                                         suspect_dma <= end_seg_dma) ||
1730                                                 (suspect_dma >= cur_seg->dma &&
1731                                                  suspect_dma <= end_trb_dma))
1732                                         return cur_seg;
1733                         }
1734                         return NULL;
1735                 } else {
1736                         /* Might still be somewhere in this segment */
1737                         if (suspect_dma >= start_dma && suspect_dma <= end_seg_dma)
1738                                 return cur_seg;
1739                 }
1740                 cur_seg = cur_seg->next;
1741                 start_dma = xhci_trb_virt_to_dma(cur_seg, &cur_seg->trbs[0]);
1742         } while (cur_seg != start_seg);
1743
1744         return NULL;
1745 }
1746
1747 static void xhci_cleanup_halted_endpoint(struct xhci_hcd *xhci,
1748                 unsigned int slot_id, unsigned int ep_index,
1749                 unsigned int stream_id,
1750                 struct xhci_td *td, union xhci_trb *event_trb)
1751 {
1752         struct xhci_virt_ep *ep = &xhci->devs[slot_id]->eps[ep_index];
1753         ep->ep_state |= EP_HALTED;
1754         ep->stopped_td = td;
1755         ep->stopped_stream = stream_id;
1756
1757         xhci_queue_reset_ep(xhci, slot_id, ep_index);
1758         xhci_cleanup_stalled_ring(xhci, td->urb->dev, ep_index);
1759
1760         ep->stopped_td = NULL;
1761         ep->stopped_stream = 0;
1762
1763         xhci_ring_cmd_db(xhci);
1764 }
1765
1766 /* Check if an error has halted the endpoint ring.  The class driver will
1767  * cleanup the halt for a non-default control endpoint if we indicate a stall.
1768  * However, a babble and other errors also halt the endpoint ring, and the class
1769  * driver won't clear the halt in that case, so we need to issue a Set Transfer
1770  * Ring Dequeue Pointer command manually.
1771  */
1772 static int xhci_requires_manual_halt_cleanup(struct xhci_hcd *xhci,
1773                 struct xhci_ep_ctx *ep_ctx,
1774                 unsigned int trb_comp_code)
1775 {
1776         /* TRB completion codes that may require a manual halt cleanup */
1777         if (trb_comp_code == COMP_TX_ERR ||
1778                         trb_comp_code == COMP_BABBLE ||
1779                         trb_comp_code == COMP_SPLIT_ERR)
1780                 /* The 0.96 spec says a babbling control endpoint
1781                  * is not halted. The 0.96 spec says it is.  Some HW
1782                  * claims to be 0.95 compliant, but it halts the control
1783                  * endpoint anyway.  Check if a babble halted the
1784                  * endpoint.
1785                  */
1786                 if ((ep_ctx->ep_info & cpu_to_le32(EP_STATE_MASK)) ==
1787                     cpu_to_le32(EP_STATE_HALTED))
1788                         return 1;
1789
1790         return 0;
1791 }
1792
1793 int xhci_is_vendor_info_code(struct xhci_hcd *xhci, unsigned int trb_comp_code)
1794 {
1795         if (trb_comp_code >= 224 && trb_comp_code <= 255) {
1796                 /* Vendor defined "informational" completion code,
1797                  * treat as not-an-error.
1798                  */
1799                 xhci_dbg(xhci, "Vendor defined info completion code %u\n",
1800                                 trb_comp_code);
1801                 xhci_dbg(xhci, "Treating code as success.\n");
1802                 return 1;
1803         }
1804         return 0;
1805 }
1806
1807 /*
1808  * Finish the td processing, remove the td from td list;
1809  * Return 1 if the urb can be given back.
1810  */
1811 static int finish_td(struct xhci_hcd *xhci, struct xhci_td *td,
1812         union xhci_trb *event_trb, struct xhci_transfer_event *event,
1813         struct xhci_virt_ep *ep, int *status, bool skip)
1814 {
1815         struct xhci_virt_device *xdev;
1816         struct xhci_ring *ep_ring;
1817         unsigned int slot_id;
1818         int ep_index;
1819         struct urb *urb = NULL;
1820         struct xhci_ep_ctx *ep_ctx;
1821         int ret = 0;
1822         struct urb_priv *urb_priv;
1823         u32 trb_comp_code;
1824
1825         slot_id = TRB_TO_SLOT_ID(le32_to_cpu(event->flags));
1826         xdev = xhci->devs[slot_id];
1827         ep_index = TRB_TO_EP_ID(le32_to_cpu(event->flags)) - 1;
1828         ep_ring = xhci_dma_to_transfer_ring(ep, le64_to_cpu(event->buffer));
1829         ep_ctx = xhci_get_ep_ctx(xhci, xdev->out_ctx, ep_index);
1830         trb_comp_code = GET_COMP_CODE(le32_to_cpu(event->transfer_len));
1831
1832         if (skip)
1833                 goto td_cleanup;
1834
1835         if (trb_comp_code == COMP_STOP_INVAL ||
1836                         trb_comp_code == COMP_STOP) {
1837                 /* The Endpoint Stop Command completion will take care of any
1838                  * stopped TDs.  A stopped TD may be restarted, so don't update
1839                  * the ring dequeue pointer or take this TD off any lists yet.
1840                  */
1841                 ep->stopped_td = td;
1842                 return 0;
1843         } else {
1844                 if (trb_comp_code == COMP_STALL) {
1845                         /* The transfer is completed from the driver's
1846                          * perspective, but we need to issue a set dequeue
1847                          * command for this stalled endpoint to move the dequeue
1848                          * pointer past the TD.  We can't do that here because
1849                          * the halt condition must be cleared first.  Let the
1850                          * USB class driver clear the stall later.
1851                          */
1852                         ep->stopped_td = td;
1853                         ep->stopped_stream = ep_ring->stream_id;
1854                 } else if (xhci_requires_manual_halt_cleanup(xhci,
1855                                         ep_ctx, trb_comp_code)) {
1856                         /* Other types of errors halt the endpoint, but the
1857                          * class driver doesn't call usb_reset_endpoint() unless
1858                          * the error is -EPIPE.  Clear the halted status in the
1859                          * xHCI hardware manually.
1860                          */
1861                         xhci_cleanup_halted_endpoint(xhci,
1862                                         slot_id, ep_index, ep_ring->stream_id,
1863                                         td, event_trb);
1864                 } else {
1865                         /* Update ring dequeue pointer */
1866                         while (ep_ring->dequeue != td->last_trb)
1867                                 inc_deq(xhci, ep_ring, false);
1868                         inc_deq(xhci, ep_ring, false);
1869                 }
1870
1871 td_cleanup:
1872                 /* Clean up the endpoint's TD list */
1873                 urb = td->urb;
1874                 urb_priv = urb->hcpriv;
1875
1876                 /* Do one last check of the actual transfer length.
1877                  * If the host controller said we transferred more data than
1878                  * the buffer length, urb->actual_length will be a very big
1879                  * number (since it's unsigned).  Play it safe and say we didn't
1880                  * transfer anything.
1881                  */
1882                 if (urb->actual_length > urb->transfer_buffer_length) {
1883                         xhci_warn(xhci, "URB transfer length is wrong, "
1884                                         "xHC issue? req. len = %u, "
1885                                         "act. len = %u\n",
1886                                         urb->transfer_buffer_length,
1887                                         urb->actual_length);
1888                         urb->actual_length = 0;
1889                         if (td->urb->transfer_flags & URB_SHORT_NOT_OK)
1890                                 *status = -EREMOTEIO;
1891                         else
1892                                 *status = 0;
1893                 }
1894                 list_del_init(&td->td_list);
1895                 /* Was this TD slated to be cancelled but completed anyway? */
1896                 if (!list_empty(&td->cancelled_td_list))
1897                         list_del_init(&td->cancelled_td_list);
1898
1899                 urb_priv->td_cnt++;
1900                 /* Giveback the urb when all the tds are completed */
1901                 if (urb_priv->td_cnt == urb_priv->length) {
1902                         ret = 1;
1903                         if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) {
1904                                 xhci_to_hcd(xhci)->self.bandwidth_isoc_reqs--;
1905                                 if (xhci_to_hcd(xhci)->self.bandwidth_isoc_reqs
1906                                         == 0) {
1907                                         if (xhci->quirks & XHCI_AMD_PLL_FIX)
1908                                                 usb_amd_quirk_pll_enable();
1909                                 }
1910                         }
1911                 }
1912         }
1913
1914         return ret;
1915 }
1916
1917 /*
1918  * Process control tds, update urb status and actual_length.
1919  */
1920 static int process_ctrl_td(struct xhci_hcd *xhci, struct xhci_td *td,
1921         union xhci_trb *event_trb, struct xhci_transfer_event *event,
1922         struct xhci_virt_ep *ep, int *status)
1923 {
1924         struct xhci_virt_device *xdev;
1925         struct xhci_ring *ep_ring;
1926         unsigned int slot_id;
1927         int ep_index;
1928         struct xhci_ep_ctx *ep_ctx;
1929         u32 trb_comp_code;
1930
1931         slot_id = TRB_TO_SLOT_ID(le32_to_cpu(event->flags));
1932         xdev = xhci->devs[slot_id];
1933         ep_index = TRB_TO_EP_ID(le32_to_cpu(event->flags)) - 1;
1934         ep_ring = xhci_dma_to_transfer_ring(ep, le64_to_cpu(event->buffer));
1935         ep_ctx = xhci_get_ep_ctx(xhci, xdev->out_ctx, ep_index);
1936         trb_comp_code = GET_COMP_CODE(le32_to_cpu(event->transfer_len));
1937
1938         xhci_debug_trb(xhci, xhci->event_ring->dequeue);
1939         switch (trb_comp_code) {
1940         case COMP_SUCCESS:
1941                 if (event_trb == ep_ring->dequeue) {
1942                         xhci_warn(xhci, "WARN: Success on ctrl setup TRB "
1943                                         "without IOC set??\n");
1944                         *status = -ESHUTDOWN;
1945                 } else if (event_trb != td->last_trb) {
1946                         xhci_warn(xhci, "WARN: Success on ctrl data TRB "
1947                                         "without IOC set??\n");
1948                         *status = -ESHUTDOWN;
1949                 } else {
1950                         *status = 0;
1951                 }
1952                 break;
1953         case COMP_SHORT_TX:
1954                 if (td->urb->transfer_flags & URB_SHORT_NOT_OK)
1955                         *status = -EREMOTEIO;
1956                 else
1957                         *status = 0;
1958                 break;
1959         case COMP_STOP_INVAL:
1960         case COMP_STOP:
1961                 return finish_td(xhci, td, event_trb, event, ep, status, false);
1962         default:
1963                 if (!xhci_requires_manual_halt_cleanup(xhci,
1964                                         ep_ctx, trb_comp_code))
1965                         break;
1966                 xhci_dbg(xhci, "TRB error code %u, "
1967                                 "halted endpoint index = %u\n",
1968                                 trb_comp_code, ep_index);
1969                 /* else fall through */
1970         case COMP_STALL:
1971                 /* Did we transfer part of the data (middle) phase? */
1972                 if (event_trb != ep_ring->dequeue &&
1973                                 event_trb != td->last_trb)
1974                         td->urb->actual_length =
1975                                 td->urb->transfer_buffer_length -
1976                                 EVENT_TRB_LEN(le32_to_cpu(event->transfer_len));
1977                 else
1978                         td->urb->actual_length = 0;
1979
1980                 xhci_cleanup_halted_endpoint(xhci,
1981                         slot_id, ep_index, 0, td, event_trb);
1982                 return finish_td(xhci, td, event_trb, event, ep, status, true);
1983         }
1984         /*
1985          * Did we transfer any data, despite the errors that might have
1986          * happened?  I.e. did we get past the setup stage?
1987          */
1988         if (event_trb != ep_ring->dequeue) {
1989                 /* The event was for the status stage */
1990                 if (event_trb == td->last_trb) {
1991                         if (td->urb->actual_length != 0) {
1992                                 /* Don't overwrite a previously set error code
1993                                  */
1994                                 if ((*status == -EINPROGRESS || *status == 0) &&
1995                                                 (td->urb->transfer_flags
1996                                                  & URB_SHORT_NOT_OK))
1997                                         /* Did we already see a short data
1998                                          * stage? */
1999                                         *status = -EREMOTEIO;
2000                         } else {
2001                                 td->urb->actual_length =
2002                                         td->urb->transfer_buffer_length;
2003                         }
2004                 } else {
2005                 /* Maybe the event was for the data stage? */
2006                         td->urb->actual_length =
2007                                 td->urb->transfer_buffer_length -
2008                                 EVENT_TRB_LEN(le32_to_cpu(event->transfer_len));
2009                         xhci_dbg(xhci, "Waiting for status "
2010                                         "stage event\n");
2011                         return 0;
2012                 }
2013         }
2014
2015         return finish_td(xhci, td, event_trb, event, ep, status, false);
2016 }
2017
2018 /*
2019  * Process isochronous tds, update urb packet status and actual_length.
2020  */
2021 static int process_isoc_td(struct xhci_hcd *xhci, struct xhci_td *td,
2022         union xhci_trb *event_trb, struct xhci_transfer_event *event,
2023         struct xhci_virt_ep *ep, int *status)
2024 {
2025         struct xhci_ring *ep_ring;
2026         struct urb_priv *urb_priv;
2027         int idx;
2028         int len = 0;
2029         union xhci_trb *cur_trb;
2030         struct xhci_segment *cur_seg;
2031         struct usb_iso_packet_descriptor *frame;
2032         u32 trb_comp_code;
2033         bool skip_td = false;
2034
2035         ep_ring = xhci_dma_to_transfer_ring(ep, le64_to_cpu(event->buffer));
2036         trb_comp_code = GET_COMP_CODE(le32_to_cpu(event->transfer_len));
2037         urb_priv = td->urb->hcpriv;
2038         idx = urb_priv->td_cnt;
2039         frame = &td->urb->iso_frame_desc[idx];
2040
2041         /* handle completion code */
2042         switch (trb_comp_code) {
2043         case COMP_SUCCESS:
2044                 if (EVENT_TRB_LEN(le32_to_cpu(event->transfer_len)) == 0) {
2045                         frame->status = 0;
2046                         break;
2047                 }
2048                 if ((xhci->quirks & XHCI_TRUST_TX_LENGTH))
2049                         trb_comp_code = COMP_SHORT_TX;
2050         case COMP_SHORT_TX:
2051                 frame->status = td->urb->transfer_flags & URB_SHORT_NOT_OK ?
2052                                 -EREMOTEIO : 0;
2053                 break;
2054         case COMP_BW_OVER:
2055                 frame->status = -ECOMM;
2056                 skip_td = true;
2057                 break;
2058         case COMP_BUFF_OVER:
2059         case COMP_BABBLE:
2060                 frame->status = -EOVERFLOW;
2061                 skip_td = true;
2062                 break;
2063         case COMP_DEV_ERR:
2064         case COMP_STALL:
2065         case COMP_TX_ERR:
2066                 frame->status = -EPROTO;
2067                 skip_td = true;
2068                 break;
2069         case COMP_STOP:
2070         case COMP_STOP_INVAL:
2071                 break;
2072         default:
2073                 frame->status = -1;
2074                 break;
2075         }
2076
2077         if (trb_comp_code == COMP_SUCCESS || skip_td) {
2078                 frame->actual_length = frame->length;
2079                 td->urb->actual_length += frame->length;
2080         } else {
2081                 for (cur_trb = ep_ring->dequeue,
2082                      cur_seg = ep_ring->deq_seg; cur_trb != event_trb;
2083                      next_trb(xhci, ep_ring, &cur_seg, &cur_trb)) {
2084                         if (!TRB_TYPE_NOOP_LE32(cur_trb->generic.field[3]) &&
2085                             !TRB_TYPE_LINK_LE32(cur_trb->generic.field[3]))
2086                                 len += TRB_LEN(le32_to_cpu(cur_trb->generic.field[2]));
2087                 }
2088                 len += TRB_LEN(le32_to_cpu(cur_trb->generic.field[2])) -
2089                         EVENT_TRB_LEN(le32_to_cpu(event->transfer_len));
2090
2091                 if (trb_comp_code != COMP_STOP_INVAL) {
2092                         frame->actual_length = len;
2093                         td->urb->actual_length += len;
2094                 }
2095         }
2096
2097         return finish_td(xhci, td, event_trb, event, ep, status, false);
2098 }
2099
2100 static int skip_isoc_td(struct xhci_hcd *xhci, struct xhci_td *td,
2101                         struct xhci_transfer_event *event,
2102                         struct xhci_virt_ep *ep, int *status)
2103 {
2104         struct xhci_ring *ep_ring;
2105         struct urb_priv *urb_priv;
2106         struct usb_iso_packet_descriptor *frame;
2107         int idx;
2108
2109         ep_ring = xhci_dma_to_transfer_ring(ep, le64_to_cpu(event->buffer));
2110         urb_priv = td->urb->hcpriv;
2111         idx = urb_priv->td_cnt;
2112         frame = &td->urb->iso_frame_desc[idx];
2113
2114         /* The transfer is partly done. */
2115         frame->status = -EXDEV;
2116
2117         /* calc actual length */
2118         frame->actual_length = 0;
2119
2120         /* Update ring dequeue pointer */
2121         while (ep_ring->dequeue != td->last_trb)
2122                 inc_deq(xhci, ep_ring, false);
2123         inc_deq(xhci, ep_ring, false);
2124
2125         return finish_td(xhci, td, NULL, event, ep, status, true);
2126 }
2127
2128 /*
2129  * Process bulk and interrupt tds, update urb status and actual_length.
2130  */
2131 static int process_bulk_intr_td(struct xhci_hcd *xhci, struct xhci_td *td,
2132         union xhci_trb *event_trb, struct xhci_transfer_event *event,
2133         struct xhci_virt_ep *ep, int *status)
2134 {
2135         struct xhci_ring *ep_ring;
2136         union xhci_trb *cur_trb;
2137         struct xhci_segment *cur_seg;
2138         u32 trb_comp_code;
2139
2140         ep_ring = xhci_dma_to_transfer_ring(ep, le64_to_cpu(event->buffer));
2141         trb_comp_code = GET_COMP_CODE(le32_to_cpu(event->transfer_len));
2142
2143         switch (trb_comp_code) {
2144         case COMP_SUCCESS:
2145                 /* Double check that the HW transferred everything. */
2146                 if (event_trb != td->last_trb ||
2147                     EVENT_TRB_LEN(le32_to_cpu(event->transfer_len)) != 0) {
2148                         xhci_warn(xhci, "WARN Successful completion "
2149                                         "on short TX\n");
2150                         if (td->urb->transfer_flags & URB_SHORT_NOT_OK)
2151                                 *status = -EREMOTEIO;
2152                         else
2153                                 *status = 0;
2154                         if ((xhci->quirks & XHCI_TRUST_TX_LENGTH))
2155                                 trb_comp_code = COMP_SHORT_TX;
2156                 } else {
2157                         *status = 0;
2158                 }
2159                 break;
2160         case COMP_SHORT_TX:
2161                 if (td->urb->transfer_flags & URB_SHORT_NOT_OK)
2162                         *status = -EREMOTEIO;
2163                 else
2164                         *status = 0;
2165                 break;
2166         default:
2167                 /* Others already handled above */
2168                 break;
2169         }
2170         if (trb_comp_code == COMP_SHORT_TX)
2171                 xhci_dbg(xhci, "ep %#x - asked for %d bytes, "
2172                                 "%d bytes untransferred\n",
2173                                 td->urb->ep->desc.bEndpointAddress,
2174                                 td->urb->transfer_buffer_length,
2175                                 EVENT_TRB_LEN(le32_to_cpu(event->transfer_len)));
2176         /* Fast path - was this the last TRB in the TD for this URB? */
2177         if (event_trb == td->last_trb) {
2178                 if (EVENT_TRB_LEN(le32_to_cpu(event->transfer_len)) != 0) {
2179                         td->urb->actual_length =
2180                                 td->urb->transfer_buffer_length -
2181                                 EVENT_TRB_LEN(le32_to_cpu(event->transfer_len));
2182                         if (td->urb->transfer_buffer_length <
2183                                         td->urb->actual_length) {
2184                                 xhci_warn(xhci, "HC gave bad length "
2185                                                 "of %d bytes left\n",
2186                                           EVENT_TRB_LEN(le32_to_cpu(event->transfer_len)));
2187                                 td->urb->actual_length = 0;
2188                                 if (td->urb->transfer_flags & URB_SHORT_NOT_OK)
2189                                         *status = -EREMOTEIO;
2190                                 else
2191                                         *status = 0;
2192                         }
2193                         /* Don't overwrite a previously set error code */
2194                         if (*status == -EINPROGRESS) {
2195                                 if (td->urb->transfer_flags & URB_SHORT_NOT_OK)
2196                                         *status = -EREMOTEIO;
2197                                 else
2198                                         *status = 0;
2199                         }
2200                 } else {
2201                         td->urb->actual_length =
2202                                 td->urb->transfer_buffer_length;
2203                         /* Ignore a short packet completion if the
2204                          * untransferred length was zero.
2205                          */
2206                         if (*status == -EREMOTEIO)
2207                                 *status = 0;
2208                 }
2209         } else {
2210                 /* Slow path - walk the list, starting from the dequeue
2211                  * pointer, to get the actual length transferred.
2212                  */
2213                 td->urb->actual_length = 0;
2214                 for (cur_trb = ep_ring->dequeue, cur_seg = ep_ring->deq_seg;
2215                                 cur_trb != event_trb;
2216                                 next_trb(xhci, ep_ring, &cur_seg, &cur_trb)) {
2217                         if (!TRB_TYPE_NOOP_LE32(cur_trb->generic.field[3]) &&
2218                             !TRB_TYPE_LINK_LE32(cur_trb->generic.field[3]))
2219                                 td->urb->actual_length +=
2220                                         TRB_LEN(le32_to_cpu(cur_trb->generic.field[2]));
2221                 }
2222                 /* If the ring didn't stop on a Link or No-op TRB, add
2223                  * in the actual bytes transferred from the Normal TRB
2224                  */
2225                 if (trb_comp_code != COMP_STOP_INVAL)
2226                         td->urb->actual_length +=
2227                                 TRB_LEN(le32_to_cpu(cur_trb->generic.field[2])) -
2228                                 EVENT_TRB_LEN(le32_to_cpu(event->transfer_len));
2229         }
2230
2231         return finish_td(xhci, td, event_trb, event, ep, status, false);
2232 }
2233
2234 /*
2235  * If this function returns an error condition, it means it got a Transfer
2236  * event with a corrupted Slot ID, Endpoint ID, or TRB DMA address.
2237  * At this point, the host controller is probably hosed and should be reset.
2238  */
2239 static int handle_tx_event(struct xhci_hcd *xhci,
2240                 struct xhci_transfer_event *event)
2241 {
2242         struct xhci_virt_device *xdev;
2243         struct xhci_virt_ep *ep;
2244         struct xhci_ring *ep_ring;
2245         unsigned int slot_id;
2246         int ep_index;
2247         struct xhci_td *td = NULL;
2248         dma_addr_t event_dma;
2249         struct xhci_segment *event_seg;
2250         union xhci_trb *event_trb;
2251         struct urb *urb = NULL;
2252         int status = -EINPROGRESS;
2253         struct urb_priv *urb_priv;
2254         struct xhci_ep_ctx *ep_ctx;
2255         struct list_head *tmp;
2256         u32 trb_comp_code;
2257         int ret = 0;
2258         int td_num = 0;
2259
2260         slot_id = TRB_TO_SLOT_ID(le32_to_cpu(event->flags));
2261         xdev = xhci->devs[slot_id];
2262         if (!xdev) {
2263                 xhci_err(xhci, "ERROR Transfer event pointed to bad slot\n");
2264                 return -ENODEV;
2265         }
2266
2267         /* Endpoint ID is 1 based, our index is zero based */
2268         ep_index = TRB_TO_EP_ID(le32_to_cpu(event->flags)) - 1;
2269         ep = &xdev->eps[ep_index];
2270         ep_ring = xhci_dma_to_transfer_ring(ep, le64_to_cpu(event->buffer));
2271         ep_ctx = xhci_get_ep_ctx(xhci, xdev->out_ctx, ep_index);
2272         if (!ep_ring ||
2273             (le32_to_cpu(ep_ctx->ep_info) & EP_STATE_MASK) ==
2274             EP_STATE_DISABLED) {
2275                 xhci_err(xhci, "ERROR Transfer event for disabled endpoint "
2276                                 "or incorrect stream ring\n");
2277                 return -ENODEV;
2278         }
2279
2280         /* Count current td numbers if ep->skip is set */
2281         if (ep->skip) {
2282                 list_for_each(tmp, &ep_ring->td_list)
2283                         td_num++;
2284         }
2285
2286         event_dma = le64_to_cpu(event->buffer);
2287         trb_comp_code = GET_COMP_CODE(le32_to_cpu(event->transfer_len));
2288         /* Look for common error cases */
2289         switch (trb_comp_code) {
2290         /* Skip codes that require special handling depending on
2291          * transfer type
2292          */
2293         case COMP_SUCCESS:
2294                 if (EVENT_TRB_LEN(le32_to_cpu(event->transfer_len)) == 0)
2295                         break;
2296                 if (xhci->quirks & XHCI_TRUST_TX_LENGTH)
2297                         trb_comp_code = COMP_SHORT_TX;
2298                 else
2299                         xhci_warn(xhci, "WARN Successful completion on short TX: "
2300                                         "needs XHCI_TRUST_TX_LENGTH quirk?\n");
2301         case COMP_SHORT_TX:
2302                 break;
2303         case COMP_STOP:
2304                 xhci_dbg(xhci, "Stopped on Transfer TRB\n");
2305                 break;
2306         case COMP_STOP_INVAL:
2307                 xhci_dbg(xhci, "Stopped on No-op or Link TRB\n");
2308                 break;
2309         case COMP_STALL:
2310                 xhci_dbg(xhci, "Stalled endpoint\n");
2311                 ep->ep_state |= EP_HALTED;
2312                 status = -EPIPE;
2313                 break;
2314         case COMP_TRB_ERR:
2315                 xhci_warn(xhci, "WARN: TRB error on endpoint\n");
2316                 status = -EILSEQ;
2317                 break;
2318         case COMP_SPLIT_ERR:
2319         case COMP_TX_ERR:
2320                 xhci_dbg(xhci, "Transfer error on endpoint\n");
2321                 status = -EPROTO;
2322                 break;
2323         case COMP_BABBLE:
2324                 xhci_dbg(xhci, "Babble error on endpoint\n");
2325                 status = -EOVERFLOW;
2326                 break;
2327         case COMP_DB_ERR:
2328                 xhci_warn(xhci, "WARN: HC couldn't access mem fast enough\n");
2329                 status = -ENOSR;
2330                 break;
2331         case COMP_BW_OVER:
2332                 xhci_warn(xhci, "WARN: bandwidth overrun event on endpoint\n");
2333                 break;
2334         case COMP_BUFF_OVER:
2335                 xhci_warn(xhci, "WARN: buffer overrun event on endpoint\n");
2336                 break;
2337         case COMP_UNDERRUN:
2338                 /*
2339                  * When the Isoch ring is empty, the xHC will generate
2340                  * a Ring Overrun Event for IN Isoch endpoint or Ring
2341                  * Underrun Event for OUT Isoch endpoint.
2342                  */
2343                 xhci_dbg(xhci, "underrun event on endpoint\n");
2344                 if (!list_empty(&ep_ring->td_list))
2345                         xhci_dbg(xhci, "Underrun Event for slot %d ep %d "
2346                                         "still with TDs queued?\n",
2347                                  TRB_TO_SLOT_ID(le32_to_cpu(event->flags)),
2348                                  ep_index);
2349                 goto cleanup;
2350         case COMP_OVERRUN:
2351                 xhci_dbg(xhci, "overrun event on endpoint\n");
2352                 if (!list_empty(&ep_ring->td_list))
2353                         xhci_dbg(xhci, "Overrun Event for slot %d ep %d "
2354                                         "still with TDs queued?\n",
2355                                  TRB_TO_SLOT_ID(le32_to_cpu(event->flags)),
2356                                  ep_index);
2357                 goto cleanup;
2358         case COMP_DEV_ERR:
2359                 xhci_warn(xhci, "WARN: detect an incompatible device");
2360                 status = -EPROTO;
2361                 break;
2362         case COMP_MISSED_INT:
2363                 /*
2364                  * When encounter missed service error, one or more isoc tds
2365                  * may be missed by xHC.
2366                  * Set skip flag of the ep_ring; Complete the missed tds as
2367                  * short transfer when process the ep_ring next time.
2368                  */
2369                 ep->skip = true;
2370                 xhci_dbg(xhci, "Miss service interval error, set skip flag\n");
2371                 goto cleanup;
2372         default:
2373                 if (xhci_is_vendor_info_code(xhci, trb_comp_code)) {
2374                         status = 0;
2375                         break;
2376                 }
2377                 xhci_warn(xhci, "ERROR Unknown event condition, HC probably "
2378                                 "busted\n");
2379                 goto cleanup;
2380         }
2381
2382         do {
2383                 /* This TRB should be in the TD at the head of this ring's
2384                  * TD list.
2385                  */
2386                 if (list_empty(&ep_ring->td_list)) {
2387                         /*
2388                          * A stopped endpoint may generate an extra completion
2389                          * event if the device was suspended.  Don't print
2390                          * warnings.
2391                          */
2392                         if (!(trb_comp_code == COMP_STOP ||
2393                                                 trb_comp_code == COMP_STOP_INVAL)) {
2394                                 xhci_warn(xhci, "WARN Event TRB for slot %d ep %d with no TDs queued?\n",
2395                                                 TRB_TO_SLOT_ID(le32_to_cpu(event->flags)),
2396                                                 ep_index);
2397                                 xhci_dbg(xhci, "Event TRB with TRB type ID %u\n",
2398                                                 (le32_to_cpu(event->flags) &
2399                                                  TRB_TYPE_BITMASK)>>10);
2400                                 xhci_print_trb_offsets(xhci, (union xhci_trb *) event);
2401                         }
2402                         if (ep->skip) {
2403                                 ep->skip = false;
2404                                 xhci_dbg(xhci, "td_list is empty while skip "
2405                                                 "flag set. Clear skip flag.\n");
2406                         }
2407                         ret = 0;
2408                         goto cleanup;
2409                 }
2410
2411                 /* We've skipped all the TDs on the ep ring when ep->skip set */
2412                 if (ep->skip && td_num == 0) {
2413                         ep->skip = false;
2414                         xhci_dbg(xhci, "All tds on the ep_ring skipped. "
2415                                                 "Clear skip flag.\n");
2416                         ret = 0;
2417                         goto cleanup;
2418                 }
2419
2420                 td = list_entry(ep_ring->td_list.next, struct xhci_td, td_list);
2421                 if (ep->skip)
2422                         td_num--;
2423
2424                 /* Is this a TRB in the currently executing TD? */
2425                 event_seg = trb_in_td(ep_ring->deq_seg, ep_ring->dequeue,
2426                                 td->last_trb, event_dma);
2427
2428                 /*
2429                  * Skip the Force Stopped Event. The event_trb(event_dma) of FSE
2430                  * is not in the current TD pointed by ep_ring->dequeue because
2431                  * that the hardware dequeue pointer still at the previous TRB
2432                  * of the current TD. The previous TRB maybe a Link TD or the
2433                  * last TRB of the previous TD. The command completion handle
2434                  * will take care the rest.
2435                  */
2436                 if (!event_seg && trb_comp_code == COMP_STOP_INVAL) {
2437                         ret = 0;
2438                         goto cleanup;
2439                 }
2440
2441                 if (!event_seg) {
2442                         if (!ep->skip ||
2443                             !usb_endpoint_xfer_isoc(&td->urb->ep->desc)) {
2444                                 /* Some host controllers give a spurious
2445                                  * successful event after a short transfer.
2446                                  * Ignore it.
2447                                  */
2448                                 if ((xhci->quirks & XHCI_SPURIOUS_SUCCESS) && 
2449                                                 ep_ring->last_td_was_short) {
2450                                         ep_ring->last_td_was_short = false;
2451                                         ret = 0;
2452                                         goto cleanup;
2453                                 }
2454                                 /* HC is busted, give up! */
2455                                 xhci_err(xhci,
2456                                         "ERROR Transfer event TRB DMA ptr not "
2457                                         "part of current TD\n");
2458                                 return -ESHUTDOWN;
2459                         }
2460
2461                         ret = skip_isoc_td(xhci, td, event, ep, &status);
2462                         goto cleanup;
2463                 }
2464                 if (trb_comp_code == COMP_SHORT_TX)
2465                         ep_ring->last_td_was_short = true;
2466                 else
2467                         ep_ring->last_td_was_short = false;
2468
2469                 if (ep->skip) {
2470                         xhci_dbg(xhci, "Found td. Clear skip flag.\n");
2471                         ep->skip = false;
2472                 }
2473
2474                 event_trb = &event_seg->trbs[(event_dma - event_seg->dma) /
2475                                                 sizeof(*event_trb)];
2476                 /*
2477                  * No-op TRB should not trigger interrupts.
2478                  * If event_trb is a no-op TRB, it means the
2479                  * corresponding TD has been cancelled. Just ignore
2480                  * the TD.
2481                  */
2482                 if (TRB_TYPE_NOOP_LE32(event_trb->generic.field[3])) {
2483                         xhci_dbg(xhci,
2484                                  "event_trb is a no-op TRB. Skip it\n");
2485                         goto cleanup;
2486                 }
2487
2488                 /* Now update the urb's actual_length and give back to
2489                  * the core
2490                  */
2491                 if (usb_endpoint_xfer_control(&td->urb->ep->desc))
2492                         ret = process_ctrl_td(xhci, td, event_trb, event, ep,
2493                                                  &status);
2494                 else if (usb_endpoint_xfer_isoc(&td->urb->ep->desc))
2495                         ret = process_isoc_td(xhci, td, event_trb, event, ep,
2496                                                  &status);
2497                 else
2498                         ret = process_bulk_intr_td(xhci, td, event_trb, event,
2499                                                  ep, &status);
2500
2501 cleanup:
2502                 /*
2503                  * Do not update event ring dequeue pointer if ep->skip is set.
2504                  * Will roll back to continue process missed tds.
2505                  */
2506                 if (trb_comp_code == COMP_MISSED_INT || !ep->skip) {
2507                         inc_deq(xhci, xhci->event_ring, true);
2508                 }
2509
2510                 if (ret) {
2511                         urb = td->urb;
2512                         urb_priv = urb->hcpriv;
2513                         /* Leave the TD around for the reset endpoint function
2514                          * to use(but only if it's not a control endpoint,
2515                          * since we already queued the Set TR dequeue pointer
2516                          * command for stalled control endpoints).
2517                          */
2518                         if (usb_endpoint_xfer_control(&urb->ep->desc) ||
2519                                 (trb_comp_code != COMP_STALL &&
2520                                         trb_comp_code != COMP_BABBLE))
2521                                 xhci_urb_free_priv(xhci, urb_priv);
2522                         else
2523                                 kfree(urb_priv);
2524
2525                         usb_hcd_unlink_urb_from_ep(bus_to_hcd(urb->dev->bus), urb);
2526                         if ((urb->actual_length != urb->transfer_buffer_length &&
2527                                                 (urb->transfer_flags &
2528                                                  URB_SHORT_NOT_OK)) ||
2529                                         (status != 0 &&
2530                                          !usb_endpoint_xfer_isoc(&urb->ep->desc)))
2531                                 xhci_dbg(xhci, "Giveback URB %p, len = %d, "
2532                                                 "expected = %x, status = %d\n",
2533                                                 urb, urb->actual_length,
2534                                                 urb->transfer_buffer_length,
2535                                                 status);
2536                         spin_unlock(&xhci->lock);
2537                         /* EHCI, UHCI, and OHCI always unconditionally set the
2538                          * urb->status of an isochronous endpoint to 0.
2539                          */
2540                         if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS)
2541                                 status = 0;
2542                         usb_hcd_giveback_urb(bus_to_hcd(urb->dev->bus), urb, status);
2543                         spin_lock(&xhci->lock);
2544                 }
2545
2546         /*
2547          * If ep->skip is set, it means there are missed tds on the
2548          * endpoint ring need to take care of.
2549          * Process them as short transfer until reach the td pointed by
2550          * the event.
2551          */
2552         } while (ep->skip && trb_comp_code != COMP_MISSED_INT);
2553
2554         return 0;
2555 }
2556
2557 /*
2558  * This function handles all OS-owned events on the event ring.  It may drop
2559  * xhci->lock between event processing (e.g. to pass up port status changes).
2560  * Returns >0 for "possibly more events to process" (caller should call again),
2561  * otherwise 0 if done.  In future, <0 returns should indicate error code.
2562  */
2563 static int xhci_handle_event(struct xhci_hcd *xhci)
2564 {
2565         union xhci_trb *event;
2566         int update_ptrs = 1;
2567         int ret;
2568
2569         if (!xhci->event_ring || !xhci->event_ring->dequeue) {
2570                 xhci->error_bitmask |= 1 << 1;
2571                 return 0;
2572         }
2573
2574         event = xhci->event_ring->dequeue;
2575         /* Does the HC or OS own the TRB? */
2576         if ((le32_to_cpu(event->event_cmd.flags) & TRB_CYCLE) !=
2577             xhci->event_ring->cycle_state) {
2578                 xhci->error_bitmask |= 1 << 2;
2579                 return 0;
2580         }
2581
2582         /*
2583          * Barrier between reading the TRB_CYCLE (valid) flag above and any
2584          * speculative reads of the event's flags/data below.
2585          */
2586         rmb();
2587         /* FIXME: Handle more event types. */
2588         switch ((le32_to_cpu(event->event_cmd.flags) & TRB_TYPE_BITMASK)) {
2589         case TRB_TYPE(TRB_COMPLETION):
2590                 handle_cmd_completion(xhci, &event->event_cmd);
2591                 break;
2592         case TRB_TYPE(TRB_PORT_STATUS):
2593                 handle_port_status(xhci, event);
2594                 update_ptrs = 0;
2595                 break;
2596         case TRB_TYPE(TRB_TRANSFER):
2597                 ret = handle_tx_event(xhci, &event->trans_event);
2598                 if (ret < 0)
2599                         xhci->error_bitmask |= 1 << 9;
2600                 else
2601                         update_ptrs = 0;
2602                 break;
2603         default:
2604                 if ((le32_to_cpu(event->event_cmd.flags) & TRB_TYPE_BITMASK) >=
2605                     TRB_TYPE(48))
2606                         handle_vendor_event(xhci, event);
2607                 else
2608                         xhci->error_bitmask |= 1 << 3;
2609         }
2610         /* Any of the above functions may drop and re-acquire the lock, so check
2611          * to make sure a watchdog timer didn't mark the host as non-responsive.
2612          */
2613         if (xhci->xhc_state & XHCI_STATE_DYING) {
2614                 xhci_dbg(xhci, "xHCI host dying, returning from "
2615                                 "event handler.\n");
2616                 return 0;
2617         }
2618
2619         if (update_ptrs)
2620                 /* Update SW event ring dequeue pointer */
2621                 inc_deq(xhci, xhci->event_ring, true);
2622
2623         /* Are there more items on the event ring?  Caller will call us again to
2624          * check.
2625          */
2626         return 1;
2627 }
2628
2629 /*
2630  * xHCI spec says we can get an interrupt, and if the HC has an error condition,
2631  * we might get bad data out of the event ring.  Section 4.10.2.7 has a list of
2632  * indicators of an event TRB error, but we check the status *first* to be safe.
2633  */
2634 irqreturn_t xhci_irq(struct usb_hcd *hcd)
2635 {
2636         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
2637         u32 status;
2638         union xhci_trb *trb;
2639         u64 temp_64;
2640         union xhci_trb *event_ring_deq;
2641         dma_addr_t deq;
2642
2643         spin_lock(&xhci->lock);
2644         trb = xhci->event_ring->dequeue;
2645         /* Check if the xHC generated the interrupt, or the irq is shared */
2646         status = xhci_readl(xhci, &xhci->op_regs->status);
2647         if (status == 0xffffffff)
2648                 goto hw_died;
2649
2650         if (!(status & STS_EINT)) {
2651                 spin_unlock(&xhci->lock);
2652                 return IRQ_NONE;
2653         }
2654         if (status & STS_FATAL) {
2655                 xhci_warn(xhci, "WARNING: Host System Error\n");
2656                 xhci_halt(xhci);
2657 hw_died:
2658                 spin_unlock(&xhci->lock);
2659                 return -ESHUTDOWN;
2660         }
2661
2662         /*
2663          * Clear the op reg interrupt status first,
2664          * so we can receive interrupts from other MSI-X interrupters.
2665          * Write 1 to clear the interrupt status.
2666          */
2667         status |= STS_EINT;
2668         xhci_writel(xhci, status, &xhci->op_regs->status);
2669         /* FIXME when MSI-X is supported and there are multiple vectors */
2670         /* Clear the MSI-X event interrupt status */
2671
2672         if (hcd->irq != -1) {
2673                 u32 irq_pending;
2674                 /* Acknowledge the PCI interrupt */
2675                 irq_pending = xhci_readl(xhci, &xhci->ir_set->irq_pending);
2676                 irq_pending |= IMAN_IP;
2677                 xhci_writel(xhci, irq_pending, &xhci->ir_set->irq_pending);
2678         }
2679
2680         if (xhci->xhc_state & XHCI_STATE_DYING) {
2681                 xhci_dbg(xhci, "xHCI dying, ignoring interrupt. "
2682                                 "Shouldn't IRQs be disabled?\n");
2683                 /* Clear the event handler busy flag (RW1C);
2684                  * the event ring should be empty.
2685                  */
2686                 temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
2687                 xhci_write_64(xhci, temp_64 | ERST_EHB,
2688                                 &xhci->ir_set->erst_dequeue);
2689                 spin_unlock(&xhci->lock);
2690
2691                 return IRQ_HANDLED;
2692         }
2693
2694         event_ring_deq = xhci->event_ring->dequeue;
2695         /* FIXME this should be a delayed service routine
2696          * that clears the EHB.
2697          */
2698         while (xhci_handle_event(xhci) > 0) {}
2699
2700         temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
2701         /* If necessary, update the HW's version of the event ring deq ptr. */
2702         if (event_ring_deq != xhci->event_ring->dequeue) {
2703                 deq = xhci_trb_virt_to_dma(xhci->event_ring->deq_seg,
2704                                 xhci->event_ring->dequeue);
2705                 if (deq == 0)
2706                         xhci_warn(xhci, "WARN something wrong with SW event "
2707                                         "ring dequeue ptr.\n");
2708                 /* Update HC event ring dequeue pointer */
2709                 temp_64 &= ERST_PTR_MASK;
2710                 temp_64 |= ((u64) deq & (u64) ~ERST_PTR_MASK);
2711         }
2712
2713         /* Clear the event handler busy flag (RW1C); event ring is empty. */
2714         temp_64 |= ERST_EHB;
2715         xhci_write_64(xhci, temp_64, &xhci->ir_set->erst_dequeue);
2716
2717         spin_unlock(&xhci->lock);
2718
2719         return IRQ_HANDLED;
2720 }
2721
2722 irqreturn_t xhci_msi_irq(int irq, struct usb_hcd *hcd)
2723 {
2724         irqreturn_t ret;
2725         struct xhci_hcd *xhci;
2726
2727         xhci = hcd_to_xhci(hcd);
2728         set_bit(HCD_FLAG_SAW_IRQ, &hcd->flags);
2729         if (xhci->shared_hcd)
2730                 set_bit(HCD_FLAG_SAW_IRQ, &xhci->shared_hcd->flags);
2731
2732         ret = xhci_irq(hcd);
2733
2734         return ret;
2735 }
2736
2737 /****           Endpoint Ring Operations        ****/
2738
2739 /*
2740  * Generic function for queueing a TRB on a ring.
2741  * The caller must have checked to make sure there's room on the ring.
2742  *
2743  * @more_trbs_coming:   Will you enqueue more TRBs before calling
2744  *                      prepare_transfer()?
2745  */
2746 static void queue_trb(struct xhci_hcd *xhci, struct xhci_ring *ring,
2747                 bool consumer, bool more_trbs_coming, bool isoc,
2748                 u32 field1, u32 field2, u32 field3, u32 field4)
2749 {
2750         struct xhci_generic_trb *trb;
2751
2752         trb = &ring->enqueue->generic;
2753         trb->field[0] = cpu_to_le32(field1);
2754         trb->field[1] = cpu_to_le32(field2);
2755         trb->field[2] = cpu_to_le32(field3);
2756         trb->field[3] = cpu_to_le32(field4);
2757         inc_enq(xhci, ring, consumer, more_trbs_coming, isoc);
2758 }
2759
2760 /*
2761  * Does various checks on the endpoint ring, and makes it ready to queue num_trbs.
2762  * FIXME allocate segments if the ring is full.
2763  */
2764 static int prepare_ring(struct xhci_hcd *xhci, struct xhci_ring *ep_ring,
2765                 u32 ep_state, unsigned int num_trbs, bool isoc, gfp_t mem_flags)
2766 {
2767         /* Make sure the endpoint has been added to xHC schedule */
2768         switch (ep_state) {
2769         case EP_STATE_DISABLED:
2770                 /*
2771                  * USB core changed config/interfaces without notifying us,
2772                  * or hardware is reporting the wrong state.
2773                  */
2774                 xhci_warn(xhci, "WARN urb submitted to disabled ep\n");
2775                 return -ENOENT;
2776         case EP_STATE_ERROR:
2777                 xhci_warn(xhci, "WARN waiting for error on ep to be cleared\n");
2778                 /* FIXME event handling code for error needs to clear it */
2779                 /* XXX not sure if this should be -ENOENT or not */
2780                 return -EINVAL;
2781         case EP_STATE_HALTED:
2782                 xhci_dbg(xhci, "WARN halted endpoint, queueing URB anyway.\n");
2783         case EP_STATE_STOPPED:
2784         case EP_STATE_RUNNING:
2785                 break;
2786         default:
2787                 xhci_err(xhci, "ERROR unknown endpoint state for ep\n");
2788                 /*
2789                  * FIXME issue Configure Endpoint command to try to get the HC
2790                  * back into a known state.
2791                  */
2792                 return -EINVAL;
2793         }
2794         if (!room_on_ring(xhci, ep_ring, num_trbs)) {
2795                 /* FIXME allocate more room */
2796                 xhci_err(xhci, "ERROR no room on ep ring\n");
2797                 return -ENOMEM;
2798         }
2799
2800         if (enqueue_is_link_trb(ep_ring)) {
2801                 struct xhci_ring *ring = ep_ring;
2802                 union xhci_trb *next;
2803
2804                 next = ring->enqueue;
2805
2806                 while (last_trb(xhci, ring, ring->enq_seg, next)) {
2807                         /* If we're not dealing with 0.95 hardware or isoc rings
2808                          * on AMD 0.96 host, clear the chain bit.
2809                          */
2810                         if (!xhci_link_trb_quirk(xhci) && !(isoc &&
2811                                         (xhci->quirks & XHCI_AMD_0x96_HOST)))
2812                                 next->link.control &= cpu_to_le32(~TRB_CHAIN);
2813                         else
2814                                 next->link.control |= cpu_to_le32(TRB_CHAIN);
2815
2816                         wmb();
2817                         next->link.control ^= cpu_to_le32(TRB_CYCLE);
2818
2819                         /* Toggle the cycle bit after the last ring segment. */
2820                         if (last_trb_on_last_seg(xhci, ring, ring->enq_seg, next)) {
2821                                 ring->cycle_state = (ring->cycle_state ? 0 : 1);
2822                                 if (!in_interrupt()) {
2823                                         xhci_dbg(xhci, "queue_trb: Toggle cycle "
2824                                                 "state for ring %p = %i\n",
2825                                                 ring, (unsigned int)ring->cycle_state);
2826                                 }
2827                         }
2828                         ring->enq_seg = ring->enq_seg->next;
2829                         ring->enqueue = ring->enq_seg->trbs;
2830                         next = ring->enqueue;
2831                 }
2832         }
2833
2834         return 0;
2835 }
2836
2837 static int prepare_transfer(struct xhci_hcd *xhci,
2838                 struct xhci_virt_device *xdev,
2839                 unsigned int ep_index,
2840                 unsigned int stream_id,
2841                 unsigned int num_trbs,
2842