2 * xHCI host controller driver PCI Bus Glue.
4 * Copyright (C) 2008 Intel Corp.
7 * Some code borrowed from the Linux EHCI driver.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software Foundation,
20 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 #include <linux/pci.h>
24 #include <linux/slab.h>
25 #include <linux/module.h>
29 /* Device for a quirk */
30 #define PCI_VENDOR_ID_FRESCO_LOGIC 0x1b73
31 #define PCI_DEVICE_ID_FRESCO_LOGIC_PDK 0x1000
32 #define PCI_DEVICE_ID_FRESCO_LOGIC_FL1400 0x1400
34 #define PCI_VENDOR_ID_ETRON 0x1b6f
35 #define PCI_DEVICE_ID_ASROCK_P67 0x7023
37 #define PCI_DEVICE_ID_INTEL_LYNXPOINT_XHCI 0x8c31
38 #define PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_XHCI 0x9c31
39 #define PCI_DEVICE_ID_INTEL_CHERRYVIEW_XHCI 0x22b5
40 #define PCI_DEVICE_ID_INTEL_SUNRISEPOINT_H_XHCI 0xa12f
41 #define PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_XHCI 0x9d2f
42 #define PCI_DEVICE_ID_INTEL_BROXTON_M_XHCI 0x0aa8
43 #define PCI_DEVICE_ID_INTEL_BROXTON_B_XHCI 0x1aa8
45 static const char hcd_name[] = "xhci_hcd";
47 /* called after powerup, by probe or system-pm "wakeup" */
48 static int xhci_pci_reinit(struct xhci_hcd *xhci, struct pci_dev *pdev)
51 * TODO: Implement finding debug ports later.
52 * TODO: see if there are any quirks that need to be added to handle
53 * new extended capabilities.
56 /* PCI Memory-Write-Invalidate cycle support is optional (uncommon) */
57 if (!pci_set_mwi(pdev))
58 xhci_dbg(xhci, "MWI active\n");
60 xhci_dbg(xhci, "Finished xhci_pci_reinit\n");
64 static void xhci_pci_quirks(struct device *dev, struct xhci_hcd *xhci)
66 struct pci_dev *pdev = to_pci_dev(dev);
68 /* Look for vendor-specific quirks */
69 if (pdev->vendor == PCI_VENDOR_ID_FRESCO_LOGIC &&
70 (pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_PDK ||
71 pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_FL1400)) {
72 if (pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_PDK &&
73 pdev->revision == 0x0) {
74 xhci->quirks |= XHCI_RESET_EP_QUIRK;
75 xhci_dbg(xhci, "QUIRK: Fresco Logic xHC needs configure"
76 " endpoint cmd after reset endpoint\n");
78 if (pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_PDK &&
79 pdev->revision == 0x4) {
80 xhci->quirks |= XHCI_SLOW_SUSPEND;
82 "QUIRK: Fresco Logic xHC revision %u"
83 "must be suspended extra slowly",
86 /* Fresco Logic confirms: all revisions of this chip do not
87 * support MSI, even though some of them claim to in their PCI
90 xhci->quirks |= XHCI_BROKEN_MSI;
91 xhci_dbg(xhci, "QUIRK: Fresco Logic revision %u "
92 "has broken MSI implementation\n",
94 xhci->quirks |= XHCI_TRUST_TX_LENGTH;
97 if (pdev->vendor == PCI_VENDOR_ID_NEC)
98 xhci->quirks |= XHCI_NEC_HOST;
100 if (pdev->vendor == PCI_VENDOR_ID_AMD && xhci->hci_version == 0x96)
101 xhci->quirks |= XHCI_AMD_0x96_HOST;
104 if (pdev->vendor == PCI_VENDOR_ID_AMD && usb_amd_find_chipset_info())
105 xhci->quirks |= XHCI_AMD_PLL_FIX;
107 if (pdev->vendor == PCI_VENDOR_ID_AMD)
108 xhci->quirks |= XHCI_TRUST_TX_LENGTH;
110 if (pdev->vendor == PCI_VENDOR_ID_INTEL)
111 xhci->quirks |= XHCI_INTEL_HOST;
112 if (pdev->vendor == PCI_VENDOR_ID_INTEL)
113 xhci->quirks |= XHCI_AVOID_BEI;
114 if (pdev->vendor == PCI_VENDOR_ID_INTEL &&
115 pdev->device == PCI_DEVICE_ID_INTEL_PANTHERPOINT_XHCI) {
116 xhci->quirks |= XHCI_EP_LIMIT_QUIRK;
117 xhci->limit_active_eps = 64;
118 xhci->quirks |= XHCI_SW_BW_CHECKING;
120 * PPT desktop boards DH77EB and DH77DF will power back on after
121 * a few seconds of being shutdown. The fix for this is to
122 * switch the ports from xHCI to EHCI on shutdown. We can't use
123 * DMI information to find those particular boards (since each
124 * vendor will change the board name), so we have to key off all
127 xhci->quirks |= XHCI_SPURIOUS_REBOOT;
129 if (pdev->vendor == PCI_VENDOR_ID_INTEL &&
130 pdev->device == PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_XHCI) {
131 xhci->quirks |= XHCI_SPURIOUS_REBOOT;
132 xhci->quirks |= XHCI_SPURIOUS_WAKEUP;
134 if (pdev->vendor == PCI_VENDOR_ID_INTEL &&
135 (pdev->device == PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_XHCI ||
136 pdev->device == PCI_DEVICE_ID_INTEL_SUNRISEPOINT_H_XHCI ||
137 pdev->device == PCI_DEVICE_ID_INTEL_CHERRYVIEW_XHCI ||
138 pdev->device == PCI_DEVICE_ID_INTEL_BROXTON_M_XHCI ||
139 pdev->device == PCI_DEVICE_ID_INTEL_BROXTON_B_XHCI)) {
140 xhci->quirks |= XHCI_PME_STUCK_QUIRK;
142 if (pdev->vendor == PCI_VENDOR_ID_ETRON &&
143 pdev->device == PCI_DEVICE_ID_ASROCK_P67) {
144 xhci->quirks |= XHCI_RESET_ON_RESUME;
145 xhci_dbg(xhci, "QUIRK: Resetting on resume\n");
146 xhci->quirks |= XHCI_TRUST_TX_LENGTH;
148 if (pdev->vendor == PCI_VENDOR_ID_VIA)
149 xhci->quirks |= XHCI_RESET_ON_RESUME;
153 * Make sure PME works on some Intel xHCI controllers by writing 1 to clear
154 * the Internal PME flag bit in vendor specific PMCTRL register at offset 0x80a4
156 static void xhci_pme_quirk(struct xhci_hcd *xhci)
161 reg = (void __iomem *) xhci->cap_regs + 0x80a4;
163 writel(val | BIT(28), reg);
167 /* called during probe() after chip reset completes */
168 static int xhci_pci_setup(struct usb_hcd *hcd)
170 struct xhci_hcd *xhci;
171 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
174 retval = xhci_gen_setup(hcd, xhci_pci_quirks);
178 xhci = hcd_to_xhci(hcd);
179 if (!usb_hcd_is_primary_hcd(hcd))
182 pci_read_config_byte(pdev, XHCI_SBRN_OFFSET, &xhci->sbrn);
183 xhci_dbg(xhci, "Got SBRN %u\n", (unsigned int) xhci->sbrn);
185 /* Find any debug ports */
186 retval = xhci_pci_reinit(xhci, pdev);
195 * We need to register our own PCI probe function (instead of the USB core's
196 * function) in order to create a second roothub under xHCI.
198 static int xhci_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
201 struct xhci_hcd *xhci;
202 struct hc_driver *driver;
205 driver = (struct hc_driver *)id->driver_data;
206 /* Register the USB 2.0 roothub.
207 * FIXME: USB core must know to register the USB 2.0 roothub first.
208 * This is sort of silly, because we could just set the HCD driver flags
209 * to say USB 2.0, but I'm not sure what the implications would be in
210 * the other parts of the HCD code.
212 retval = usb_hcd_pci_probe(dev, id);
217 /* USB 2.0 roothub is stored in the PCI device now. */
218 hcd = dev_get_drvdata(&dev->dev);
219 xhci = hcd_to_xhci(hcd);
220 xhci->shared_hcd = usb_create_shared_hcd(driver, &dev->dev,
222 if (!xhci->shared_hcd) {
224 goto dealloc_usb2_hcd;
227 /* Set the xHCI pointer before xhci_pci_setup() (aka hcd_driver.reset)
228 * is called by usb_add_hcd().
230 *((struct xhci_hcd **) xhci->shared_hcd->hcd_priv) = xhci;
232 retval = usb_add_hcd(xhci->shared_hcd, dev->irq,
236 /* Roothub already marked as USB 3.0 speed */
240 usb_put_hcd(xhci->shared_hcd);
242 usb_hcd_pci_remove(dev);
246 static void xhci_pci_remove(struct pci_dev *dev)
248 struct xhci_hcd *xhci;
250 xhci = hcd_to_xhci(pci_get_drvdata(dev));
251 if (xhci->shared_hcd) {
252 usb_remove_hcd(xhci->shared_hcd);
253 usb_put_hcd(xhci->shared_hcd);
255 usb_hcd_pci_remove(dev);
257 /* Workaround for spurious wakeups at shutdown with HSW */
258 if (xhci->quirks & XHCI_SPURIOUS_WAKEUP)
259 pci_set_power_state(dev, PCI_D3hot);
265 static int xhci_pci_suspend(struct usb_hcd *hcd, bool do_wakeup)
267 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
270 if (hcd->state != HC_STATE_SUSPENDED ||
271 xhci->shared_hcd->state != HC_STATE_SUSPENDED)
274 if (xhci->quirks & XHCI_PME_STUCK_QUIRK)
275 xhci_pme_quirk(xhci);
277 retval = xhci_suspend(xhci, do_wakeup);
282 static int xhci_pci_resume(struct usb_hcd *hcd, bool hibernated)
284 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
285 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
288 /* The BIOS on systems with the Intel Panther Point chipset may or may
289 * not support xHCI natively. That means that during system resume, it
290 * may switch the ports back to EHCI so that users can use their
291 * keyboard to select a kernel from GRUB after resume from hibernate.
293 * The BIOS is supposed to remember whether the OS had xHCI ports
294 * enabled before resume, and switch the ports back to xHCI when the
295 * BIOS/OS semaphore is written, but we all know we can't trust BIOS
298 * Unconditionally switch the ports back to xHCI after a system resume.
299 * We can't tell whether the EHCI or xHCI controller will be resumed
300 * first, so we have to do the port switchover in both drivers. Writing
301 * a '1' to the port switchover registers should have no effect if the
302 * port was already switched over.
304 if (usb_is_intel_switchable_xhci(pdev))
305 usb_enable_xhci_ports(pdev);
307 if (xhci->quirks & XHCI_PME_STUCK_QUIRK)
308 xhci_pme_quirk(xhci);
310 retval = xhci_resume(xhci, hibernated);
313 #endif /* CONFIG_PM */
315 static const struct hc_driver xhci_pci_hc_driver = {
316 .description = hcd_name,
317 .product_desc = "xHCI Host Controller",
318 .hcd_priv_size = sizeof(struct xhci_hcd *),
321 * generic hardware linkage
324 .flags = HCD_MEMORY | HCD_USB3 | HCD_SHARED,
327 * basic lifecycle operations
329 .reset = xhci_pci_setup,
332 .pci_suspend = xhci_pci_suspend,
333 .pci_resume = xhci_pci_resume,
336 .shutdown = xhci_shutdown,
339 * managing i/o requests and associated device resources
341 .urb_enqueue = xhci_urb_enqueue,
342 .urb_dequeue = xhci_urb_dequeue,
343 .alloc_dev = xhci_alloc_dev,
344 .free_dev = xhci_free_dev,
345 .alloc_streams = xhci_alloc_streams,
346 .free_streams = xhci_free_streams,
347 .add_endpoint = xhci_add_endpoint,
348 .drop_endpoint = xhci_drop_endpoint,
349 .endpoint_reset = xhci_endpoint_reset,
350 .check_bandwidth = xhci_check_bandwidth,
351 .reset_bandwidth = xhci_reset_bandwidth,
352 .address_device = xhci_address_device,
353 .update_hub_device = xhci_update_hub_device,
354 .reset_device = xhci_discover_or_reset_device,
359 .get_frame_number = xhci_get_frame,
361 /* Root hub support */
362 .hub_control = xhci_hub_control,
363 .hub_status_data = xhci_hub_status_data,
364 .bus_suspend = xhci_bus_suspend,
365 .bus_resume = xhci_bus_resume,
367 * call back when device connected and addressed
369 .update_device = xhci_update_device,
370 .set_usb2_hw_lpm = xhci_set_usb2_hardware_lpm,
373 /*-------------------------------------------------------------------------*/
375 /* PCI driver selection metadata; PCI hotplugging uses this */
376 static const struct pci_device_id pci_ids[] = { {
377 /* handle any USB 3.0 xHCI controller */
378 PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_XHCI, ~0),
379 .driver_data = (unsigned long) &xhci_pci_hc_driver,
381 { /* end: all zeroes */ }
383 MODULE_DEVICE_TABLE(pci, pci_ids);
385 /* pci driver glue; this is a "new style" PCI driver module */
386 static struct pci_driver xhci_pci_driver = {
387 .name = (char *) hcd_name,
390 .probe = xhci_pci_probe,
391 .remove = xhci_pci_remove,
392 /* suspend and resume implemented later */
394 .shutdown = usb_hcd_pci_shutdown,
397 .pm = &usb_hcd_pci_pm_ops
402 int __init xhci_register_pci(void)
404 return pci_register_driver(&xhci_pci_driver);
407 void __exit xhci_unregister_pci(void)
409 pci_unregister_driver(&xhci_pci_driver);