2 * Universal Host Controller Interface driver for USB.
4 * Maintainer: Alan Stern <stern@rowland.harvard.edu>
6 * (C) Copyright 1999 Linus Torvalds
7 * (C) Copyright 1999-2002 Johannes Erdfelt, johannes@erdfelt.com
8 * (C) Copyright 1999 Randy Dunlap
9 * (C) Copyright 1999 Georg Acher, acher@in.tum.de
10 * (C) Copyright 1999 Deti Fliegl, deti@fliegl.de
11 * (C) Copyright 1999 Thomas Sailer, sailer@ife.ee.ethz.ch
12 * (C) Copyright 1999 Roman Weissgaerber, weissg@vienna.at
13 * (C) Copyright 2000 Yggdrasil Computing, Inc. (port of new PCI interface
14 * support from usb-ohci.c by Adam Richter, adam@yggdrasil.com).
15 * (C) Copyright 1999 Gregory P. Smith (from usb-ohci.c)
16 * (C) Copyright 2004-2007 Alan Stern, stern@rowland.harvard.edu
18 * Intel documents this fairly well, and as far as I know there
19 * are no royalties or anything like that, but even so there are
20 * people who decided that they want to do the same thing in a
21 * completely different way.
25 #include <linux/module.h>
26 #include <linux/pci.h>
27 #include <linux/kernel.h>
28 #include <linux/init.h>
29 #include <linux/delay.h>
30 #include <linux/ioport.h>
31 #include <linux/slab.h>
32 #include <linux/errno.h>
33 #include <linux/unistd.h>
34 #include <linux/interrupt.h>
35 #include <linux/spinlock.h>
36 #include <linux/debugfs.h>
38 #include <linux/dmapool.h>
39 #include <linux/dma-mapping.h>
40 #include <linux/usb.h>
41 #include <linux/usb/hcd.h>
42 #include <linux/bitops.h>
43 #include <linux/dmi.h>
45 #include <asm/uaccess.h>
48 #include <asm/system.h>
51 #include "pci-quirks.h"
56 #define DRIVER_AUTHOR "Linus 'Frodo Rabbit' Torvalds, Johannes Erdfelt, \
57 Randy Dunlap, Georg Acher, Deti Fliegl, Thomas Sailer, Roman Weissgaerber, \
59 #define DRIVER_DESC "USB Universal Host Controller Interface driver"
61 /* for flakey hardware, ignore overcurrent indicators */
63 module_param(ignore_oc, bool, S_IRUGO);
64 MODULE_PARM_DESC(ignore_oc, "ignore hardware overcurrent indications");
67 * debug = 0, no debugging messages
68 * debug = 1, dump failed URBs except for stalls
69 * debug = 2, dump all failed URBs (including stalls)
70 * show all queues in /sys/kernel/debug/uhci/[pci_addr]
71 * debug = 3, show all TDs in URBs when dumping
74 #define DEBUG_CONFIGURED 1
76 module_param(debug, int, S_IRUGO | S_IWUSR);
77 MODULE_PARM_DESC(debug, "Debug level");
80 #define DEBUG_CONFIGURED 0
85 #define ERRBUF_LEN (32 * 1024)
87 static struct kmem_cache *uhci_up_cachep; /* urb_priv */
89 static void suspend_rh(struct uhci_hcd *uhci, enum uhci_rh_state new_state);
90 static void wakeup_rh(struct uhci_hcd *uhci);
91 static void uhci_get_current_frame_number(struct uhci_hcd *uhci);
94 * Calculate the link pointer DMA value for the first Skeleton QH in a frame.
96 static __le32 uhci_frame_skel_link(struct uhci_hcd *uhci, int frame)
101 * The interrupt queues will be interleaved as evenly as possible.
102 * There's not much to be done about period-1 interrupts; they have
103 * to occur in every frame. But we can schedule period-2 interrupts
104 * in odd-numbered frames, period-4 interrupts in frames congruent
105 * to 2 (mod 4), and so on. This way each frame only has two
106 * interrupt QHs, which will help spread out bandwidth utilization.
108 * ffs (Find First bit Set) does exactly what we need:
109 * 1,3,5,... => ffs = 0 => use period-2 QH = skelqh[8],
110 * 2,6,10,... => ffs = 1 => use period-4 QH = skelqh[7], etc.
111 * ffs >= 7 => not on any high-period queue, so use
112 * period-1 QH = skelqh[9].
113 * Add in UHCI_NUMFRAMES to insure at least one bit is set.
115 skelnum = 8 - (int) __ffs(frame | UHCI_NUMFRAMES);
118 return LINK_TO_QH(uhci->skelqh[skelnum]);
121 #include "uhci-debug.c"
123 #include "uhci-hub.c"
126 * Finish up a host controller reset and update the recorded state.
128 static void finish_reset(struct uhci_hcd *uhci)
132 /* HCRESET doesn't affect the Suspend, Reset, and Resume Detect
133 * bits in the port status and control registers.
134 * We have to clear them by hand.
136 for (port = 0; port < uhci->rh_numports; ++port)
137 outw(0, uhci->io_addr + USBPORTSC1 + (port * 2));
139 uhci->port_c_suspend = uhci->resuming_ports = 0;
140 uhci->rh_state = UHCI_RH_RESET;
141 uhci->is_stopped = UHCI_IS_STOPPED;
142 clear_bit(HCD_FLAG_POLL_RH, &uhci_to_hcd(uhci)->flags);
144 uhci->dead = 0; /* Full reset resurrects the controller */
148 * Last rites for a defunct/nonfunctional controller
149 * or one we don't want to use any more.
151 static void uhci_hc_died(struct uhci_hcd *uhci)
153 uhci_get_current_frame_number(uhci);
154 uhci_reset_hc(to_pci_dev(uhci_dev(uhci)), uhci->io_addr);
158 /* The current frame may already be partway finished */
159 ++uhci->frame_number;
163 * Initialize a controller that was newly discovered or has lost power
164 * or otherwise been reset while it was suspended. In none of these cases
165 * can we be sure of its previous state.
167 static void check_and_reset_hc(struct uhci_hcd *uhci)
169 if (uhci_check_and_reset_hc(to_pci_dev(uhci_dev(uhci)), uhci->io_addr))
174 * Store the basic register settings needed by the controller.
176 static void configure_hc(struct uhci_hcd *uhci)
178 struct pci_dev *pdev = to_pci_dev(uhci_dev(uhci));
180 /* Set the frame length to the default: 1 ms exactly */
181 outb(USBSOF_DEFAULT, uhci->io_addr + USBSOF);
183 /* Store the frame list base address */
184 outl(uhci->frame_dma_handle, uhci->io_addr + USBFLBASEADD);
186 /* Set the current frame number */
187 outw(uhci->frame_number & UHCI_MAX_SOF_NUMBER,
188 uhci->io_addr + USBFRNUM);
191 pci_write_config_word(pdev, USBLEGSUP, USBLEGSUP_DEFAULT);
193 /* Disable platform-specific non-PME# wakeup */
194 if (pdev->vendor == PCI_VENDOR_ID_INTEL)
195 pci_write_config_byte(pdev, USBRES_INTEL, 0);
199 static int resume_detect_interrupts_are_broken(struct uhci_hcd *uhci)
203 /* If we have to ignore overcurrent events then almost by definition
204 * we can't depend on resume-detect interrupts. */
208 switch (to_pci_dev(uhci_dev(uhci))->vendor) {
212 case PCI_VENDOR_ID_GENESYS:
213 /* Genesys Logic's GL880S controllers don't generate
214 * resume-detect interrupts.
218 case PCI_VENDOR_ID_INTEL:
219 /* Some of Intel's USB controllers have a bug that causes
220 * resume-detect interrupts if any port has an over-current
221 * condition. To make matters worse, some motherboards
222 * hardwire unused USB ports' over-current inputs active!
223 * To prevent problems, we will not enable resume-detect
224 * interrupts if any ports are OC.
226 for (port = 0; port < uhci->rh_numports; ++port) {
227 if (inw(uhci->io_addr + USBPORTSC1 + port * 2) &
236 static int global_suspend_mode_is_broken(struct uhci_hcd *uhci)
239 const char *sys_info;
240 static char bad_Asus_board[] = "A7V8X";
242 /* One of Asus's motherboards has a bug which causes it to
243 * wake up immediately from suspend-to-RAM if any of the ports
244 * are connected. In such cases we will not set EGSM.
246 sys_info = dmi_get_system_info(DMI_BOARD_NAME);
247 if (sys_info && !strcmp(sys_info, bad_Asus_board)) {
248 for (port = 0; port < uhci->rh_numports; ++port) {
249 if (inw(uhci->io_addr + USBPORTSC1 + port * 2) &
258 static void suspend_rh(struct uhci_hcd *uhci, enum uhci_rh_state new_state)
259 __releases(uhci->lock)
260 __acquires(uhci->lock)
263 int int_enable, egsm_enable, wakeup_enable;
264 struct usb_device *rhdev = uhci_to_hcd(uhci)->self.root_hub;
266 auto_stop = (new_state == UHCI_RH_AUTO_STOPPED);
267 dev_dbg(&rhdev->dev, "%s%s\n", __func__,
268 (auto_stop ? " (auto-stop)" : ""));
270 /* Start off by assuming Resume-Detect interrupts and EGSM work
271 * and that remote wakeups should be enabled.
273 egsm_enable = USBCMD_EGSM;
275 int_enable = USBINTR_RESUME;
278 /* In auto-stop mode wakeups must always be detected, but
279 * Resume-Detect interrupts may be prohibited. (In the absence
280 * of CONFIG_PM, they are always disallowed.)
283 if (!device_may_wakeup(&rhdev->dev))
286 /* In bus-suspend mode wakeups may be disabled, but if they are
287 * allowed then so are Resume-Detect interrupts.
291 if (!rhdev->do_remote_wakeup)
296 /* EGSM causes the root hub to echo a 'K' signal (resume) out any
297 * port which requests a remote wakeup. According to the USB spec,
298 * every hub is supposed to do this. But if we are ignoring
299 * remote-wakeup requests anyway then there's no point to it.
300 * We also shouldn't enable EGSM if it's broken.
302 if (!wakeup_enable || global_suspend_mode_is_broken(uhci))
305 /* If we're ignoring wakeup events then there's no reason to
306 * enable Resume-Detect interrupts. We also shouldn't enable
307 * them if they are broken or disallowed.
309 * This logic may lead us to enabling RD but not EGSM. The UHCI
310 * spec foolishly says that RD works only when EGSM is on, but
311 * there's no harm in enabling it anyway -- perhaps some chips
314 if (!wakeup_enable || resume_detect_interrupts_are_broken(uhci) ||
316 uhci->RD_enable = int_enable = 0;
318 outw(int_enable, uhci->io_addr + USBINTR);
319 outw(egsm_enable | USBCMD_CF, uhci->io_addr + USBCMD);
323 /* If we're auto-stopping then no devices have been attached
324 * for a while, so there shouldn't be any active URBs and the
325 * controller should stop after a few microseconds. Otherwise
326 * we will give the controller one frame to stop.
328 if (!auto_stop && !(inw(uhci->io_addr + USBSTS) & USBSTS_HCH)) {
329 uhci->rh_state = UHCI_RH_SUSPENDING;
330 spin_unlock_irq(&uhci->lock);
332 spin_lock_irq(&uhci->lock);
336 if (!(inw(uhci->io_addr + USBSTS) & USBSTS_HCH))
337 dev_warn(uhci_dev(uhci), "Controller not stopped yet!\n");
339 uhci_get_current_frame_number(uhci);
341 uhci->rh_state = new_state;
342 uhci->is_stopped = UHCI_IS_STOPPED;
344 /* If interrupts don't work and remote wakeup is enabled then
345 * the suspended root hub needs to be polled.
347 if (!int_enable && wakeup_enable)
348 set_bit(HCD_FLAG_POLL_RH, &uhci_to_hcd(uhci)->flags);
350 clear_bit(HCD_FLAG_POLL_RH, &uhci_to_hcd(uhci)->flags);
352 uhci_scan_schedule(uhci);
356 static void start_rh(struct uhci_hcd *uhci)
358 uhci->is_stopped = 0;
360 /* Mark it configured and running with a 64-byte max packet.
361 * All interrupts are enabled, even though RESUME won't do anything.
363 outw(USBCMD_RS | USBCMD_CF | USBCMD_MAXP, uhci->io_addr + USBCMD);
364 outw(USBINTR_TIMEOUT | USBINTR_RESUME | USBINTR_IOC | USBINTR_SP,
365 uhci->io_addr + USBINTR);
367 uhci->rh_state = UHCI_RH_RUNNING;
368 set_bit(HCD_FLAG_POLL_RH, &uhci_to_hcd(uhci)->flags);
371 static void wakeup_rh(struct uhci_hcd *uhci)
372 __releases(uhci->lock)
373 __acquires(uhci->lock)
375 dev_dbg(&uhci_to_hcd(uhci)->self.root_hub->dev,
377 uhci->rh_state == UHCI_RH_AUTO_STOPPED ?
378 " (auto-start)" : "");
380 /* If we are auto-stopped then no devices are attached so there's
381 * no need for wakeup signals. Otherwise we send Global Resume
384 if (uhci->rh_state == UHCI_RH_SUSPENDED) {
387 /* Keep EGSM on if it was set before */
388 egsm = inw(uhci->io_addr + USBCMD) & USBCMD_EGSM;
389 uhci->rh_state = UHCI_RH_RESUMING;
390 outw(USBCMD_FGR | USBCMD_CF | egsm, uhci->io_addr + USBCMD);
391 spin_unlock_irq(&uhci->lock);
393 spin_lock_irq(&uhci->lock);
397 /* End Global Resume and wait for EOP to be sent */
398 outw(USBCMD_CF, uhci->io_addr + USBCMD);
401 if (inw(uhci->io_addr + USBCMD) & USBCMD_FGR)
402 dev_warn(uhci_dev(uhci), "FGR not stopped yet!\n");
407 /* Restart root hub polling */
408 mod_timer(&uhci_to_hcd(uhci)->rh_timer, jiffies);
411 static irqreturn_t uhci_irq(struct usb_hcd *hcd)
413 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
414 unsigned short status;
417 * Read the interrupt status, and write it back to clear the
418 * interrupt cause. Contrary to the UHCI specification, the
419 * "HC Halted" status bit is persistent: it is RO, not R/WC.
421 status = inw(uhci->io_addr + USBSTS);
422 if (!(status & ~USBSTS_HCH)) /* shared interrupt, not mine */
424 outw(status, uhci->io_addr + USBSTS); /* Clear it */
426 if (status & ~(USBSTS_USBINT | USBSTS_ERROR | USBSTS_RD)) {
427 if (status & USBSTS_HSE)
428 dev_err(uhci_dev(uhci), "host system error, "
430 if (status & USBSTS_HCPE)
431 dev_err(uhci_dev(uhci), "host controller process "
432 "error, something bad happened!\n");
433 if (status & USBSTS_HCH) {
434 spin_lock(&uhci->lock);
435 if (uhci->rh_state >= UHCI_RH_RUNNING) {
436 dev_err(uhci_dev(uhci),
437 "host controller halted, "
439 if (debug > 1 && errbuf) {
440 /* Print the schedule for debugging */
441 uhci_sprint_schedule(uhci,
448 /* Force a callback in case there are
450 mod_timer(&hcd->rh_timer, jiffies);
452 spin_unlock(&uhci->lock);
456 if (status & USBSTS_RD)
457 usb_hcd_poll_rh_status(hcd);
459 spin_lock(&uhci->lock);
460 uhci_scan_schedule(uhci);
461 spin_unlock(&uhci->lock);
468 * Store the current frame number in uhci->frame_number if the controller
469 * is running. Expand from 11 bits (of which we use only 10) to a
470 * full-sized integer.
472 * Like many other parts of the driver, this code relies on being polled
473 * more than once per second as long as the controller is running.
475 static void uhci_get_current_frame_number(struct uhci_hcd *uhci)
477 if (!uhci->is_stopped) {
480 delta = (inw(uhci->io_addr + USBFRNUM) - uhci->frame_number) &
481 (UHCI_NUMFRAMES - 1);
482 uhci->frame_number += delta;
487 * De-allocate all resources
489 static void release_uhci(struct uhci_hcd *uhci)
493 if (DEBUG_CONFIGURED) {
494 spin_lock_irq(&uhci->lock);
495 uhci->is_initialized = 0;
496 spin_unlock_irq(&uhci->lock);
498 debugfs_remove(uhci->dentry);
501 for (i = 0; i < UHCI_NUM_SKELQH; i++)
502 uhci_free_qh(uhci, uhci->skelqh[i]);
504 uhci_free_td(uhci, uhci->term_td);
506 dma_pool_destroy(uhci->qh_pool);
508 dma_pool_destroy(uhci->td_pool);
510 kfree(uhci->frame_cpu);
512 dma_free_coherent(uhci_dev(uhci),
513 UHCI_NUMFRAMES * sizeof(*uhci->frame),
514 uhci->frame, uhci->frame_dma_handle);
517 static int uhci_init(struct usb_hcd *hcd)
519 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
520 unsigned io_size = (unsigned) hcd->rsrc_len;
523 uhci->io_addr = (unsigned long) hcd->rsrc_start;
525 /* The UHCI spec says devices must have 2 ports, and goes on to say
526 * they may have more but gives no way to determine how many there
527 * are. However according to the UHCI spec, Bit 7 of the port
528 * status and control register is always set to 1. So we try to
529 * use this to our advantage. Another common failure mode when
530 * a nonexistent register is addressed is to return all ones, so
531 * we test for that also.
533 for (port = 0; port < (io_size - USBPORTSC1) / 2; port++) {
534 unsigned int portstatus;
536 portstatus = inw(uhci->io_addr + USBPORTSC1 + (port * 2));
537 if (!(portstatus & 0x0080) || portstatus == 0xffff)
541 dev_info(uhci_dev(uhci), "detected %d ports\n", port);
543 /* Anything greater than 7 is weird so we'll ignore it. */
544 if (port > UHCI_RH_MAXCHILD) {
545 dev_info(uhci_dev(uhci), "port count misdetected? "
546 "forcing to 2 ports\n");
549 uhci->rh_numports = port;
551 /* Kick BIOS off this hardware and reset if the controller
552 * isn't already safely quiescent.
554 check_and_reset_hc(uhci);
558 /* Make sure the controller is quiescent and that we're not using it
559 * any more. This is mainly for the benefit of programs which, like kexec,
560 * expect the hardware to be idle: not doing DMA or generating IRQs.
562 * This routine may be called in a damaged or failing kernel. Hence we
563 * do not acquire the spinlock before shutting down the controller.
565 static void uhci_shutdown(struct pci_dev *pdev)
567 struct usb_hcd *hcd = pci_get_drvdata(pdev);
569 uhci_hc_died(hcd_to_uhci(hcd));
573 * Allocate a frame list, and then setup the skeleton
575 * The hardware doesn't really know any difference
576 * in the queues, but the order does matter for the
577 * protocols higher up. The order in which the queues
578 * are encountered by the hardware is:
580 * - All isochronous events are handled before any
581 * of the queues. We don't do that here, because
582 * we'll create the actual TD entries on demand.
583 * - The first queue is the high-period interrupt queue.
584 * - The second queue is the period-1 interrupt and async
585 * (low-speed control, full-speed control, then bulk) queue.
586 * - The third queue is the terminating bandwidth reclamation queue,
587 * which contains no members, loops back to itself, and is present
588 * only when FSBR is on and there are no full-speed control or bulk QHs.
590 static int uhci_start(struct usb_hcd *hcd)
592 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
595 struct dentry __maybe_unused *dentry;
597 hcd->uses_new_polling = 1;
599 spin_lock_init(&uhci->lock);
600 setup_timer(&uhci->fsbr_timer, uhci_fsbr_timeout,
601 (unsigned long) uhci);
602 INIT_LIST_HEAD(&uhci->idle_qh_list);
603 init_waitqueue_head(&uhci->waitqh);
605 #ifdef UHCI_DEBUG_OPS
606 dentry = debugfs_create_file(hcd->self.bus_name,
607 S_IFREG|S_IRUGO|S_IWUSR, uhci_debugfs_root,
608 uhci, &uhci_debug_operations);
610 dev_err(uhci_dev(uhci), "couldn't create uhci debugfs entry\n");
613 uhci->dentry = dentry;
616 uhci->frame = dma_alloc_coherent(uhci_dev(uhci),
617 UHCI_NUMFRAMES * sizeof(*uhci->frame),
618 &uhci->frame_dma_handle, 0);
620 dev_err(uhci_dev(uhci), "unable to allocate "
621 "consistent memory for frame list\n");
622 goto err_alloc_frame;
624 memset(uhci->frame, 0, UHCI_NUMFRAMES * sizeof(*uhci->frame));
626 uhci->frame_cpu = kcalloc(UHCI_NUMFRAMES, sizeof(*uhci->frame_cpu),
628 if (!uhci->frame_cpu) {
629 dev_err(uhci_dev(uhci), "unable to allocate "
630 "memory for frame pointers\n");
631 goto err_alloc_frame_cpu;
634 uhci->td_pool = dma_pool_create("uhci_td", uhci_dev(uhci),
635 sizeof(struct uhci_td), 16, 0);
636 if (!uhci->td_pool) {
637 dev_err(uhci_dev(uhci), "unable to create td dma_pool\n");
638 goto err_create_td_pool;
641 uhci->qh_pool = dma_pool_create("uhci_qh", uhci_dev(uhci),
642 sizeof(struct uhci_qh), 16, 0);
643 if (!uhci->qh_pool) {
644 dev_err(uhci_dev(uhci), "unable to create qh dma_pool\n");
645 goto err_create_qh_pool;
648 uhci->term_td = uhci_alloc_td(uhci);
649 if (!uhci->term_td) {
650 dev_err(uhci_dev(uhci), "unable to allocate terminating TD\n");
651 goto err_alloc_term_td;
654 for (i = 0; i < UHCI_NUM_SKELQH; i++) {
655 uhci->skelqh[i] = uhci_alloc_qh(uhci, NULL, NULL);
656 if (!uhci->skelqh[i]) {
657 dev_err(uhci_dev(uhci), "unable to allocate QH\n");
658 goto err_alloc_skelqh;
663 * 8 Interrupt queues; link all higher int queues to int1 = async
665 for (i = SKEL_ISO + 1; i < SKEL_ASYNC; ++i)
666 uhci->skelqh[i]->link = LINK_TO_QH(uhci->skel_async_qh);
667 uhci->skel_async_qh->link = UHCI_PTR_TERM;
668 uhci->skel_term_qh->link = LINK_TO_QH(uhci->skel_term_qh);
670 /* This dummy TD is to work around a bug in Intel PIIX controllers */
671 uhci_fill_td(uhci->term_td, 0, uhci_explen(0) |
672 (0x7f << TD_TOKEN_DEVADDR_SHIFT) | USB_PID_IN, 0);
673 uhci->term_td->link = UHCI_PTR_TERM;
674 uhci->skel_async_qh->element = uhci->skel_term_qh->element =
675 LINK_TO_TD(uhci->term_td);
678 * Fill the frame list: make all entries point to the proper
681 for (i = 0; i < UHCI_NUMFRAMES; i++) {
683 /* Only place we don't use the frame list routines */
684 uhci->frame[i] = uhci_frame_skel_link(uhci, i);
688 * Some architectures require a full mb() to enforce completion of
689 * the memory writes above before the I/O transfers in configure_hc().
694 uhci->is_initialized = 1;
695 spin_lock_irq(&uhci->lock);
697 spin_unlock_irq(&uhci->lock);
704 for (i = 0; i < UHCI_NUM_SKELQH; i++) {
706 uhci_free_qh(uhci, uhci->skelqh[i]);
709 uhci_free_td(uhci, uhci->term_td);
712 dma_pool_destroy(uhci->qh_pool);
715 dma_pool_destroy(uhci->td_pool);
718 kfree(uhci->frame_cpu);
721 dma_free_coherent(uhci_dev(uhci),
722 UHCI_NUMFRAMES * sizeof(*uhci->frame),
723 uhci->frame, uhci->frame_dma_handle);
726 debugfs_remove(uhci->dentry);
731 static void uhci_stop(struct usb_hcd *hcd)
733 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
735 spin_lock_irq(&uhci->lock);
736 if (HCD_HW_ACCESSIBLE(hcd) && !uhci->dead)
738 uhci_scan_schedule(uhci);
739 spin_unlock_irq(&uhci->lock);
740 synchronize_irq(hcd->irq);
742 del_timer_sync(&uhci->fsbr_timer);
747 static int uhci_rh_suspend(struct usb_hcd *hcd)
749 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
752 spin_lock_irq(&uhci->lock);
753 if (!HCD_HW_ACCESSIBLE(hcd))
756 ; /* Dead controllers tell no tales */
758 /* Once the controller is stopped, port resumes that are already
759 * in progress won't complete. Hence if remote wakeup is enabled
760 * for the root hub and any ports are in the middle of a resume or
761 * remote wakeup, we must fail the suspend.
763 else if (hcd->self.root_hub->do_remote_wakeup &&
764 uhci->resuming_ports) {
765 dev_dbg(uhci_dev(uhci), "suspend failed because a port "
769 suspend_rh(uhci, UHCI_RH_SUSPENDED);
770 spin_unlock_irq(&uhci->lock);
774 static int uhci_rh_resume(struct usb_hcd *hcd)
776 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
779 spin_lock_irq(&uhci->lock);
780 if (!HCD_HW_ACCESSIBLE(hcd))
782 else if (!uhci->dead)
784 spin_unlock_irq(&uhci->lock);
788 static int uhci_pci_suspend(struct usb_hcd *hcd, bool do_wakeup)
790 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
791 struct pci_dev *pdev = to_pci_dev(uhci_dev(uhci));
794 dev_dbg(uhci_dev(uhci), "%s\n", __func__);
796 spin_lock_irq(&uhci->lock);
797 if (!HCD_HW_ACCESSIBLE(hcd) || uhci->dead)
798 goto done_okay; /* Already suspended or dead */
800 if (uhci->rh_state > UHCI_RH_SUSPENDED) {
801 dev_warn(uhci_dev(uhci), "Root hub isn't suspended!\n");
806 /* All PCI host controllers are required to disable IRQ generation
807 * at the source, so we must turn off PIRQ.
809 pci_write_config_word(pdev, USBLEGSUP, 0);
810 clear_bit(HCD_FLAG_POLL_RH, &hcd->flags);
812 /* Enable platform-specific non-PME# wakeup */
814 if (pdev->vendor == PCI_VENDOR_ID_INTEL)
815 pci_write_config_byte(pdev, USBRES_INTEL,
816 USBPORT1EN | USBPORT2EN);
820 clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
822 spin_unlock_irq(&uhci->lock);
826 static int uhci_pci_resume(struct usb_hcd *hcd, bool hibernated)
828 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
830 dev_dbg(uhci_dev(uhci), "%s\n", __func__);
832 /* Since we aren't in D3 any more, it's safe to set this flag
833 * even if the controller was dead.
835 set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
837 spin_lock_irq(&uhci->lock);
839 /* Make sure resume from hibernation re-enumerates everything */
843 /* The firmware or a boot kernel may have changed the controller
844 * settings during a system wakeup. Check it and reconfigure
847 check_and_reset_hc(uhci);
849 /* If the controller was dead before, it's back alive now */
852 /* Tell the core if the controller had to be reset */
853 if (uhci->rh_state == UHCI_RH_RESET)
854 usb_root_hub_lost_power(hcd->self.root_hub);
856 spin_unlock_irq(&uhci->lock);
858 /* If interrupts don't work and remote wakeup is enabled then
859 * the suspended root hub needs to be polled.
861 if (!uhci->RD_enable && hcd->self.root_hub->do_remote_wakeup)
862 set_bit(HCD_FLAG_POLL_RH, &hcd->flags);
864 /* Does the root hub have a port wakeup pending? */
865 usb_hcd_poll_rh_status(hcd);
870 /* Wait until a particular device/endpoint's QH is idle, and free it */
871 static void uhci_hcd_endpoint_disable(struct usb_hcd *hcd,
872 struct usb_host_endpoint *hep)
874 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
877 spin_lock_irq(&uhci->lock);
878 qh = (struct uhci_qh *) hep->hcpriv;
882 while (qh->state != QH_STATE_IDLE) {
884 spin_unlock_irq(&uhci->lock);
885 wait_event_interruptible(uhci->waitqh,
886 qh->state == QH_STATE_IDLE);
887 spin_lock_irq(&uhci->lock);
891 uhci_free_qh(uhci, qh);
893 spin_unlock_irq(&uhci->lock);
896 static int uhci_hcd_get_frame_number(struct usb_hcd *hcd)
898 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
899 unsigned frame_number;
902 /* Minimize latency by avoiding the spinlock */
903 frame_number = uhci->frame_number;
905 delta = (inw(uhci->io_addr + USBFRNUM) - frame_number) &
906 (UHCI_NUMFRAMES - 1);
907 return frame_number + delta;
910 static const char hcd_name[] = "uhci_hcd";
912 static const struct hc_driver uhci_driver = {
913 .description = hcd_name,
914 .product_desc = "UHCI Host Controller",
915 .hcd_priv_size = sizeof(struct uhci_hcd),
917 /* Generic hardware linkage */
921 /* Basic lifecycle operations */
925 .pci_suspend = uhci_pci_suspend,
926 .pci_resume = uhci_pci_resume,
927 .bus_suspend = uhci_rh_suspend,
928 .bus_resume = uhci_rh_resume,
932 .urb_enqueue = uhci_urb_enqueue,
933 .urb_dequeue = uhci_urb_dequeue,
935 .endpoint_disable = uhci_hcd_endpoint_disable,
936 .get_frame_number = uhci_hcd_get_frame_number,
938 .hub_status_data = uhci_hub_status_data,
939 .hub_control = uhci_hub_control,
942 static const struct pci_device_id uhci_pci_ids[] = { {
943 /* handle any USB UHCI controller */
944 PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_UHCI, ~0),
945 .driver_data = (unsigned long) &uhci_driver,
946 }, { /* end: all zeroes */ }
949 MODULE_DEVICE_TABLE(pci, uhci_pci_ids);
951 static struct pci_driver uhci_pci_driver = {
952 .name = (char *)hcd_name,
953 .id_table = uhci_pci_ids,
955 .probe = usb_hcd_pci_probe,
956 .remove = usb_hcd_pci_remove,
957 .shutdown = uhci_shutdown,
959 #ifdef CONFIG_PM_SLEEP
961 .pm = &usb_hcd_pci_pm_ops
966 static int __init uhci_hcd_init(void)
968 int retval = -ENOMEM;
973 printk(KERN_INFO "uhci_hcd: " DRIVER_DESC "%s\n",
974 ignore_oc ? ", overcurrent ignored" : "");
975 set_bit(USB_UHCI_LOADED, &usb_hcds_loaded);
977 if (DEBUG_CONFIGURED) {
978 errbuf = kmalloc(ERRBUF_LEN, GFP_KERNEL);
981 uhci_debugfs_root = debugfs_create_dir("uhci", usb_debug_root);
982 if (!uhci_debugfs_root)
986 uhci_up_cachep = kmem_cache_create("uhci_urb_priv",
987 sizeof(struct urb_priv), 0, 0, NULL);
991 retval = pci_register_driver(&uhci_pci_driver);
998 kmem_cache_destroy(uhci_up_cachep);
1001 debugfs_remove(uhci_debugfs_root);
1008 clear_bit(USB_UHCI_LOADED, &usb_hcds_loaded);
1012 static void __exit uhci_hcd_cleanup(void)
1014 pci_unregister_driver(&uhci_pci_driver);
1015 kmem_cache_destroy(uhci_up_cachep);
1016 debugfs_remove(uhci_debugfs_root);
1018 clear_bit(USB_UHCI_LOADED, &usb_hcds_loaded);
1021 module_init(uhci_hcd_init);
1022 module_exit(uhci_hcd_cleanup);
1024 MODULE_AUTHOR(DRIVER_AUTHOR);
1025 MODULE_DESCRIPTION(DRIVER_DESC);
1026 MODULE_LICENSE("GPL");