2 * Copyright (c) 2010 Broadcom Corporation
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
11 * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
13 * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
14 * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16 #include <linux/kernel.h>
17 #include <linux/string.h>
20 #include <linux/module.h>
21 #include <linux/pci.h>
27 #include <bcmendian.h>
31 #include <bcmsrom_tbl.h>
43 #include <sbsdpcmdev.h>
46 #include <proto/ethernet.h> /* for sprom content groking */
48 #define BS_ERROR(args)
50 #define SROM_OFFSET(sih) ((sih->ccrev > 31) ? \
51 (((sih->cccaps & CC_CAP_SROM) == 0) ? NULL : \
52 ((u8 *)curmap + PCI_16KB0_CCREGS_OFFSET + CC_SROM_OTP)) : \
53 ((u8 *)curmap + PCI_BAR0_SPROM_OFFSET))
56 #define WRITE_ENABLE_DELAY 500 /* 500 ms after write enable/disable toggle */
57 #define WRITE_WORD_DELAY 20 /* 20 ms between each word write */
60 typedef struct varbuf {
61 char *base; /* pointer to buffer base */
62 char *buf; /* pointer to current position */
63 unsigned int size; /* current (residual) size in bytes */
68 #define SROM_CIS_SINGLE 1
70 static int initvars_srom_si(si_t *sih, struct osl_info *osh, void *curmap,
71 char **vars, uint *count);
72 static void _initvars_srom_pci(u8 sromrev, u16 *srom, uint off,
74 static int initvars_srom_pci(si_t *sih, void *curmap, char **vars,
76 static int initvars_flash_si(si_t *sih, char **vars, uint *count);
78 static int initvars_cis_sdio(struct osl_info *osh, char **vars, uint *count);
79 static int sprom_cmd_sdio(struct osl_info *osh, u8 cmd);
80 static int sprom_read_sdio(struct osl_info *osh, u16 addr, u16 *data);
82 static int sprom_read_pci(struct osl_info *osh, si_t *sih, u16 *sprom,
83 uint wordoff, u16 *buf, uint nwords, bool check_crc);
84 #if defined(BCMNVRAMR)
85 static int otp_read_pci(struct osl_info *osh, si_t *sih, u16 *buf, uint bufsz);
87 static u16 srom_cc_cmd(si_t *sih, struct osl_info *osh, void *ccregs, u32 cmd,
88 uint wordoff, u16 data);
90 static int initvars_table(struct osl_info *osh, char *start, char *end,
91 char **vars, uint *count);
92 static int initvars_flash(si_t *sih, struct osl_info *osh, char **vp,
95 /* Initialization of varbuf structure */
96 static void varbuf_init(varbuf_t *b, char *buf, uint size)
99 b->base = b->buf = buf;
102 /* append a null terminated var=value string */
103 static int varbuf_append(varbuf_t *b, const char *fmt, ...)
114 r = vsnprintf(b->buf, b->size, fmt, ap);
117 /* C99 snprintf behavior returns r >= size on overflow,
118 * others return -1 on overflow.
119 * All return -1 on format error.
120 * We need to leave room for 2 null terminations, one for the current var
121 * string, and one for final null of the var table. So check that the
122 * strlen written, r, leaves room for 2 chars.
124 if ((r == -1) || (r > (int)(b->size - 2))) {
129 /* Remove any earlier occurrence of the same variable */
130 s = strchr(b->buf, '=');
132 len = (size_t) (s - b->buf);
133 for (s = b->base; s < b->buf;) {
134 if ((bcmp(s, b->buf, len) == 0) && s[len] == '=') {
136 memmove(s, (s + len),
137 ((b->buf + r + 1) - (s + len)));
139 b->size += (unsigned int)len;
148 /* skip over this string's null termination */
157 * Initialize local vars from the right source for this platform.
158 * Return 0 on success, nonzero on error.
160 int srom_var_init(si_t *sih, uint bustype, void *curmap, struct osl_info *osh,
161 char **vars, uint *count)
167 ASSERT(bustype == bustype);
168 if (vars == NULL || count == NULL)
177 return initvars_srom_si(sih, osh, curmap, vars, count);
180 ASSERT(curmap != NULL);
184 return initvars_srom_pci(sih, curmap, vars, count);
188 return initvars_cis_sdio(osh, vars, count);
197 /* support only 16-bit word read from srom */
199 srom_read(si_t *sih, uint bustype, void *curmap, struct osl_info *osh,
200 uint byteoff, uint nbytes, u16 *buf, bool check_crc)
207 ASSERT(bustype == bustype);
209 /* check input - 16-bit access only */
210 if (byteoff & 1 || nbytes & 1 || (byteoff + nbytes) > SROM_MAX)
216 if (bustype == PCI_BUS) {
220 if (si_is_sprom_available(sih)) {
223 srom = (u16 *) SROM_OFFSET(sih);
228 (osh, sih, srom, off, buf, nw, check_crc))
231 #if defined(BCMNVRAMR)
233 if (otp_read_pci(osh, sih, buf, SROM_MAX))
238 } else if (bustype == SDIO_BUS) {
241 for (i = 0; i < nw; i++) {
243 (osh, (u16) (off + i), (u16 *) (buf + i)))
247 } else if (bustype == SI_BUS) {
256 static const char vstr_manf[] = "manf=%s";
257 static const char vstr_productname[] = "productname=%s";
258 static const char vstr_manfid[] = "manfid=0x%x";
259 static const char vstr_prodid[] = "prodid=0x%x";
261 static const char vstr_sdmaxspeed[] = "sdmaxspeed=%d";
262 static const char vstr_sdmaxblk[][13] = {
263 "sdmaxblk0=%d", "sdmaxblk1=%d", "sdmaxblk2=%d"};
265 static const char vstr_regwindowsz[] = "regwindowsz=%d";
266 static const char vstr_sromrev[] = "sromrev=%d";
267 static const char vstr_chiprev[] = "chiprev=%d";
268 static const char vstr_subvendid[] = "subvendid=0x%x";
269 static const char vstr_subdevid[] = "subdevid=0x%x";
270 static const char vstr_boardrev[] = "boardrev=0x%x";
271 static const char vstr_aa2g[] = "aa2g=0x%x";
272 static const char vstr_aa5g[] = "aa5g=0x%x";
273 static const char vstr_ag[] = "ag%d=0x%x";
274 static const char vstr_cc[] = "cc=%d";
275 static const char vstr_opo[] = "opo=%d";
276 static const char vstr_pa0b[][9] = {
277 "pa0b0=%d", "pa0b1=%d", "pa0b2=%d"};
279 static const char vstr_pa0itssit[] = "pa0itssit=%d";
280 static const char vstr_pa0maxpwr[] = "pa0maxpwr=%d";
281 static const char vstr_pa1b[][9] = {
282 "pa1b0=%d", "pa1b1=%d", "pa1b2=%d"};
284 static const char vstr_pa1lob[][11] = {
285 "pa1lob0=%d", "pa1lob1=%d", "pa1lob2=%d"};
287 static const char vstr_pa1hib[][11] = {
288 "pa1hib0=%d", "pa1hib1=%d", "pa1hib2=%d"};
290 static const char vstr_pa1itssit[] = "pa1itssit=%d";
291 static const char vstr_pa1maxpwr[] = "pa1maxpwr=%d";
292 static const char vstr_pa1lomaxpwr[] = "pa1lomaxpwr=%d";
293 static const char vstr_pa1himaxpwr[] = "pa1himaxpwr=%d";
294 static const char vstr_oem[] =
295 "oem=%02x%02x%02x%02x%02x%02x%02x%02x";
296 static const char vstr_boardflags[] = "boardflags=0x%x";
297 static const char vstr_boardflags2[] = "boardflags2=0x%x";
298 static const char vstr_ledbh[] = "ledbh%d=0x%x";
299 static const char vstr_noccode[] = "ccode=0x0";
300 static const char vstr_ccode[] = "ccode=%c%c";
301 static const char vstr_cctl[] = "cctl=0x%x";
302 static const char vstr_cckpo[] = "cckpo=0x%x";
303 static const char vstr_ofdmpo[] = "ofdmpo=0x%x";
304 static const char vstr_rdlid[] = "rdlid=0x%x";
305 static const char vstr_rdlrndis[] = "rdlrndis=%d";
306 static const char vstr_rdlrwu[] = "rdlrwu=%d";
307 static const char vstr_usbfs[] = "usbfs=%d";
308 static const char vstr_wpsgpio[] = "wpsgpio=%d";
309 static const char vstr_wpsled[] = "wpsled=%d";
310 static const char vstr_rdlsn[] = "rdlsn=%d";
311 static const char vstr_rssismf2g[] = "rssismf2g=%d";
312 static const char vstr_rssismc2g[] = "rssismc2g=%d";
313 static const char vstr_rssisav2g[] = "rssisav2g=%d";
314 static const char vstr_bxa2g[] = "bxa2g=%d";
315 static const char vstr_rssismf5g[] = "rssismf5g=%d";
316 static const char vstr_rssismc5g[] = "rssismc5g=%d";
317 static const char vstr_rssisav5g[] = "rssisav5g=%d";
318 static const char vstr_bxa5g[] = "bxa5g=%d";
319 static const char vstr_tri2g[] = "tri2g=%d";
320 static const char vstr_tri5gl[] = "tri5gl=%d";
321 static const char vstr_tri5g[] = "tri5g=%d";
322 static const char vstr_tri5gh[] = "tri5gh=%d";
323 static const char vstr_rxpo2g[] = "rxpo2g=%d";
324 static const char vstr_rxpo5g[] = "rxpo5g=%d";
325 static const char vstr_boardtype[] = "boardtype=0x%x";
326 static const char vstr_leddc[] = "leddc=0x%04x";
327 static const char vstr_vendid[] = "vendid=0x%x";
328 static const char vstr_devid[] = "devid=0x%x";
329 static const char vstr_xtalfreq[] = "xtalfreq=%d";
330 static const char vstr_txchain[] = "txchain=0x%x";
331 static const char vstr_rxchain[] = "rxchain=0x%x";
332 static const char vstr_antswitch[] = "antswitch=0x%x";
333 static const char vstr_regrev[] = "regrev=0x%x";
334 static const char vstr_antswctl2g[] = "antswctl2g=0x%x";
335 static const char vstr_triso2g[] = "triso2g=0x%x";
336 static const char vstr_pdetrange2g[] = "pdetrange2g=0x%x";
337 static const char vstr_extpagain2g[] = "extpagain2g=0x%x";
338 static const char vstr_tssipos2g[] = "tssipos2g=0x%x";
339 static const char vstr_antswctl5g[] = "antswctl5g=0x%x";
340 static const char vstr_triso5g[] = "triso5g=0x%x";
341 static const char vstr_pdetrange5g[] = "pdetrange5g=0x%x";
342 static const char vstr_extpagain5g[] = "extpagain5g=0x%x";
343 static const char vstr_tssipos5g[] = "tssipos5g=0x%x";
344 static const char vstr_maxp2ga0[] = "maxp2ga0=0x%x";
345 static const char vstr_itt2ga0[] = "itt2ga0=0x%x";
346 static const char vstr_pa[] = "pa%dgw%da%d=0x%x";
347 static const char vstr_pahl[] = "pa%dg%cw%da%d=0x%x";
348 static const char vstr_maxp5ga0[] = "maxp5ga0=0x%x";
349 static const char vstr_itt5ga0[] = "itt5ga0=0x%x";
350 static const char vstr_maxp5gha0[] = "maxp5gha0=0x%x";
351 static const char vstr_maxp5gla0[] = "maxp5gla0=0x%x";
352 static const char vstr_maxp2ga1[] = "maxp2ga1=0x%x";
353 static const char vstr_itt2ga1[] = "itt2ga1=0x%x";
354 static const char vstr_maxp5ga1[] = "maxp5ga1=0x%x";
355 static const char vstr_itt5ga1[] = "itt5ga1=0x%x";
356 static const char vstr_maxp5gha1[] = "maxp5gha1=0x%x";
357 static const char vstr_maxp5gla1[] = "maxp5gla1=0x%x";
358 static const char vstr_cck2gpo[] = "cck2gpo=0x%x";
359 static const char vstr_ofdm2gpo[] = "ofdm2gpo=0x%x";
360 static const char vstr_ofdm5gpo[] = "ofdm5gpo=0x%x";
361 static const char vstr_ofdm5glpo[] = "ofdm5glpo=0x%x";
362 static const char vstr_ofdm5ghpo[] = "ofdm5ghpo=0x%x";
363 static const char vstr_cddpo[] = "cddpo=0x%x";
364 static const char vstr_stbcpo[] = "stbcpo=0x%x";
365 static const char vstr_bw40po[] = "bw40po=0x%x";
366 static const char vstr_bwduppo[] = "bwduppo=0x%x";
367 static const char vstr_mcspo[] = "mcs%dgpo%d=0x%x";
368 static const char vstr_mcspohl[] = "mcs%dg%cpo%d=0x%x";
369 static const char vstr_custom[] = "customvar%d=0x%x";
370 static const char vstr_cckdigfilttype[] = "cckdigfilttype=%d";
371 static const char vstr_boardnum[] = "boardnum=%d";
372 static const char vstr_macaddr[] = "macaddr=%s";
373 static const char vstr_usbepnum[] = "usbepnum=0x%x";
374 static const char vstr_end[] = "END\0";
378 /* For dongle HW, accept partial calibration parameters */
379 #define BCMDONGLECASE(n)
381 int srom_parsecis(struct osl_info *osh, u8 *pcis[], uint ciscnt, char **vars,
387 u8 *cis, tup, tlen, sromrev = 1;
389 bool ag_init = false;
397 ASSERT(vars != NULL);
398 ASSERT(count != NULL);
402 base = kmalloc(MAXSZ_NVRAM_VARS, GFP_ATOMIC);
403 ASSERT(base != NULL);
407 varbuf_init(&b, base, MAXSZ_NVRAM_VARS);
408 bzero(base, MAXSZ_NVRAM_VARS);
410 for (cisnum = 0; cisnum < ciscnt; cisnum++) {
418 if (tup == CISTPL_NULL || tup == CISTPL_END)
423 if (cis[i] == CISTPL_NULL
424 || cis[i] == CISTPL_END) {
429 tup = CISTPL_BRCM_HNBU;
433 if ((i + tlen) >= CIS_SIZE)
438 /* assume the strings are good if the version field checks out */
439 if (((cis[i + 1] << 8) + cis[i]) >= 0x0008) {
440 varbuf_append(&b, vstr_manf,
442 varbuf_append(&b, vstr_productname,
451 varbuf_append(&b, vstr_manfid,
452 (cis[i + 1] << 8) + cis[i]);
453 varbuf_append(&b, vstr_prodid,
454 (cis[i + 3] << 8) + cis[i + 2]);
463 case CISTPL_FID_SDIO:
467 static int base[] = {
468 -1, 10, 12, 13, 15, 20,
470 35, 40, 45, 50, 55, 60,
473 static int mult[] = {
474 10, 100, 1000, 10000,
477 ASSERT((mult[spd & 0x7] != -1)
480 [(spd >> 3) & 0x0f]));
490 } else if (cis[i] == 1) {
501 /* set macaddr if HNBU_MACADDR not seen yet */
504 && !(ETHER_ISNULLADDR(&cis[i + 2]))
505 && !(ETHER_ISMULTI(&cis[i + 2]))) {
508 snprintf(eabuf, sizeof(eabuf),
511 /* set boardnum if HNBU_BOARDNUM not seen yet */
522 varbuf_append(&b, vstr_regwindowsz,
523 (cis[i + 7] << 8) | cis[i + 6]);
526 case CISTPL_BRCM_HNBU:
529 sromrev = cis[i + 1];
530 varbuf_append(&b, vstr_sromrev,
535 varbuf_append(&b, vstr_xtalfreq,
543 varbuf_append(&b, vstr_vendid,
546 varbuf_append(&b, vstr_devid,
550 varbuf_append(&b, vstr_chiprev,
561 varbuf_append(&b, vstr_subdevid,
564 /* subdevid doubles for boardtype */
574 (cis[i + 2] << 8) + cis[i + 1];
582 /* retrieve the patch pairs
583 * from tlen/6; where 6 is
584 * sizeof(patch addr(2)) +
585 * sizeof(patch data(4)).
587 patch_pair = tlen / 6;
589 for (j = 0; j < patch_pair; j++) {
644 varbuf_append(&b, vstr_boardrev,
647 varbuf_append(&b, vstr_boardrev,
652 case HNBU_BOARDFLAGS:
653 w32 = (cis[i + 2] << 8) + cis[i + 1];
656 ((cis[i + 4] << 24) +
658 varbuf_append(&b, vstr_boardflags, w32);
662 (cis[i + 6] << 8) + cis[i +
677 varbuf_append(&b, vstr_usbfs,
682 varbuf_append(&b, vstr_boardtype,
689 * what follows is a nonstandard HNBU CIS
690 * that lacks CISTPL_BRCM_HNBU tags
692 * skip 0xff (end of standard CIS)
696 standard_cis = false;
700 varbuf_append(&b, vstr_usbepnum,
701 (cis[i + 2] << 8) | cis[i
707 varbuf_append(&b, vstr_aa2g,
710 varbuf_append(&b, vstr_aa5g,
715 varbuf_append(&b, vstr_ag, 0,
718 varbuf_append(&b, vstr_ag, 1,
721 varbuf_append(&b, vstr_ag, 2,
724 varbuf_append(&b, vstr_ag, 3,
730 varbuf_append(&b, vstr_aa5g,
732 varbuf_append(&b, vstr_ag, 1,
737 ASSERT(sromrev == 1);
738 varbuf_append(&b, vstr_cc, cis[i + 1]);
744 ASSERT(sromrev == 1);
750 ASSERT(sromrev >= 2);
751 varbuf_append(&b, vstr_opo,
765 for (j = 0; j < 3; j++) {
790 ASSERT((sromrev == 2)
810 for (j = 0; j < 3; j++) {
825 for (j = 3; j < 6; j++) {
840 for (j = 6; j < 9; j++) {
857 ASSERT((tlen == 19) ||
865 ASSERT(sromrev == 1);
866 varbuf_append(&b, vstr_oem,
867 cis[i + 1], cis[i + 2],
868 cis[i + 3], cis[i + 4],
869 cis[i + 5], cis[i + 6],
870 cis[i + 7], cis[i + 8]);
874 for (j = 1; j <= 4; j++) {
875 if (cis[i + j] != 0xff) {
887 if ((cis[i + 1] == 0)
888 || (cis[i + 2] == 0))
889 varbuf_append(&b, vstr_noccode);
891 varbuf_append(&b, vstr_ccode,
894 varbuf_append(&b, vstr_cctl,
900 varbuf_append(&b, vstr_cckpo,
901 (cis[i + 2] << 8) | cis[i
908 varbuf_append(&b, vstr_ofdmpo,
916 varbuf_append(&b, vstr_wpsgpio,
919 varbuf_append(&b, vstr_wpsled,
923 case HNBU_RSSISMBXA2G:
924 ASSERT(sromrev == 3);
925 varbuf_append(&b, vstr_rssismf2g,
927 varbuf_append(&b, vstr_rssismc2g,
928 (cis[i + 1] >> 4) & 0xf);
929 varbuf_append(&b, vstr_rssisav2g,
931 varbuf_append(&b, vstr_bxa2g,
932 (cis[i + 2] >> 3) & 0x3);
935 case HNBU_RSSISMBXA5G:
936 ASSERT(sromrev == 3);
937 varbuf_append(&b, vstr_rssismf5g,
939 varbuf_append(&b, vstr_rssismc5g,
940 (cis[i + 1] >> 4) & 0xf);
941 varbuf_append(&b, vstr_rssisav5g,
943 varbuf_append(&b, vstr_bxa5g,
944 (cis[i + 2] >> 3) & 0x3);
948 ASSERT(sromrev == 3);
949 varbuf_append(&b, vstr_tri2g,
954 ASSERT(sromrev == 3);
955 varbuf_append(&b, vstr_tri5gl,
957 varbuf_append(&b, vstr_tri5g,
959 varbuf_append(&b, vstr_tri5gh,
964 ASSERT(sromrev == 3);
965 varbuf_append(&b, vstr_rxpo2g,
970 ASSERT(sromrev == 3);
971 varbuf_append(&b, vstr_rxpo5g,
976 if (!(ETHER_ISNULLADDR(&cis[i + 1])) &&
977 !(ETHER_ISMULTI(&cis[i + 1]))) {
978 snprintf(eabuf, sizeof(eabuf),
981 /* set boardnum if HNBU_BOARDNUM not seen yet */
990 /* CIS leddc only has 16bits, convert it to 32bits */
991 w32 = ((cis[i + 2] << 24) | /* oncount */
992 (cis[i + 1] << 8)); /* offcount */
993 varbuf_append(&b, vstr_leddc, w32);
996 case HNBU_CHAINSWITCH:
997 varbuf_append(&b, vstr_txchain,
999 varbuf_append(&b, vstr_rxchain,
1001 varbuf_append(&b, vstr_antswitch,
1007 varbuf_append(&b, vstr_regrev,
1013 (cis[i + 2] << 8) + cis[i +
1018 SROM8_FEM_ANTSWLUT_MASK)
1020 SROM8_FEM_ANTSWLUT_SHIFT);
1021 varbuf_append(&b, vstr_triso2g,
1023 SROM8_FEM_TR_ISO_MASK)
1025 SROM8_FEM_TR_ISO_SHIFT);
1029 SROM8_FEM_PDET_RANGE_MASK)
1031 SROM8_FEM_PDET_RANGE_SHIFT);
1035 SROM8_FEM_EXTPA_GAIN_MASK)
1037 SROM8_FEM_EXTPA_GAIN_SHIFT);
1041 SROM8_FEM_TSSIPOS_MASK)
1043 SROM8_FEM_TSSIPOS_SHIFT);
1048 (cis[i + 4] << 8) + cis[i +
1053 SROM8_FEM_ANTSWLUT_MASK)
1055 SROM8_FEM_ANTSWLUT_SHIFT);
1056 varbuf_append(&b, vstr_triso5g,
1058 SROM8_FEM_TR_ISO_MASK)
1060 SROM8_FEM_TR_ISO_SHIFT);
1064 SROM8_FEM_PDET_RANGE_MASK)
1066 SROM8_FEM_PDET_RANGE_SHIFT);
1070 SROM8_FEM_EXTPA_GAIN_MASK)
1072 SROM8_FEM_EXTPA_GAIN_SHIFT);
1076 SROM8_FEM_TSSIPOS_MASK)
1078 SROM8_FEM_TSSIPOS_SHIFT);
1082 case HNBU_PAPARMS_C0:
1083 varbuf_append(&b, vstr_maxp2ga0,
1085 varbuf_append(&b, vstr_itt2ga0,
1087 varbuf_append(&b, vstr_pa, 2, 0, 0,
1090 varbuf_append(&b, vstr_pa, 2, 1, 0,
1093 varbuf_append(&b, vstr_pa, 2, 2, 0,
1099 varbuf_append(&b, vstr_maxp5ga0,
1101 varbuf_append(&b, vstr_itt5ga0,
1103 varbuf_append(&b, vstr_maxp5gha0,
1105 varbuf_append(&b, vstr_maxp5gla0,
1107 varbuf_append(&b, vstr_pa, 5, 0, 0,
1108 (cis[i + 14] << 8) +
1110 varbuf_append(&b, vstr_pa, 5, 1, 0,
1111 (cis[i + 16] << 8) +
1113 varbuf_append(&b, vstr_pa, 5, 2, 0,
1114 (cis[i + 18] << 8) +
1116 varbuf_append(&b, vstr_pahl, 5, 'l', 0,
1118 (cis[i + 20] << 8) +
1120 varbuf_append(&b, vstr_pahl, 5, 'l', 1,
1122 (cis[i + 22] << 8) +
1124 varbuf_append(&b, vstr_pahl, 5, 'l', 2,
1126 (cis[i + 24] << 8) +
1128 varbuf_append(&b, vstr_pahl, 5, 'h', 0,
1130 (cis[i + 26] << 8) +
1132 varbuf_append(&b, vstr_pahl, 5, 'h', 1,
1134 (cis[i + 28] << 8) +
1136 varbuf_append(&b, vstr_pahl, 5, 'h', 2,
1138 (cis[i + 30] << 8) +
1142 case HNBU_PAPARMS_C1:
1143 varbuf_append(&b, vstr_maxp2ga1,
1145 varbuf_append(&b, vstr_itt2ga1,
1147 varbuf_append(&b, vstr_pa, 2, 0, 1,
1150 varbuf_append(&b, vstr_pa, 2, 1, 1,
1153 varbuf_append(&b, vstr_pa, 2, 2, 1,
1159 varbuf_append(&b, vstr_maxp5ga1,
1161 varbuf_append(&b, vstr_itt5ga1,
1163 varbuf_append(&b, vstr_maxp5gha1,
1165 varbuf_append(&b, vstr_maxp5gla1,
1167 varbuf_append(&b, vstr_pa, 5, 0, 1,
1168 (cis[i + 14] << 8) +
1170 varbuf_append(&b, vstr_pa, 5, 1, 1,
1171 (cis[i + 16] << 8) +
1173 varbuf_append(&b, vstr_pa, 5, 2, 1,
1174 (cis[i + 18] << 8) +
1176 varbuf_append(&b, vstr_pahl, 5, 'l', 0,
1178 (cis[i + 20] << 8) +
1180 varbuf_append(&b, vstr_pahl, 5, 'l', 1,
1182 (cis[i + 22] << 8) +
1184 varbuf_append(&b, vstr_pahl, 5, 'l', 2,
1186 (cis[i + 24] << 8) +
1188 varbuf_append(&b, vstr_pahl, 5, 'h', 0,
1190 (cis[i + 26] << 8) +
1192 varbuf_append(&b, vstr_pahl, 5, 'h', 1,
1194 (cis[i + 28] << 8) +
1196 varbuf_append(&b, vstr_pahl, 5, 'h', 2,
1198 (cis[i + 30] << 8) +
1202 case HNBU_PO_CCKOFDM:
1203 varbuf_append(&b, vstr_cck2gpo,
1206 varbuf_append(&b, vstr_ofdm2gpo,
1207 (cis[i + 6] << 24) +
1208 (cis[i + 5] << 16) +
1214 varbuf_append(&b, vstr_ofdm5gpo,
1215 (cis[i + 10] << 24) +
1216 (cis[i + 9] << 16) +
1219 varbuf_append(&b, vstr_ofdm5glpo,
1220 (cis[i + 14] << 24) +
1221 (cis[i + 13] << 16) +
1222 (cis[i + 12] << 8) +
1224 varbuf_append(&b, vstr_ofdm5ghpo,
1225 (cis[i + 18] << 24) +
1226 (cis[i + 17] << 16) +
1227 (cis[i + 16] << 8) +
1232 for (j = 0; j <= (tlen / 2); j++) {
1233 varbuf_append(&b, vstr_mcspo, 2,
1243 case HNBU_PO_MCS5GM:
1244 for (j = 0; j <= (tlen / 2); j++) {
1245 varbuf_append(&b, vstr_mcspo, 5,
1255 case HNBU_PO_MCS5GLH:
1256 for (j = 0; j <= (tlen / 4); j++) {
1257 varbuf_append(&b, vstr_mcspohl,
1266 for (j = 0; j <= (tlen / 4); j++) {
1267 varbuf_append(&b, vstr_mcspohl,
1282 varbuf_append(&b, vstr_cddpo,
1288 varbuf_append(&b, vstr_stbcpo,
1294 varbuf_append(&b, vstr_bw40po,
1299 case HNBU_PO_40MDUP:
1300 varbuf_append(&b, vstr_bwduppo,
1306 varbuf_append(&b, vstr_ofdm5gpo,
1307 (cis[i + 4] << 24) +
1308 (cis[i + 3] << 16) +
1311 varbuf_append(&b, vstr_ofdm5glpo,
1312 (cis[i + 8] << 24) +
1313 (cis[i + 7] << 16) +
1316 varbuf_append(&b, vstr_ofdm5ghpo,
1317 (cis[i + 12] << 24) +
1318 (cis[i + 11] << 16) +
1319 (cis[i + 10] << 8) +
1324 varbuf_append(&b, vstr_custom, 1,
1325 ((cis[i + 4] << 24) +
1326 (cis[i + 3] << 16) +
1331 #if defined(BCMSDIO)
1332 case HNBU_SROM3SWRGN:
1335 u8 srev = cis[i + 1 + 70];
1337 /* make tuple value 16-bit aligned and parse it */
1338 bcopy(&cis[i + 1], srom,
1340 _initvars_srom_pci(srev, srom,
1343 /* 2.4G antenna gain is included in SROM */
1345 /* Ethernet MAC address is included in SROM */
1349 /* create extra variables */
1351 varbuf_append(&b, vstr_vendid,
1357 varbuf_append(&b, vstr_devid,
1363 varbuf_append(&b, vstr_xtalfreq,
1369 #endif /* defined(BCMSDIO) */
1371 case HNBU_CCKFILTTYPE:
1372 varbuf_append(&b, vstr_cckdigfilttype,
1380 } while (tup != CISTPL_END);
1383 if (boardnum != -1) {
1384 varbuf_append(&b, vstr_boardnum, boardnum);
1388 varbuf_append(&b, vstr_macaddr, eabuf);
1391 /* if there is no antenna gain field, set default */
1392 if (getvar(NULL, "ag0") == NULL && ag_init == false) {
1393 varbuf_append(&b, vstr_ag, 0, 0xff);
1396 /* final nullbyte terminator */
1397 ASSERT(b.size >= 1);
1400 ASSERT(b.buf - base <= MAXSZ_NVRAM_VARS);
1401 err = initvars_table(osh, base, b.buf, vars, count);
1407 /* In chips with chipcommon rev 32 and later, the srom is in chipcommon,
1408 * not in the bus cores.
1411 srom_cc_cmd(si_t *sih, struct osl_info *osh, void *ccregs, u32 cmd,
1412 uint wordoff, u16 data)
1414 chipcregs_t *cc = (chipcregs_t *) ccregs;
1415 uint wait_cnt = 1000;
1417 if ((cmd == SRC_OP_READ) || (cmd == SRC_OP_WRITE)) {
1418 W_REG(osh, &cc->sromaddress, wordoff * 2);
1419 if (cmd == SRC_OP_WRITE)
1420 W_REG(osh, &cc->sromdata, data);
1423 W_REG(osh, &cc->sromcontrol, SRC_START | cmd);
1425 while (wait_cnt--) {
1426 if ((R_REG(osh, &cc->sromcontrol) & SRC_BUSY) == 0)
1431 BS_ERROR(("%s: Command 0x%x timed out\n", __func__, cmd));
1434 if (cmd == SRC_OP_READ)
1435 return (u16) R_REG(osh, &cc->sromdata);
1441 * Read in and validate sprom.
1442 * Return 0 on success, nonzero on error.
1445 sprom_read_pci(struct osl_info *osh, si_t *sih, u16 *sprom, uint wordoff,
1446 u16 *buf, uint nwords, bool check_crc)
1450 void *ccregs = NULL;
1452 /* read the sprom */
1453 for (i = 0; i < nwords; i++) {
1455 if (sih->ccrev > 31 && ISSIM_ENAB(sih)) {
1456 /* use indirect since direct is too slow on QT */
1457 if ((sih->cccaps & CC_CAP_SROM) == 0)
1460 ccregs = (void *)((u8 *) sprom - CC_SROM_OTP);
1462 srom_cc_cmd(sih, osh, ccregs, SRC_OP_READ,
1466 if (ISSIM_ENAB(sih))
1467 buf[i] = R_REG(osh, &sprom[wordoff + i]);
1469 buf[i] = R_REG(osh, &sprom[wordoff + i]);
1474 /* bypass crc checking for simulation to allow srom hack */
1475 if (ISSIM_ENAB(sih))
1480 if (buf[0] == 0xffff) {
1481 /* The hardware thinks that an srom that starts with 0xffff
1482 * is blank, regardless of the rest of the content, so declare
1485 BS_ERROR(("%s: buf[0] = 0x%x, returning bad-crc\n",
1490 /* fixup the endianness so crc8 will pass */
1491 htol16_buf(buf, nwords * 2);
1492 if (hndcrc8((u8 *) buf, nwords * 2, CRC8_INIT_VALUE) !=
1494 /* DBG only pci always read srom4 first, then srom8/9 */
1495 /* BS_ERROR(("%s: bad crc\n", __func__)); */
1498 /* now correct the endianness of the byte array */
1499 ltoh16_buf(buf, nwords * 2);
1504 #if defined(BCMNVRAMR)
1505 static int otp_read_pci(struct osl_info *osh, si_t *sih, u16 *buf, uint bufsz)
1508 uint sz = OTP_SZ_MAX / 2; /* size in words */
1511 ASSERT(bufsz <= OTP_SZ_MAX);
1513 otp = kzalloc(OTP_SZ_MAX, GFP_ATOMIC);
1518 err = otp_read_region(sih, OTP_HW_RGN, (u16 *) otp, &sz);
1520 bcopy(otp, buf, bufsz);
1526 if (buf[0] == 0xffff) {
1527 /* The hardware thinks that an srom that starts with 0xffff
1528 * is blank, regardless of the rest of the content, so declare
1531 BS_ERROR(("%s: buf[0] = 0x%x, returning bad-crc\n", __func__,
1536 /* fixup the endianness so crc8 will pass */
1537 htol16_buf(buf, bufsz);
1538 if (hndcrc8((u8 *) buf, SROM4_WORDS * 2, CRC8_INIT_VALUE) !=
1540 BS_ERROR(("%s: bad crc\n", __func__));
1543 /* now correct the endianness of the byte array */
1544 ltoh16_buf(buf, bufsz);
1548 #endif /* defined(BCMNVRAMR) */
1550 * Create variable table from memory.
1551 * Return 0 on success, nonzero on error.
1553 static int initvars_table(struct osl_info *osh, char *start, char *end,
1554 char **vars, uint *count)
1556 int c = (int)(end - start);
1558 /* do it only when there is more than just the null string */
1560 char *vp = kmalloc(c, GFP_ATOMIC);
1564 bcopy(start, vp, c);
1576 * Find variables with <devpath> from flash. 'base' points to the beginning
1577 * of the table upon enter and to the end of the table upon exit when success.
1578 * Return 0 on success, nonzero on error.
1580 static int initvars_flash(si_t *sih, struct osl_info *osh, char **base,
1587 uint l, dl, copy_len;
1588 char devpath[SI_DEVPATH_BUFSZ];
1590 /* allocate memory and read in flash */
1591 flash = kmalloc(NVRAM_SPACE, GFP_ATOMIC);
1594 err = nvram_getall(flash, NVRAM_SPACE);
1598 si_devpath(sih, devpath, sizeof(devpath));
1600 /* grab vars with the <devpath> prefix in name */
1601 dl = strlen(devpath);
1602 for (s = flash; s && *s; s += l + 1) {
1605 /* skip non-matching variable */
1606 if (strncmp(s, devpath, dl))
1609 /* is there enough room to copy? */
1610 copy_len = l - dl + 1;
1611 if (len < copy_len) {
1612 err = BCME_BUFTOOSHORT;
1616 /* no prefix, just the name=value */
1617 strncpy(vp, &s[dl], copy_len);
1622 /* add null string as terminator */
1624 err = BCME_BUFTOOSHORT;
1636 * Initialize nonvolatile variable table from flash.
1637 * Return 0 on success, nonzero on error.
1639 static int initvars_flash_si(si_t *sih, char **vars, uint *count)
1641 struct osl_info *osh = si_osh(sih);
1645 ASSERT(vars != NULL);
1646 ASSERT(count != NULL);
1648 base = vp = kmalloc(MAXSZ_NVRAM_VARS, GFP_ATOMIC);
1653 err = initvars_flash(sih, osh, &vp, MAXSZ_NVRAM_VARS);
1655 err = initvars_table(osh, base, vp, vars, count);
1662 /* Parse SROM and create name=value pairs. 'srom' points to
1663 * the SROM word array. 'off' specifies the offset of the
1664 * first word 'srom' points to, which should be either 0 or
1665 * SROM3_SWRG_OFF (full SROM or software region).
1668 static uint mask_shift(u16 mask)
1671 for (i = 0; i < (sizeof(mask) << 3); i++) {
1672 if (mask & (1 << i))
1679 static uint mask_width(u16 mask)
1682 for (i = (sizeof(mask) << 3) - 1; i >= 0; i--) {
1683 if (mask & (1 << i))
1684 return (uint) (i - mask_shift(mask) + 1);
1691 static bool mask_valid(u16 mask)
1693 uint shift = mask_shift(mask);
1694 uint width = mask_width(mask);
1695 return mask == ((~0 << shift) & ~(~0 << (shift + width)));
1699 static void _initvars_srom_pci(u8 sromrev, u16 *srom, uint off, varbuf_t *b)
1703 const sromvar_t *srv;
1706 u32 sr = (1 << sromrev);
1708 varbuf_append(b, "sromrev=%d", sromrev);
1710 for (srv = pci_sromvars; srv->name != NULL; srv++) {
1713 if ((srv->revmask & sr) == 0)
1722 /* This entry is for mfgc only. Don't generate param for it, */
1723 if (flags & SRFL_NOVAR)
1726 if (flags & SRFL_ETHADDR) {
1727 struct ether_addr ea;
1729 ea.octet[0] = (srom[srv->off - off] >> 8) & 0xff;
1730 ea.octet[1] = srom[srv->off - off] & 0xff;
1731 ea.octet[2] = (srom[srv->off + 1 - off] >> 8) & 0xff;
1732 ea.octet[3] = srom[srv->off + 1 - off] & 0xff;
1733 ea.octet[4] = (srom[srv->off + 2 - off] >> 8) & 0xff;
1734 ea.octet[5] = srom[srv->off + 2 - off] & 0xff;
1736 varbuf_append(b, "%s=%pM", name, ea.octet);
1738 ASSERT(mask_valid(srv->mask));
1739 ASSERT(mask_width(srv->mask));
1741 w = srom[srv->off - off];
1742 val = (w & srv->mask) >> mask_shift(srv->mask);
1743 width = mask_width(srv->mask);
1745 while (srv->flags & SRFL_MORE) {
1747 ASSERT(srv->name != NULL);
1749 if (srv->off == 0 || srv->off < off)
1752 ASSERT(mask_valid(srv->mask));
1753 ASSERT(mask_width(srv->mask));
1755 w = srom[srv->off - off];
1757 ((w & srv->mask) >> mask_shift(srv->
1760 width += mask_width(srv->mask);
1763 if ((flags & SRFL_NOFFS)
1764 && ((int)val == (1 << width) - 1))
1767 if (flags & SRFL_CCODE) {
1769 varbuf_append(b, "ccode=");
1771 varbuf_append(b, "ccode=%c%c",
1772 (val >> 8), (val & 0xff));
1774 /* LED Powersave duty cycle has to be scaled:
1775 *(oncount >> 24) (offcount >> 8)
1777 else if (flags & SRFL_LEDDC) {
1778 u32 w32 = (((val >> 8) & 0xff) << 24) | /* oncount */
1779 (((val & 0xff)) << 8); /* offcount */
1780 varbuf_append(b, "leddc=%d", w32);
1781 } else if (flags & SRFL_PRHEX)
1782 varbuf_append(b, "%s=0x%x", name, val);
1783 else if ((flags & SRFL_PRSIGN)
1784 && (val & (1 << (width - 1))))
1785 varbuf_append(b, "%s=%d", name,
1786 (int)(val | (~0 << width)));
1788 varbuf_append(b, "%s=%u", name, val);
1793 /* Do per-path variables */
1798 psz = SROM8_PATH1 - SROM8_PATH0;
1801 psz = SROM4_PATH1 - SROM4_PATH0;
1804 for (p = 0; p < MAX_PATH_SROM; p++) {
1805 for (srv = perpath_pci_sromvars; srv->name != NULL;
1807 if ((srv->revmask & sr) == 0)
1810 if (pb + srv->off < off)
1813 /* This entry is for mfgc only. Don't generate param for it, */
1814 if (srv->flags & SRFL_NOVAR)
1817 w = srom[pb + srv->off - off];
1819 ASSERT(mask_valid(srv->mask));
1820 val = (w & srv->mask) >> mask_shift(srv->mask);
1821 width = mask_width(srv->mask);
1823 /* Cheating: no per-path var is more than 1 word */
1825 if ((srv->flags & SRFL_NOFFS)
1826 && ((int)val == (1 << width) - 1))
1829 if (srv->flags & SRFL_PRHEX)
1830 varbuf_append(b, "%s%d=0x%x", srv->name,
1833 varbuf_append(b, "%s%d=%d", srv->name,
1842 * Initialize nonvolatile variable table from sprom.
1843 * Return 0 on success, nonzero on error.
1845 static int initvars_srom_pci(si_t *sih, void *curmap, char **vars, uint *count)
1847 u16 *srom, *sromwindow;
1851 char *vp, *base = NULL;
1852 struct osl_info *osh = si_osh(sih);
1857 * Apply CRC over SROM content regardless SROM is present or not,
1858 * and use variable <devpath>sromrev's existance in flash to decide
1859 * if we should return an error when CRC fails or read SROM variables
1862 srom = kmalloc(SROM_MAX, GFP_ATOMIC);
1863 ASSERT(srom != NULL);
1867 sromwindow = (u16 *) SROM_OFFSET(sih);
1868 if (si_is_sprom_available(sih)) {
1870 sprom_read_pci(osh, sih, sromwindow, 0, srom, SROM_WORDS,
1873 if ((srom[SROM4_SIGN] == SROM4_SIGNATURE) ||
1874 (((sih->buscoretype == PCIE_CORE_ID)
1875 && (sih->buscorerev >= 6))
1876 || ((sih->buscoretype == PCI_CORE_ID)
1877 && (sih->buscorerev >= 0xe)))) {
1878 /* sromrev >= 4, read more */
1880 sprom_read_pci(osh, sih, sromwindow, 0, srom,
1882 sromrev = srom[SROM4_CRCREV] & 0xff;
1884 BS_ERROR(("%s: srom %d, bad crc\n", __func__,
1887 } else if (err == 0) {
1888 /* srom is good and is rev < 4 */
1889 /* top word of sprom contains version and crc8 */
1890 sromrev = srom[SROM_CRCREV] & 0xff;
1891 /* bcm4401 sroms misprogrammed */
1892 if (sromrev == 0x10)
1896 #if defined(BCMNVRAMR)
1897 /* Use OTP if SPROM not available */
1898 else if ((err = otp_read_pci(osh, sih, srom, SROM_MAX)) == 0) {
1899 /* OTP only contain SROM rev8/rev9 for now */
1900 sromrev = srom[SROM4_CRCREV] & 0xff;
1905 BS_ERROR(("Neither SPROM nor OTP has valid image\n"));
1908 /* We want internal/wltest driver to come up with default sromvars so we can
1909 * program a blank SPROM/OTP.
1916 value = si_getdevpathvar(sih, "sromrev");
1918 sromrev = (u8) simple_strtoul(value, NULL, 0);
1923 BS_ERROR(("%s, SROM CRC Error\n", __func__));
1925 value = si_getnvramflvar(sih, "sromrev");
1938 /* Bitmask for the sromrev */
1941 /* srom version check: Current valid versions: 1, 2, 3, 4, 5, 8, 9 */
1942 if ((sr & 0x33e) == 0) {
1947 ASSERT(vars != NULL);
1948 ASSERT(count != NULL);
1950 base = vp = kmalloc(MAXSZ_NVRAM_VARS, GFP_ATOMIC);
1957 /* read variables from flash */
1959 err = initvars_flash(sih, osh, &vp, MAXSZ_NVRAM_VARS);
1965 varbuf_init(&b, base, MAXSZ_NVRAM_VARS);
1967 /* parse SROM into name=value pairs. */
1968 _initvars_srom_pci(sromrev, srom, 0, &b);
1970 /* final nullbyte terminator */
1971 ASSERT(b.size >= 1);
1975 ASSERT((vp - base) <= MAXSZ_NVRAM_VARS);
1978 err = initvars_table(osh, base, vp, vars, count);
1990 * Read the SDIO cis and call parsecis to initialize the vars.
1991 * Return 0 on success, nonzero on error.
1993 static int initvars_cis_sdio(struct osl_info *osh, char **vars, uint *count)
1995 u8 *cis[SBSDIO_NUM_FUNCTION + 1];
1999 numfn = bcmsdh_query_iofnum(NULL);
2000 ASSERT(numfn <= SDIOD_MAX_IOFUNCS);
2002 for (fn = 0; fn <= numfn; fn++) {
2003 cis[fn] = kzalloc(SBSDIO_CIS_SIZE_LIMIT, GFP_ATOMIC);
2004 if (cis[fn] == NULL) {
2009 if (bcmsdh_cis_read(NULL, fn, cis[fn], SBSDIO_CIS_SIZE_LIMIT) !=
2018 rc = srom_parsecis(osh, cis, fn, vars, count);
2026 /* set SDIO sprom command register */
2027 static int sprom_cmd_sdio(struct osl_info *osh, u8 cmd)
2030 uint wait_cnt = 1000;
2032 /* write sprom command register */
2033 bcmsdh_cfg_write(NULL, SDIO_FUNC_1, SBSDIO_SPROM_CS, cmd, NULL);
2036 while (wait_cnt--) {
2038 bcmsdh_cfg_read(NULL, SDIO_FUNC_1, SBSDIO_SPROM_CS, NULL);
2039 if (status & SBSDIO_SPROM_DONE)
2046 /* read a word from the SDIO srom */
2047 static int sprom_read_sdio(struct osl_info *osh, u16 addr, u16 *data)
2049 u8 addr_l, addr_h, data_l, data_h;
2051 addr_l = (u8) ((addr * 2) & 0xff);
2052 addr_h = (u8) (((addr * 2) >> 8) & 0xff);
2055 bcmsdh_cfg_write(NULL, SDIO_FUNC_1, SBSDIO_SPROM_ADDR_HIGH, addr_h,
2057 bcmsdh_cfg_write(NULL, SDIO_FUNC_1, SBSDIO_SPROM_ADDR_LOW, addr_l,
2061 if (sprom_cmd_sdio(osh, SBSDIO_SPROM_READ))
2066 bcmsdh_cfg_read(NULL, SDIO_FUNC_1, SBSDIO_SPROM_DATA_HIGH, NULL);
2068 bcmsdh_cfg_read(NULL, SDIO_FUNC_1, SBSDIO_SPROM_DATA_LOW, NULL);
2070 *data = (data_h << 8) | data_l;
2073 #endif /* BCMSDIO */
2075 static int initvars_srom_si(si_t *sih, struct osl_info *osh, void *curmap,
2076 char **vars, uint *varsz)
2078 /* Search flash nvram section for srom variables */
2079 return initvars_flash_si(sih, vars, varsz);