2 * Linux device driver for RTL8187
4 * Copyright 2007 Michael Wu <flamingice@sourmilk.net>
5 * Copyright 2007 Andrea Merello <andreamrl@tiscali.it>
7 * Based on the r8187 driver, which is:
8 * Copyright 2005 Andrea Merello <andreamrl@tiscali.it>, et al.
10 * The driver was extended to the RTL8187B in 2008 by:
11 * Herton Ronaldo Krzesinski <herton@mandriva.com.br>
12 * Hin-Tak Leung <htl10@users.sourceforge.net>
13 * Larry Finger <Larry.Finger@lwfinger.net>
15 * Magic delays and register offsets below are taken from the original
16 * r8187 driver sources. Thanks to Realtek for their support!
18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License version 2 as
20 * published by the Free Software Foundation.
23 #include <linux/init.h>
24 #include <linux/usb.h>
25 #include <linux/delay.h>
26 #include <linux/etherdevice.h>
27 #include <linux/eeprom_93cx6.h>
28 #include <net/mac80211.h>
31 #include "rtl8187_rtl8225.h"
33 MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>");
34 MODULE_AUTHOR("Andrea Merello <andreamrl@tiscali.it>");
35 MODULE_AUTHOR("Herton Ronaldo Krzesinski <herton@mandriva.com.br>");
36 MODULE_AUTHOR("Hin-Tak Leung <htl10@users.sourceforge.net>");
37 MODULE_AUTHOR("Larry Finger <Larry.Finger@lwfinger.net>");
38 MODULE_DESCRIPTION("RTL8187/RTL8187B USB wireless driver");
39 MODULE_LICENSE("GPL");
41 static struct usb_device_id rtl8187_table[] __devinitdata = {
43 {USB_DEVICE(0x0b05, 0x171d), .driver_info = DEVICE_RTL8187},
45 {USB_DEVICE(0x050d, 0x705e), .driver_info = DEVICE_RTL8187B},
47 {USB_DEVICE(0x0bda, 0x8187), .driver_info = DEVICE_RTL8187},
48 {USB_DEVICE(0x0bda, 0x8189), .driver_info = DEVICE_RTL8187B},
49 {USB_DEVICE(0x0bda, 0x8197), .driver_info = DEVICE_RTL8187B},
50 {USB_DEVICE(0x0bda, 0x8198), .driver_info = DEVICE_RTL8187B},
52 {USB_DEVICE(0x0846, 0x6100), .driver_info = DEVICE_RTL8187},
53 {USB_DEVICE(0x0846, 0x6a00), .driver_info = DEVICE_RTL8187},
54 {USB_DEVICE(0x0846, 0x4260), .driver_info = DEVICE_RTL8187B},
56 {USB_DEVICE(0x03f0, 0xca02), .driver_info = DEVICE_RTL8187},
58 {USB_DEVICE(0x0df6, 0x000d), .driver_info = DEVICE_RTL8187},
59 {USB_DEVICE(0x0df6, 0x0028), .driver_info = DEVICE_RTL8187B},
61 {USB_DEVICE(0x13d1, 0xabe6), .driver_info = DEVICE_RTL8187},
65 MODULE_DEVICE_TABLE(usb, rtl8187_table);
67 static const struct ieee80211_rate rtl818x_rates[] = {
68 { .bitrate = 10, .hw_value = 0, },
69 { .bitrate = 20, .hw_value = 1, },
70 { .bitrate = 55, .hw_value = 2, },
71 { .bitrate = 110, .hw_value = 3, },
72 { .bitrate = 60, .hw_value = 4, },
73 { .bitrate = 90, .hw_value = 5, },
74 { .bitrate = 120, .hw_value = 6, },
75 { .bitrate = 180, .hw_value = 7, },
76 { .bitrate = 240, .hw_value = 8, },
77 { .bitrate = 360, .hw_value = 9, },
78 { .bitrate = 480, .hw_value = 10, },
79 { .bitrate = 540, .hw_value = 11, },
82 static const struct ieee80211_channel rtl818x_channels[] = {
83 { .center_freq = 2412 },
84 { .center_freq = 2417 },
85 { .center_freq = 2422 },
86 { .center_freq = 2427 },
87 { .center_freq = 2432 },
88 { .center_freq = 2437 },
89 { .center_freq = 2442 },
90 { .center_freq = 2447 },
91 { .center_freq = 2452 },
92 { .center_freq = 2457 },
93 { .center_freq = 2462 },
94 { .center_freq = 2467 },
95 { .center_freq = 2472 },
96 { .center_freq = 2484 },
99 static void rtl8187_iowrite_async_cb(struct urb *urb)
105 static void rtl8187_iowrite_async(struct rtl8187_priv *priv, __le16 addr,
108 struct usb_ctrlrequest *dr;
110 struct rtl8187_async_write_data {
112 struct usb_ctrlrequest dr;
116 buf = kmalloc(sizeof(*buf), GFP_ATOMIC);
120 urb = usb_alloc_urb(0, GFP_ATOMIC);
128 dr->bRequestType = RTL8187_REQT_WRITE;
129 dr->bRequest = RTL8187_REQ_SET_REG;
132 dr->wLength = cpu_to_le16(len);
134 memcpy(buf, data, len);
136 usb_fill_control_urb(urb, priv->udev, usb_sndctrlpipe(priv->udev, 0),
137 (unsigned char *)dr, buf, len,
138 rtl8187_iowrite_async_cb, buf);
139 rc = usb_submit_urb(urb, GFP_ATOMIC);
146 static inline void rtl818x_iowrite32_async(struct rtl8187_priv *priv,
147 __le32 *addr, u32 val)
149 __le32 buf = cpu_to_le32(val);
151 rtl8187_iowrite_async(priv, cpu_to_le16((unsigned long)addr),
155 void rtl8187_write_phy(struct ieee80211_hw *dev, u8 addr, u32 data)
157 struct rtl8187_priv *priv = dev->priv;
162 rtl818x_iowrite8(priv, &priv->map->PHY[3], (data >> 24) & 0xFF);
163 rtl818x_iowrite8(priv, &priv->map->PHY[2], (data >> 16) & 0xFF);
164 rtl818x_iowrite8(priv, &priv->map->PHY[1], (data >> 8) & 0xFF);
165 rtl818x_iowrite8(priv, &priv->map->PHY[0], data & 0xFF);
168 static void rtl8187_tx_cb(struct urb *urb)
170 struct sk_buff *skb = (struct sk_buff *)urb->context;
171 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
172 struct ieee80211_hw *hw = info->rate_driver_data[0];
173 struct rtl8187_priv *priv = hw->priv;
175 usb_free_urb(info->rate_driver_data[1]);
176 skb_pull(skb, priv->is_rtl8187b ? sizeof(struct rtl8187b_tx_hdr) :
177 sizeof(struct rtl8187_tx_hdr));
178 ieee80211_tx_info_clear_status(info);
179 info->flags |= IEEE80211_TX_STAT_ACK;
180 ieee80211_tx_status_irqsafe(hw, skb);
183 static int rtl8187_tx(struct ieee80211_hw *dev, struct sk_buff *skb)
185 struct rtl8187_priv *priv = dev->priv;
186 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
194 urb = usb_alloc_urb(0, GFP_ATOMIC);
201 flags |= RTL818X_TX_DESC_FLAG_NO_ENC;
203 flags |= ieee80211_get_tx_rate(dev, info)->hw_value << 24;
204 if (ieee80211_has_morefrags(((struct ieee80211_hdr *)skb->data)->frame_control))
205 flags |= RTL818X_TX_DESC_FLAG_MOREFRAG;
206 if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) {
207 flags |= RTL818X_TX_DESC_FLAG_RTS;
208 flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19;
209 rts_dur = ieee80211_rts_duration(dev, priv->vif,
211 } else if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
212 flags |= RTL818X_TX_DESC_FLAG_CTS;
213 flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19;
216 if (!priv->is_rtl8187b) {
217 struct rtl8187_tx_hdr *hdr =
218 (struct rtl8187_tx_hdr *)skb_push(skb, sizeof(*hdr));
219 hdr->flags = cpu_to_le32(flags);
221 hdr->rts_duration = rts_dur;
222 hdr->retry = cpu_to_le32((info->control.rates[0].count - 1) << 8);
227 /* fc needs to be calculated before skb_push() */
228 unsigned int epmap[4] = { 6, 7, 5, 4 };
229 struct ieee80211_hdr *tx_hdr =
230 (struct ieee80211_hdr *)(skb->data);
231 u16 fc = le16_to_cpu(tx_hdr->frame_control);
233 struct rtl8187b_tx_hdr *hdr =
234 (struct rtl8187b_tx_hdr *)skb_push(skb, sizeof(*hdr));
235 struct ieee80211_rate *txrate =
236 ieee80211_get_tx_rate(dev, info);
237 memset(hdr, 0, sizeof(*hdr));
238 hdr->flags = cpu_to_le32(flags);
239 hdr->rts_duration = rts_dur;
240 hdr->retry = cpu_to_le32((info->control.rates[0].count - 1) << 8);
242 ieee80211_generic_frame_duration(dev, priv->vif,
246 if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT)
249 ep = epmap[skb_get_queue_mapping(skb)];
252 info->rate_driver_data[0] = dev;
253 info->rate_driver_data[1] = urb;
255 usb_fill_bulk_urb(urb, priv->udev, usb_sndbulkpipe(priv->udev, ep),
256 buf, skb->len, rtl8187_tx_cb, skb);
257 rc = usb_submit_urb(urb, GFP_ATOMIC);
266 static void rtl8187_rx_cb(struct urb *urb)
268 struct sk_buff *skb = (struct sk_buff *)urb->context;
269 struct rtl8187_rx_info *info = (struct rtl8187_rx_info *)skb->cb;
270 struct ieee80211_hw *dev = info->dev;
271 struct rtl8187_priv *priv = dev->priv;
272 struct ieee80211_rx_status rx_status = { 0 };
277 spin_lock(&priv->rx_queue.lock);
279 __skb_unlink(skb, &priv->rx_queue);
281 spin_unlock(&priv->rx_queue.lock);
284 spin_unlock(&priv->rx_queue.lock);
286 if (unlikely(urb->status)) {
288 dev_kfree_skb_irq(skb);
292 skb_put(skb, urb->actual_length);
293 if (!priv->is_rtl8187b) {
294 struct rtl8187_rx_hdr *hdr =
295 (typeof(hdr))(skb_tail_pointer(skb) - sizeof(*hdr));
296 flags = le32_to_cpu(hdr->flags);
297 signal = hdr->signal & 0x7f;
298 rx_status.antenna = (hdr->signal >> 7) & 1;
299 rx_status.noise = hdr->noise;
300 rx_status.mactime = le64_to_cpu(hdr->mac_time);
301 priv->quality = signal;
302 rx_status.qual = priv->quality;
303 priv->noise = hdr->noise;
304 rate = (flags >> 20) & 0xF;
305 if (rate > 3) { /* OFDM rate */
308 else if (signal < 25)
310 signal = 90 - signal;
311 } else { /* CCK rate */
314 else if (signal < 30)
316 signal = 95 - signal;
318 rx_status.signal = signal;
319 priv->signal = signal;
321 struct rtl8187b_rx_hdr *hdr =
322 (typeof(hdr))(skb_tail_pointer(skb) - sizeof(*hdr));
323 /* The Realtek datasheet for the RTL8187B shows that the RX
324 * header contains the following quantities: signal quality,
325 * RSSI, AGC, the received power in dB, and the measured SNR.
326 * In testing, none of these quantities show qualitative
327 * agreement with AP signal strength, except for the AGC,
328 * which is inversely proportional to the strength of the
329 * signal. In the following, the quality and signal strength
330 * are derived from the AGC. The arbitrary scaling constants
331 * are chosen to make the results close to the values obtained
332 * for a BCM4312 using b43 as the driver. The noise is ignored
335 flags = le32_to_cpu(hdr->flags);
336 quality = 170 - hdr->agc;
339 signal = 14 - hdr->agc / 2;
340 rx_status.qual = quality;
341 priv->quality = quality;
342 rx_status.signal = signal;
343 priv->signal = signal;
344 rx_status.antenna = (hdr->rssi >> 7) & 1;
345 rx_status.mactime = le64_to_cpu(hdr->mac_time);
346 rate = (flags >> 20) & 0xF;
349 skb_trim(skb, flags & 0x0FFF);
350 rx_status.rate_idx = rate;
351 rx_status.freq = dev->conf.channel->center_freq;
352 rx_status.band = dev->conf.channel->band;
353 rx_status.flag |= RX_FLAG_TSFT;
354 if (flags & RTL818X_RX_DESC_FLAG_CRC32_ERR)
355 rx_status.flag |= RX_FLAG_FAILED_FCS_CRC;
356 ieee80211_rx_irqsafe(dev, skb, &rx_status);
358 skb = dev_alloc_skb(RTL8187_MAX_RX);
359 if (unlikely(!skb)) {
361 /* TODO check rx queue length and refill *somewhere* */
365 info = (struct rtl8187_rx_info *)skb->cb;
368 urb->transfer_buffer = skb_tail_pointer(skb);
370 skb_queue_tail(&priv->rx_queue, skb);
372 usb_submit_urb(urb, GFP_ATOMIC);
375 static int rtl8187_init_urbs(struct ieee80211_hw *dev)
377 struct rtl8187_priv *priv = dev->priv;
380 struct rtl8187_rx_info *info;
382 while (skb_queue_len(&priv->rx_queue) < 8) {
383 skb = __dev_alloc_skb(RTL8187_MAX_RX, GFP_KERNEL);
386 entry = usb_alloc_urb(0, GFP_KERNEL);
391 usb_fill_bulk_urb(entry, priv->udev,
392 usb_rcvbulkpipe(priv->udev,
393 priv->is_rtl8187b ? 3 : 1),
394 skb_tail_pointer(skb),
395 RTL8187_MAX_RX, rtl8187_rx_cb, skb);
396 info = (struct rtl8187_rx_info *)skb->cb;
399 skb_queue_tail(&priv->rx_queue, skb);
400 usb_submit_urb(entry, GFP_KERNEL);
406 static int rtl8187_cmd_reset(struct ieee80211_hw *dev)
408 struct rtl8187_priv *priv = dev->priv;
412 reg = rtl818x_ioread8(priv, &priv->map->CMD);
414 reg |= RTL818X_CMD_RESET;
415 rtl818x_iowrite8(priv, &priv->map->CMD, reg);
420 if (!(rtl818x_ioread8(priv, &priv->map->CMD) &
426 printk(KERN_ERR "%s: Reset timeout!\n", wiphy_name(dev->wiphy));
430 /* reload registers from eeprom */
431 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_LOAD);
436 if (!(rtl818x_ioread8(priv, &priv->map->EEPROM_CMD) &
437 RTL818X_EEPROM_CMD_CONFIG))
442 printk(KERN_ERR "%s: eeprom reset timeout!\n",
443 wiphy_name(dev->wiphy));
450 static int rtl8187_init_hw(struct ieee80211_hw *dev)
452 struct rtl8187_priv *priv = dev->priv;
457 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
458 RTL818X_EEPROM_CMD_CONFIG);
459 reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
460 rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg |
461 RTL818X_CONFIG3_ANAPARAM_WRITE);
462 rtl818x_iowrite32(priv, &priv->map->ANAPARAM,
463 RTL8187_RTL8225_ANAPARAM_ON);
464 rtl818x_iowrite32(priv, &priv->map->ANAPARAM2,
465 RTL8187_RTL8225_ANAPARAM2_ON);
466 rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg &
467 ~RTL818X_CONFIG3_ANAPARAM_WRITE);
468 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
469 RTL818X_EEPROM_CMD_NORMAL);
471 rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
474 rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x10);
475 rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x11);
476 rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x00);
479 res = rtl8187_cmd_reset(dev);
483 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
484 reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
485 rtl818x_iowrite8(priv, &priv->map->CONFIG3,
486 reg | RTL818X_CONFIG3_ANAPARAM_WRITE);
487 rtl818x_iowrite32(priv, &priv->map->ANAPARAM,
488 RTL8187_RTL8225_ANAPARAM_ON);
489 rtl818x_iowrite32(priv, &priv->map->ANAPARAM2,
490 RTL8187_RTL8225_ANAPARAM2_ON);
491 rtl818x_iowrite8(priv, &priv->map->CONFIG3,
492 reg & ~RTL818X_CONFIG3_ANAPARAM_WRITE);
493 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
496 rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0);
497 rtl818x_iowrite8(priv, &priv->map->GPIO, 0);
499 rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, (4 << 8));
500 rtl818x_iowrite8(priv, &priv->map->GPIO, 1);
501 rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0);
503 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
505 rtl818x_iowrite16(priv, (__le16 *)0xFFF4, 0xFFFF);
506 reg = rtl818x_ioread8(priv, &priv->map->CONFIG1);
509 rtl818x_iowrite8(priv, &priv->map->CONFIG1, reg);
511 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
513 rtl818x_iowrite32(priv, &priv->map->INT_TIMEOUT, 0);
514 rtl818x_iowrite8(priv, &priv->map->WPA_CONF, 0);
515 rtl818x_iowrite8(priv, &priv->map->RATE_FALLBACK, 0x81);
517 // TODO: set RESP_RATE and BRSR properly
518 rtl818x_iowrite8(priv, &priv->map->RESP_RATE, (8 << 4) | 0);
519 rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
522 rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0);
523 rtl818x_iowrite8(priv, &priv->map->GPIO, 0);
524 reg = rtl818x_ioread8(priv, (u8 *)0xFE53);
525 rtl818x_iowrite8(priv, (u8 *)0xFE53, reg | (1 << 7));
526 rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, (4 << 8));
527 rtl818x_iowrite8(priv, &priv->map->GPIO, 0x20);
528 rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0);
529 rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 0x80);
530 rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0x80);
531 rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x80);
534 rtl818x_iowrite32(priv, &priv->map->RF_TIMING, 0x000a8008);
535 rtl818x_iowrite16(priv, &priv->map->BRSR, 0xFFFF);
536 rtl818x_iowrite32(priv, &priv->map->RF_PARA, 0x00100044);
537 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
538 RTL818X_EEPROM_CMD_CONFIG);
539 rtl818x_iowrite8(priv, &priv->map->CONFIG3, 0x44);
540 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
541 RTL818X_EEPROM_CMD_NORMAL);
542 rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1FF7);
547 rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
548 reg = rtl818x_ioread8(priv, &priv->map->PGSELECT) & ~1;
549 rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg | 1);
550 rtl818x_iowrite16(priv, (__le16 *)0xFFFE, 0x10);
551 rtl818x_iowrite8(priv, &priv->map->TALLY_SEL, 0x80);
552 rtl818x_iowrite8(priv, (u8 *)0xFFFF, 0x60);
553 rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg);
558 static const u8 rtl8187b_reg_table[][3] = {
559 {0xF0, 0x32, 0}, {0xF1, 0x32, 0}, {0xF2, 0x00, 0}, {0xF3, 0x00, 0},
560 {0xF4, 0x32, 0}, {0xF5, 0x43, 0}, {0xF6, 0x00, 0}, {0xF7, 0x00, 0},
561 {0xF8, 0x46, 0}, {0xF9, 0xA4, 0}, {0xFA, 0x00, 0}, {0xFB, 0x00, 0},
562 {0xFC, 0x96, 0}, {0xFD, 0xA4, 0}, {0xFE, 0x00, 0}, {0xFF, 0x00, 0},
564 {0x58, 0x4B, 1}, {0x59, 0x00, 1}, {0x5A, 0x4B, 1}, {0x5B, 0x00, 1},
565 {0x60, 0x4B, 1}, {0x61, 0x09, 1}, {0x62, 0x4B, 1}, {0x63, 0x09, 1},
566 {0xCE, 0x0F, 1}, {0xCF, 0x00, 1}, {0xE0, 0xFF, 1}, {0xE1, 0x0F, 1},
567 {0xE2, 0x00, 1}, {0xF0, 0x4E, 1}, {0xF1, 0x01, 1}, {0xF2, 0x02, 1},
568 {0xF3, 0x03, 1}, {0xF4, 0x04, 1}, {0xF5, 0x05, 1}, {0xF6, 0x06, 1},
569 {0xF7, 0x07, 1}, {0xF8, 0x08, 1},
571 {0x4E, 0x00, 2}, {0x0C, 0x04, 2}, {0x21, 0x61, 2}, {0x22, 0x68, 2},
572 {0x23, 0x6F, 2}, {0x24, 0x76, 2}, {0x25, 0x7D, 2}, {0x26, 0x84, 2},
573 {0x27, 0x8D, 2}, {0x4D, 0x08, 2}, {0x50, 0x05, 2}, {0x51, 0xF5, 2},
574 {0x52, 0x04, 2}, {0x53, 0xA0, 2}, {0x54, 0x1F, 2}, {0x55, 0x23, 2},
575 {0x56, 0x45, 2}, {0x57, 0x67, 2}, {0x58, 0x08, 2}, {0x59, 0x08, 2},
576 {0x5A, 0x08, 2}, {0x5B, 0x08, 2}, {0x60, 0x08, 2}, {0x61, 0x08, 2},
577 {0x62, 0x08, 2}, {0x63, 0x08, 2}, {0x64, 0xCF, 2}, {0x72, 0x56, 2},
580 {0x34, 0xF0, 0}, {0x35, 0x0F, 0}, {0x5B, 0x40, 0}, {0x84, 0x88, 0},
581 {0x85, 0x24, 0}, {0x88, 0x54, 0}, {0x8B, 0xB8, 0}, {0x8C, 0x07, 0},
582 {0x8D, 0x00, 0}, {0x94, 0x1B, 0}, {0x95, 0x12, 0}, {0x96, 0x00, 0},
583 {0x97, 0x06, 0}, {0x9D, 0x1A, 0}, {0x9F, 0x10, 0}, {0xB4, 0x22, 0},
584 {0xBE, 0x80, 0}, {0xDB, 0x00, 0}, {0xEE, 0x00, 0}, {0x91, 0x03, 0},
586 {0x4C, 0x00, 2}, {0x9F, 0x00, 3}, {0x8C, 0x01, 0}, {0x8D, 0x10, 0},
587 {0x8E, 0x08, 0}, {0x8F, 0x00, 0}
590 static int rtl8187b_init_hw(struct ieee80211_hw *dev)
592 struct rtl8187_priv *priv = dev->priv;
596 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
597 RTL818X_EEPROM_CMD_CONFIG);
599 reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
600 reg |= RTL818X_CONFIG3_ANAPARAM_WRITE | RTL818X_CONFIG3_GNT_SELECT;
601 rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg);
602 rtl818x_iowrite32(priv, &priv->map->ANAPARAM2,
603 RTL8187B_RTL8225_ANAPARAM2_ON);
604 rtl818x_iowrite32(priv, &priv->map->ANAPARAM,
605 RTL8187B_RTL8225_ANAPARAM_ON);
606 rtl818x_iowrite8(priv, &priv->map->ANAPARAM3,
607 RTL8187B_RTL8225_ANAPARAM3_ON);
609 rtl818x_iowrite8(priv, (u8 *)0xFF61, 0x10);
610 reg = rtl818x_ioread8(priv, (u8 *)0xFF62);
611 rtl818x_iowrite8(priv, (u8 *)0xFF62, reg & ~(1 << 5));
612 rtl818x_iowrite8(priv, (u8 *)0xFF62, reg | (1 << 5));
614 reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
615 reg &= ~RTL818X_CONFIG3_ANAPARAM_WRITE;
616 rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg);
618 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
619 RTL818X_EEPROM_CMD_NORMAL);
621 res = rtl8187_cmd_reset(dev);
625 rtl818x_iowrite16(priv, (__le16 *)0xFF2D, 0x0FFF);
626 reg = rtl818x_ioread8(priv, &priv->map->CW_CONF);
627 reg |= RTL818X_CW_CONF_PERPACKET_RETRY_SHIFT;
628 rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg);
629 reg = rtl818x_ioread8(priv, &priv->map->TX_AGC_CTL);
630 reg |= RTL818X_TX_AGC_CTL_PERPACKET_GAIN_SHIFT |
631 RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT;
632 rtl818x_iowrite8(priv, &priv->map->TX_AGC_CTL, reg);
634 rtl818x_iowrite16_idx(priv, (__le16 *)0xFFE0, 0x0FFF, 1);
635 reg = rtl818x_ioread8(priv, &priv->map->RATE_FALLBACK);
636 reg |= RTL818X_RATE_FALLBACK_ENABLE;
637 rtl818x_iowrite8(priv, &priv->map->RATE_FALLBACK, reg);
639 rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL, 100);
640 rtl818x_iowrite16(priv, &priv->map->ATIM_WND, 2);
641 rtl818x_iowrite16_idx(priv, (__le16 *)0xFFD4, 0xFFFF, 1);
643 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
644 RTL818X_EEPROM_CMD_CONFIG);
645 reg = rtl818x_ioread8(priv, &priv->map->CONFIG1);
646 rtl818x_iowrite8(priv, &priv->map->CONFIG1, (reg & 0x3F) | 0x80);
647 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
648 RTL818X_EEPROM_CMD_NORMAL);
650 rtl818x_iowrite8(priv, &priv->map->WPA_CONF, 0);
651 for (i = 0; i < ARRAY_SIZE(rtl8187b_reg_table); i++) {
652 rtl818x_iowrite8_idx(priv,
654 (rtl8187b_reg_table[i][0] | 0xFF00),
655 rtl8187b_reg_table[i][1],
656 rtl8187b_reg_table[i][2]);
659 rtl818x_iowrite16(priv, &priv->map->TID_AC_MAP, 0xFA50);
660 rtl818x_iowrite16(priv, &priv->map->INT_MIG, 0);
662 rtl818x_iowrite32_idx(priv, (__le32 *)0xFFF0, 0, 1);
663 rtl818x_iowrite32_idx(priv, (__le32 *)0xFFF4, 0, 1);
664 rtl818x_iowrite8_idx(priv, (u8 *)0xFFF8, 0, 1);
666 rtl818x_iowrite32(priv, &priv->map->RF_TIMING, 0x00004001);
668 rtl818x_iowrite16_idx(priv, (__le16 *)0xFF72, 0x569A, 2);
670 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
671 RTL818X_EEPROM_CMD_CONFIG);
672 reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
673 reg |= RTL818X_CONFIG3_ANAPARAM_WRITE;
674 rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg);
675 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
676 RTL818X_EEPROM_CMD_NORMAL);
678 rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 0x0480);
679 rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0x2488);
680 rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1FFF);
685 reg = RTL818X_CMD_TX_ENABLE | RTL818X_CMD_RX_ENABLE;
686 rtl818x_iowrite8(priv, &priv->map->CMD, reg);
687 rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0xFFFF);
689 rtl818x_iowrite8(priv, (u8 *)0xFE41, 0xF4);
690 rtl818x_iowrite8(priv, (u8 *)0xFE40, 0x00);
691 rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x00);
692 rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x01);
693 rtl818x_iowrite8(priv, (u8 *)0xFE40, 0x0F);
694 rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x00);
695 rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x01);
697 reg = rtl818x_ioread8(priv, (u8 *)0xFFDB);
698 rtl818x_iowrite8(priv, (u8 *)0xFFDB, reg | (1 << 2));
699 rtl818x_iowrite16_idx(priv, (__le16 *)0xFF72, 0x59FA, 3);
700 rtl818x_iowrite16_idx(priv, (__le16 *)0xFF74, 0x59D2, 3);
701 rtl818x_iowrite16_idx(priv, (__le16 *)0xFF76, 0x59D2, 3);
702 rtl818x_iowrite16_idx(priv, (__le16 *)0xFF78, 0x19FA, 3);
703 rtl818x_iowrite16_idx(priv, (__le16 *)0xFF7A, 0x19FA, 3);
704 rtl818x_iowrite16_idx(priv, (__le16 *)0xFF7C, 0x00D0, 3);
705 rtl818x_iowrite8(priv, (u8 *)0xFF61, 0);
706 rtl818x_iowrite8_idx(priv, (u8 *)0xFF80, 0x0F, 1);
707 rtl818x_iowrite8_idx(priv, (u8 *)0xFF83, 0x03, 1);
708 rtl818x_iowrite8(priv, (u8 *)0xFFDA, 0x10);
709 rtl818x_iowrite8_idx(priv, (u8 *)0xFF4D, 0x08, 2);
711 rtl818x_iowrite32(priv, &priv->map->HSSI_PARA, 0x0600321B);
713 rtl818x_iowrite16_idx(priv, (__le16 *)0xFFEC, 0x0800, 1);
718 static int rtl8187_start(struct ieee80211_hw *dev)
720 struct rtl8187_priv *priv = dev->priv;
724 ret = (!priv->is_rtl8187b) ? rtl8187_init_hw(dev) :
725 rtl8187b_init_hw(dev);
729 mutex_lock(&priv->conf_mutex);
730 if (priv->is_rtl8187b) {
731 reg = RTL818X_RX_CONF_MGMT |
732 RTL818X_RX_CONF_DATA |
733 RTL818X_RX_CONF_BROADCAST |
734 RTL818X_RX_CONF_NICMAC |
735 RTL818X_RX_CONF_BSSID |
736 (7 << 13 /* RX FIFO threshold NONE */) |
737 (7 << 10 /* MAX RX DMA */) |
738 RTL818X_RX_CONF_RX_AUTORESETPHY |
739 RTL818X_RX_CONF_ONLYERLPKT |
740 RTL818X_RX_CONF_MULTICAST;
742 rtl818x_iowrite32(priv, &priv->map->RX_CONF, reg);
744 rtl818x_iowrite32(priv, &priv->map->TX_CONF,
745 RTL818X_TX_CONF_HW_SEQNUM |
746 RTL818X_TX_CONF_DISREQQSIZE |
747 (7 << 8 /* short retry limit */) |
748 (7 << 0 /* long retry limit */) |
749 (7 << 21 /* MAX TX DMA */));
750 rtl8187_init_urbs(dev);
751 mutex_unlock(&priv->conf_mutex);
755 rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0xFFFF);
757 rtl818x_iowrite32(priv, &priv->map->MAR[0], ~0);
758 rtl818x_iowrite32(priv, &priv->map->MAR[1], ~0);
760 rtl8187_init_urbs(dev);
762 reg = RTL818X_RX_CONF_ONLYERLPKT |
763 RTL818X_RX_CONF_RX_AUTORESETPHY |
764 RTL818X_RX_CONF_BSSID |
765 RTL818X_RX_CONF_MGMT |
766 RTL818X_RX_CONF_DATA |
767 (7 << 13 /* RX FIFO threshold NONE */) |
768 (7 << 10 /* MAX RX DMA */) |
769 RTL818X_RX_CONF_BROADCAST |
770 RTL818X_RX_CONF_NICMAC;
773 rtl818x_iowrite32(priv, &priv->map->RX_CONF, reg);
775 reg = rtl818x_ioread8(priv, &priv->map->CW_CONF);
776 reg &= ~RTL818X_CW_CONF_PERPACKET_CW_SHIFT;
777 reg |= RTL818X_CW_CONF_PERPACKET_RETRY_SHIFT;
778 rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg);
780 reg = rtl818x_ioread8(priv, &priv->map->TX_AGC_CTL);
781 reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_GAIN_SHIFT;
782 reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT;
783 reg &= ~RTL818X_TX_AGC_CTL_FEEDBACK_ANT;
784 rtl818x_iowrite8(priv, &priv->map->TX_AGC_CTL, reg);
786 reg = RTL818X_TX_CONF_CW_MIN |
787 (7 << 21 /* MAX TX DMA */) |
788 RTL818X_TX_CONF_NO_ICV;
789 rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg);
791 reg = rtl818x_ioread8(priv, &priv->map->CMD);
792 reg |= RTL818X_CMD_TX_ENABLE;
793 reg |= RTL818X_CMD_RX_ENABLE;
794 rtl818x_iowrite8(priv, &priv->map->CMD, reg);
795 mutex_unlock(&priv->conf_mutex);
800 static void rtl8187_stop(struct ieee80211_hw *dev)
802 struct rtl8187_priv *priv = dev->priv;
803 struct rtl8187_rx_info *info;
807 mutex_lock(&priv->conf_mutex);
808 rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
810 reg = rtl818x_ioread8(priv, &priv->map->CMD);
811 reg &= ~RTL818X_CMD_TX_ENABLE;
812 reg &= ~RTL818X_CMD_RX_ENABLE;
813 rtl818x_iowrite8(priv, &priv->map->CMD, reg);
817 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
818 reg = rtl818x_ioread8(priv, &priv->map->CONFIG4);
819 rtl818x_iowrite8(priv, &priv->map->CONFIG4, reg | RTL818X_CONFIG4_VCOOFF);
820 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
822 while ((skb = skb_dequeue(&priv->rx_queue))) {
823 info = (struct rtl8187_rx_info *)skb->cb;
824 usb_kill_urb(info->urb);
827 mutex_unlock(&priv->conf_mutex);
830 static int rtl8187_add_interface(struct ieee80211_hw *dev,
831 struct ieee80211_if_init_conf *conf)
833 struct rtl8187_priv *priv = dev->priv;
836 if (priv->mode != NL80211_IFTYPE_MONITOR)
839 switch (conf->type) {
840 case NL80211_IFTYPE_STATION:
841 priv->mode = conf->type;
847 mutex_lock(&priv->conf_mutex);
848 priv->vif = conf->vif;
850 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
851 for (i = 0; i < ETH_ALEN; i++)
852 rtl818x_iowrite8(priv, &priv->map->MAC[i],
853 ((u8 *)conf->mac_addr)[i]);
854 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
856 mutex_unlock(&priv->conf_mutex);
860 static void rtl8187_remove_interface(struct ieee80211_hw *dev,
861 struct ieee80211_if_init_conf *conf)
863 struct rtl8187_priv *priv = dev->priv;
864 mutex_lock(&priv->conf_mutex);
865 priv->mode = NL80211_IFTYPE_MONITOR;
867 mutex_unlock(&priv->conf_mutex);
870 static int rtl8187_config(struct ieee80211_hw *dev, u32 changed)
872 struct rtl8187_priv *priv = dev->priv;
873 struct ieee80211_conf *conf = &dev->conf;
876 mutex_lock(&priv->conf_mutex);
877 reg = rtl818x_ioread32(priv, &priv->map->TX_CONF);
878 /* Enable TX loopback on MAC level to avoid TX during channel
879 * changes, as this has be seen to causes problems and the
880 * card will stop work until next reset
882 rtl818x_iowrite32(priv, &priv->map->TX_CONF,
883 reg | RTL818X_TX_CONF_LOOPBACK_MAC);
884 priv->rf->set_chan(dev, conf);
886 rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg);
888 rtl818x_iowrite16(priv, &priv->map->ATIM_WND, 2);
889 rtl818x_iowrite16(priv, &priv->map->ATIMTR_INTERVAL, 100);
890 rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL, 100);
891 rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL_TIME, 100);
892 mutex_unlock(&priv->conf_mutex);
896 static int rtl8187_config_interface(struct ieee80211_hw *dev,
897 struct ieee80211_vif *vif,
898 struct ieee80211_if_conf *conf)
900 struct rtl8187_priv *priv = dev->priv;
904 mutex_lock(&priv->conf_mutex);
905 for (i = 0; i < ETH_ALEN; i++)
906 rtl818x_iowrite8(priv, &priv->map->BSSID[i], conf->bssid[i]);
908 if (is_valid_ether_addr(conf->bssid)) {
909 reg = RTL818X_MSR_INFRA;
910 if (priv->is_rtl8187b)
911 reg |= RTL818X_MSR_ENEDCA;
912 rtl818x_iowrite8(priv, &priv->map->MSR, reg);
914 reg = RTL818X_MSR_NO_LINK;
915 rtl818x_iowrite8(priv, &priv->map->MSR, reg);
918 mutex_unlock(&priv->conf_mutex);
922 static void rtl8187_conf_erp(struct rtl8187_priv *priv, bool use_short_slot,
923 bool use_short_preamble)
925 if (priv->is_rtl8187b) {
926 u8 difs, eifs, slot_time;
929 if (use_short_slot) {
938 rtl818x_iowrite8(priv, &priv->map->SIFS, 0x22);
939 rtl818x_iowrite8(priv, &priv->map->SLOT, slot_time);
940 rtl818x_iowrite8(priv, &priv->map->DIFS, difs);
943 * BRSR+1 on 8187B is in fact EIFS register
944 * Value in units of 4 us
946 rtl818x_iowrite8(priv, (u8 *)&priv->map->BRSR + 1, eifs);
949 * For 8187B, CARRIER_SENSE_COUNTER is in fact ack timeout
950 * register. In units of 4 us like eifs register
951 * ack_timeout = ack duration + plcp + difs + preamble
953 ack_timeout = 112 + 48 + difs;
954 if (use_short_preamble)
958 rtl818x_iowrite8(priv, &priv->map->CARRIER_SENSE_COUNTER,
959 DIV_ROUND_UP(ack_timeout, 4));
961 rtl818x_iowrite8(priv, &priv->map->SIFS, 0x22);
962 if (use_short_slot) {
963 rtl818x_iowrite8(priv, &priv->map->SLOT, 0x9);
964 rtl818x_iowrite8(priv, &priv->map->DIFS, 0x14);
965 rtl818x_iowrite8(priv, &priv->map->EIFS, 91 - 0x14);
966 rtl818x_iowrite8(priv, &priv->map->CW_VAL, 0x73);
968 rtl818x_iowrite8(priv, &priv->map->SLOT, 0x14);
969 rtl818x_iowrite8(priv, &priv->map->DIFS, 0x24);
970 rtl818x_iowrite8(priv, &priv->map->EIFS, 91 - 0x24);
971 rtl818x_iowrite8(priv, &priv->map->CW_VAL, 0xa5);
976 static void rtl8187_bss_info_changed(struct ieee80211_hw *dev,
977 struct ieee80211_vif *vif,
978 struct ieee80211_bss_conf *info,
981 struct rtl8187_priv *priv = dev->priv;
983 if (changed & (BSS_CHANGED_ERP_SLOT | BSS_CHANGED_ERP_PREAMBLE))
984 rtl8187_conf_erp(priv, info->use_short_slot,
985 info->use_short_preamble);
988 static void rtl8187_configure_filter(struct ieee80211_hw *dev,
989 unsigned int changed_flags,
990 unsigned int *total_flags,
991 int mc_count, struct dev_addr_list *mclist)
993 struct rtl8187_priv *priv = dev->priv;
995 if (changed_flags & FIF_FCSFAIL)
996 priv->rx_conf ^= RTL818X_RX_CONF_FCS;
997 if (changed_flags & FIF_CONTROL)
998 priv->rx_conf ^= RTL818X_RX_CONF_CTRL;
999 if (changed_flags & FIF_OTHER_BSS)
1000 priv->rx_conf ^= RTL818X_RX_CONF_MONITOR;
1001 if (*total_flags & FIF_ALLMULTI || mc_count > 0)
1002 priv->rx_conf |= RTL818X_RX_CONF_MULTICAST;
1004 priv->rx_conf &= ~RTL818X_RX_CONF_MULTICAST;
1008 if (priv->rx_conf & RTL818X_RX_CONF_FCS)
1009 *total_flags |= FIF_FCSFAIL;
1010 if (priv->rx_conf & RTL818X_RX_CONF_CTRL)
1011 *total_flags |= FIF_CONTROL;
1012 if (priv->rx_conf & RTL818X_RX_CONF_MONITOR)
1013 *total_flags |= FIF_OTHER_BSS;
1014 if (priv->rx_conf & RTL818X_RX_CONF_MULTICAST)
1015 *total_flags |= FIF_ALLMULTI;
1017 rtl818x_iowrite32_async(priv, &priv->map->RX_CONF, priv->rx_conf);
1020 static const struct ieee80211_ops rtl8187_ops = {
1022 .start = rtl8187_start,
1023 .stop = rtl8187_stop,
1024 .add_interface = rtl8187_add_interface,
1025 .remove_interface = rtl8187_remove_interface,
1026 .config = rtl8187_config,
1027 .config_interface = rtl8187_config_interface,
1028 .bss_info_changed = rtl8187_bss_info_changed,
1029 .configure_filter = rtl8187_configure_filter,
1032 static void rtl8187_eeprom_register_read(struct eeprom_93cx6 *eeprom)
1034 struct ieee80211_hw *dev = eeprom->data;
1035 struct rtl8187_priv *priv = dev->priv;
1036 u8 reg = rtl818x_ioread8(priv, &priv->map->EEPROM_CMD);
1038 eeprom->reg_data_in = reg & RTL818X_EEPROM_CMD_WRITE;
1039 eeprom->reg_data_out = reg & RTL818X_EEPROM_CMD_READ;
1040 eeprom->reg_data_clock = reg & RTL818X_EEPROM_CMD_CK;
1041 eeprom->reg_chip_select = reg & RTL818X_EEPROM_CMD_CS;
1044 static void rtl8187_eeprom_register_write(struct eeprom_93cx6 *eeprom)
1046 struct ieee80211_hw *dev = eeprom->data;
1047 struct rtl8187_priv *priv = dev->priv;
1048 u8 reg = RTL818X_EEPROM_CMD_PROGRAM;
1050 if (eeprom->reg_data_in)
1051 reg |= RTL818X_EEPROM_CMD_WRITE;
1052 if (eeprom->reg_data_out)
1053 reg |= RTL818X_EEPROM_CMD_READ;
1054 if (eeprom->reg_data_clock)
1055 reg |= RTL818X_EEPROM_CMD_CK;
1056 if (eeprom->reg_chip_select)
1057 reg |= RTL818X_EEPROM_CMD_CS;
1059 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, reg);
1063 static int __devinit rtl8187_probe(struct usb_interface *intf,
1064 const struct usb_device_id *id)
1066 struct usb_device *udev = interface_to_usbdev(intf);
1067 struct ieee80211_hw *dev;
1068 struct rtl8187_priv *priv;
1069 struct eeprom_93cx6 eeprom;
1070 struct ieee80211_channel *channel;
1071 const char *chip_name;
1075 dev = ieee80211_alloc_hw(sizeof(*priv), &rtl8187_ops);
1077 printk(KERN_ERR "rtl8187: ieee80211 alloc failed\n");
1082 priv->is_rtl8187b = (id->driver_info == DEVICE_RTL8187B);
1084 SET_IEEE80211_DEV(dev, &intf->dev);
1085 usb_set_intfdata(intf, dev);
1090 skb_queue_head_init(&priv->rx_queue);
1092 BUILD_BUG_ON(sizeof(priv->channels) != sizeof(rtl818x_channels));
1093 BUILD_BUG_ON(sizeof(priv->rates) != sizeof(rtl818x_rates));
1095 memcpy(priv->channels, rtl818x_channels, sizeof(rtl818x_channels));
1096 memcpy(priv->rates, rtl818x_rates, sizeof(rtl818x_rates));
1097 priv->map = (struct rtl818x_csr *)0xFF00;
1099 priv->band.band = IEEE80211_BAND_2GHZ;
1100 priv->band.channels = priv->channels;
1101 priv->band.n_channels = ARRAY_SIZE(rtl818x_channels);
1102 priv->band.bitrates = priv->rates;
1103 priv->band.n_bitrates = ARRAY_SIZE(rtl818x_rates);
1104 dev->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band;
1107 priv->mode = NL80211_IFTYPE_MONITOR;
1108 dev->flags = IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
1109 IEEE80211_HW_RX_INCLUDES_FCS;
1112 eeprom.register_read = rtl8187_eeprom_register_read;
1113 eeprom.register_write = rtl8187_eeprom_register_write;
1114 if (rtl818x_ioread32(priv, &priv->map->RX_CONF) & (1 << 6))
1115 eeprom.width = PCI_EEPROM_WIDTH_93C66;
1117 eeprom.width = PCI_EEPROM_WIDTH_93C46;
1119 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
1122 eeprom_93cx6_multiread(&eeprom, RTL8187_EEPROM_MAC_ADDR,
1123 (__le16 __force *)dev->wiphy->perm_addr, 3);
1124 if (!is_valid_ether_addr(dev->wiphy->perm_addr)) {
1125 printk(KERN_WARNING "rtl8187: Invalid hwaddr! Using randomly "
1126 "generated MAC address\n");
1127 random_ether_addr(dev->wiphy->perm_addr);
1130 channel = priv->channels;
1131 for (i = 0; i < 3; i++) {
1132 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_1 + i,
1134 (*channel++).hw_value = txpwr & 0xFF;
1135 (*channel++).hw_value = txpwr >> 8;
1137 for (i = 0; i < 2; i++) {
1138 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_4 + i,
1140 (*channel++).hw_value = txpwr & 0xFF;
1141 (*channel++).hw_value = txpwr >> 8;
1144 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_BASE,
1147 reg = rtl818x_ioread8(priv, &priv->map->PGSELECT) & ~1;
1148 rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg | 1);
1149 /* 0 means asic B-cut, we should use SW 3 wire
1150 * bit-by-bit banging for radio. 1 means we can use
1151 * USB specific request to write radio registers */
1152 priv->asic_rev = rtl818x_ioread8(priv, (u8 *)0xFFFE) & 0x3;
1153 rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg);
1154 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
1156 if (!priv->is_rtl8187b) {
1158 reg32 = rtl818x_ioread32(priv, &priv->map->TX_CONF);
1159 reg32 &= RTL818X_TX_CONF_HWVER_MASK;
1161 case RTL818X_TX_CONF_R8187vD_B:
1162 /* Some RTL8187B devices have a USB ID of 0x8187
1163 * detect them here */
1164 chip_name = "RTL8187BvB(early)";
1165 priv->is_rtl8187b = 1;
1166 priv->hw_rev = RTL8187BvB;
1168 case RTL818X_TX_CONF_R8187vD:
1169 chip_name = "RTL8187vD";
1172 chip_name = "RTL8187vB (default)";
1176 * Force USB request to write radio registers for 8187B, Realtek
1177 * only uses it in their sources
1179 /*if (priv->asic_rev == 0) {
1180 printk(KERN_WARNING "rtl8187: Forcing use of USB "
1181 "requests to write to radio registers\n");
1184 switch (rtl818x_ioread8(priv, (u8 *)0xFFE1)) {
1185 case RTL818X_R8187B_B:
1186 chip_name = "RTL8187BvB";
1187 priv->hw_rev = RTL8187BvB;
1189 case RTL818X_R8187B_D:
1190 chip_name = "RTL8187BvD";
1191 priv->hw_rev = RTL8187BvD;
1193 case RTL818X_R8187B_E:
1194 chip_name = "RTL8187BvE";
1195 priv->hw_rev = RTL8187BvE;
1198 chip_name = "RTL8187BvB (default)";
1199 priv->hw_rev = RTL8187BvB;
1203 if (!priv->is_rtl8187b) {
1204 for (i = 0; i < 2; i++) {
1205 eeprom_93cx6_read(&eeprom,
1206 RTL8187_EEPROM_TXPWR_CHAN_6 + i,
1208 (*channel++).hw_value = txpwr & 0xFF;
1209 (*channel++).hw_value = txpwr >> 8;
1212 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_6,
1214 (*channel++).hw_value = txpwr & 0xFF;
1216 eeprom_93cx6_read(&eeprom, 0x0A, &txpwr);
1217 (*channel++).hw_value = txpwr & 0xFF;
1219 eeprom_93cx6_read(&eeprom, 0x1C, &txpwr);
1220 (*channel++).hw_value = txpwr & 0xFF;
1221 (*channel++).hw_value = txpwr >> 8;
1224 if (priv->is_rtl8187b) {
1225 printk(KERN_WARNING "rtl8187: 8187B chip detected. Support "
1226 "is EXPERIMENTAL, and could damage your\n"
1227 " hardware, use at your own risk\n");
1228 dev->flags |= IEEE80211_HW_SIGNAL_DBM;
1230 dev->flags |= IEEE80211_HW_SIGNAL_UNSPEC;
1231 dev->max_signal = 65;
1235 * XXX: Once this driver supports anything that requires
1236 * beacons it must implement IEEE80211_TX_CTL_ASSIGN_SEQ.
1238 dev->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION);
1240 if ((id->driver_info == DEVICE_RTL8187) && priv->is_rtl8187b)
1241 printk(KERN_INFO "rtl8187: inconsistency between id with OEM"
1244 priv->rf = rtl8187_detect_rf(dev);
1245 dev->extra_tx_headroom = (!priv->is_rtl8187b) ?
1246 sizeof(struct rtl8187_tx_hdr) :
1247 sizeof(struct rtl8187b_tx_hdr);
1248 if (!priv->is_rtl8187b)
1253 err = ieee80211_register_hw(dev);
1255 printk(KERN_ERR "rtl8187: Cannot register device\n");
1258 mutex_init(&priv->conf_mutex);
1260 printk(KERN_INFO "%s: hwaddr %pM, %s V%d + %s\n",
1261 wiphy_name(dev->wiphy), dev->wiphy->perm_addr,
1262 chip_name, priv->asic_rev, priv->rf->name);
1267 ieee80211_free_hw(dev);
1268 usb_set_intfdata(intf, NULL);
1273 static void __devexit rtl8187_disconnect(struct usb_interface *intf)
1275 struct ieee80211_hw *dev = usb_get_intfdata(intf);
1276 struct rtl8187_priv *priv;
1281 ieee80211_unregister_hw(dev);
1284 usb_put_dev(interface_to_usbdev(intf));
1285 ieee80211_free_hw(dev);
1288 static struct usb_driver rtl8187_driver = {
1289 .name = KBUILD_MODNAME,
1290 .id_table = rtl8187_table,
1291 .probe = rtl8187_probe,
1292 .disconnect = __devexit_p(rtl8187_disconnect),
1295 static int __init rtl8187_init(void)
1297 return usb_register(&rtl8187_driver);
1300 static void __exit rtl8187_exit(void)
1302 usb_deregister(&rtl8187_driver);
1305 module_init(rtl8187_init);
1306 module_exit(rtl8187_exit);