drivers/net/wireless/iwlwifi/iwl-agn.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved.
   4  *
   5  * Portions of this file are derived from the ipw3945 project, as well
   6  * as portions of the ieee80211 subsystem header files.
   7  *
   8  * This program is free software; you can redistribute it and/or modify it
   9  * under the terms of version 2 of the GNU General Public License as
  10  * published by the Free Software Foundation.
  11  *
  12  * This program is distributed in the hope that it will be useful, but WITHOUT
  13  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  15  * more details.
  16  *
  17  * You should have received a copy of the GNU General Public License along with
  18  * this program; if not, write to the Free Software Foundation, Inc.,
  19  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20  *
  21  * The full GNU General Public License is included in this distribution in the
  22  * file called LICENSE.
  23  *
  24  * Contact Information:
  25  *  Intel Linux Wireless <ilw@linux.intel.com>
  26  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27  *
  28  *****************************************************************************/
  29
  30 #include <linux/kernel.h>
  31 #include <linux/module.h>
  32 #include <linux/init.h>
  33 #include <linux/pci.h>
  34 #include <linux/slab.h>
  35 #include <linux/dma-mapping.h>
  36 #include <linux/delay.h>
  37 #include <linux/sched.h>
  38 #include <linux/skbuff.h>
  39 #include <linux/netdevice.h>
  40 #include <linux/wireless.h>
  41 #include <linux/firmware.h>
  42 #include <linux/etherdevice.h>
  43 #include <linux/if_arp.h>
  44
  45 #include <net/mac80211.h>
  46
  47 #include <asm/div64.h>
  48
  49 #define DRV_NAME        "iwlagn"
  50
  51 #include "iwl-eeprom.h"
  52 #include "iwl-dev.h"
  53 #include "iwl-core.h"
  54 #include "iwl-io.h"
  55 #include "iwl-helpers.h"
  56 #include "iwl-sta.h"
  57 #include "iwl-calib.h"
  58 #include "iwl-agn.h"
  59
  60
  61 /******************************************************************************
  62  *
  63  * module boiler plate
  64  *
  65  ******************************************************************************/
  66
  67 /*
  68  * module name, copyright, version, etc.
  69  */
  70 #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link AGN driver for Linux"
  71
  72 #ifdef CONFIG_IWLWIFI_DEBUG
  73 #define VD "d"
  74 #else
  75 #define VD
  76 #endif
  77
  78 #define DRV_VERSION     IWLWIFI_VERSION VD
  79
  80
  81 MODULE_DESCRIPTION(DRV_DESCRIPTION);
  82 MODULE_VERSION(DRV_VERSION);
  83 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
  84 MODULE_LICENSE("GPL");
  85 MODULE_ALIAS("iwl4965");
  86
  87 /**
  88  * iwl_commit_rxon - commit staging_rxon to hardware
  89  *
  90  * The RXON command in staging_rxon is committed to the hardware and
  91  * the active_rxon structure is updated with the new data.  This
  92  * function correctly transitions out of the RXON_ASSOC_MSK state if
  93  * a HW tune is required based on the RXON structure changes.
  94  */
  95 int iwl_commit_rxon(struct iwl_priv *priv)
  96 {
  97         /* cast away the const for active_rxon in this function */
  98         struct iwl_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
  99         int ret;
 100         bool new_assoc =
 101                 !!(priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK);
 102
 103         if (!iwl_is_alive(priv))
 104                 return -EBUSY;
 105
 106         /* always get timestamp with Rx frame */
 107         priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
 108
 109         ret = iwl_check_rxon_cmd(priv);
 110         if (ret) {
 111                 IWL_ERR(priv, "Invalid RXON configuration.  Not committing.\n");
 112                 return -EINVAL;
 113         }
 114
 115         /*
 116          * receive commit_rxon request
 117          * abort any previous channel switch if still in process
 118          */
 119         if (priv->switch_rxon.switch_in_progress &&
 120             (priv->switch_rxon.channel != priv->staging_rxon.channel)) {
 121                 IWL_DEBUG_11H(priv, "abort channel switch on %d\n",
 122                       le16_to_cpu(priv->switch_rxon.channel));
 123                 priv->switch_rxon.switch_in_progress = false;
 124         }
 125
 126         /* If we don't need to send a full RXON, we can use
 127          * iwl_rxon_assoc_cmd which is used to reconfigure filter
 128          * and other flags for the current radio configuration. */
 129         if (!iwl_full_rxon_required(priv)) {
 130                 ret = iwl_send_rxon_assoc(priv);
 131                 if (ret) {
 132                         IWL_ERR(priv, "Error setting RXON_ASSOC (%d)\n", ret);
 133                         return ret;
 134                 }
 135
 136                 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
 137                 iwl_print_rx_config_cmd(priv);
 138                 return 0;
 139         }
 140
 141         /* If we are currently associated and the new config requires
 142          * an RXON_ASSOC and the new config wants the associated mask enabled,
 143          * we must clear the associated from the active configuration
 144          * before we apply the new config */
 145         if (iwl_is_associated(priv) && new_assoc) {
 146                 IWL_DEBUG_INFO(priv, "Toggling associated bit on current RXON\n");
 147                 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
 148
 149                 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
 150                                       sizeof(struct iwl_rxon_cmd),
 151                                       &priv->active_rxon);
 152
 153                 /* If the mask clearing failed then we set
 154                  * active_rxon back to what it was previously */
 155                 if (ret) {
 156                         active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
 157                         IWL_ERR(priv, "Error clearing ASSOC_MSK (%d)\n", ret);
 158                         return ret;
 159                 }
 160                 iwl_clear_ucode_stations(priv);
 161                 iwl_restore_stations(priv);
 162                 ret = iwl_restore_default_wep_keys(priv);
 163                 if (ret) {
 164                         IWL_ERR(priv, "Failed to restore WEP keys (%d)\n", ret);
 165                         return ret;
 166                 }
 167         }
 168
 169         IWL_DEBUG_INFO(priv, "Sending RXON\n"
 170                        "* with%s RXON_FILTER_ASSOC_MSK\n"
 171                        "* channel = %d\n"
 172                        "* bssid = %pM\n",
 173                        (new_assoc ? "" : "out"),
 174                        le16_to_cpu(priv->staging_rxon.channel),
 175                        priv->staging_rxon.bssid_addr);
 176
 177         iwl_set_rxon_hwcrypto(priv, !priv->cfg->mod_params->sw_crypto);
 178
 179         /* Apply the new configuration
 180          * RXON unassoc clears the station table in uCode so restoration of
 181          * stations is needed after it (the RXON command) completes
 182          */
 183         if (!new_assoc) {
 184                 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
 185                               sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
 186                 if (ret) {
 187                         IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
 188                         return ret;
 189                 }
 190                 IWL_DEBUG_INFO(priv, "Return from !new_assoc RXON.\n");
 191                 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
 192                 iwl_clear_ucode_stations(priv);
 193                 iwl_restore_stations(priv);
 194                 ret = iwl_restore_default_wep_keys(priv);
 195                 if (ret) {
 196                         IWL_ERR(priv, "Failed to restore WEP keys (%d)\n", ret);
 197                         return ret;
 198                 }
 199         }
 200
 201         priv->start_calib = 0;
 202         if (new_assoc) {
 203                 /*
 204                  * allow CTS-to-self if possible for new association.
 205                  * this is relevant only for 5000 series and up,
 206                  * but will not damage 4965
 207                  */
 208                 priv->staging_rxon.flags |= RXON_FLG_SELF_CTS_EN;
 209
 210                 /* Apply the new configuration
 211                  * RXON assoc doesn't clear the station table in uCode,
 212                  */
 213                 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
 214                               sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
 215                 if (ret) {
 216                         IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
 217                         return ret;
 218                 }
 219                 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
 220         }
 221         iwl_print_rx_config_cmd(priv);
 222
 223         iwl_init_sensitivity(priv);
 224
 225         /* If we issue a new RXON command which required a tune then we must
 226          * send a new TXPOWER command or we won't be able to Tx any frames */
 227         ret = iwl_set_tx_power(priv, priv->tx_power_user_lmt, true);
 228         if (ret) {
 229                 IWL_ERR(priv, "Error sending TX power (%d)\n", ret);
 230                 return ret;
 231         }
 232
 233         return 0;
 234 }
 235
 236 void iwl_update_chain_flags(struct iwl_priv *priv)
 237 {
 238
 239         if (priv->cfg->ops->hcmd->set_rxon_chain)
 240                 priv->cfg->ops->hcmd->set_rxon_chain(priv);
 241         iwlcore_commit_rxon(priv);
 242 }
 243
 244 static void iwl_clear_free_frames(struct iwl_priv *priv)
 245 {
 246         struct list_head *element;
 247
 248         IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
 249                        priv->frames_count);
 250
 251         while (!list_empty(&priv->free_frames)) {
 252                 element = priv->free_frames.next;
 253                 list_del(element);
 254                 kfree(list_entry(element, struct iwl_frame, list));
 255                 priv->frames_count--;
 256         }
 257
 258         if (priv->frames_count) {
 259                 IWL_WARN(priv, "%d frames still in use.  Did we lose one?\n",
 260                             priv->frames_count);
 261                 priv->frames_count = 0;
 262         }
 263 }
 264
 265 static struct iwl_frame *iwl_get_free_frame(struct iwl_priv *priv)
 266 {
 267         struct iwl_frame *frame;
 268         struct list_head *element;
 269         if (list_empty(&priv->free_frames)) {
 270                 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
 271                 if (!frame) {
 272                         IWL_ERR(priv, "Could not allocate frame!\n");
 273                         return NULL;
 274                 }
 275
 276                 priv->frames_count++;
 277                 return frame;
 278         }
 279
 280         element = priv->free_frames.next;
 281         list_del(element);
 282         return list_entry(element, struct iwl_frame, list);
 283 }
 284
 285 static void iwl_free_frame(struct iwl_priv *priv, struct iwl_frame *frame)
 286 {
 287         memset(frame, 0, sizeof(*frame));
 288         list_add(&frame->list, &priv->free_frames);
 289 }
 290
 291 static u32 iwl_fill_beacon_frame(struct iwl_priv *priv,
 292                                           struct ieee80211_hdr *hdr,
 293                                           int left)
 294 {
 295         if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
 296             ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
 297              (priv->iw_mode != NL80211_IFTYPE_AP)))
 298                 return 0;
 299
 300         if (priv->ibss_beacon->len > left)
 301                 return 0;
 302
 303         memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
 304
 305         return priv->ibss_beacon->len;
 306 }
 307
 308 /* Parse the beacon frame to find the TIM element and set tim_idx & tim_size */
 309 static void iwl_set_beacon_tim(struct iwl_priv *priv,
 310                 struct iwl_tx_beacon_cmd *tx_beacon_cmd,
 311                 u8 *beacon, u32 frame_size)
 312 {
 313         u16 tim_idx;
 314         struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)beacon;
 315
 316         /*
 317          * The index is relative to frame start but we start looking at the
 318          * variable-length part of the beacon.
 319          */
 320         tim_idx = mgmt->u.beacon.variable - beacon;
 321
 322         /* Parse variable-length elements of beacon to find WLAN_EID_TIM */
 323         while ((tim_idx < (frame_size - 2)) &&
 324                         (beacon[tim_idx] != WLAN_EID_TIM))
 325                 tim_idx += beacon[tim_idx+1] + 2;
 326
 327         /* If TIM field was found, set variables */
 328         if ((tim_idx < (frame_size - 1)) && (beacon[tim_idx] == WLAN_EID_TIM)) {
 329                 tx_beacon_cmd->tim_idx = cpu_to_le16(tim_idx);
 330                 tx_beacon_cmd->tim_size = beacon[tim_idx+1];
 331         } else
 332                 IWL_WARN(priv, "Unable to find TIM Element in beacon\n");
 333 }
 334
 335 static unsigned int iwl_hw_get_beacon_cmd(struct iwl_priv *priv,
 336                                        struct iwl_frame *frame)
 337 {
 338         struct iwl_tx_beacon_cmd *tx_beacon_cmd;
 339         u32 frame_size;
 340         u32 rate_flags;
 341         u32 rate;
 342         /*
 343          * We have to set up the TX command, the TX Beacon command, and the
 344          * beacon contents.
 345          */
 346
 347         /* Initialize memory */
 348         tx_beacon_cmd = &frame->u.beacon;
 349         memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
 350
 351         /* Set up TX beacon contents */
 352         frame_size = iwl_fill_beacon_frame(priv, tx_beacon_cmd->frame,
 353                                 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
 354         if (WARN_ON_ONCE(frame_size > MAX_MPDU_SIZE))
 355                 return 0;
 356
 357         /* Set up TX command fields */
 358         tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
 359         tx_beacon_cmd->tx.sta_id = priv->hw_params.bcast_sta_id;
 360         tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
 361         tx_beacon_cmd->tx.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK |
 362                 TX_CMD_FLG_TSF_MSK | TX_CMD_FLG_STA_RATE_MSK;
 363
 364         /* Set up TX beacon command fields */
 365         iwl_set_beacon_tim(priv, tx_beacon_cmd, (u8 *)tx_beacon_cmd->frame,
 366                         frame_size);
 367
 368         /* Set up packet rate and flags */
 369         rate = iwl_rate_get_lowest_plcp(priv);
 370         priv->mgmt_tx_ant = iwl_toggle_tx_ant(priv, priv->mgmt_tx_ant);
 371         rate_flags = iwl_ant_idx_to_flags(priv->mgmt_tx_ant);
 372         if ((rate >= IWL_FIRST_CCK_RATE) && (rate <= IWL_LAST_CCK_RATE))
 373                 rate_flags |= RATE_MCS_CCK_MSK;
 374         tx_beacon_cmd->tx.rate_n_flags = iwl_hw_set_rate_n_flags(rate,
 375                         rate_flags);
 376
 377         return sizeof(*tx_beacon_cmd) + frame_size;
 378 }
 379 static int iwl_send_beacon_cmd(struct iwl_priv *priv)
 380 {
 381         struct iwl_frame *frame;
 382         unsigned int frame_size;
 383         int rc;
 384
 385         frame = iwl_get_free_frame(priv);
 386         if (!frame) {
 387                 IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
 388                           "command.\n");
 389                 return -ENOMEM;
 390         }
 391
 392         frame_size = iwl_hw_get_beacon_cmd(priv, frame);
 393         if (!frame_size) {
 394                 IWL_ERR(priv, "Error configuring the beacon command\n");
 395                 iwl_free_frame(priv, frame);
 396                 return -EINVAL;
 397         }
 398
 399         rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
 400                               &frame->u.cmd[0]);
 401
 402         iwl_free_frame(priv, frame);
 403
 404         return rc;
 405 }
 406
 407 static inline dma_addr_t iwl_tfd_tb_get_addr(struct iwl_tfd *tfd, u8 idx)
 408 {
 409         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
 410
 411         dma_addr_t addr = get_unaligned_le32(&tb->lo);
 412         if (sizeof(dma_addr_t) > sizeof(u32))
 413                 addr |=
 414                 ((dma_addr_t)(le16_to_cpu(tb->hi_n_len) & 0xF) << 16) << 16;
 415
 416         return addr;
 417 }
 418
 419 static inline u16 iwl_tfd_tb_get_len(struct iwl_tfd *tfd, u8 idx)
 420 {
 421         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
 422
 423         return le16_to_cpu(tb->hi_n_len) >> 4;
 424 }
 425
 426 static inline void iwl_tfd_set_tb(struct iwl_tfd *tfd, u8 idx,
 427                                   dma_addr_t addr, u16 len)
 428 {
 429         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
 430         u16 hi_n_len = len << 4;
 431
 432         put_unaligned_le32(addr, &tb->lo);
 433         if (sizeof(dma_addr_t) > sizeof(u32))
 434                 hi_n_len |= ((addr >> 16) >> 16) & 0xF;
 435
 436         tb->hi_n_len = cpu_to_le16(hi_n_len);
 437
 438         tfd->num_tbs = idx + 1;
 439 }
 440
 441 static inline u8 iwl_tfd_get_num_tbs(struct iwl_tfd *tfd)
 442 {
 443         return tfd->num_tbs & 0x1f;
 444 }
 445
 446 /**
 447  * iwl_hw_txq_free_tfd - Free all chunks referenced by TFD [txq->q.read_ptr]
 448  * @priv - driver private data
 449  * @txq - tx queue
 450  *
 451  * Does NOT advance any TFD circular buffer read/write indexes
 452  * Does NOT free the TFD itself (which is within circular buffer)
 453  */
 454 void iwl_hw_txq_free_tfd(struct iwl_priv *priv, struct iwl_tx_queue *txq)
 455 {
 456         struct iwl_tfd *tfd_tmp = (struct iwl_tfd *)txq->tfds;
 457         struct iwl_tfd *tfd;
 458         struct pci_dev *dev = priv->pci_dev;
 459         int index = txq->q.read_ptr;
 460         int i;
 461         int num_tbs;
 462
 463         tfd = &tfd_tmp[index];
 464
 465         /* Sanity check on number of chunks */
 466         num_tbs = iwl_tfd_get_num_tbs(tfd);
 467
 468         if (num_tbs >= IWL_NUM_OF_TBS) {
 469                 IWL_ERR(priv, "Too many chunks: %i\n", num_tbs);
 470                 /* @todo issue fatal error, it is quite serious situation */
 471                 return;
 472         }
 473
 474         /* Unmap tx_cmd */
 475         if (num_tbs)
 476                 pci_unmap_single(dev,
 477                                 dma_unmap_addr(&txq->meta[index], mapping),
 478                                 dma_unmap_len(&txq->meta[index], len),
 479                                 PCI_DMA_BIDIRECTIONAL);
 480
 481         /* Unmap chunks, if any. */
 482         for (i = 1; i < num_tbs; i++) {
 483                 pci_unmap_single(dev, iwl_tfd_tb_get_addr(tfd, i),
 484                                 iwl_tfd_tb_get_len(tfd, i), PCI_DMA_TODEVICE);
 485
 486                 if (txq->txb) {
 487                         dev_kfree_skb(txq->txb[txq->q.read_ptr].skb[i - 1]);
 488                         txq->txb[txq->q.read_ptr].skb[i - 1] = NULL;
 489                 }
 490         }
 491 }
 492
 493 int iwl_hw_txq_attach_buf_to_tfd(struct iwl_priv *priv,
 494                                  struct iwl_tx_queue *txq,
 495                                  dma_addr_t addr, u16 len,
 496                                  u8 reset, u8 pad)
 497 {
 498         struct iwl_queue *q;
 499         struct iwl_tfd *tfd, *tfd_tmp;
 500         u32 num_tbs;
 501
 502         q = &txq->q;
 503         tfd_tmp = (struct iwl_tfd *)txq->tfds;
 504         tfd = &tfd_tmp[q->write_ptr];
 505
 506         if (reset)
 507                 memset(tfd, 0, sizeof(*tfd));
 508
 509         num_tbs = iwl_tfd_get_num_tbs(tfd);
 510
 511         /* Each TFD can point to a maximum 20 Tx buffers */
 512         if (num_tbs >= IWL_NUM_OF_TBS) {
 513                 IWL_ERR(priv, "Error can not send more than %d chunks\n",
 514                           IWL_NUM_OF_TBS);
 515                 return -EINVAL;
 516         }
 517
 518         BUG_ON(addr & ~DMA_BIT_MASK(36));
 519         if (unlikely(addr & ~IWL_TX_DMA_MASK))
 520                 IWL_ERR(priv, "Unaligned address = %llx\n",
 521                           (unsigned long long)addr);
 522
 523         iwl_tfd_set_tb(tfd, num_tbs, addr, len);
 524
 525         return 0;
 526 }
 527
 528 /*
 529  * Tell nic where to find circular buffer of Tx Frame Descriptors for
 530  * given Tx queue, and enable the DMA channel used for that queue.
 531  *
 532  * 4965 supports up to 16 Tx queues in DRAM, mapped to up to 8 Tx DMA
 533  * channels supported in hardware.
 534  */
 535 int iwl_hw_tx_queue_init(struct iwl_priv *priv,
 536                          struct iwl_tx_queue *txq)
 537 {
 538         int txq_id = txq->q.id;
 539
 540         /* Circular buffer (TFD queue in DRAM) physical base address */
 541         iwl_write_direct32(priv, FH_MEM_CBBC_QUEUE(txq_id),
 542                              txq->q.dma_addr >> 8);
 543
 544         return 0;
 545 }
 546
 547 /******************************************************************************
 548  *
 549  * Generic RX handler implementations
 550  *
 551  ******************************************************************************/
 552 static void iwl_rx_reply_alive(struct iwl_priv *priv,
 553                                 struct iwl_rx_mem_buffer *rxb)
 554 {
 555         struct iwl_rx_packet *pkt = rxb_addr(rxb);
 556         struct iwl_alive_resp *palive;
 557         struct delayed_work *pwork;
 558
 559         palive = &pkt->u.alive_frame;
 560
 561         IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
 562                        "0x%01X 0x%01X\n",
 563                        palive->is_valid, palive->ver_type,
 564                        palive->ver_subtype);
 565
 566         if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
 567                 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
 568                 memcpy(&priv->card_alive_init,
 569                        &pkt->u.alive_frame,
 570                        sizeof(struct iwl_init_alive_resp));
 571                 pwork = &priv->init_alive_start;
 572         } else {
 573                 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
 574                 memcpy(&priv->card_alive, &pkt->u.alive_frame,
 575                        sizeof(struct iwl_alive_resp));
 576                 pwork = &priv->alive_start;
 577         }
 578
 579         /* We delay the ALIVE response by 5ms to
 580          * give the HW RF Kill time to activate... */
 581         if (palive->is_valid == UCODE_VALID_OK)
 582                 queue_delayed_work(priv->workqueue, pwork,
 583                                    msecs_to_jiffies(5));
 584         else
 585                 IWL_WARN(priv, "uCode did not respond OK.\n");
 586 }
 587
 588 static void iwl_bg_beacon_update(struct work_struct *work)
 589 {
 590         struct iwl_priv *priv =
 591                 container_of(work, struct iwl_priv, beacon_update);
 592         struct sk_buff *beacon;
 593
 594         /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
 595         beacon = ieee80211_beacon_get(priv->hw, priv->vif);
 596
 597         if (!beacon) {
 598                 IWL_ERR(priv, "update beacon failed\n");
 599                 return;
 600         }
 601
 602         mutex_lock(&priv->mutex);
 603         /* new beacon skb is allocated every time; dispose previous.*/
 604         if (priv->ibss_beacon)
 605                 dev_kfree_skb(priv->ibss_beacon);
 606
 607         priv->ibss_beacon = beacon;
 608         mutex_unlock(&priv->mutex);
 609
 610         iwl_send_beacon_cmd(priv);
 611 }
 612
 613 /**
 614  * iwl_bg_statistics_periodic - Timer callback to queue statistics
 615  *
 616  * This callback is provided in order to send a statistics request.
 617  *
 618  * This timer function is continually reset to execute within
 619  * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION
 620  * was received.  We need to ensure we receive the statistics in order
 621  * to update the temperature used for calibrating the TXPOWER.
 622  */
 623 static void iwl_bg_statistics_periodic(unsigned long data)
 624 {
 625         struct iwl_priv *priv = (struct iwl_priv *)data;
 626
 627         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
 628                 return;
 629
 630         /* dont send host command if rf-kill is on */
 631         if (!iwl_is_ready_rf(priv))
 632                 return;
 633
 634         iwl_send_statistics_request(priv, CMD_ASYNC, false);
 635 }
 636
 637
 638 static void iwl_print_cont_event_trace(struct iwl_priv *priv, u32 base,
 639                                         u32 start_idx, u32 num_events,
 640                                         u32 mode)
 641 {
 642         u32 i;
 643         u32 ptr;        /* SRAM byte address of log data */
 644         u32 ev, time, data; /* event log data */
 645         unsigned long reg_flags;
 646
 647         if (mode == 0)
 648                 ptr = base + (4 * sizeof(u32)) + (start_idx * 2 * sizeof(u32));
 649         else
 650                 ptr = base + (4 * sizeof(u32)) + (start_idx * 3 * sizeof(u32));
 651
 652         /* Make sure device is powered up for SRAM reads */
 653         spin_lock_irqsave(&priv->reg_lock, reg_flags);
 654         if (iwl_grab_nic_access(priv)) {
 655                 spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
 656                 return;
 657         }
 658
 659         /* Set starting address; reads will auto-increment */
 660         _iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, ptr);
 661         rmb();
 662
 663         /*
 664          * "time" is actually "data" for mode 0 (no timestamp).
 665          * place event id # at far right for easier visual parsing.
 666          */
 667         for (i = 0; i < num_events; i++) {
 668                 ev = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
 669                 time = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
 670                 if (mode == 0) {
 671                         trace_iwlwifi_dev_ucode_cont_event(priv,
 672                                                         0, time, ev);
 673                 } else {
 674                         data = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
 675                         trace_iwlwifi_dev_ucode_cont_event(priv,
 676                                                 time, data, ev);
 677                 }
 678         }
 679         /* Allow device to power down */
 680         iwl_release_nic_access(priv);
 681         spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
 682 }
 683
 684 static void iwl_continuous_event_trace(struct iwl_priv *priv)
 685 {
 686         u32 capacity;   /* event log capacity in # entries */
 687         u32 base;       /* SRAM byte address of event log header */
 688         u32 mode;       /* 0 - no timestamp, 1 - timestamp recorded */
 689         u32 num_wraps;  /* # times uCode wrapped to top of log */
 690         u32 next_entry; /* index of next entry to be written by uCode */
 691
 692         if (priv->ucode_type == UCODE_INIT)
 693                 base = le32_to_cpu(priv->card_alive_init.error_event_table_ptr);
 694         else
 695                 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
 696         if (priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
 697                 capacity = iwl_read_targ_mem(priv, base);
 698                 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
 699                 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
 700                 next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
 701         } else
 702                 return;
 703
 704         if (num_wraps == priv->event_log.num_wraps) {
 705                 iwl_print_cont_event_trace(priv,
 706                                        base, priv->event_log.next_entry,
 707                                        next_entry - priv->event_log.next_entry,
 708                                        mode);
 709                 priv->event_log.non_wraps_count++;
 710         } else {
 711                 if ((num_wraps - priv->event_log.num_wraps) > 1)
 712                         priv->event_log.wraps_more_count++;
 713                 else
 714                         priv->event_log.wraps_once_count++;
 715                 trace_iwlwifi_dev_ucode_wrap_event(priv,
 716                                 num_wraps - priv->event_log.num_wraps,
 717                                 next_entry, priv->event_log.next_entry);
 718                 if (next_entry < priv->event_log.next_entry) {
 719                         iwl_print_cont_event_trace(priv, base,
 720                                priv->event_log.next_entry,
 721                                capacity - priv->event_log.next_entry,
 722                                mode);
 723
 724                         iwl_print_cont_event_trace(priv, base, 0,
 725                                 next_entry, mode);
 726                 } else {
 727                         iwl_print_cont_event_trace(priv, base,
 728                                next_entry, capacity - next_entry,
 729                                mode);
 730
 731                         iwl_print_cont_event_trace(priv, base, 0,
 732                                 next_entry, mode);
 733                 }
 734         }
 735         priv->event_log.num_wraps = num_wraps;
 736         priv->event_log.next_entry = next_entry;
 737 }
 738
 739 /**
 740  * iwl_bg_ucode_trace - Timer callback to log ucode event
 741  *
 742  * The timer is continually set to execute every
 743  * UCODE_TRACE_PERIOD milliseconds after the last timer expired
 744  * this function is to perform continuous uCode event logging operation
 745  * if enabled
 746  */
 747 static void iwl_bg_ucode_trace(unsigned long data)
 748 {
 749         struct iwl_priv *priv = (struct iwl_priv *)data;
 750
 751         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
 752                 return;
 753
 754         if (priv->event_log.ucode_trace) {
 755                 iwl_continuous_event_trace(priv);
 756                 /* Reschedule the timer to occur in UCODE_TRACE_PERIOD */
 757                 mod_timer(&priv->ucode_trace,
 758                          jiffies + msecs_to_jiffies(UCODE_TRACE_PERIOD));
 759         }
 760 }
 761
 762 static void iwl_rx_beacon_notif(struct iwl_priv *priv,
 763                                 struct iwl_rx_mem_buffer *rxb)
 764 {
 765 #ifdef CONFIG_IWLWIFI_DEBUG
 766         struct iwl_rx_packet *pkt = rxb_addr(rxb);
 767         struct iwl4965_beacon_notif *beacon =
 768                 (struct iwl4965_beacon_notif *)pkt->u.raw;
 769         u8 rate = iwl_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
 770
 771         IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
 772                 "tsf %d %d rate %d\n",
 773                 le32_to_cpu(beacon->beacon_notify_hdr.u.status) & TX_STATUS_MSK,
 774                 beacon->beacon_notify_hdr.failure_frame,
 775                 le32_to_cpu(beacon->ibss_mgr_status),
 776                 le32_to_cpu(beacon->high_tsf),
 777                 le32_to_cpu(beacon->low_tsf), rate);
 778 #endif
 779
 780         if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
 781             (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
 782                 queue_work(priv->workqueue, &priv->beacon_update);
 783 }
 784
 785 /* Handle notification from uCode that card's power state is changing
 786  * due to software, hardware, or critical temperature RFKILL */
 787 static void iwl_rx_card_state_notif(struct iwl_priv *priv,
 788                                     struct iwl_rx_mem_buffer *rxb)
 789 {
 790         struct iwl_rx_packet *pkt = rxb_addr(rxb);
 791         u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
 792         unsigned long status = priv->status;
 793
 794         IWL_DEBUG_RF_KILL(priv, "Card state received: HW:%s SW:%s CT:%s\n",
 795                           (flags & HW_CARD_DISABLED) ? "Kill" : "On",
 796                           (flags & SW_CARD_DISABLED) ? "Kill" : "On",
 797                           (flags & CT_CARD_DISABLED) ?
 798                           "Reached" : "Not reached");
 799
 800         if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
 801                      CT_CARD_DISABLED)) {
 802
 803                 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
 804                             CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
 805
 806                 iwl_write_direct32(priv, HBUS_TARG_MBX_C,
 807                                         HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
 808
 809                 if (!(flags & RXON_CARD_DISABLED)) {
 810                         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
 811                                     CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
 812                         iwl_write_direct32(priv, HBUS_TARG_MBX_C,
 813                                         HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
 814                 }
 815                 if (flags & CT_CARD_DISABLED)
 816                         iwl_tt_enter_ct_kill(priv);
 817         }
 818         if (!(flags & CT_CARD_DISABLED))
 819                 iwl_tt_exit_ct_kill(priv);
 820
 821         if (flags & HW_CARD_DISABLED)
 822                 set_bit(STATUS_RF_KILL_HW, &priv->status);
 823         else
 824                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
 825
 826
 827         if (!(flags & RXON_CARD_DISABLED))
 828                 iwl_scan_cancel(priv);
 829
 830         if ((test_bit(STATUS_RF_KILL_HW, &status) !=
 831              test_bit(STATUS_RF_KILL_HW, &priv->status)))
 832                 wiphy_rfkill_set_hw_state(priv->hw->wiphy,
 833                         test_bit(STATUS_RF_KILL_HW, &priv->status));
 834         else
 835                 wake_up_interruptible(&priv->wait_command_queue);
 836 }
 837
 838 int iwl_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src)
 839 {
 840         if (src == IWL_PWR_SRC_VAUX) {
 841                 if (pci_pme_capable(priv->pci_dev, PCI_D3cold))
 842                         iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
 843                                                APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
 844                                                ~APMG_PS_CTRL_MSK_PWR_SRC);
 845         } else {
 846                 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
 847                                        APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
 848                                        ~APMG_PS_CTRL_MSK_PWR_SRC);
 849         }
 850
 851         return 0;
 852 }
 853
 854 /**
 855  * iwl_setup_rx_handlers - Initialize Rx handler callbacks
 856  *
 857  * Setup the RX handlers for each of the reply types sent from the uCode
 858  * to the host.
 859  *
 860  * This function chains into the hardware specific files for them to setup
 861  * any hardware specific handlers as well.
 862  */
 863 static void iwl_setup_rx_handlers(struct iwl_priv *priv)
 864 {
 865         priv->rx_handlers[REPLY_ALIVE] = iwl_rx_reply_alive;
 866         priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
 867         priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
 868         priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
 869                         iwl_rx_spectrum_measure_notif;
 870         priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
 871         priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
 872             iwl_rx_pm_debug_statistics_notif;
 873         priv->rx_handlers[BEACON_NOTIFICATION] = iwl_rx_beacon_notif;
 874
 875         /*
 876          * The same handler is used for both the REPLY to a discrete
 877          * statistics request from the host as well as for the periodic
 878          * statistics notifications (after received beacons) from the uCode.
 879          */
 880         priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl_reply_statistics;
 881         priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl_rx_statistics;
 882
 883         iwl_setup_rx_scan_handlers(priv);
 884
 885         /* status change handler */
 886         priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl_rx_card_state_notif;
 887
 888         priv->rx_handlers[MISSED_BEACONS_NOTIFICATION] =
 889             iwl_rx_missed_beacon_notif;
 890         /* Rx handlers */
 891         priv->rx_handlers[REPLY_RX_PHY_CMD] = iwlagn_rx_reply_rx_phy;
 892         priv->rx_handlers[REPLY_RX_MPDU_CMD] = iwlagn_rx_reply_rx;
 893         /* block ack */
 894         priv->rx_handlers[REPLY_COMPRESSED_BA] = iwlagn_rx_reply_compressed_ba;
 895         /* Set up hardware specific Rx handlers */
 896         priv->cfg->ops->lib->rx_handler_setup(priv);
 897 }
 898
 899 /**
 900  * iwl_rx_handle - Main entry function for receiving responses from uCode
 901  *
 902  * Uses the priv->rx_handlers callback function array to invoke
 903  * the appropriate handlers, including command responses,
 904  * frame-received notifications, and other notifications.
 905  */
 906 void iwl_rx_handle(struct iwl_priv *priv)
 907 {
 908         struct iwl_rx_mem_buffer *rxb;
 909         struct iwl_rx_packet *pkt;
 910         struct iwl_rx_queue *rxq = &priv->rxq;
 911         u32 r, i;
 912         int reclaim;
 913         unsigned long flags;
 914         u8 fill_rx = 0;
 915         u32 count = 8;
 916         int total_empty;
 917
 918         /* uCode's read index (stored in shared DRAM) indicates the last Rx
 919          * buffer that the driver may process (last buffer filled by ucode). */
 920         r = le16_to_cpu(rxq->rb_stts->closed_rb_num) &  0x0FFF;
 921         i = rxq->read;
 922
 923         /* Rx interrupt, but nothing sent from uCode */
 924         if (i == r)
 925                 IWL_DEBUG_RX(priv, "r = %d, i = %d\n", r, i);
 926
 927         /* calculate total frames need to be restock after handling RX */
 928         total_empty = r - rxq->write_actual;
 929         if (total_empty < 0)
 930                 total_empty += RX_QUEUE_SIZE;
 931
 932         if (total_empty > (RX_QUEUE_SIZE / 2))
 933                 fill_rx = 1;
 934
 935         while (i != r) {
 936                 rxb = rxq->queue[i];
 937
 938                 /* If an RXB doesn't have a Rx queue slot associated with it,
 939                  * then a bug has been introduced in the queue refilling
 940                  * routines -- catch it here */
 941                 BUG_ON(rxb == NULL);
 942
 943                 rxq->queue[i] = NULL;
 944
 945                 pci_unmap_page(priv->pci_dev, rxb->page_dma,
 946                                PAGE_SIZE << priv->hw_params.rx_page_order,
 947                                PCI_DMA_FROMDEVICE);
 948                 pkt = rxb_addr(rxb);
 949
 950                 trace_iwlwifi_dev_rx(priv, pkt,
 951                         le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK);
 952
 953                 /* Reclaim a command buffer only if this packet is a response
 954                  *   to a (driver-originated) command.
 955                  * If the packet (e.g. Rx frame) originated from uCode,
 956                  *   there is no command buffer to reclaim.
 957                  * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
 958                  *   but apparently a few don't get set; catch them here. */
 959                 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
 960                         (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
 961                         (pkt->hdr.cmd != REPLY_RX) &&
 962                         (pkt->hdr.cmd != REPLY_RX_MPDU_CMD) &&
 963                         (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
 964                         (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
 965                         (pkt->hdr.cmd != REPLY_TX);
 966
 967                 /* Based on type of command response or notification,
 968                  *   handle those that need handling via function in
 969                  *   rx_handlers table.  See iwl_setup_rx_handlers() */
 970                 if (priv->rx_handlers[pkt->hdr.cmd]) {
 971                         IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r,
 972                                 i, get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
 973                         priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
 974                         priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
 975                 } else {
 976                         /* No handling needed */
 977                         IWL_DEBUG_RX(priv,
 978                                 "r %d i %d No handler needed for %s, 0x%02x\n",
 979                                 r, i, get_cmd_string(pkt->hdr.cmd),
 980                                 pkt->hdr.cmd);
 981                 }
 982
 983                 /*
 984                  * XXX: After here, we should always check rxb->page
 985                  * against NULL before touching it or its virtual
 986                  * memory (pkt). Because some rx_handler might have
 987                  * already taken or freed the pages.
 988                  */
 989
 990                 if (reclaim) {
 991                         /* Invoke any callbacks, transfer the buffer to caller,
 992                          * and fire off the (possibly) blocking iwl_send_cmd()
 993                          * as we reclaim the driver command queue */
 994                         if (rxb->page)
 995                                 iwl_tx_cmd_complete(priv, rxb);
 996                         else
 997                                 IWL_WARN(priv, "Claim null rxb?\n");
 998                 }
 999
1000                 /* Reuse the page if possible. For notification packets and
1001                  * SKBs that fail to Rx correctly, add them back into the
1002                  * rx_free list for reuse later. */
1003                 spin_lock_irqsave(&rxq->lock, flags);
1004                 if (rxb->page != NULL) {
1005                         rxb->page_dma = pci_map_page(priv->pci_dev, rxb->page,
1006                                 0, PAGE_SIZE << priv->hw_params.rx_page_order,
1007                                 PCI_DMA_FROMDEVICE);
1008                         list_add_tail(&rxb->list, &rxq->rx_free);
1009                         rxq->free_count++;
1010                 } else
1011                         list_add_tail(&rxb->list, &rxq->rx_used);
1012
1013                 spin_unlock_irqrestore(&rxq->lock, flags);
1014
1015                 i = (i + 1) & RX_QUEUE_MASK;
1016                 /* If there are a lot of unused frames,
1017                  * restock the Rx queue so ucode wont assert. */
1018                 if (fill_rx) {
1019                         count++;
1020                         if (count >= 8) {
1021                                 rxq->read = i;
1022                                 iwlagn_rx_replenish_now(priv);
1023                                 count = 0;
1024                         }
1025                 }
1026         }
1027
1028         /* Backtrack one entry */
1029         rxq->read = i;
1030         if (fill_rx)
1031                 iwlagn_rx_replenish_now(priv);
1032         else
1033                 iwlagn_rx_queue_restock(priv);
1034 }
1035
1036 /* call this function to flush any scheduled tasklet */
1037 static inline void iwl_synchronize_irq(struct iwl_priv *priv)
1038 {
1039         /* wait to make sure we flush pending tasklet*/
1040         synchronize_irq(priv->pci_dev->irq);
1041         tasklet_kill(&priv->irq_tasklet);
1042 }
1043
1044 static void iwl_irq_tasklet_legacy(struct iwl_priv *priv)
1045 {
1046         u32 inta, handled = 0;
1047         u32 inta_fh;
1048         unsigned long flags;
1049         u32 i;
1050 #ifdef CONFIG_IWLWIFI_DEBUG
1051         u32 inta_mask;
1052 #endif
1053
1054         spin_lock_irqsave(&priv->lock, flags);
1055
1056         /* Ack/clear/reset pending uCode interrupts.
1057          * Note:  Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1058          *  and will clear only when CSR_FH_INT_STATUS gets cleared. */
1059         inta = iwl_read32(priv, CSR_INT);
1060         iwl_write32(priv, CSR_INT, inta);
1061
1062         /* Ack/clear/reset pending flow-handler (DMA) interrupts.
1063          * Any new interrupts that happen after this, either while we're
1064          * in this tasklet, or later, will show up in next ISR/tasklet. */
1065         inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1066         iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
1067
1068 #ifdef CONFIG_IWLWIFI_DEBUG
1069         if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
1070                 /* just for debug */
1071                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1072                 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1073                               inta, inta_mask, inta_fh);
1074         }
1075 #endif
1076
1077         spin_unlock_irqrestore(&priv->lock, flags);
1078
1079         /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
1080          * atomic, make sure that inta covers all the interrupts that
1081          * we've discovered, even if FH interrupt came in just after
1082          * reading CSR_INT. */
1083         if (inta_fh & CSR49_FH_INT_RX_MASK)
1084                 inta |= CSR_INT_BIT_FH_RX;
1085         if (inta_fh & CSR49_FH_INT_TX_MASK)
1086                 inta |= CSR_INT_BIT_FH_TX;
1087
1088         /* Now service all interrupt bits discovered above. */
1089         if (inta & CSR_INT_BIT_HW_ERR) {
1090                 IWL_ERR(priv, "Hardware error detected.  Restarting.\n");
1091
1092                 /* Tell the device to stop sending interrupts */
1093                 iwl_disable_interrupts(priv);
1094
1095                 priv->isr_stats.hw++;
1096                 iwl_irq_handle_error(priv);
1097
1098                 handled |= CSR_INT_BIT_HW_ERR;
1099
1100                 return;
1101         }
1102
1103 #ifdef CONFIG_IWLWIFI_DEBUG
1104         if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1105                 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1106                 if (inta & CSR_INT_BIT_SCD) {
1107                         IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1108                                       "the frame/frames.\n");
1109                         priv->isr_stats.sch++;
1110                 }
1111
1112                 /* Alive notification via Rx interrupt will do the real work */
1113                 if (inta & CSR_INT_BIT_ALIVE) {
1114                         IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1115                         priv->isr_stats.alive++;
1116                 }
1117         }
1118 #endif
1119         /* Safely ignore these bits for debug checks below */
1120         inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1121
1122         /* HW RF KILL switch toggled */
1123         if (inta & CSR_INT_BIT_RF_KILL) {
1124                 int hw_rf_kill = 0;
1125                 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
1126                                 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1127                         hw_rf_kill = 1;
1128
1129                 IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
1130                                 hw_rf_kill ? "disable radio" : "enable radio");
1131
1132                 priv->isr_stats.rfkill++;
1133
1134                 /* driver only loads ucode once setting the interface up.
1135                  * the driver allows loading the ucode even if the radio
1136                  * is killed. Hence update the killswitch state here. The
1137                  * rfkill handler will care about restarting if needed.
1138                  */
1139                 if (!test_bit(STATUS_ALIVE, &priv->status)) {
1140                         if (hw_rf_kill)
1141                                 set_bit(STATUS_RF_KILL_HW, &priv->status);
1142                         else
1143                                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1144                         wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
1145                 }
1146
1147                 handled |= CSR_INT_BIT_RF_KILL;
1148         }
1149
1150         /* Chip got too hot and stopped itself */
1151         if (inta & CSR_INT_BIT_CT_KILL) {
1152                 IWL_ERR(priv, "Microcode CT kill error detected.\n");
1153                 priv->isr_stats.ctkill++;
1154                 handled |= CSR_INT_BIT_CT_KILL;
1155         }
1156
1157         /* Error detected by uCode */
1158         if (inta & CSR_INT_BIT_SW_ERR) {
1159                 IWL_ERR(priv, "Microcode SW error detected. "
1160                         " Restarting 0x%X.\n", inta);
1161                 priv->isr_stats.sw++;
1162                 priv->isr_stats.sw_err = inta;
1163                 iwl_irq_handle_error(priv);
1164                 handled |= CSR_INT_BIT_SW_ERR;
1165         }
1166
1167         /*
1168          * uCode wakes up after power-down sleep.
1169          * Tell device about any new tx or host commands enqueued,
1170          * and about any Rx buffers made available while asleep.
1171          */
1172         if (inta & CSR_INT_BIT_WAKEUP) {
1173                 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1174                 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1175                 for (i = 0; i < priv->hw_params.max_txq_num; i++)
1176                         iwl_txq_update_write_ptr(priv, &priv->txq[i]);
1177                 priv->isr_stats.wakeup++;
1178                 handled |= CSR_INT_BIT_WAKEUP;
1179         }
1180
1181         /* All uCode command responses, including Tx command responses,
1182          * Rx "responses" (frame-received notification), and other
1183          * notifications from uCode come through here*/
1184         if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1185                 iwl_rx_handle(priv);
1186                 priv->isr_stats.rx++;
1187                 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1188         }
1189
1190         /* This "Tx" DMA channel is used only for loading uCode */
1191         if (inta & CSR_INT_BIT_FH_TX) {
1192                 IWL_DEBUG_ISR(priv, "uCode load interrupt\n");
1193                 priv->isr_stats.tx++;
1194                 handled |= CSR_INT_BIT_FH_TX;
1195                 /* Wake up uCode load routine, now that load is complete */
1196                 priv->ucode_write_complete = 1;
1197                 wake_up_interruptible(&priv->wait_command_queue);
1198         }
1199
1200         if (inta & ~handled) {
1201                 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1202                 priv->isr_stats.unhandled++;
1203         }
1204
1205         if (inta & ~(priv->inta_mask)) {
1206                 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1207                          inta & ~priv->inta_mask);
1208                 IWL_WARN(priv, "   with FH_INT = 0x%08x\n", inta_fh);
1209         }
1210
1211         /* Re-enable all interrupts */
1212         /* only Re-enable if diabled by irq */
1213         if (test_bit(STATUS_INT_ENABLED, &priv->status))
1214                 iwl_enable_interrupts(priv);
1215
1216 #ifdef CONFIG_IWLWIFI_DEBUG
1217         if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1218                 inta = iwl_read32(priv, CSR_INT);
1219                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1220                 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1221                 IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
1222                         "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
1223         }
1224 #endif
1225 }
1226
1227 /* tasklet for iwlagn interrupt */
1228 static void iwl_irq_tasklet(struct iwl_priv *priv)
1229 {
1230         u32 inta = 0;
1231         u32 handled = 0;
1232         unsigned long flags;
1233         u32 i;
1234 #ifdef CONFIG_IWLWIFI_DEBUG
1235         u32 inta_mask;
1236 #endif
1237
1238         spin_lock_irqsave(&priv->lock, flags);
1239
1240         /* Ack/clear/reset pending uCode interrupts.
1241          * Note:  Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1242          */
1243         /* There is a hardware bug in the interrupt mask function that some
1244          * interrupts (i.e. CSR_INT_BIT_SCD) can still be generated even if
1245          * they are disabled in the CSR_INT_MASK register. Furthermore the
1246          * ICT interrupt handling mechanism has another bug that might cause
1247          * these unmasked interrupts fail to be detected. We workaround the
1248          * hardware bugs here by ACKing all the possible interrupts so that
1249          * interrupt coalescing can still be achieved.
1250          */
1251         iwl_write32(priv, CSR_INT, priv->_agn.inta | ~priv->inta_mask);
1252
1253         inta = priv->_agn.inta;
1254
1255 #ifdef CONFIG_IWLWIFI_DEBUG
1256         if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
1257                 /* just for debug */
1258                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1259                 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x\n ",
1260                                 inta, inta_mask);
1261         }
1262 #endif
1263
1264         spin_unlock_irqrestore(&priv->lock, flags);
1265
1266         /* saved interrupt in inta variable now we can reset priv->_agn.inta */
1267         priv->_agn.inta = 0;
1268
1269         /* Now service all interrupt bits discovered above. */
1270         if (inta & CSR_INT_BIT_HW_ERR) {
1271                 IWL_ERR(priv, "Hardware error detected.  Restarting.\n");
1272
1273                 /* Tell the device to stop sending interrupts */
1274                 iwl_disable_interrupts(priv);
1275
1276                 priv->isr_stats.hw++;
1277                 iwl_irq_handle_error(priv);
1278
1279                 handled |= CSR_INT_BIT_HW_ERR;
1280
1281                 return;
1282         }
1283
1284 #ifdef CONFIG_IWLWIFI_DEBUG
1285         if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1286                 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1287                 if (inta & CSR_INT_BIT_SCD) {
1288                         IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1289                                       "the frame/frames.\n");
1290                         priv->isr_stats.sch++;
1291                 }
1292
1293                 /* Alive notification via Rx interrupt will do the real work */
1294                 if (inta & CSR_INT_BIT_ALIVE) {
1295                         IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1296                         priv->isr_stats.alive++;
1297                 }
1298         }
1299 #endif
1300         /* Safely ignore these bits for debug checks below */
1301         inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1302
1303         /* HW RF KILL switch toggled */
1304         if (inta & CSR_INT_BIT_RF_KILL) {
1305                 int hw_rf_kill = 0;
1306                 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
1307                                 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1308                         hw_rf_kill = 1;
1309
1310                 IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
1311                                 hw_rf_kill ? "disable radio" : "enable radio");
1312
1313                 priv->isr_stats.rfkill++;
1314
1315                 /* driver only loads ucode once setting the interface up.
1316                  * the driver allows loading the ucode even if the radio
1317                  * is killed. Hence update the killswitch state here. The
1318                  * rfkill handler will care about restarting if needed.
1319                  */
1320                 if (!test_bit(STATUS_ALIVE, &priv->status)) {
1321                         if (hw_rf_kill)
1322                                 set_bit(STATUS_RF_KILL_HW, &priv->status);
1323                         else
1324                                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1325                         wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
1326                 }
1327
1328                 handled |= CSR_INT_BIT_RF_KILL;
1329         }
1330
1331         /* Chip got too hot and stopped itself */
1332         if (inta & CSR_INT_BIT_CT_KILL) {
1333                 IWL_ERR(priv, "Microcode CT kill error detected.\n");
1334                 priv->isr_stats.ctkill++;
1335                 handled |= CSR_INT_BIT_CT_KILL;
1336         }
1337
1338         /* Error detected by uCode */
1339         if (inta & CSR_INT_BIT_SW_ERR) {
1340                 IWL_ERR(priv, "Microcode SW error detected. "
1341                         " Restarting 0x%X.\n", inta);
1342                 priv->isr_stats.sw++;
1343                 priv->isr_stats.sw_err = inta;
1344                 iwl_irq_handle_error(priv);
1345                 handled |= CSR_INT_BIT_SW_ERR;
1346         }
1347
1348         /* uCode wakes up after power-down sleep */
1349         if (inta & CSR_INT_BIT_WAKEUP) {
1350                 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1351                 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1352                 for (i = 0; i < priv->hw_params.max_txq_num; i++)
1353                         iwl_txq_update_write_ptr(priv, &priv->txq[i]);
1354
1355                 priv->isr_stats.wakeup++;
1356
1357                 handled |= CSR_INT_BIT_WAKEUP;
1358         }
1359
1360         /* All uCode command responses, including Tx command responses,
1361          * Rx "responses" (frame-received notification), and other
1362          * notifications from uCode come through here*/
1363         if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX |
1364                         CSR_INT_BIT_RX_PERIODIC)) {
1365                 IWL_DEBUG_ISR(priv, "Rx interrupt\n");
1366                 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1367                         handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1368                         iwl_write32(priv, CSR_FH_INT_STATUS,
1369                                         CSR49_FH_INT_RX_MASK);
1370                 }
1371                 if (inta & CSR_INT_BIT_RX_PERIODIC) {
1372                         handled |= CSR_INT_BIT_RX_PERIODIC;
1373                         iwl_write32(priv, CSR_INT, CSR_INT_BIT_RX_PERIODIC);
1374                 }
1375                 /* Sending RX interrupt require many steps to be done in the
1376                  * the device:
1377                  * 1- write interrupt to current index in ICT table.
1378                  * 2- dma RX frame.
1379                  * 3- update RX shared data to indicate last write index.
1380                  * 4- send interrupt.
1381                  * This could lead to RX race, driver could receive RX interrupt
1382                  * but the shared data changes does not reflect this;
1383                  * periodic interrupt will detect any dangling Rx activity.
1384                  */
1385
1386                 /* Disable periodic interrupt; we use it as just a one-shot. */
1387                 iwl_write8(priv, CSR_INT_PERIODIC_REG,
1388                             CSR_INT_PERIODIC_DIS);
1389                 iwl_rx_handle(priv);
1390
1391                 /*
1392                  * Enable periodic interrupt in 8 msec only if we received
1393                  * real RX interrupt (instead of just periodic int), to catch
1394                  * any dangling Rx interrupt.  If it was just the periodic
1395                  * interrupt, there was no dangling Rx activity, and no need
1396                  * to extend the periodic interrupt; one-shot is enough.
1397                  */
1398                 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX))
1399                         iwl_write8(priv, CSR_INT_PERIODIC_REG,
1400                                     CSR_INT_PERIODIC_ENA);
1401
1402                 priv->isr_stats.rx++;
1403         }
1404
1405         /* This "Tx" DMA channel is used only for loading uCode */
1406         if (inta & CSR_INT_BIT_FH_TX) {
1407                 iwl_write32(priv, CSR_FH_INT_STATUS, CSR49_FH_INT_TX_MASK);
1408                 IWL_DEBUG_ISR(priv, "uCode load interrupt\n");
1409                 priv->isr_stats.tx++;
1410                 handled |= CSR_INT_BIT_FH_TX;
1411                 /* Wake up uCode load routine, now that load is complete */
1412                 priv->ucode_write_complete = 1;
1413                 wake_up_interruptible(&priv->wait_command_queue);
1414         }
1415
1416         if (inta & ~handled) {
1417                 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1418                 priv->isr_stats.unhandled++;
1419         }
1420
1421         if (inta & ~(priv->inta_mask)) {
1422                 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1423                          inta & ~priv->inta_mask);
1424         }
1425
1426         /* Re-enable all interrupts */
1427         /* only Re-enable if diabled by irq */
1428         if (test_bit(STATUS_INT_ENABLED, &priv->status))
1429                 iwl_enable_interrupts(priv);
1430 }
1431
1432 /* the threshold ratio of actual_ack_cnt to expected_ack_cnt in percent */
1433 #define ACK_CNT_RATIO (50)
1434 #define BA_TIMEOUT_CNT (5)
1435 #define BA_TIMEOUT_MAX (16)
1436
1437 /**
1438  * iwl_good_ack_health - checks for ACK count ratios, BA timeout retries.
1439  *
1440  * When the ACK count ratio is 0 and aggregated BA timeout retries exceeding
1441  * the BA_TIMEOUT_MAX, reload firmware and bring system back to normal
1442  * operation state.
1443  */
1444 bool iwl_good_ack_health(struct iwl_priv *priv,
1445                                 struct iwl_rx_packet *pkt)
1446 {
1447         bool rc = true;
1448         int actual_ack_cnt_delta, expected_ack_cnt_delta;
1449         int ba_timeout_delta;
1450
1451         actual_ack_cnt_delta =
1452                 le32_to_cpu(pkt->u.stats.tx.actual_ack_cnt) -
1453                 le32_to_cpu(priv->statistics.tx.actual_ack_cnt);
1454         expected_ack_cnt_delta =
1455                 le32_to_cpu(pkt->u.stats.tx.expected_ack_cnt) -
1456                 le32_to_cpu(priv->statistics.tx.expected_ack_cnt);
1457         ba_timeout_delta =
1458                 le32_to_cpu(pkt->u.stats.tx.agg.ba_timeout) -
1459                 le32_to_cpu(priv->statistics.tx.agg.ba_timeout);
1460         if ((priv->_agn.agg_tids_count > 0) &&
1461             (expected_ack_cnt_delta > 0) &&
1462             (((actual_ack_cnt_delta * 100) / expected_ack_cnt_delta)
1463                 < ACK_CNT_RATIO) &&
1464             (ba_timeout_delta > BA_TIMEOUT_CNT)) {
1465                 IWL_DEBUG_RADIO(priv, "actual_ack_cnt delta = %d,"
1466                                 " expected_ack_cnt = %d\n",
1467                                 actual_ack_cnt_delta, expected_ack_cnt_delta);
1468
1469 #ifdef CONFIG_IWLWIFI_DEBUGFS
1470                 /*
1471                  * This is ifdef'ed on DEBUGFS because otherwise the
1472                  * statistics aren't available. If DEBUGFS is set but
1473                  * DEBUG is not, these will just compile out.
1474                  */
1475                 IWL_DEBUG_RADIO(priv, "rx_detected_cnt delta = %d\n",
1476                                 priv->delta_statistics.tx.rx_detected_cnt);
1477                 IWL_DEBUG_RADIO(priv,
1478                                 "ack_or_ba_timeout_collision delta = %d\n",
1479                                 priv->delta_statistics.tx.
1480                                 ack_or_ba_timeout_collision);
1481 #endif
1482                 IWL_DEBUG_RADIO(priv, "agg ba_timeout delta = %d\n",
1483                                 ba_timeout_delta);
1484                 if (!actual_ack_cnt_delta &&
1485                     (ba_timeout_delta >= BA_TIMEOUT_MAX))
1486                         rc = false;
1487         }
1488         return rc;
1489 }
1490
1491
1492 /******************************************************************************
1493  *
1494  * uCode download functions
1495  *
1496  ******************************************************************************/
1497
1498 static void iwl_dealloc_ucode_pci(struct iwl_priv *priv)
1499 {
1500         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
1501         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
1502         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1503         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
1504         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1505         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
1506 }
1507
1508 static void iwl_nic_start(struct iwl_priv *priv)
1509 {
1510         /* Remove all resets to allow NIC to operate */
1511         iwl_write32(priv, CSR_RESET, 0);
1512 }
1513
1514 struct iwlagn_ucode_capabilities {
1515         u32 max_probe_length;
1516 };
1517
1518 static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context);
1519 static int iwl_mac_setup_register(struct iwl_priv *priv,
1520                                   struct iwlagn_ucode_capabilities *capa);
1521
1522 static int __must_check iwl_request_firmware(struct iwl_priv *priv, bool first)
1523 {
1524         const char *name_pre = priv->cfg->fw_name_pre;
1525
1526         if (first)
1527                 priv->fw_index = priv->cfg->ucode_api_max;
1528         else
1529                 priv->fw_index--;
1530
1531         if (priv->fw_index < priv->cfg->ucode_api_min) {
1532                 IWL_ERR(priv, "no suitable firmware found!\n");
1533                 return -ENOENT;
1534         }
1535
1536         sprintf(priv->firmware_name, "%s%d%s",
1537                 name_pre, priv->fw_index, ".ucode");
1538
1539         IWL_DEBUG_INFO(priv, "attempting to load firmware '%s'\n",
1540                        priv->firmware_name);
1541
1542         return request_firmware_nowait(THIS_MODULE, 1, priv->firmware_name,
1543                                        &priv->pci_dev->dev, GFP_KERNEL, priv,
1544                                        iwl_ucode_callback);
1545 }
1546
1547 struct iwlagn_firmware_pieces {
1548         const void *inst, *data, *init, *init_data, *boot;
1549         size_t inst_size, data_size, init_size, init_data_size, boot_size;
1550
1551         u32 build;
1552
1553         u32 init_evtlog_ptr, init_evtlog_size, init_errlog_ptr;
1554         u32 inst_evtlog_ptr, inst_evtlog_size, inst_errlog_ptr;
1555 };
1556
1557 static int iwlagn_load_legacy_firmware(struct iwl_priv *priv,
1558                                        const struct firmware *ucode_raw,
1559                                        struct iwlagn_firmware_pieces *pieces)
1560 {
1561         struct iwl_ucode_header *ucode = (void *)ucode_raw->data;
1562         u32 api_ver, hdr_size;
1563         const u8 *src;
1564
1565         priv->ucode_ver = le32_to_cpu(ucode->ver);
1566         api_ver = IWL_UCODE_API(priv->ucode_ver);
1567
1568         switch (api_ver) {
1569         default:
1570                 /*
1571                  * 4965 doesn't revision the firmware file format
1572                  * along with the API version, it always uses v1
1573                  * file format.
1574                  */
1575                 if ((priv->hw_rev & CSR_HW_REV_TYPE_MSK) !=
1576                                 CSR_HW_REV_TYPE_4965) {
1577                         hdr_size = 28;
1578                         if (ucode_raw->size < hdr_size) {
1579                                 IWL_ERR(priv, "File size too small!\n");
1580                                 return -EINVAL;
1581                         }
1582                         pieces->build = le32_to_cpu(ucode->u.v2.build);
1583                         pieces->inst_size = le32_to_cpu(ucode->u.v2.inst_size);
1584                         pieces->data_size = le32_to_cpu(ucode->u.v2.data_size);
1585                         pieces->init_size = le32_to_cpu(ucode->u.v2.init_size);
1586                         pieces->init_data_size = le32_to_cpu(ucode->u.v2.init_data_size);
1587                         pieces->boot_size = le32_to_cpu(ucode->u.v2.boot_size);
1588                         src = ucode->u.v2.data;
1589                         break;
1590                 }
1591                 /* fall through for 4965 */
1592         case 0:
1593         case 1:
1594         case 2:
1595                 hdr_size = 24;
1596                 if (ucode_raw->size < hdr_size) {
1597                         IWL_ERR(priv, "File size too small!\n");
1598                         return -EINVAL;
1599                 }
1600                 pieces->build = 0;
1601                 pieces->inst_size = le32_to_cpu(ucode->u.v1.inst_size);
1602                 pieces->data_size = le32_to_cpu(ucode->u.v1.data_size);
1603                 pieces->init_size = le32_to_cpu(ucode->u.v1.init_size);
1604                 pieces->init_data_size = le32_to_cpu(ucode->u.v1.init_data_size);
1605                 pieces->boot_size = le32_to_cpu(ucode->u.v1.boot_size);
1606                 src = ucode->u.v1.data;
1607                 break;
1608         }
1609
1610         /* Verify size of file vs. image size info in file's header */
1611         if (ucode_raw->size != hdr_size + pieces->inst_size +
1612                                 pieces->data_size + pieces->init_size +
1613                                 pieces->init_data_size + pieces->boot_size) {
1614
1615                 IWL_ERR(priv,
1616                         "uCode file size %d does not match expected size\n",
1617                         (int)ucode_raw->size);
1618                 return -EINVAL;
1619         }
1620
1621         pieces->inst = src;
1622         src += pieces->inst_size;
1623         pieces->data = src;
1624         src += pieces->data_size;
1625         pieces->init = src;
1626         src += pieces->init_size;
1627         pieces->init_data = src;
1628         src += pieces->init_data_size;
1629         pieces->boot = src;
1630         src += pieces->boot_size;
1631
1632         return 0;
1633 }
1634
1635 static int iwlagn_wanted_ucode_alternative = 1;
1636
1637 static int iwlagn_load_firmware(struct iwl_priv *priv,
1638                                 const struct firmware *ucode_raw,
1639                                 struct iwlagn_firmware_pieces *pieces,
1640                                 struct iwlagn_ucode_capabilities *capa)
1641 {
1642         struct iwl_tlv_ucode_header *ucode = (void *)ucode_raw->data;
1643         struct iwl_ucode_tlv *tlv;
1644         size_t len = ucode_raw->size;
1645         const u8 *data;
1646         int wanted_alternative = iwlagn_wanted_ucode_alternative, tmp;
1647         u64 alternatives;
1648
1649         if (len < sizeof(*ucode))
1650                 return -EINVAL;
1651
1652         if (ucode->magic != cpu_to_le32(IWL_TLV_UCODE_MAGIC))
1653                 return -EINVAL;
1654
1655         /*
1656          * Check which alternatives are present, and "downgrade"
1657          * when the chosen alternative is not present, warning
1658          * the user when that happens. Some files may not have
1659          * any alternatives, so don't warn in that case.
1660          */
1661         alternatives = le64_to_cpu(ucode->alternatives);
1662         tmp = wanted_alternative;
1663         if (wanted_alternative > 63)
1664                 wanted_alternative = 63;
1665         while (wanted_alternative && !(alternatives & BIT(wanted_alternative)))
1666                 wanted_alternative--;
1667         if (wanted_alternative && wanted_alternative != tmp)
1668                 IWL_WARN(priv,
1669                          "uCode alternative %d not available, choosing %d\n",
1670                          tmp, wanted_alternative);
1671
1672         priv->ucode_ver = le32_to_cpu(ucode->ver);
1673         pieces->build = le32_to_cpu(ucode->build);
1674         data = ucode->data;
1675
1676         len -= sizeof(*ucode);
1677
1678         while (len >= sizeof(*tlv)) {
1679                 u32 tlv_len;
1680                 enum iwl_ucode_tlv_type tlv_type;
1681                 u16 tlv_alt;
1682                 const u8 *tlv_data;
1683
1684                 len -= sizeof(*tlv);
1685                 tlv = (void *)data;
1686
1687                 tlv_len = le32_to_cpu(tlv->length);
1688                 tlv_type = le16_to_cpu(tlv->type);
1689                 tlv_alt = le16_to_cpu(tlv->alternative);
1690                 tlv_data = tlv->data;
1691
1692                 if (len < tlv_len)
1693                         return -EINVAL;
1694                 len -= ALIGN(tlv_len, 4);
1695                 data += sizeof(*tlv) + ALIGN(tlv_len, 4);
1696
1697                 /*
1698                  * Alternative 0 is always valid.
1699                  *
1700                  * Skip alternative TLVs that are not selected.
1701                  */
1702                 if (tlv_alt != 0 && tlv_alt != wanted_alternative)
1703                         continue;
1704
1705                 switch (tlv_type) {
1706                 case IWL_UCODE_TLV_INST:
1707                         pieces->inst = tlv_data;
1708                         pieces->inst_size = tlv_len;
1709                         break;
1710                 case IWL_UCODE_TLV_DATA:
1711                         pieces->data = tlv_data;
1712                         pieces->data_size = tlv_len;
1713                         break;
1714                 case IWL_UCODE_TLV_INIT:
1715                         pieces->init = tlv_data;
1716                         pieces->init_size = tlv_len;
1717                         break;
1718                 case IWL_UCODE_TLV_INIT_DATA:
1719                         pieces->init_data = tlv_data;
1720                         pieces->init_data_size = tlv_len;
1721                         break;
1722                 case IWL_UCODE_TLV_BOOT:
1723                         pieces->boot = tlv_data;
1724                         pieces->boot_size = tlv_len;
1725                         break;
1726                 case IWL_UCODE_TLV_PROBE_MAX_LEN:
1727                         if (tlv_len != 4)
1728                                 return -EINVAL;
1729                         capa->max_probe_length =
1730                                 le32_to_cpup((__le32 *)tlv_data);
1731                         break;
1732                 case IWL_UCODE_TLV_INIT_EVTLOG_PTR:
1733                         if (tlv_len != 4)
1734                                 return -EINVAL;
1735                         pieces->init_evtlog_ptr =
1736                                 le32_to_cpup((__le32 *)tlv_data);
1737                         break;
1738                 case IWL_UCODE_TLV_INIT_EVTLOG_SIZE:
1739                         if (tlv_len != 4)
1740                                 return -EINVAL;
1741                         pieces->init_evtlog_size =
1742                                 le32_to_cpup((__le32 *)tlv_data);
1743                         break;
1744                 case IWL_UCODE_TLV_INIT_ERRLOG_PTR:
1745                         if (tlv_len != 4)
1746                                 return -EINVAL;
1747                         pieces->init_errlog_ptr =
1748                                 le32_to_cpup((__le32 *)tlv_data);
1749                         break;
1750                 case IWL_UCODE_TLV_RUNT_EVTLOG_PTR:
1751                         if (tlv_len != 4)
1752                                 return -EINVAL;
1753                         pieces->inst_evtlog_ptr =
1754                                 le32_to_cpup((__le32 *)tlv_data);
1755                         break;
1756                 case IWL_UCODE_TLV_RUNT_EVTLOG_SIZE:
1757                         if (tlv_len != 4)
1758                                 return -EINVAL;
1759                         pieces->inst_evtlog_size =
1760                                 le32_to_cpup((__le32 *)tlv_data);
1761                         break;
1762                 case IWL_UCODE_TLV_RUNT_ERRLOG_PTR:
1763                         if (tlv_len != 4)
1764                                 return -EINVAL;
1765                         pieces->inst_errlog_ptr =
1766                                 le32_to_cpup((__le32 *)tlv_data);
1767                         break;
1768                 default:
1769                         break;
1770                 }
1771         }
1772
1773         if (len)
1774                 return -EINVAL;
1775
1776         return 0;
1777 }
1778
1779 /**
1780  * iwl_ucode_callback - callback when firmware was loaded
1781  *
1782  * If loaded successfully, copies the firmware into buffers
1783  * for the card to fetch (via DMA).
1784  */
1785 static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context)
1786 {
1787         struct iwl_priv *priv = context;
1788         struct iwl_ucode_header *ucode;
1789         int err;
1790         struct iwlagn_firmware_pieces pieces;
1791         const unsigned int api_max = priv->cfg->ucode_api_max;
1792         const unsigned int api_min = priv->cfg->ucode_api_min;
1793         u32 api_ver;
1794         char buildstr[25];
1795         u32 build;
1796         struct iwlagn_ucode_capabilities ucode_capa = {
1797                 .max_probe_length = 200,
1798         };
1799
1800         memset(&pieces, 0, sizeof(pieces));
1801
1802         if (!ucode_raw) {
1803                 IWL_ERR(priv, "request for firmware file '%s' failed.\n",
1804                         priv->firmware_name);
1805                 goto try_again;
1806         }
1807
1808         IWL_DEBUG_INFO(priv, "Loaded firmware file '%s' (%zd bytes).\n",
1809                        priv->firmware_name, ucode_raw->size);
1810
1811         /* Make sure that we got at least the API version number */
1812         if (ucode_raw->size < 4) {
1813                 IWL_ERR(priv, "File size way too small!\n");
1814                 goto try_again;
1815         }
1816
1817         /* Data from ucode file:  header followed by uCode images */
1818         ucode = (struct iwl_ucode_header *)ucode_raw->data;
1819
1820         if (ucode->ver)
1821                 err = iwlagn_load_legacy_firmware(priv, ucode_raw, &pieces);
1822         else
1823                 err = iwlagn_load_firmware(priv, ucode_raw, &pieces,
1824                                            &ucode_capa);
1825
1826         if (err)
1827                 goto try_again;
1828
1829         api_ver = IWL_UCODE_API(priv->ucode_ver);
1830         build = pieces.build;
1831
1832         /*
1833          * api_ver should match the api version forming part of the
1834          * firmware filename ... but we don't check for that and only rely
1835          * on the API version read from firmware header from here on forward
1836          */
1837         if (api_ver < api_min || api_ver > api_max) {
1838                 IWL_ERR(priv, "Driver unable to support your firmware API. "
1839                           "Driver supports v%u, firmware is v%u.\n",
1840                           api_max, api_ver);
1841                 goto try_again;
1842         }
1843
1844         if (api_ver != api_max)
1845                 IWL_ERR(priv, "Firmware has old API version. Expected v%u, "
1846                           "got v%u. New firmware can be obtained "
1847                           "from http://www.intellinuxwireless.org.\n",
1848                           api_max, api_ver);
1849
1850         if (build)
1851                 sprintf(buildstr, " build %u", build);
1852         else
1853                 buildstr[0] = '\0';
1854
1855         IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u%s\n",
1856                  IWL_UCODE_MAJOR(priv->ucode_ver),
1857                  IWL_UCODE_MINOR(priv->ucode_ver),
1858                  IWL_UCODE_API(priv->ucode_ver),
1859                  IWL_UCODE_SERIAL(priv->ucode_ver),
1860                  buildstr);
1861
1862         snprintf(priv->hw->wiphy->fw_version,
1863                  sizeof(priv->hw->wiphy->fw_version),
1864                  "%u.%u.%u.%u%s",
1865                  IWL_UCODE_MAJOR(priv->ucode_ver),
1866                  IWL_UCODE_MINOR(priv->ucode_ver),
1867                  IWL_UCODE_API(priv->ucode_ver),
1868                  IWL_UCODE_SERIAL(priv->ucode_ver),
1869                  buildstr);
1870
1871         /*
1872          * For any of the failures below (before allocating pci memory)
1873          * we will try to load a version with a smaller API -- maybe the
1874          * user just got a corrupted version of the latest API.
1875          */
1876
1877         IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
1878                        priv->ucode_ver);
1879         IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %Zd\n",
1880                        pieces.inst_size);
1881         IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %Zd\n",
1882                        pieces.data_size);
1883         IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %Zd\n",
1884                        pieces.init_size);
1885         IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %Zd\n",
1886                        pieces.init_data_size);
1887         IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %Zd\n",
1888                        pieces.boot_size);
1889
1890         /* Verify that uCode images will fit in card's SRAM */
1891         if (pieces.inst_size > priv->hw_params.max_inst_size) {
1892                 IWL_ERR(priv, "uCode instr len %Zd too large to fit in\n",
1893                         pieces.inst_size);
1894                 goto try_again;
1895         }
1896
1897         if (pieces.data_size > priv->hw_params.max_data_size) {
1898                 IWL_ERR(priv, "uCode data len %Zd too large to fit in\n",
1899                         pieces.data_size);
1900                 goto try_again;
1901         }
1902
1903         if (pieces.init_size > priv->hw_params.max_inst_size) {
1904                 IWL_ERR(priv, "uCode init instr len %Zd too large to fit in\n",
1905                         pieces.init_size);
1906                 goto try_again;
1907         }
1908
1909         if (pieces.init_data_size > priv->hw_params.max_data_size) {
1910                 IWL_ERR(priv, "uCode init data len %Zd too large to fit in\n",
1911                         pieces.init_data_size);
1912                 goto try_again;
1913         }
1914
1915         if (pieces.boot_size > priv->hw_params.max_bsm_size) {
1916                 IWL_ERR(priv, "uCode boot instr len %Zd too large to fit in\n",
1917                         pieces.boot_size);
1918                 goto try_again;
1919         }
1920
1921         /* Allocate ucode buffers for card's bus-master loading ... */
1922
1923         /* Runtime instructions and 2 copies of data:
1924          * 1) unmodified from disk
1925          * 2) backup cache for save/restore during power-downs */
1926         priv->ucode_code.len = pieces.inst_size;
1927         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
1928
1929         priv->ucode_data.len = pieces.data_size;
1930         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
1931
1932         priv->ucode_data_backup.len = pieces.data_size;
1933         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1934
1935         if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
1936             !priv->ucode_data_backup.v_addr)
1937                 goto err_pci_alloc;
1938
1939         /* Initialization instructions and data */
1940         if (pieces.init_size && pieces.init_data_size) {
1941                 priv->ucode_init.len = pieces.init_size;
1942                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
1943
1944                 priv->ucode_init_data.len = pieces.init_data_size;
1945                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1946
1947                 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
1948                         goto err_pci_alloc;
1949         }
1950
1951         /* Bootstrap (instructions only, no data) */
1952         if (pieces.boot_size) {
1953                 priv->ucode_boot.len = pieces.boot_size;
1954                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
1955
1956                 if (!priv->ucode_boot.v_addr)
1957                         goto err_pci_alloc;
1958         }
1959
1960         /* Now that we can no longer fail, copy information */
1961
1962         /*
1963          * The (size - 16) / 12 formula is based on the information recorded
1964          * for each event, which is of mode 1 (including timestamp) for all
1965          * new microcodes that include this information.
1966          */
1967         priv->_agn.init_evtlog_ptr = pieces.init_evtlog_ptr;
1968         if (pieces.init_evtlog_size)
1969                 priv->_agn.init_evtlog_size = (pieces.init_evtlog_size - 16)/12;
1970         else
1971                 priv->_agn.init_evtlog_size = priv->cfg->max_event_log_size;
1972         priv->_agn.init_errlog_ptr = pieces.init_errlog_ptr;
1973         priv->_agn.inst_evtlog_ptr = pieces.inst_evtlog_ptr;
1974         if (pieces.inst_evtlog_size)
1975                 priv->_agn.inst_evtlog_size = (pieces.inst_evtlog_size - 16)/12;
1976         else
1977                 priv->_agn.inst_evtlog_size = priv->cfg->max_event_log_size;
1978         priv->_agn.inst_errlog_ptr = pieces.inst_errlog_ptr;
1979
1980         /* Copy images into buffers for card's bus-master reads ... */
1981
1982         /* Runtime instructions (first block of data in file) */
1983         IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode instr len %Zd\n",
1984                         pieces.inst_size);
1985         memcpy(priv->ucode_code.v_addr, pieces.inst, pieces.inst_size);
1986
1987         IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
1988                 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
1989
1990         /*
1991          * Runtime data
1992          * NOTE:  Copy into backup buffer will be done in iwl_up()
1993          */
1994         IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode data len %Zd\n",
1995                         pieces.data_size);
1996         memcpy(priv->ucode_data.v_addr, pieces.data, pieces.data_size);
1997         memcpy(priv->ucode_data_backup.v_addr, pieces.data, pieces.data_size);
1998
1999         /* Initialization instructions */
2000         if (pieces.init_size) {
2001                 IWL_DEBUG_INFO(priv, "Copying (but not loading) init instr len %Zd\n",
2002                                 pieces.init_size);
2003                 memcpy(priv->ucode_init.v_addr, pieces.init, pieces.init_size);
2004         }
2005
2006         /* Initialization data */
2007         if (pieces.init_data_size) {
2008                 IWL_DEBUG_INFO(priv, "Copying (but not loading) init data len %Zd\n",
2009                                pieces.init_data_size);
2010                 memcpy(priv->ucode_init_data.v_addr, pieces.init_data,
2011                        pieces.init_data_size);
2012         }
2013
2014         /* Bootstrap instructions */
2015         IWL_DEBUG_INFO(priv, "Copying (but not loading) boot instr len %Zd\n",
2016                         pieces.boot_size);
2017         memcpy(priv->ucode_boot.v_addr, pieces.boot, pieces.boot_size);
2018
2019         /**************************************************
2020          * This is still part of probe() in a sense...
2021          *
2022          * 9. Setup and register with mac80211 and debugfs
2023          **************************************************/
2024         err = iwl_mac_setup_register(priv, &ucode_capa);
2025         if (err)
2026                 goto out_unbind;
2027
2028         err = iwl_dbgfs_register(priv, DRV_NAME);
2029         if (err)
2030                 IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
2031
2032         /* We have our copies now, allow OS release its copies */
2033         release_firmware(ucode_raw);
2034         complete(&priv->_agn.firmware_loading_complete);
2035         return;
2036
2037  try_again:
2038         /* try next, if any */
2039         if (iwl_request_firmware(priv, false))
2040                 goto out_unbind;
2041         release_firmware(ucode_raw);
2042         return;
2043
2044  err_pci_alloc:
2045         IWL_ERR(priv, "failed to allocate pci memory\n");
2046         iwl_dealloc_ucode_pci(priv);
2047  out_unbind:
2048         complete(&priv->_agn.firmware_loading_complete);
2049         device_release_driver(&priv->pci_dev->dev);
2050         release_firmware(ucode_raw);
2051 }
2052
2053 static const char *desc_lookup_text[] = {
2054         "OK",
2055         "FAIL",
2056         "BAD_PARAM",
2057         "BAD_CHECKSUM",
2058         "NMI_INTERRUPT_WDG",
2059         "SYSASSERT",
2060         "FATAL_ERROR",
2061         "BAD_COMMAND",
2062         "HW_ERROR_TUNE_LOCK",
2063         "HW_ERROR_TEMPERATURE",
2064         "ILLEGAL_CHAN_FREQ",
2065         "VCC_NOT_STABLE",
2066         "FH_ERROR",
2067         "NMI_INTERRUPT_HOST",
2068         "NMI_INTERRUPT_ACTION_PT",
2069         "NMI_INTERRUPT_UNKNOWN",
2070         "UCODE_VERSION_MISMATCH",
2071         "HW_ERROR_ABS_LOCK",
2072         "HW_ERROR_CAL_LOCK_FAIL",
2073         "NMI_INTERRUPT_INST_ACTION_PT",
2074         "NMI_INTERRUPT_DATA_ACTION_PT",
2075         "NMI_TRM_HW_ER",
2076         "NMI_INTERRUPT_TRM",
2077         "NMI_INTERRUPT_BREAK_POINT"
2078         "DEBUG_0",
2079         "DEBUG_1",
2080         "DEBUG_2",
2081         "DEBUG_3",
2082         "ADVANCED SYSASSERT"
2083 };
2084
2085 static const char *desc_lookup(int i)
2086 {
2087         int max = ARRAY_SIZE(desc_lookup_text) - 1;
2088
2089         if (i < 0 || i > max)
2090                 i = max;
2091
2092         return desc_lookup_text[i];
2093 }
2094
2095 #define ERROR_START_OFFSET  (1 * sizeof(u32))
2096 #define ERROR_ELEM_SIZE     (7 * sizeof(u32))
2097
2098 void iwl_dump_nic_error_log(struct iwl_priv *priv)
2099 {
2100         u32 data2, line;
2101         u32 desc, time, count, base, data1;
2102         u32 blink1, blink2, ilink1, ilink2;
2103         u32 pc, hcmd;
2104
2105         if (priv->ucode_type == UCODE_INIT) {
2106                 base = le32_to_cpu(priv->card_alive_init.error_event_table_ptr);
2107                 if (!base)
2108                         base = priv->_agn.init_errlog_ptr;
2109         } else {
2110                 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
2111                 if (!base)
2112                         base = priv->_agn.inst_errlog_ptr;
2113         }
2114
2115         if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
2116                 IWL_ERR(priv,
2117                         "Not valid error log pointer 0x%08X for %s uCode\n",
2118                         base, (priv->ucode_type == UCODE_INIT) ? "Init" : "RT");
2119                 return;
2120         }
2121
2122         count = iwl_read_targ_mem(priv, base);
2123
2124         if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
2125                 IWL_ERR(priv, "Start IWL Error Log Dump:\n");
2126                 IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
2127                         priv->status, count);
2128         }
2129
2130         desc = iwl_read_targ_mem(priv, base + 1 * sizeof(u32));
2131         pc = iwl_read_targ_mem(priv, base + 2 * sizeof(u32));
2132         blink1 = iwl_read_targ_mem(priv, base + 3 * sizeof(u32));
2133         blink2 = iwl_read_targ_mem(priv, base + 4 * sizeof(u32));
2134         ilink1 = iwl_read_targ_mem(priv, base + 5 * sizeof(u32));
2135         ilink2 = iwl_read_targ_mem(priv, base + 6 * sizeof(u32));
2136         data1 = iwl_read_targ_mem(priv, base + 7 * sizeof(u32));
2137         data2 = iwl_read_targ_mem(priv, base + 8 * sizeof(u32));
2138         line = iwl_read_targ_mem(priv, base + 9 * sizeof(u32));
2139         time = iwl_read_targ_mem(priv, base + 11 * sizeof(u32));
2140         hcmd = iwl_read_targ_mem(priv, base + 22 * sizeof(u32));
2141
2142         trace_iwlwifi_dev_ucode_error(priv, desc, time, data1, data2, line,
2143                                       blink1, blink2, ilink1, ilink2);
2144
2145         IWL_ERR(priv, "Desc                               Time       "
2146                 "data1      data2      line\n");
2147         IWL_ERR(priv, "%-28s (#%02d) %010u 0x%08X 0x%08X %u\n",
2148                 desc_lookup(desc), desc, time, data1, data2, line);
2149         IWL_ERR(priv, "pc      blink1  blink2  ilink1  ilink2  hcmd\n");
2150         IWL_ERR(priv, "0x%05X 0x%05X 0x%05X 0x%05X 0x%05X 0x%05X\n",
2151                 pc, blink1, blink2, ilink1, ilink2, hcmd);
2152 }
2153
2154 #define EVENT_START_OFFSET  (4 * sizeof(u32))
2155
2156 /**
2157  * iwl_print_event_log - Dump error event log to syslog
2158  *
2159  */
2160 static int iwl_print_event_log(struct iwl_priv *priv, u32 start_idx,
2161                                u32 num_events, u32 mode,
2162                                int pos, char **buf, size_t bufsz)
2163 {
2164         u32 i;
2165         u32 base;       /* SRAM byte address of event log header */
2166         u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
2167         u32 ptr;        /* SRAM byte address of log data */
2168         u32 ev, time, data; /* event log data */
2169         unsigned long reg_flags;
2170
2171         if (num_events == 0)
2172                 return pos;
2173
2174         if (priv->ucode_type == UCODE_INIT) {
2175                 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
2176                 if (!base)
2177                         base = priv->_agn.init_evtlog_ptr;
2178         } else {
2179                 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
2180                 if (!base)
2181                         base = priv->_agn.inst_evtlog_ptr;
2182         }
2183
2184         if (mode == 0)
2185                 event_size = 2 * sizeof(u32);
2186         else
2187                 event_size = 3 * sizeof(u32);
2188
2189         ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
2190
2191         /* Make sure device is powered up for SRAM reads */
2192         spin_lock_irqsave(&priv->reg_lock, reg_flags);
2193         iwl_grab_nic_access(priv);
2194
2195         /* Set starting address; reads will auto-increment */
2196         _iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, ptr);
2197         rmb();
2198
2199         /* "time" is actually "data" for mode 0 (no timestamp).
2200         * place event id # at far right for easier visual parsing. */
2201         for (i = 0; i < num_events; i++) {
2202                 ev = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
2203                 time = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
2204                 if (mode == 0) {
2205                         /* data, ev */
2206                         if (bufsz) {
2207                                 pos += scnprintf(*buf + pos, bufsz - pos,
2208                                                 "EVT_LOG:0x%08x:%04u\n",
2209                                                 time, ev);
2210                         } else {
2211                                 trace_iwlwifi_dev_ucode_event(priv, 0,
2212                                         time, ev);
2213                                 IWL_ERR(priv, "EVT_LOG:0x%08x:%04u\n",
2214                                         time, ev);
2215                         }
2216                 } else {
2217                         data = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
2218                         if (bufsz) {
2219                                 pos += scnprintf(*buf + pos, bufsz - pos,
2220                                                 "EVT_LOGT:%010u:0x%08x:%04u\n",
2221                                                  time, data, ev);
2222                         } else {
2223                                 IWL_ERR(priv, "EVT_LOGT:%010u:0x%08x:%04u\n",
2224                                         time, data, ev);
2225                                 trace_iwlwifi_dev_ucode_event(priv, time,
2226                                         data, ev);
2227                         }
2228                 }
2229         }
2230
2231         /* Allow device to power down */
2232         iwl_release_nic_access(priv);
2233         spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
2234         return pos;
2235 }
2236
2237 /**
2238  * iwl_print_last_event_logs - Dump the newest # of event log to syslog
2239  */
2240 static int iwl_print_last_event_logs(struct iwl_priv *priv, u32 capacity,
2241                                     u32 num_wraps, u32 next_entry,
2242                                     u32 size, u32 mode,
2243                                     int pos, char **buf, size_t bufsz)
2244 {
2245         /*
2246          * display the newest DEFAULT_LOG_ENTRIES entries
2247          * i.e the entries just before the next ont that uCode would fill.
2248          */
2249         if (num_wraps) {
2250                 if (next_entry < size) {
2251                         pos = iwl_print_event_log(priv,
2252                                                 capacity - (size - next_entry),
2253                                                 size - next_entry, mode,
2254                                                 pos, buf, bufsz);
2255                         pos = iwl_print_event_log(priv, 0,
2256                                                   next_entry, mode,
2257                                                   pos, buf, bufsz);
2258                 } else
2259                         pos = iwl_print_event_log(priv, next_entry - size,
2260                                                   size, mode, pos, buf, bufsz);
2261         } else {
2262                 if (next_entry < size) {
2263                         pos = iwl_print_event_log(priv, 0, next_entry,
2264                                                   mode, pos, buf, bufsz);
2265                 } else {
2266                         pos = iwl_print_event_log(priv, next_entry - size,
2267                                                   size, mode, pos, buf, bufsz);
2268                 }
2269         }
2270         return pos;
2271 }
2272
2273 #define DEFAULT_DUMP_EVENT_LOG_ENTRIES (20)
2274
2275 int iwl_dump_nic_event_log(struct iwl_priv *priv, bool full_log,
2276                             char **buf, bool display)
2277 {
2278         u32 base;       /* SRAM byte address of event log header */
2279         u32 capacity;   /* event log capacity in # entries */
2280         u32 mode;       /* 0 - no timestamp, 1 - timestamp recorded */
2281         u32 num_wraps;  /* # times uCode wrapped to top of log */
2282         u32 next_entry; /* index of next entry to be written by uCode */
2283         u32 size;       /* # entries that we'll print */
2284         u32 logsize;
2285         int pos = 0;
2286         size_t bufsz = 0;
2287
2288         if (priv->ucode_type == UCODE_INIT) {
2289                 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
2290                 logsize = priv->_agn.init_evtlog_size;
2291                 if (!base)
2292                         base = priv->_agn.init_evtlog_ptr;
2293         } else {
2294                 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
2295                 logsize = priv->_agn.inst_evtlog_size;
2296                 if (!base)
2297                         base = priv->_agn.inst_evtlog_ptr;
2298         }
2299
2300         if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
2301                 IWL_ERR(priv,
2302                         "Invalid event log pointer 0x%08X for %s uCode\n",
2303                         base, (priv->ucode_type == UCODE_INIT) ? "Init" : "RT");
2304                 return -EINVAL;
2305         }
2306
2307         /* event log header */
2308         capacity = iwl_read_targ_mem(priv, base);
2309         mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
2310         num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
2311         next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
2312
2313         if (capacity > logsize) {
2314                 IWL_ERR(priv, "Log capacity %d is bogus, limit to %d entries\n",
2315                         capacity, logsize);
2316                 capacity = logsize;
2317         }
2318
2319         if (next_entry > logsize) {
2320                 IWL_ERR(priv, "Log write index %d is bogus, limit to %d\n",
2321                         next_entry, logsize);
2322                 next_entry = logsize;
2323         }
2324
2325         size = num_wraps ? capacity : next_entry;
2326
2327         /* bail out if nothing in log */
2328         if (size == 0) {
2329                 IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
2330                 return pos;
2331         }
2332
2333 #ifdef CONFIG_IWLWIFI_DEBUG
2334         if (!(iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) && !full_log)
2335                 size = (size > DEFAULT_DUMP_EVENT_LOG_ENTRIES)
2336                         ? DEFAULT_DUMP_EVENT_LOG_ENTRIES : size;
2337 #else
2338         size = (size > DEFAULT_DUMP_EVENT_LOG_ENTRIES)
2339                 ? DEFAULT_DUMP_EVENT_LOG_ENTRIES : size;
2340 #endif
2341         IWL_ERR(priv, "Start IWL Event Log Dump: display last %u entries\n",
2342                 size);
2343
2344 #ifdef CONFIG_IWLWIFI_DEBUG
2345         if (display) {
2346                 if (full_log)
2347                         bufsz = capacity * 48;
2348                 else
2349                         bufsz = size * 48;
2350                 *buf = kmalloc(bufsz, GFP_KERNEL);
2351                 if (!*buf)
2352                         return -ENOMEM;
2353         }
2354         if ((iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) || full_log) {
2355                 /*
2356                  * if uCode has wrapped back to top of log,
2357                  * start at the oldest entry,
2358                  * i.e the next one that uCode would fill.
2359                  */
2360                 if (num_wraps)
2361                         pos = iwl_print_event_log(priv, next_entry,
2362                                                 capacity - next_entry, mode,
2363                                                 pos, buf, bufsz);
2364                 /* (then/else) start at top of log */
2365                 pos = iwl_print_event_log(priv, 0,
2366                                           next_entry, mode, pos, buf, bufsz);
2367         } else
2368                 pos = iwl_print_last_event_logs(priv, capacity, num_wraps,
2369                                                 next_entry, size, mode,
2370                                                 pos, buf, bufsz);
2371 #else
2372         pos = iwl_print_last_event_logs(priv, capacity, num_wraps,
2373                                         next_entry, size, mode,
2374                                         pos, buf, bufsz);
2375 #endif
2376         return pos;
2377 }
2378
2379 /**
2380  * iwl_alive_start - called after REPLY_ALIVE notification received
2381  *                   from protocol/runtime uCode (initialization uCode's
2382  *                   Alive gets handled by iwl_init_alive_start()).
2383  */
2384 static void iwl_alive_start(struct iwl_priv *priv)
2385 {
2386         int ret = 0;
2387
2388         IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
2389
2390         if (priv->card_alive.is_valid != UCODE_VALID_OK) {
2391                 /* We had an error bringing up the hardware, so take it
2392                  * all the way back down so we can try again */
2393                 IWL_DEBUG_INFO(priv, "Alive failed.\n");
2394                 goto restart;
2395         }
2396
2397         /* Initialize uCode has loaded Runtime uCode ... verify inst image.
2398          * This is a paranoid check, because we would not have gotten the
2399          * "runtime" alive if code weren't properly loaded.  */
2400         if (iwl_verify_ucode(priv)) {
2401                 /* Runtime instruction load was bad;
2402                  * take it all the way back down so we can try again */
2403                 IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
2404                 goto restart;
2405         }
2406
2407         ret = priv->cfg->ops->lib->alive_notify(priv);
2408         if (ret) {
2409                 IWL_WARN(priv,
2410                         "Could not complete ALIVE transition [ntf]: %d\n", ret);
2411                 goto restart;
2412         }
2413
2414         /* After the ALIVE response, we can send host commands to the uCode */
2415         set_bit(STATUS_ALIVE, &priv->status);
2416
2417         if (priv->cfg->ops->lib->recover_from_tx_stall) {
2418                 /* Enable timer to monitor the driver queues */
2419                 mod_timer(&priv->monitor_recover,
2420                         jiffies +
2421                         msecs_to_jiffies(priv->cfg->monitor_recover_period));
2422         }
2423
2424         if (iwl_is_rfkill(priv))
2425                 return;
2426
2427         ieee80211_wake_queues(priv->hw);
2428
2429         priv->active_rate = IWL_RATES_MASK;
2430
2431         /* Configure Tx antenna selection based on H/W config */
2432         if (priv->cfg->ops->hcmd->set_tx_ant)
2433                 priv->cfg->ops->hcmd->set_tx_ant(priv, priv->cfg->valid_tx_ant);
2434
2435         if (iwl_is_associated(priv)) {
2436                 struct iwl_rxon_cmd *active_rxon =
2437                                 (struct iwl_rxon_cmd *)&priv->active_rxon;
2438                 /* apply any changes in staging */
2439                 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2440                 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2441         } else {
2442                 /* Initialize our rx_config data */
2443                 iwl_connection_init_rx_config(priv, NULL);
2444
2445                 if (priv->cfg->ops->hcmd->set_rxon_chain)
2446                         priv->cfg->ops->hcmd->set_rxon_chain(priv);
2447         }
2448
2449         /* Configure Bluetooth device coexistence support */
2450         priv->cfg->ops->hcmd->send_bt_config(priv);
2451
2452         iwl_reset_run_time_calib(priv);
2453
2454         /* Configure the adapter for unassociated operation */
2455         iwlcore_commit_rxon(priv);
2456
2457         /* At this point, the NIC is initialized and operational */
2458         iwl_rf_kill_ct_config(priv);
2459
2460         iwl_leds_init(priv);
2461
2462         IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
2463         set_bit(STATUS_READY, &priv->status);
2464         wake_up_interruptible(&priv->wait_command_queue);
2465
2466         iwl_power_update_mode(priv, true);
2467         IWL_DEBUG_INFO(priv, "Updated power mode\n");
2468
2469
2470         return;
2471
2472  restart:
2473         queue_work(priv->workqueue, &priv->restart);
2474 }
2475
2476 static void iwl_cancel_deferred_work(struct iwl_priv *priv);
2477
2478 static void __iwl_down(struct iwl_priv *priv)
2479 {
2480         unsigned long flags;
2481         int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
2482
2483         IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
2484
2485         if (!exit_pending)
2486                 set_bit(STATUS_EXIT_PENDING, &priv->status);
2487
2488         iwl_clear_ucode_stations(priv);
2489         iwl_dealloc_bcast_station(priv);
2490         iwl_clear_driver_stations(priv);
2491
2492         /* Unblock any waiting calls */
2493         wake_up_interruptible_all(&priv->wait_command_queue);
2494
2495         /* Wipe out the EXIT_PENDING status bit if we are not actually
2496          * exiting the module */
2497         if (!exit_pending)
2498                 clear_bit(STATUS_EXIT_PENDING, &priv->status);
2499
2500         /* stop and reset the on-board processor */
2501         iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
2502
2503         /* tell the device to stop sending interrupts */
2504         spin_lock_irqsave(&priv->lock, flags);
2505         iwl_disable_interrupts(priv);
2506         spin_unlock_irqrestore(&priv->lock, flags);
2507         iwl_synchronize_irq(priv);
2508
2509         if (priv->mac80211_registered)
2510                 ieee80211_stop_queues(priv->hw);
2511
2512         /* If we have not previously called iwl_init() then
2513          * clear all bits but the RF Kill bit and return */
2514         if (!iwl_is_init(priv)) {
2515                 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2516                                         STATUS_RF_KILL_HW |
2517                                test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2518                                         STATUS_GEO_CONFIGURED |
2519                                test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2520                                         STATUS_EXIT_PENDING;
2521                 goto exit;
2522         }
2523
2524         /* ...otherwise clear out all the status bits but the RF Kill
2525          * bit and continue taking the NIC down. */
2526         priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2527                                 STATUS_RF_KILL_HW |
2528                         test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2529                                 STATUS_GEO_CONFIGURED |
2530                         test_bit(STATUS_FW_ERROR, &priv->status) <<
2531                                 STATUS_FW_ERROR |
2532                        test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2533                                 STATUS_EXIT_PENDING;
2534
2535         /* device going down, Stop using ICT table */
2536         iwl_disable_ict(priv);
2537
2538         iwlagn_txq_ctx_stop(priv);
2539         iwlagn_rxq_stop(priv);
2540
2541         /* Power-down device's busmaster DMA clocks */
2542         iwl_write_prph(priv, APMG_CLK_DIS_REG, APMG_CLK_VAL_DMA_CLK_RQT);
2543         udelay(5);
2544
2545         /* Make sure (redundant) we've released our request to stay awake */
2546         iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
2547
2548         /* Stop the device, and put it in low power state */
2549         priv->cfg->ops->lib->apm_ops.stop(priv);
2550
2551  exit:
2552         memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
2553
2554         if (priv->ibss_beacon)
2555                 dev_kfree_skb(priv->ibss_beacon);
2556         priv->ibss_beacon = NULL;
2557
2558         /* clear out any free frames */
2559         iwl_clear_free_frames(priv);
2560 }
2561
2562 static void iwl_down(struct iwl_priv *priv)
2563 {
2564         mutex_lock(&priv->mutex);
2565         __iwl_down(priv);
2566         mutex_unlock(&priv->mutex);
2567
2568         iwl_cancel_deferred_work(priv);
2569 }
2570
2571 #define HW_READY_TIMEOUT (50)
2572
2573 static int iwl_set_hw_ready(struct iwl_priv *priv)
2574 {
2575         int ret = 0;
2576
2577         iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
2578                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY);
2579
2580         /* See if we got it */
2581         ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
2582                                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
2583                                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
2584                                 HW_READY_TIMEOUT);
2585         if (ret != -ETIMEDOUT)
2586                 priv->hw_ready = true;
2587         else
2588                 priv->hw_ready = false;
2589
2590         IWL_DEBUG_INFO(priv, "hardware %s\n",
2591                       (priv->hw_ready == 1) ? "ready" : "not ready");
2592         return ret;
2593 }
2594
2595 static int iwl_prepare_card_hw(struct iwl_priv *priv)
2596 {
2597         int ret = 0;
2598
2599         IWL_DEBUG_INFO(priv, "iwl_prepare_card_hw enter\n");
2600
2601         ret = iwl_set_hw_ready(priv);
2602         if (priv->hw_ready)
2603                 return ret;
2604
2605         /* If HW is not ready, prepare the conditions to check again */
2606         iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
2607                         CSR_HW_IF_CONFIG_REG_PREPARE);
2608
2609         ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
2610                         ~CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE,
2611                         CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE, 150000);
2612
2613         /* HW should be ready by now, check again. */
2614         if (ret != -ETIMEDOUT)
2615                 iwl_set_hw_ready(priv);
2616
2617         return ret;
2618 }
2619
2620 #define MAX_HW_RESTARTS 5
2621
2622 static int __iwl_up(struct iwl_priv *priv)
2623 {
2624         int i;
2625         int ret;
2626
2627         if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
2628                 IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
2629                 return -EIO;
2630         }
2631
2632         if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
2633                 IWL_ERR(priv, "ucode not available for device bringup\n");
2634                 return -EIO;
2635         }
2636
2637         ret = iwl_alloc_bcast_station(priv, true);
2638         if (ret)
2639                 return ret;
2640
2641         iwl_prepare_card_hw(priv);
2642
2643         if (!priv->hw_ready) {
2644                 IWL_WARN(priv, "Exit HW not ready\n");
2645                 return -EIO;
2646         }
2647
2648         /* If platform's RF_KILL switch is NOT set to KILL */
2649         if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
2650                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2651         else
2652                 set_bit(STATUS_RF_KILL_HW, &priv->status);
2653
2654         if (iwl_is_rfkill(priv)) {
2655                 wiphy_rfkill_set_hw_state(priv->hw->wiphy, true);
2656
2657                 iwl_enable_interrupts(priv);
2658                 IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
2659                 return 0;
2660         }
2661
2662         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2663
2664         ret = iwlagn_hw_nic_init(priv);
2665         if (ret) {
2666                 IWL_ERR(priv, "Unable to init nic\n");
2667                 return ret;
2668         }
2669
2670         /* make sure rfkill handshake bits are cleared */
2671         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2672         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
2673                     CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
2674
2675         /* clear (again), then enable host interrupts */
2676         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2677         iwl_enable_interrupts(priv);
2678
2679         /* really make sure rfkill handshake bits are cleared */
2680         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2681         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2682
2683         /* Copy original ucode data image from disk into backup cache.
2684          * This will be used to initialize the on-board processor's
2685          * data SRAM for a clean start when the runtime program first loads. */
2686         memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
2687                priv->ucode_data.len);
2688
2689         for (i = 0; i < MAX_HW_RESTARTS; i++) {
2690
2691                 /* load bootstrap state machine,
2692                  * load bootstrap program into processor's memory,
2693                  * prepare to load the "initialize" uCode */
2694                 ret = priv->cfg->ops->lib->load_ucode(priv);
2695
2696                 if (ret) {
2697                         IWL_ERR(priv, "Unable to set up bootstrap uCode: %d\n",
2698                                 ret);
2699                         continue;
2700                 }
2701
2702                 /* start card; "initialize" will load runtime ucode */
2703                 iwl_nic_start(priv);
2704
2705                 IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
2706
2707                 return 0;
2708         }
2709
2710         set_bit(STATUS_EXIT_PENDING, &priv->status);
2711         __iwl_down(priv);
2712         clear_bit(STATUS_EXIT_PENDING, &priv->status);
2713
2714         /* tried to restart and config the device for as long as our
2715          * patience could withstand */
2716         IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
2717         return -EIO;
2718 }
2719
2720
2721 /*****************************************************************************
2722  *
2723  * Workqueue callbacks
2724  *
2725  *****************************************************************************/
2726
2727 static void iwl_bg_init_alive_start(struct work_struct *data)
2728 {
2729         struct iwl_priv *priv =
2730             container_of(data, struct iwl_priv, init_alive_start.work);
2731
2732         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2733                 return;
2734
2735         mutex_lock(&priv->mutex);
2736         priv->cfg->ops->lib->init_alive_start(priv);
2737         mutex_unlock(&priv->mutex);
2738 }
2739
2740 static void iwl_bg_alive_start(struct work_struct *data)
2741 {
2742         struct iwl_priv *priv =
2743             container_of(data, struct iwl_priv, alive_start.work);
2744
2745         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2746                 return;
2747
2748         /* enable dram interrupt */
2749         iwl_reset_ict(priv);
2750
2751         mutex_lock(&priv->mutex);
2752         iwl_alive_start(priv);
2753         mutex_unlock(&priv->mutex);
2754 }
2755
2756 static void iwl_bg_run_time_calib_work(struct work_struct *work)
2757 {
2758         struct iwl_priv *priv = container_of(work, struct iwl_priv,
2759                         run_time_calib_work);
2760
2761         mutex_lock(&priv->mutex);
2762
2763         if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
2764             test_bit(STATUS_SCANNING, &priv->status)) {
2765                 mutex_unlock(&priv->mutex);
2766                 return;
2767         }
2768
2769         if (priv->start_calib) {
2770                 iwl_chain_noise_calibration(priv, &priv->statistics);
2771
2772                 iwl_sensitivity_calibration(priv, &priv->statistics);
2773         }
2774
2775         mutex_unlock(&priv->mutex);
2776 }
2777
2778 static void iwl_bg_restart(struct work_struct *data)
2779 {
2780         struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
2781
2782         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2783                 return;
2784
2785         if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) {
2786                 mutex_lock(&priv->mutex);
2787                 priv->vif = NULL;
2788                 priv->is_open = 0;
2789                 mutex_unlock(&priv->mutex);
2790                 iwl_down(priv);
2791                 ieee80211_restart_hw(priv->hw);
2792         } else {
2793                 iwl_down(priv);
2794
2795                 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2796                         return;
2797
2798                 mutex_lock(&priv->mutex);
2799                 __iwl_up(priv);
2800                 mutex_unlock(&priv->mutex);
2801         }
2802 }
2803
2804 static void iwl_bg_rx_replenish(struct work_struct *data)
2805 {
2806         struct iwl_priv *priv =
2807             container_of(data, struct iwl_priv, rx_replenish);
2808
2809         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2810                 return;
2811
2812         mutex_lock(&priv->mutex);
2813         iwlagn_rx_replenish(priv);
2814         mutex_unlock(&priv->mutex);
2815 }
2816
2817 #define IWL_DELAY_NEXT_SCAN (HZ*2)
2818
2819 void iwl_post_associate(struct iwl_priv *priv, struct ieee80211_vif *vif)
2820 {
2821         struct ieee80211_conf *conf = NULL;
2822         int ret = 0;
2823
2824         if (!vif || !priv->is_open)
2825                 return;
2826
2827         if (vif->type == NL80211_IFTYPE_AP) {
2828                 IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
2829                 return;
2830         }
2831
2832         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2833                 return;
2834
2835         iwl_scan_cancel_timeout(priv, 200);
2836
2837         conf = ieee80211_get_hw_conf(priv->hw);
2838
2839         priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2840         iwlcore_commit_rxon(priv);
2841
2842         iwl_setup_rxon_timing(priv, vif);
2843         ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
2844                               sizeof(priv->rxon_timing), &priv->rxon_timing);
2845         if (ret)
2846                 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
2847                             "Attempting to continue.\n");
2848
2849         priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2850
2851         iwl_set_rxon_ht(priv, &priv->current_ht_config);
2852
2853         if (priv->cfg->ops->hcmd->set_rxon_chain)
2854                 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2855
2856         priv->staging_rxon.assoc_id = cpu_to_le16(vif->bss_conf.aid);
2857
2858         IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n",
2859                         vif->bss_conf.aid, vif->bss_conf.beacon_int);
2860
2861         if (vif->bss_conf.use_short_preamble)
2862                 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2863         else
2864                 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2865
2866         if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
2867                 if (vif->bss_conf.use_short_slot)
2868                         priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2869                 else
2870                         priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2871         }
2872
2873         iwlcore_commit_rxon(priv);
2874
2875         IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n",
2876                         vif->bss_conf.aid, priv->active_rxon.bssid_addr);
2877
2878         switch (vif->type) {
2879         case NL80211_IFTYPE_STATION:
2880                 break;
2881         case NL80211_IFTYPE_ADHOC:
2882                 iwl_send_beacon_cmd(priv);
2883                 break;
2884         default:
2885                 IWL_ERR(priv, "%s Should not be called in %d mode\n",
2886                           __func__, vif->type);
2887                 break;
2888         }
2889
2890         /* the chain noise calibration will enabled PM upon completion
2891          * If chain noise has already been run, then we need to enable
2892          * power management here */
2893         if (priv->chain_noise_data.state == IWL_CHAIN_NOISE_DONE)
2894                 iwl_power_update_mode(priv, false);
2895
2896         /* Enable Rx differential gain and sensitivity calibrations */
2897         iwl_chain_noise_reset(priv);
2898         priv->start_calib = 1;
2899
2900 }
2901
2902 /*****************************************************************************
2903  *
2904  * mac80211 entry point functions
2905  *
2906  *****************************************************************************/
2907
2908 #define UCODE_READY_TIMEOUT     (4 * HZ)
2909
2910 /*
2911  * Not a mac80211 entry point function, but it fits in with all the
2912  * other mac80211 functions grouped here.
2913  */
2914 static int iwl_mac_setup_register(struct iwl_priv *priv,
2915                                   struct iwlagn_ucode_capabilities *capa)
2916 {
2917         int ret;
2918         struct ieee80211_hw *hw = priv->hw;
2919         hw->rate_control_algorithm = "iwl-agn-rs";
2920
2921         /* Tell mac80211 our characteristics */
2922         hw->flags = IEEE80211_HW_SIGNAL_DBM |
2923                     IEEE80211_HW_AMPDU_AGGREGATION |
2924                     IEEE80211_HW_SPECTRUM_MGMT;
2925
2926         if (!priv->cfg->broken_powersave)
2927                 hw->flags |= IEEE80211_HW_SUPPORTS_PS |
2928                              IEEE80211_HW_SUPPORTS_DYNAMIC_PS;
2929
2930         if (priv->cfg->sku & IWL_SKU_N)
2931                 hw->flags |= IEEE80211_HW_SUPPORTS_DYNAMIC_SMPS |
2932                              IEEE80211_HW_SUPPORTS_STATIC_SMPS;
2933
2934         hw->sta_data_size = sizeof(struct iwl_station_priv);
2935         hw->vif_data_size = sizeof(struct iwl_vif_priv);
2936
2937         hw->wiphy->interface_modes =
2938                 BIT(NL80211_IFTYPE_STATION) |
2939                 BIT(NL80211_IFTYPE_ADHOC);
2940
2941         hw->wiphy->flags |= WIPHY_FLAG_CUSTOM_REGULATORY |
2942                             WIPHY_FLAG_DISABLE_BEACON_HINTS;
2943
2944         /*
2945          * For now, disable PS by default because it affects
2946          * RX performance significantly.
2947          */
2948         hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT;
2949
2950         hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX;
2951         /* we create the 802.11 header and a zero-length SSID element */
2952         hw->wiphy->max_scan_ie_len = capa->max_probe_length - 24 - 2;
2953
2954         /* Default value; 4 EDCA QOS priorities */
2955         hw->queues = 4;
2956
2957         hw->max_listen_interval = IWL_CONN_MAX_LISTEN_INTERVAL;
2958
2959         if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
2960                 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
2961                         &priv->bands[IEEE80211_BAND_2GHZ];
2962         if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
2963                 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
2964                         &priv->bands[IEEE80211_BAND_5GHZ];
2965
2966         ret = ieee80211_register_hw(priv->hw);
2967         if (ret) {
2968                 IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
2969                 return ret;
2970         }
2971         priv->mac80211_registered = 1;
2972
2973         return 0;
2974 }
2975
2976
2977 static int iwl_mac_start(struct ieee80211_hw *hw)
2978 {
2979         struct iwl_priv *priv = hw->priv;
2980         int ret;
2981
2982         IWL_DEBUG_MAC80211(priv, "enter\n");
2983
2984         /* we should be verifying the device is ready to be opened */
2985         mutex_lock(&priv->mutex);
2986         ret = __iwl_up(priv);
2987         mutex_unlock(&priv->mutex);
2988
2989         if (ret)
2990                 return ret;
2991
2992         if (iwl_is_rfkill(priv))
2993                 goto out;
2994
2995         IWL_DEBUG_INFO(priv, "Start UP work done.\n");
2996
2997         /* Wait for START_ALIVE from Run Time ucode. Otherwise callbacks from
2998          * mac80211 will not be run successfully. */
2999         ret = wait_event_interruptible_timeout(priv->wait_command_queue,
3000                         test_bit(STATUS_READY, &priv->status),
3001                         UCODE_READY_TIMEOUT);
3002         if (!ret) {
3003                 if (!test_bit(STATUS_READY, &priv->status)) {
3004                         IWL_ERR(priv, "START_ALIVE timeout after %dms.\n",
3005                                 jiffies_to_msecs(UCODE_READY_TIMEOUT));
3006                         return -ETIMEDOUT;
3007                 }
3008         }
3009
3010         iwl_led_start(priv);
3011
3012 out:
3013         priv->is_open = 1;
3014         IWL_DEBUG_MAC80211(priv, "leave\n");
3015         return 0;
3016 }
3017
3018 static void iwl_mac_stop(struct ieee80211_hw *hw)
3019 {
3020         struct iwl_priv *priv = hw->priv;
3021
3022         IWL_DEBUG_MAC80211(priv, "enter\n");
3023
3024         if (!priv->is_open)
3025                 return;
3026
3027         priv->is_open = 0;
3028
3029         if (iwl_is_ready_rf(priv) || test_bit(STATUS_SCAN_HW, &priv->status)) {
3030                 /* stop mac, cancel any scan request and clear
3031                  * RXON_FILTER_ASSOC_MSK BIT
3032                  */
3033                 mutex_lock(&priv->mutex);
3034                 iwl_scan_cancel_timeout(priv, 100);
3035                 mutex_unlock(&priv->mutex);
3036         }
3037
3038         iwl_down(priv);
3039
3040         flush_workqueue(priv->workqueue);
3041
3042         /* enable interrupts again in order to receive rfkill changes */
3043         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
3044         iwl_enable_interrupts(priv);
3045
3046         IWL_DEBUG_MAC80211(priv, "leave\n");
3047 }
3048
3049 static int iwl_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
3050 {
3051         struct iwl_priv *priv = hw->priv;
3052
3053         IWL_DEBUG_MACDUMP(priv, "enter\n");
3054
3055         IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
3056                      ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
3057
3058         if (iwlagn_tx_skb(priv, skb))
3059                 dev_kfree_skb_any(skb);
3060
3061         IWL_DEBUG_MACDUMP(priv, "leave\n");
3062         return NETDEV_TX_OK;
3063 }
3064
3065 void iwl_config_ap(struct iwl_priv *priv, struct ieee80211_vif *vif)
3066 {
3067         int ret = 0;
3068
3069         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3070                 return;
3071
3072         /* The following should be done only at AP bring up */
3073         if (!iwl_is_associated(priv)) {
3074
3075                 /* RXON - unassoc (to set timing command) */
3076                 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
3077                 iwlcore_commit_rxon(priv);
3078
3079                 /* RXON Timing */
3080                 iwl_setup_rxon_timing(priv, vif);
3081                 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
3082                                 sizeof(priv->rxon_timing), &priv->rxon_timing);
3083                 if (ret)
3084                         IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
3085                                         "Attempting to continue.\n");
3086
3087                 /* AP has all antennas */
3088                 priv->chain_noise_data.active_chains =
3089                         priv->hw_params.valid_rx_ant;
3090                 iwl_set_rxon_ht(priv, &priv->current_ht_config);
3091                 if (priv->cfg->ops->hcmd->set_rxon_chain)
3092                         priv->cfg->ops->hcmd->set_rxon_chain(priv);
3093
3094                 priv->staging_rxon.assoc_id = 0;
3095
3096                 if (vif->bss_conf.use_short_preamble)
3097                         priv->staging_rxon.flags |=
3098                                 RXON_FLG_SHORT_PREAMBLE_MSK;
3099                 else
3100                         priv->staging_rxon.flags &=
3101                                 ~RXON_FLG_SHORT_PREAMBLE_MSK;
3102
3103                 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
3104                         if (vif->bss_conf.use_short_slot)
3105                                 priv->staging_rxon.flags |=
3106                                         RXON_FLG_SHORT_SLOT_MSK;
3107                         else
3108                                 priv->staging_rxon.flags &=
3109                                         ~RXON_FLG_SHORT_SLOT_MSK;
3110                 }
3111                 /* restore RXON assoc */
3112                 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
3113                 iwlcore_commit_rxon(priv);
3114         }
3115         iwl_send_beacon_cmd(priv);
3116
3117         /* FIXME - we need to add code here to detect a totally new
3118          * configuration, reset the AP, unassoc, rxon timing, assoc,
3119          * clear sta table, add BCAST sta... */
3120 }
3121
3122 static void iwl_mac_update_tkip_key(struct ieee80211_hw *hw,
3123                                     struct ieee80211_vif *vif,
3124                                     struct ieee80211_key_conf *keyconf,
3125                                     struct ieee80211_sta *sta,
3126                                     u32 iv32, u16 *phase1key)
3127 {
3128
3129         struct iwl_priv *priv = hw->priv;
3130         IWL_DEBUG_MAC80211(priv, "enter\n");
3131
3132         iwl_update_tkip_key(priv, keyconf, sta,
3133                             iv32, phase1key);
3134
3135         IWL_DEBUG_MAC80211(priv, "leave\n");
3136 }
3137
3138 static int iwl_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
3139                            struct ieee80211_vif *vif,
3140                            struct ieee80211_sta *sta,
3141                            struct ieee80211_key_conf *key)
3142 {
3143         struct iwl_priv *priv = hw->priv;
3144         int ret;
3145         u8 sta_id;
3146         bool is_default_wep_key = false;
3147
3148         IWL_DEBUG_MAC80211(priv, "enter\n");
3149
3150         if (priv->cfg->mod_params->sw_crypto) {
3151                 IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
3152                 return -EOPNOTSUPP;
3153         }
3154
3155         sta_id = iwl_sta_id_or_broadcast(priv, sta);
3156         if (sta_id == IWL_INVALID_STATION)
3157                 return -EINVAL;
3158
3159         mutex_lock(&priv->mutex);
3160         iwl_scan_cancel_timeout(priv, 100);
3161
3162         /*
3163          * If we are getting WEP group key and we didn't receive any key mapping
3164          * so far, we are in legacy wep mode (group key only), otherwise we are
3165          * in 1X mode.
3166          * In legacy wep mode, we use another host command to the uCode.
3167          */
3168         if (key->alg == ALG_WEP && !sta && vif->type != NL80211_IFTYPE_AP) {
3169                 if (cmd == SET_KEY)
3170                         is_default_wep_key = !priv->key_mapping_key;
3171                 else
3172                         is_default_wep_key =
3173                                         (key->hw_key_idx == HW_KEY_DEFAULT);
3174         }
3175
3176         switch (cmd) {
3177         case SET_KEY:
3178                 if (is_default_wep_key)
3179                         ret = iwl_set_default_wep_key(priv, key);
3180                 else
3181                         ret = iwl_set_dynamic_key(priv, key, sta_id);
3182
3183                 IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
3184                 break;
3185         case DISABLE_KEY:
3186                 if (is_default_wep_key)
3187                         ret = iwl_remove_default_wep_key(priv, key);
3188                 else
3189                         ret = iwl_remove_dynamic_key(priv, key, sta_id);
3190
3191                 IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
3192                 break;
3193         default:
3194                 ret = -EINVAL;
3195         }
3196
3197         mutex_unlock(&priv->mutex);
3198         IWL_DEBUG_MAC80211(priv, "leave\n");
3199
3200         return ret;
3201 }
3202
3203 static int iwl_mac_ampdu_action(struct ieee80211_hw *hw,
3204                                 struct ieee80211_vif *vif,
3205                                 enum ieee80211_ampdu_mlme_action action,
3206                                 struct ieee80211_sta *sta, u16 tid, u16 *ssn)
3207 {
3208         struct iwl_priv *priv = hw->priv;
3209         int ret;
3210
3211         IWL_DEBUG_HT(priv, "A-MPDU action on addr %pM tid %d\n",
3212                      sta->addr, tid);
3213
3214         if (!(priv->cfg->sku & IWL_SKU_N))
3215                 return -EACCES;
3216
3217         switch (action) {
3218         case IEEE80211_AMPDU_RX_START:
3219                 IWL_DEBUG_HT(priv, "start Rx\n");
3220                 return iwl_sta_rx_agg_start(priv, sta, tid, *ssn);
3221         case IEEE80211_AMPDU_RX_STOP:
3222                 IWL_DEBUG_HT(priv, "stop Rx\n");
3223                 ret = iwl_sta_rx_agg_stop(priv, sta, tid);
3224                 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3225                         return 0;
3226                 else
3227                         return ret;
3228         case IEEE80211_AMPDU_TX_START:
3229                 IWL_DEBUG_HT(priv, "start Tx\n");
3230                 ret = iwlagn_tx_agg_start(priv, vif, sta, tid, ssn);
3231                 if (ret == 0) {
3232                         priv->_agn.agg_tids_count++;
3233                         IWL_DEBUG_HT(priv, "priv->_agn.agg_tids_count = %u\n",
3234                                      priv->_agn.agg_tids_count);
3235                 }
3236                 return ret;
3237         case IEEE80211_AMPDU_TX_STOP:
3238                 IWL_DEBUG_HT(priv, "stop Tx\n");
3239                 ret = iwlagn_tx_agg_stop(priv, vif, sta, tid);
3240                 if ((ret == 0) && (priv->_agn.agg_tids_count > 0)) {
3241                         priv->_agn.agg_tids_count--;
3242                         IWL_DEBUG_HT(priv, "priv->_agn.agg_tids_count = %u\n",
3243                                      priv->_agn.agg_tids_count);
3244                 }
3245                 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3246                         return 0;
3247                 else
3248                         return ret;
3249         case IEEE80211_AMPDU_TX_OPERATIONAL:
3250                 /* do nothing */
3251                 return -EOPNOTSUPP;
3252         default:
3253                 IWL_DEBUG_HT(priv, "unknown\n");
3254                 return -EINVAL;
3255                 break;
3256         }
3257         return 0;
3258 }
3259
3260 static void iwl_mac_sta_notify(struct ieee80211_hw *hw,
3261                                struct ieee80211_vif *vif,
3262                                enum sta_notify_cmd cmd,
3263                                struct ieee80211_sta *sta)
3264 {
3265         struct iwl_priv *priv = hw->priv;
3266         struct iwl_station_priv *sta_priv = (void *)sta->drv_priv;
3267         int sta_id;
3268
3269         switch (cmd) {
3270         case STA_NOTIFY_SLEEP:
3271                 WARN_ON(!sta_priv->client);
3272                 sta_priv->asleep = true;
3273                 if (atomic_read(&sta_priv->pending_frames) > 0)
3274                         ieee80211_sta_block_awake(hw, sta, true);
3275                 break;
3276         case STA_NOTIFY_AWAKE:
3277                 WARN_ON(!sta_priv->client);
3278                 if (!sta_priv->asleep)
3279                         break;
3280                 sta_priv->asleep = false;
3281                 sta_id = iwl_sta_id(sta);
3282                 if (sta_id != IWL_INVALID_STATION)
3283                         iwl_sta_modify_ps_wake(priv, sta_id);
3284                 break;
3285         default:
3286                 break;
3287         }
3288 }
3289
3290 static int iwlagn_mac_sta_add(struct ieee80211_hw *hw,
3291                               struct ieee80211_vif *vif,
3292                               struct ieee80211_sta *sta)
3293 {
3294         struct iwl_priv *priv = hw->priv;
3295         struct iwl_station_priv *sta_priv = (void *)sta->drv_priv;
3296         bool is_ap = vif->type == NL80211_IFTYPE_STATION;
3297         int ret;
3298         u8 sta_id;
3299
3300         sta_priv->common.sta_id = IWL_INVALID_STATION;
3301
3302         IWL_DEBUG_INFO(priv, "received request to add station %pM\n",
3303                         sta->addr);
3304
3305         atomic_set(&sta_priv->pending_frames, 0);
3306         if (vif->type == NL80211_IFTYPE_AP)
3307                 sta_priv->client = true;
3308
3309         ret = iwl_add_station_common(priv, sta->addr, is_ap, &sta->ht_cap,
3310                                      &sta_id);
3311         if (ret) {
3312                 IWL_ERR(priv, "Unable to add station %pM (%d)\n",
3313                         sta->addr, ret);
3314                 /* Should we return success if return code is EEXIST ? */
3315                 return ret;
3316         }
3317
3318         sta_priv->common.sta_id = sta_id;
3319
3320         /* Initialize rate scaling */
3321         IWL_DEBUG_INFO(priv, "Initializing rate scaling for station %pM\n",
3322                        sta->addr);
3323         iwl_rs_rate_init(priv, sta, sta_id);
3324
3325         return 0;
3326 }
3327
3328 /*****************************************************************************
3329  *
3330  * sysfs attributes
3331  *
3332  *****************************************************************************/
3333
3334 #ifdef CONFIG_IWLWIFI_DEBUG
3335
3336 /*
3337  * The following adds a new attribute to the sysfs representation
3338  * of this device driver (i.e. a new file in /sys/class/net/wlan0/device/)
3339  * used for controlling the debug level.
3340  *
3341  * See the level definitions in iwl for details.
3342  *
3343  * The debug_level being managed using sysfs below is a per device debug
3344  * level that is used instead of the global debug level if it (the per
3345  * device debug level) is set.
3346  */
3347 static ssize_t show_debug_level(struct device *d,
3348                                 struct device_attribute *attr, char *buf)
3349 {
3350         struct iwl_priv *priv = dev_get_drvdata(d);
3351         return sprintf(buf, "0x%08X\n", iwl_get_debug_level(priv));
3352 }
3353 static ssize_t store_debug_level(struct device *d,
3354                                 struct device_attribute *attr,
3355                                  const char *buf, size_t count)
3356 {
3357         struct iwl_priv *priv = dev_get_drvdata(d);
3358         unsigned long val;
3359         int ret;
3360
3361         ret = strict_strtoul(buf, 0, &val);
3362         if (ret)
3363                 IWL_ERR(priv, "%s is not in hex or decimal form.\n", buf);
3364         else {
3365                 priv->debug_level = val;
3366                 if (iwl_alloc_traffic_mem(priv))
3367                         IWL_ERR(priv,
3368                                 "Not enough memory to generate traffic log\n");
3369         }
3370         return strnlen(buf, count);
3371 }
3372
3373 static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
3374                         show_debug_level, store_debug_level);
3375
3376
3377 #endif /* CONFIG_IWLWIFI_DEBUG */
3378
3379
3380 static ssize_t show_temperature(struct device *d,
3381                                 struct device_attribute *attr, char *buf)
3382 {
3383         struct iwl_priv *priv = dev_get_drvdata(d);
3384
3385         if (!iwl_is_alive(priv))
3386                 return -EAGAIN;
3387
3388         return sprintf(buf, "%d\n", priv->temperature);
3389 }
3390
3391 static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
3392
3393 static ssize_t show_tx_power(struct device *d,
3394                              struct device_attribute *attr, char *buf)
3395 {
3396         struct iwl_priv *priv = dev_get_drvdata(d);
3397
3398         if (!iwl_is_ready_rf(priv))
3399                 return sprintf(buf, "off\n");
3400         else
3401                 return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
3402 }
3403
3404 static ssize_t store_tx_power(struct device *d,
3405                               struct device_attribute *attr,
3406                               const char *buf, size_t count)
3407 {
3408         struct iwl_priv *priv = dev_get_drvdata(d);
3409         unsigned long val;
3410         int ret;
3411
3412         ret = strict_strtoul(buf, 10, &val);
3413         if (ret)
3414                 IWL_INFO(priv, "%s is not in decimal form.\n", buf);
3415         else {
3416                 ret = iwl_set_tx_power(priv, val, false);
3417                 if (ret)
3418                         IWL_ERR(priv, "failed setting tx power (0x%d).\n",
3419                                 ret);
3420                 else
3421                         ret = count;
3422         }
3423         return ret;
3424 }
3425
3426 static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
3427
3428 static ssize_t show_rts_ht_protection(struct device *d,
3429                              struct device_attribute *attr, char *buf)
3430 {
3431         struct iwl_priv *priv = dev_get_drvdata(d);
3432
3433         return sprintf(buf, "%s\n",
3434                 priv->cfg->use_rts_for_ht ? "RTS/CTS" : "CTS-to-self");
3435 }
3436
3437 static ssize_t store_rts_ht_protection(struct device *d,
3438                               struct device_attribute *attr,
3439                               const char *buf, size_t count)
3440 {
3441         struct iwl_priv *priv = dev_get_drvdata(d);
3442         unsigned long val;
3443         int ret;
3444
3445         ret = strict_strtoul(buf, 10, &val);
3446         if (ret)
3447                 IWL_INFO(priv, "Input is not in decimal form.\n");
3448         else {
3449                 if (!iwl_is_associated(priv))
3450                         priv->cfg->use_rts_for_ht = val ? true : false;
3451                 else
3452                         IWL_ERR(priv, "Sta associated with AP - "
3453                                 "Change protection mechanism is not allowed\n");
3454                 ret = count;
3455         }
3456         return ret;
3457 }
3458
3459 static DEVICE_ATTR(rts_ht_protection, S_IWUSR | S_IRUGO,
3460                         show_rts_ht_protection, store_rts_ht_protection);
3461
3462
3463 /*****************************************************************************
3464  *
3465  * driver setup and teardown
3466  *
3467  *****************************************************************************/
3468
3469 static void iwl_setup_deferred_work(struct iwl_priv *priv)
3470 {
3471         priv->workqueue = create_singlethread_workqueue(DRV_NAME);
3472
3473         init_waitqueue_head(&priv->wait_command_queue);
3474
3475         INIT_WORK(&priv->restart, iwl_bg_restart);
3476         INIT_WORK(&priv->rx_replenish, iwl_bg_rx_replenish);
3477         INIT_WORK(&priv->beacon_update, iwl_bg_beacon_update);
3478         INIT_WORK(&priv->run_time_calib_work, iwl_bg_run_time_calib_work);
3479         INIT_DELAYED_WORK(&priv->init_alive_start, iwl_bg_init_alive_start);
3480         INIT_DELAYED_WORK(&priv->alive_start, iwl_bg_alive_start);
3481
3482         iwl_setup_scan_deferred_work(priv);
3483
3484         if (priv->cfg->ops->lib->setup_deferred_work)
3485                 priv->cfg->ops->lib->setup_deferred_work(priv);
3486
3487         init_timer(&priv->statistics_periodic);
3488         priv->statistics_periodic.data = (unsigned long)priv;
3489         priv->statistics_periodic.function = iwl_bg_statistics_periodic;
3490
3491         init_timer(&priv->ucode_trace);
3492         priv->ucode_trace.data = (unsigned long)priv;
3493         priv->ucode_trace.function = iwl_bg_ucode_trace;
3494
3495         if (priv->cfg->ops->lib->recover_from_tx_stall) {
3496                 init_timer(&priv->monitor_recover);
3497                 priv->monitor_recover.data = (unsigned long)priv;
3498                 priv->monitor_recover.function =
3499                         priv->cfg->ops->lib->recover_from_tx_stall;
3500         }
3501
3502         if (!priv->cfg->use_isr_legacy)
3503                 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
3504                         iwl_irq_tasklet, (unsigned long)priv);
3505         else
3506                 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
3507                         iwl_irq_tasklet_legacy, (unsigned long)priv);
3508 }
3509
3510 static void iwl_cancel_deferred_work(struct iwl_priv *priv)
3511 {
3512         if (priv->cfg->ops->lib->cancel_deferred_work)
3513                 priv->cfg->ops->lib->cancel_deferred_work(priv);
3514
3515         cancel_delayed_work_sync(&priv->init_alive_start);
3516         cancel_delayed_work(&priv->scan_check);
3517         cancel_work_sync(&priv->start_internal_scan);
3518         cancel_delayed_work(&priv->alive_start);
3519         cancel_work_sync(&priv->beacon_update);
3520         del_timer_sync(&priv->statistics_periodic);
3521         del_timer_sync(&priv->ucode_trace);
3522         if (priv->cfg->ops->lib->recover_from_tx_stall)
3523                 del_timer_sync(&priv->monitor_recover);
3524 }
3525
3526 static void iwl_init_hw_rates(struct iwl_priv *priv,
3527                               struct ieee80211_rate *rates)
3528 {
3529         int i;
3530
3531         for (i = 0; i < IWL_RATE_COUNT_LEGACY; i++) {
3532                 rates[i].bitrate = iwl_rates[i].ieee * 5;
3533                 rates[i].hw_value = i; /* Rate scaling will work on indexes */
3534                 rates[i].hw_value_short = i;
3535                 rates[i].flags = 0;
3536                 if ((i >= IWL_FIRST_CCK_RATE) && (i <= IWL_LAST_CCK_RATE)) {
3537                         /*
3538                          * If CCK != 1M then set short preamble rate flag.
3539                          */
3540                         rates[i].flags |=
3541                                 (iwl_rates[i].plcp == IWL_RATE_1M_PLCP) ?
3542                                         0 : IEEE80211_RATE_SHORT_PREAMBLE;
3543                 }
3544         }
3545 }
3546
3547 static int iwl_init_drv(struct iwl_priv *priv)
3548 {
3549         int ret;
3550
3551         priv->ibss_beacon = NULL;
3552
3553         spin_lock_init(&priv->sta_lock);
3554         spin_lock_init(&priv->hcmd_lock);
3555
3556         INIT_LIST_HEAD(&priv->free_frames);
3557
3558         mutex_init(&priv->mutex);
3559         mutex_init(&priv->sync_cmd_mutex);
3560
3561         priv->ieee_channels = NULL;
3562         priv->ieee_rates = NULL;
3563         priv->band = IEEE80211_BAND_2GHZ;
3564
3565         priv->iw_mode = NL80211_IFTYPE_STATION;
3566         priv->current_ht_config.smps = IEEE80211_SMPS_STATIC;
3567         priv->missed_beacon_threshold = IWL_MISSED_BEACON_THRESHOLD_DEF;
3568         priv->_agn.agg_tids_count = 0;
3569
3570         /* initialize force reset */
3571         priv->force_reset[IWL_RF_RESET].reset_duration =
3572                 IWL_DELAY_NEXT_FORCE_RF_RESET;
3573         priv->force_reset[IWL_FW_RESET].reset_duration =
3574                 IWL_DELAY_NEXT_FORCE_FW_RELOAD;
3575
3576         /* Choose which receivers/antennas to use */
3577         if (priv->cfg->ops->hcmd->set_rxon_chain)
3578                 priv->cfg->ops->hcmd->set_rxon_chain(priv);
3579
3580         iwl_init_scan_params(priv);
3581
3582         /* Set the tx_power_user_lmt to the lowest power level
3583          * this value will get overwritten by channel max power avg
3584          * from eeprom */
3585         priv->tx_power_user_lmt = IWLAGN_TX_POWER_TARGET_POWER_MIN;
3586
3587         ret = iwl_init_channel_map(priv);
3588         if (ret) {
3589                 IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
3590                 goto err;
3591         }
3592
3593         ret = iwlcore_init_geos(priv);
3594         if (ret) {
3595                 IWL_ERR(priv, "initializing geos failed: %d\n", ret);
3596                 goto err_free_channel_map;
3597         }
3598         iwl_init_hw_rates(priv, priv->ieee_rates);
3599
3600         return 0;
3601
3602 err_free_channel_map:
3603         iwl_free_channel_map(priv);
3604 err:
3605         return ret;
3606 }
3607
3608 static void iwl_uninit_drv(struct iwl_priv *priv)
3609 {
3610         iwl_calib_free_results(priv);
3611         iwlcore_free_geos(priv);
3612         iwl_free_channel_map(priv);
3613         kfree(priv->scan_cmd);
3614 }
3615
3616 static struct attribute *iwl_sysfs_entries[] = {
3617         &dev_attr_temperature.attr,
3618         &dev_attr_tx_power.attr,
3619         &dev_attr_rts_ht_protection.attr,
3620 #ifdef CONFIG_IWLWIFI_DEBUG
3621         &dev_attr_debug_level.attr,
3622 #endif
3623         NULL
3624 };
3625
3626 static struct attribute_group iwl_attribute_group = {
3627         .name = NULL,           /* put in device directory */
3628         .attrs = iwl_sysfs_entries,
3629 };
3630
3631 static struct ieee80211_ops iwl_hw_ops = {
3632         .tx = iwl_mac_tx,
3633         .start = iwl_mac_start,
3634         .stop = iwl_mac_stop,
3635         .add_interface = iwl_mac_add_interface,
3636         .remove_interface = iwl_mac_remove_interface,
3637         .config = iwl_mac_config,
3638         .configure_filter = iwl_configure_filter,
3639         .set_key = iwl_mac_set_key,
3640         .update_tkip_key = iwl_mac_update_tkip_key,
3641         .conf_tx = iwl_mac_conf_tx,
3642         .reset_tsf = iwl_mac_reset_tsf,
3643         .bss_info_changed = iwl_bss_info_changed,
3644         .ampdu_action = iwl_mac_ampdu_action,
3645         .hw_scan = iwl_mac_hw_scan,
3646         .sta_notify = iwl_mac_sta_notify,
3647         .sta_add = iwlagn_mac_sta_add,
3648         .sta_remove = iwl_mac_sta_remove,
3649 };
3650
3651 static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3652 {
3653         int err = 0;
3654         struct iwl_priv *priv;
3655         struct ieee80211_hw *hw;
3656         struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
3657         unsigned long flags;
3658         u16 pci_cmd;
3659         u8 perm_addr[ETH_ALEN];
3660
3661         /************************
3662          * 1. Allocating HW data
3663          ************************/
3664
3665         /* Disabling hardware scan means that mac80211 will perform scans
3666          * "the hard way", rather than using device's scan. */
3667         if (cfg->mod_params->disable_hw_scan) {
3668                 if (iwl_debug_level & IWL_DL_INFO)
3669                         dev_printk(KERN_DEBUG, &(pdev->dev),
3670                                    "Disabling hw_scan\n");
3671                 iwl_hw_ops.hw_scan = NULL;
3672         }
3673
3674         hw = iwl_alloc_all(cfg, &iwl_hw_ops);
3675         if (!hw) {
3676                 err = -ENOMEM;
3677                 goto out;
3678         }
3679         priv = hw->priv;
3680         /* At this point both hw and priv are allocated. */
3681
3682         SET_IEEE80211_DEV(hw, &pdev->dev);
3683
3684         IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
3685         priv->cfg = cfg;
3686         priv->pci_dev = pdev;
3687         priv->inta_mask = CSR_INI_SET_MASK;
3688
3689 #ifdef CONFIG_IWLWIFI_DEBUG
3690         atomic_set(&priv->restrict_refcnt, 0);
3691 #endif
3692         if (iwl_alloc_traffic_mem(priv))
3693                 IWL_ERR(priv, "Not enough memory to generate traffic log\n");
3694
3695         /**************************
3696          * 2. Initializing PCI bus
3697          **************************/
3698         if (pci_enable_device(pdev)) {
3699                 err = -ENODEV;
3700                 goto out_ieee80211_free_hw;
3701         }
3702
3703         pci_set_master(pdev);
3704
3705         err = pci_set_dma_mask(pdev, DMA_BIT_MASK(36));
3706         if (!err)
3707                 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(36));
3708         if (err) {
3709                 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
3710                 if (!err)
3711                         err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
3712                 /* both attempts failed: */
3713                 if (err) {
3714                         IWL_WARN(priv, "No suitable DMA available.\n");
3715                         goto out_pci_disable_device;
3716                 }
3717         }
3718
3719         err = pci_request_regions(pdev, DRV_NAME);
3720         if (err)
3721                 goto out_pci_disable_device;
3722
3723         pci_set_drvdata(pdev, priv);
3724
3725
3726         /***********************
3727          * 3. Read REV register
3728          ***********************/
3729         priv->hw_base = pci_iomap(pdev, 0, 0);
3730         if (!priv->hw_base) {
3731                 err = -ENODEV;
3732                 goto out_pci_release_regions;
3733         }
3734
3735         IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
3736                 (unsigned long long) pci_resource_len(pdev, 0));
3737         IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
3738
3739         /* these spin locks will be used in apm_ops.init and EEPROM access
3740          * we should init now
3741          */
3742         spin_lock_init(&priv->reg_lock);
3743         spin_lock_init(&priv->lock);
3744
3745         /*
3746          * stop and reset the on-board processor just in case it is in a
3747          * strange state ... like being left stranded by a primary kernel
3748          * and this is now the kdump kernel trying to start up
3749          */
3750         iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
3751
3752         iwl_hw_detect(priv);
3753         IWL_INFO(priv, "Detected %s, REV=0x%X\n",
3754                 priv->cfg->name, priv->hw_rev);
3755
3756         /* We disable the RETRY_TIMEOUT register (0x41) to keep
3757          * PCI Tx retries from interfering with C3 CPU state */
3758         pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
3759
3760         iwl_prepare_card_hw(priv);
3761         if (!priv->hw_ready) {
3762                 IWL_WARN(priv, "Failed, HW not ready\n");
3763                 goto out_iounmap;
3764         }
3765
3766         /*****************
3767          * 4. Read EEPROM
3768          *****************/
3769         /* Read the EEPROM */
3770         err = iwl_eeprom_init(priv);
3771         if (err) {
3772                 IWL_ERR(priv, "Unable to init EEPROM\n");
3773                 goto out_iounmap;
3774         }
3775         err = iwl_eeprom_check_version(priv);
3776         if (err)
3777                 goto out_free_eeprom;
3778
3779         /* extract MAC Address */
3780         iwl_eeprom_get_mac(priv, perm_addr);
3781         IWL_DEBUG_INFO(priv, "MAC address: %pM\n", perm_addr);
3782         SET_IEEE80211_PERM_ADDR(priv->hw, perm_addr);
3783
3784         /************************
3785          * 5. Setup HW constants
3786          ************************/
3787         if (iwl_set_hw_params(priv)) {
3788                 IWL_ERR(priv, "failed to set hw parameters\n");
3789                 goto out_free_eeprom;
3790         }
3791
3792         /*******************
3793          * 6. Setup priv
3794          *******************/
3795
3796         err = iwl_init_drv(priv);
3797         if (err)
3798                 goto out_free_eeprom;
3799         /* At this point both hw and priv are initialized. */
3800
3801         /********************
3802          * 7. Setup services
3803          ********************/
3804         spin_lock_irqsave(&priv->lock, flags);
3805         iwl_disable_interrupts(priv);
3806         spin_unlock_irqrestore(&priv->lock, flags);
3807
3808         pci_enable_msi(priv->pci_dev);
3809
3810         iwl_alloc_isr_ict(priv);
3811         err = request_irq(priv->pci_dev->irq, priv->cfg->ops->lib->isr,
3812                           IRQF_SHARED, DRV_NAME, priv);
3813         if (err) {
3814                 IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
3815                 goto out_disable_msi;
3816         }
3817         err = sysfs_create_group(&pdev->dev.kobj, &iwl_attribute_group);
3818         if (err) {
3819                 IWL_ERR(priv, "failed to create sysfs device attributes\n");
3820                 goto out_free_irq;
3821         }
3822
3823         iwl_setup_deferred_work(priv);
3824         iwl_setup_rx_handlers(priv);
3825
3826         /*********************************************
3827          * 8. Enable interrupts and read RFKILL state
3828          *********************************************/
3829
3830         /* enable interrupts if needed: hw bug w/a */
3831         pci_read_config_word(priv->pci_dev, PCI_COMMAND, &pci_cmd);
3832         if (pci_cmd & PCI_COMMAND_INTX_DISABLE) {
3833                 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
3834                 pci_write_config_word(priv->pci_dev, PCI_COMMAND, pci_cmd);
3835         }
3836
3837         iwl_enable_interrupts(priv);
3838
3839         /* If platform's RF_KILL switch is NOT set to KILL */
3840         if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
3841                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3842         else
3843                 set_bit(STATUS_RF_KILL_HW, &priv->status);
3844
3845         wiphy_rfkill_set_hw_state(priv->hw->wiphy,
3846                 test_bit(STATUS_RF_KILL_HW, &priv->status));
3847
3848         iwl_power_initialize(priv);
3849         iwl_tt_initialize(priv);
3850
3851         init_completion(&priv->_agn.firmware_loading_complete);
3852
3853         err = iwl_request_firmware(priv, true);
3854         if (err)
3855                 goto out_remove_sysfs;
3856
3857         return 0;
3858
3859  out_remove_sysfs:
3860         destroy_workqueue(priv->workqueue);
3861         priv->workqueue = NULL;
3862         sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
3863  out_free_irq:
3864         free_irq(priv->pci_dev->irq, priv);
3865         iwl_free_isr_ict(priv);
3866  out_disable_msi:
3867         pci_disable_msi(priv->pci_dev);
3868         iwl_uninit_drv(priv);
3869  out_free_eeprom:
3870         iwl_eeprom_free(priv);
3871  out_iounmap:
3872         pci_iounmap(pdev, priv->hw_base);
3873  out_pci_release_regions:
3874         pci_set_drvdata(pdev, NULL);
3875         pci_release_regions(pdev);
3876  out_pci_disable_device:
3877         pci_disable_device(pdev);
3878  out_ieee80211_free_hw:
3879         iwl_free_traffic_mem(priv);
3880         ieee80211_free_hw(priv->hw);
3881  out:
3882         return err;
3883 }
3884
3885 static void __devexit iwl_pci_remove(struct pci_dev *pdev)
3886 {
3887         struct iwl_priv *priv = pci_get_drvdata(pdev);
3888         unsigned long flags;
3889
3890         if (!priv)
3891                 return;
3892
3893         wait_for_completion(&priv->_agn.firmware_loading_complete);
3894
3895         IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
3896
3897         iwl_dbgfs_unregister(priv);
3898         sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
3899
3900         /* ieee80211_unregister_hw call wil cause iwl_mac_stop to
3901          * to be called and iwl_down since we are removing the device
3902          * we need to set STATUS_EXIT_PENDING bit.
3903          */
3904         set_bit(STATUS_EXIT_PENDING, &priv->status);
3905         if (priv->mac80211_registered) {
3906                 ieee80211_unregister_hw(priv->hw);
3907                 priv->mac80211_registered = 0;
3908         } else {
3909                 iwl_down(priv);
3910         }
3911
3912         /*
3913          * Make sure device is reset to low power before unloading driver.
3914          * This may be redundant with iwl_down(), but there are paths to
3915          * run iwl_down() without calling apm_ops.stop(), and there are
3916          * paths to avoid running iwl_down() at all before leaving driver.
3917          * This (inexpensive) call *makes sure* device is reset.
3918          */
3919         priv->cfg->ops->lib->apm_ops.stop(priv);
3920
3921         iwl_tt_exit(priv);
3922
3923         /* make sure we flush any pending irq or
3924          * tasklet for the driver
3925          */
3926         spin_lock_irqsave(&priv->lock, flags);
3927         iwl_disable_interrupts(priv);
3928         spin_unlock_irqrestore(&priv->lock, flags);
3929
3930         iwl_synchronize_irq(priv);
3931
3932         iwl_dealloc_ucode_pci(priv);
3933
3934         if (priv->rxq.bd)
3935                 iwlagn_rx_queue_free(priv, &priv->rxq);
3936         iwlagn_hw_txq_ctx_free(priv);
3937
3938         iwl_eeprom_free(priv);
3939
3940
3941         /*netif_stop_queue(dev); */
3942         flush_workqueue(priv->workqueue);
3943
3944         /* ieee80211_unregister_hw calls iwl_mac_stop, which flushes
3945          * priv->workqueue... so we can't take down the workqueue
3946          * until now... */
3947         destroy_workqueue(priv->workqueue);
3948         priv->workqueue = NULL;
3949         iwl_free_traffic_mem(priv);
3950
3951         free_irq(priv->pci_dev->irq, priv);
3952         pci_disable_msi(priv->pci_dev);
3953         pci_iounmap(pdev, priv->hw_base);
3954         pci_release_regions(pdev);
3955         pci_disable_device(pdev);
3956         pci_set_drvdata(pdev, NULL);
3957
3958         iwl_uninit_drv(priv);
3959
3960         iwl_free_isr_ict(priv);
3961
3962         if (priv->ibss_beacon)
3963                 dev_kfree_skb(priv->ibss_beacon);
3964
3965         ieee80211_free_hw(priv->hw);
3966 }
3967
3968
3969 /*****************************************************************************
3970  *
3971  * driver and module entry point
3972  *
3973  *****************************************************************************/
3974
3975 /* Hardware specific file defines the PCI IDs table for that hardware module */
3976 static DEFINE_PCI_DEVICE_TABLE(iwl_hw_card_ids) = {
3977 #ifdef CONFIG_IWL4965
3978         {IWL_PCI_DEVICE(0x4229, PCI_ANY_ID, iwl4965_agn_cfg)},
3979         {IWL_PCI_DEVICE(0x4230, PCI_ANY_ID, iwl4965_agn_cfg)},
3980 #endif /* CONFIG_IWL4965 */
3981 #ifdef CONFIG_IWL5000
3982 /* 5100 Series WiFi */
3983         {IWL_PCI_DEVICE(0x4232, 0x1201, iwl5100_agn_cfg)}, /* Mini Card */
3984         {IWL_PCI_DEVICE(0x4232, 0x1301, iwl5100_agn_cfg)}, /* Half Mini Card */
3985         {IWL_PCI_DEVICE(0x4232, 0x1204, iwl5100_agn_cfg)}, /* Mini Card */
3986         {IWL_PCI_DEVICE(0x4232, 0x1304, iwl5100_agn_cfg)}, /* Half Mini Card */
3987         {IWL_PCI_DEVICE(0x4232, 0x1205, iwl5100_bgn_cfg)}, /* Mini Card */
3988         {IWL_PCI_DEVICE(0x4232, 0x1305, iwl5100_bgn_cfg)}, /* Half Mini Card */
3989         {IWL_PCI_DEVICE(0x4232, 0x1206, iwl5100_abg_cfg)}, /* Mini Card */
3990         {IWL_PCI_DEVICE(0x4232, 0x1306, iwl5100_abg_cfg)}, /* Half Mini Card */
3991         {IWL_PCI_DEVICE(0x4232, 0x1221, iwl5100_agn_cfg)}, /* Mini Card */
3992         {IWL_PCI_DEVICE(0x4232, 0x1321, iwl5100_agn_cfg)}, /* Half Mini Card */
3993         {IWL_PCI_DEVICE(0x4232, 0x1224, iwl5100_agn_cfg)}, /* Mini Card */
3994         {IWL_PCI_DEVICE(0x4232, 0x1324, iwl5100_agn_cfg)}, /* Half Mini Card */
3995         {IWL_PCI_DEVICE(0x4232, 0x1225, iwl5100_bgn_cfg)}, /* Mini Card */
3996         {IWL_PCI_DEVICE(0x4232, 0x1325, iwl5100_bgn_cfg)}, /* Half Mini Card */
3997         {IWL_PCI_DEVICE(0x4232, 0x1226, iwl5100_abg_cfg)}, /* Mini Card */
3998         {IWL_PCI_DEVICE(0x4232, 0x1326, iwl5100_abg_cfg)}, /* Half Mini Card */
3999         {IWL_PCI_DEVICE(0x4237, 0x1211, iwl5100_agn_cfg)}, /* Mini Card */
4000         {IWL_PCI_DEVICE(0x4237, 0x1311, iwl5100_agn_cfg)}, /* Half Mini Card */
4001         {IWL_PCI_DEVICE(0x4237, 0x1214, iwl5100_agn_cfg)}, /* Mini Card */
4002         {IWL_PCI_DEVICE(0x4237, 0x1314, iwl5100_agn_cfg)}, /* Half Mini Card */
4003         {IWL_PCI_DEVICE(0x4237, 0x1215, iwl5100_bgn_cfg)}, /* Mini Card */
4004         {IWL_PCI_DEVICE(0x4237, 0x1315, iwl5100_bgn_cfg)}, /* Half Mini Card */
4005         {IWL_PCI_DEVICE(0x4237, 0x1216, iwl5100_abg_cfg)}, /* Mini Card */
4006         {IWL_PCI_DEVICE(0x4237, 0x1316, iwl5100_abg_cfg)}, /* Half Mini Card */
4007
4008 /* 5300 Series WiFi */
4009         {IWL_PCI_DEVICE(0x4235, 0x1021, iwl5300_agn_cfg)}, /* Mini Card */
4010         {IWL_PCI_DEVICE(0x4235, 0x1121, iwl5300_agn_cfg)}, /* Half Mini Card */
4011         {IWL_PCI_DEVICE(0x4235, 0x1024, iwl5300_agn_cfg)}, /* Mini Card */
4012         {IWL_PCI_DEVICE(0x4235, 0x1124, iwl5300_agn_cfg)}, /* Half Mini Card */
4013         {IWL_PCI_DEVICE(0x4235, 0x1001, iwl5300_agn_cfg)}, /* Mini Card */
4014         {IWL_PCI_DEVICE(0x4235, 0x1101, iwl5300_agn_cfg)}, /* Half Mini Card */
4015         {IWL_PCI_DEVICE(0x4235, 0x1004, iwl5300_agn_cfg)}, /* Mini Card */
4016         {IWL_PCI_DEVICE(0x4235, 0x1104, iwl5300_agn_cfg)}, /* Half Mini Card */
4017         {IWL_PCI_DEVICE(0x4236, 0x1011, iwl5300_agn_cfg)}, /* Mini Card */
4018         {IWL_PCI_DEVICE(0x4236, 0x1111, iwl5300_agn_cfg)}, /* Half Mini Card */
4019         {IWL_PCI_DEVICE(0x4236, 0x1014, iwl5300_agn_cfg)}, /* Mini Card */
4020         {IWL_PCI_DEVICE(0x4236, 0x1114, iwl5300_agn_cfg)}, /* Half Mini Card */
4021
4022 /* 5350 Series WiFi/WiMax */
4023         {IWL_PCI_DEVICE(0x423A, 0x1001, iwl5350_agn_cfg)}, /* Mini Card */
4024         {IWL_PCI_DEVICE(0x423A, 0x1021, iwl5350_agn_cfg)}, /* Mini Card */
4025         {IWL_PCI_DEVICE(0x423B, 0x1011, iwl5350_agn_cfg)}, /* Mini Card */
4026
4027 /* 5150 Series Wifi/WiMax */
4028         {IWL_PCI_DEVICE(0x423C, 0x1201, iwl5150_agn_cfg)}, /* Mini Card */
4029         {IWL_PCI_DEVICE(0x423C, 0x1301, iwl5150_agn_cfg)}, /* Half Mini Card */
4030         {IWL_PCI_DEVICE(0x423C, 0x1206, iwl5150_abg_cfg)}, /* Mini Card */
4031         {IWL_PCI_DEVICE(0x423C, 0x1306, iwl5150_abg_cfg)}, /* Half Mini Card */
4032         {IWL_PCI_DEVICE(0x423C, 0x1221, iwl5150_agn_cfg)}, /* Mini Card */
4033         {IWL_PCI_DEVICE(0x423C, 0x1321, iwl5150_agn_cfg)}, /* Half Mini Card */
4034
4035         {IWL_PCI_DEVICE(0x423D, 0x1211, iwl5150_agn_cfg)}, /* Mini Card */
4036         {IWL_PCI_DEVICE(0x423D, 0x1311, iwl5150_agn_cfg)}, /* Half Mini Card */
4037         {IWL_PCI_DEVICE(0x423D, 0x1216, iwl5150_abg_cfg)}, /* Mini Card */
4038         {IWL_PCI_DEVICE(0x423D, 0x1316, iwl5150_abg_cfg)}, /* Half Mini Card */
4039
4040 /* 6x00 Series */
4041         {IWL_PCI_DEVICE(0x422B, 0x1101, iwl6000_3agn_cfg)},
4042         {IWL_PCI_DEVICE(0x422B, 0x1121, iwl6000_3agn_cfg)},
4043         {IWL_PCI_DEVICE(0x422C, 0x1301, iwl6000i_2agn_cfg)},
4044         {IWL_PCI_DEVICE(0x422C, 0x1306, iwl6000i_2abg_cfg)},
4045         {IWL_PCI_DEVICE(0x422C, 0x1307, iwl6000i_2bg_cfg)},
4046         {IWL_PCI_DEVICE(0x422C, 0x1321, iwl6000i_2agn_cfg)},
4047         {IWL_PCI_DEVICE(0x422C, 0x1326, iwl6000i_2abg_cfg)},
4048         {IWL_PCI_DEVICE(0x4238, 0x1111, iwl6000_3agn_cfg)},
4049         {IWL_PCI_DEVICE(0x4239, 0x1311, iwl6000i_2agn_cfg)},
4050         {IWL_PCI_DEVICE(0x4239, 0x1316, iwl6000i_2abg_cfg)},
4051
4052 /* 6x00 Series Gen2a */
4053         {IWL_PCI_DEVICE(0x0082, 0x1201, iwl6000g2a_2agn_cfg)},
4054         {IWL_PCI_DEVICE(0x0085, 0x1211, iwl6000g2a_2agn_cfg)},
4055         {IWL_PCI_DEVICE(0x0082, 0x1221, iwl6000g2a_2agn_cfg)},
4056         {IWL_PCI_DEVICE(0x0082, 0x1206, iwl6000g2a_2abg_cfg)},
4057         {IWL_PCI_DEVICE(0x0085, 0x1216, iwl6000g2a_2abg_cfg)},
4058         {IWL_PCI_DEVICE(0x0082, 0x1226, iwl6000g2a_2abg_cfg)},
4059         {IWL_PCI_DEVICE(0x0082, 0x1207, iwl6000g2a_2bg_cfg)},
4060         {IWL_PCI_DEVICE(0x0082, 0x1301, iwl6000g2a_2agn_cfg)},
4061         {IWL_PCI_DEVICE(0x0082, 0x1306, iwl6000g2a_2abg_cfg)},
4062         {IWL_PCI_DEVICE(0x0082, 0x1307, iwl6000g2a_2bg_cfg)},
4063         {IWL_PCI_DEVICE(0x0082, 0x1321, iwl6000g2a_2agn_cfg)},
4064         {IWL_PCI_DEVICE(0x0082, 0x1326, iwl6000g2a_2abg_cfg)},
4065         {IWL_PCI_DEVICE(0x0085, 0x1311, iwl6000g2a_2agn_cfg)},
4066         {IWL_PCI_DEVICE(0x0085, 0x1316, iwl6000g2a_2abg_cfg)},
4067
4068 /* 6x00 Series Gen2b */
4069         {IWL_PCI_DEVICE(0x008F, 0x5105, iwl6000g2b_bgn_cfg)},
4070         {IWL_PCI_DEVICE(0x0090, 0x5115, iwl6000g2b_bgn_cfg)},
4071         {IWL_PCI_DEVICE(0x008F, 0x5125, iwl6000g2b_bgn_cfg)},
4072         {IWL_PCI_DEVICE(0x008F, 0x5107, iwl6000g2b_bg_cfg)},
4073         {IWL_PCI_DEVICE(0x008F, 0x5201, iwl6000g2b_2agn_cfg)},
4074         {IWL_PCI_DEVICE(0x0090, 0x5211, iwl6000g2b_2agn_cfg)},
4075         {IWL_PCI_DEVICE(0x008F, 0x5221, iwl6000g2b_2agn_cfg)},
4076         {IWL_PCI_DEVICE(0x008F, 0x5206, iwl6000g2b_2abg_cfg)},
4077         {IWL_PCI_DEVICE(0x0090, 0x5216, iwl6000g2b_2abg_cfg)},
4078         {IWL_PCI_DEVICE(0x008F, 0x5226, iwl6000g2b_2abg_cfg)},
4079         {IWL_PCI_DEVICE(0x008F, 0x5207, iwl6000g2b_2bg_cfg)},
4080         {IWL_PCI_DEVICE(0x008A, 0x5301, iwl6000g2b_bgn_cfg)},
4081         {IWL_PCI_DEVICE(0x008A, 0x5305, iwl6000g2b_bgn_cfg)},
4082         {IWL_PCI_DEVICE(0x008A, 0x5307, iwl6000g2b_bg_cfg)},
4083         {IWL_PCI_DEVICE(0x008A, 0x5321, iwl6000g2b_bgn_cfg)},
4084         {IWL_PCI_DEVICE(0x008A, 0x5325, iwl6000g2b_bgn_cfg)},
4085         {IWL_PCI_DEVICE(0x008B, 0x5311, iwl6000g2b_bgn_cfg)},
4086         {IWL_PCI_DEVICE(0x008B, 0x5315, iwl6000g2b_bgn_cfg)},
4087         {IWL_PCI_DEVICE(0x0090, 0x5211, iwl6000g2b_2agn_cfg)},
4088         {IWL_PCI_DEVICE(0x0090, 0x5215, iwl6000g2b_2bgn_cfg)},
4089         {IWL_PCI_DEVICE(0x0090, 0x5216, iwl6000g2b_2abg_cfg)},
4090         {IWL_PCI_DEVICE(0x0091, 0x5201, iwl6000g2b_2agn_cfg)},
4091         {IWL_PCI_DEVICE(0x0091, 0x5205, iwl6000g2b_2bgn_cfg)},
4092         {IWL_PCI_DEVICE(0x0091, 0x5206, iwl6000g2b_2abg_cfg)},
4093         {IWL_PCI_DEVICE(0x0091, 0x5207, iwl6000g2b_2bg_cfg)},
4094         {IWL_PCI_DEVICE(0x0091, 0x5221, iwl6000g2b_2agn_cfg)},
4095         {IWL_PCI_DEVICE(0x0091, 0x5225, iwl6000g2b_2bgn_cfg)},
4096         {IWL_PCI_DEVICE(0x0091, 0x5226, iwl6000g2b_2abg_cfg)},
4097
4098 /* 6x50 WiFi/WiMax Series */
4099         {IWL_PCI_DEVICE(0x0087, 0x1301, iwl6050_2agn_cfg)},
4100         {IWL_PCI_DEVICE(0x0087, 0x1306, iwl6050_2abg_cfg)},
4101         {IWL_PCI_DEVICE(0x0087, 0x1321, iwl6050_2agn_cfg)},
4102         {IWL_PCI_DEVICE(0x0087, 0x1326, iwl6050_2abg_cfg)},
4103         {IWL_PCI_DEVICE(0x0089, 0x1311, iwl6050_2agn_cfg)},
4104         {IWL_PCI_DEVICE(0x0089, 0x1316, iwl6050_2abg_cfg)},
4105
4106 /* 1000 Series WiFi */
4107         {IWL_PCI_DEVICE(0x0083, 0x1205, iwl1000_bgn_cfg)},
4108         {IWL_PCI_DEVICE(0x0083, 0x1305, iwl1000_bgn_cfg)},
4109         {IWL_PCI_DEVICE(0x0083, 0x1225, iwl1000_bgn_cfg)},
4110         {IWL_PCI_DEVICE(0x0083, 0x1325, iwl1000_bgn_cfg)},
4111         {IWL_PCI_DEVICE(0x0084, 0x1215, iwl1000_bgn_cfg)},
4112         {IWL_PCI_DEVICE(0x0084, 0x1315, iwl1000_bgn_cfg)},
4113         {IWL_PCI_DEVICE(0x0083, 0x1206, iwl1000_bg_cfg)},
4114         {IWL_PCI_DEVICE(0x0083, 0x1306, iwl1000_bg_cfg)},
4115         {IWL_PCI_DEVICE(0x0083, 0x1226, iwl1000_bg_cfg)},
4116         {IWL_PCI_DEVICE(0x0083, 0x1326, iwl1000_bg_cfg)},
4117         {IWL_PCI_DEVICE(0x0084, 0x1216, iwl1000_bg_cfg)},
4118         {IWL_PCI_DEVICE(0x0084, 0x1316, iwl1000_bg_cfg)},
4119 #endif /* CONFIG_IWL5000 */
4120
4121         {0}
4122 };
4123 MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids);
4124
4125 static struct pci_driver iwl_driver = {
4126         .name = DRV_NAME,
4127         .id_table = iwl_hw_card_ids,
4128         .probe = iwl_pci_probe,
4129         .remove = __devexit_p(iwl_pci_remove),
4130 #ifdef CONFIG_PM
4131         .suspend = iwl_pci_suspend,
4132         .resume = iwl_pci_resume,
4133 #endif
4134 };
4135
4136 static int __init iwl_init(void)
4137 {
4138
4139         int ret;
4140         printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
4141         printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
4142
4143         ret = iwlagn_rate_control_register();
4144         if (ret) {
4145                 printk(KERN_ERR DRV_NAME
4146                        "Unable to register rate control algorithm: %d\n", ret);
4147                 return ret;
4148         }
4149
4150         ret = pci_register_driver(&iwl_driver);
4151         if (ret) {
4152                 printk(KERN_ERR DRV_NAME "Unable to initialize PCI module\n");
4153                 goto error_register;
4154         }
4155
4156         return ret;
4157
4158 error_register:
4159         iwlagn_rate_control_unregister();
4160         return ret;
4161 }
4162
4163 static void __exit iwl_exit(void)
4164 {
4165         pci_unregister_driver(&iwl_driver);
4166         iwlagn_rate_control_unregister();
4167 }
4168
4169 module_exit(iwl_exit);
4170 module_init(iwl_init);
4171
4172 #ifdef CONFIG_IWLWIFI_DEBUG
4173 module_param_named(debug50, iwl_debug_level, uint, S_IRUGO);
4174 MODULE_PARM_DESC(debug50, "50XX debug output mask (deprecated)");
4175 module_param_named(debug, iwl_debug_level, uint, S_IRUGO | S_IWUSR);
4176 MODULE_PARM_DESC(debug, "debug output mask");
4177 #endif
4178
4179 module_param_named(swcrypto50, iwlagn_mod_params.sw_crypto, bool, S_IRUGO);
4180 MODULE_PARM_DESC(swcrypto50,
4181                  "using crypto in software (default 0 [hardware]) (deprecated)");
4182 module_param_named(swcrypto, iwlagn_mod_params.sw_crypto, int, S_IRUGO);
4183 MODULE_PARM_DESC(swcrypto, "using crypto in software (default 0 [hardware])");
4184 module_param_named(queues_num50,
4185                    iwlagn_mod_params.num_of_queues, int, S_IRUGO);
4186 MODULE_PARM_DESC(queues_num50,
4187                  "number of hw queues in 50xx series (deprecated)");
4188 module_param_named(queues_num, iwlagn_mod_params.num_of_queues, int, S_IRUGO);
4189 MODULE_PARM_DESC(queues_num, "number of hw queues.");
4190 module_param_named(11n_disable50, iwlagn_mod_params.disable_11n, int, S_IRUGO);
4191 MODULE_PARM_DESC(11n_disable50, "disable 50XX 11n functionality (deprecated)");
4192 module_param_named(11n_disable, iwlagn_mod_params.disable_11n, int, S_IRUGO);
4193 MODULE_PARM_DESC(11n_disable, "disable 11n functionality");
4194 module_param_named(amsdu_size_8K50, iwlagn_mod_params.amsdu_size_8K,
4195                    int, S_IRUGO);
4196 MODULE_PARM_DESC(amsdu_size_8K50,
4197                  "enable 8K amsdu size in 50XX series (deprecated)");
4198 module_param_named(amsdu_size_8K, iwlagn_mod_params.amsdu_size_8K,
4199                    int, S_IRUGO);
4200 MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size");
4201 module_param_named(fw_restart50, iwlagn_mod_params.restart_fw, int, S_IRUGO);
4202 MODULE_PARM_DESC(fw_restart50,
4203                  "restart firmware in case of error (deprecated)");
4204 module_param_named(fw_restart, iwlagn_mod_params.restart_fw, int, S_IRUGO);
4205 MODULE_PARM_DESC(fw_restart, "restart firmware in case of error");
4206 module_param_named(
4207         disable_hw_scan, iwlagn_mod_params.disable_hw_scan, int, S_IRUGO);
4208 MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
4209
4210 module_param_named(ucode_alternative, iwlagn_wanted_ucode_alternative, int,
4211                    S_IRUGO);
4212 MODULE_PARM_DESC(ucode_alternative,
4213                  "specify ucode alternative to use from ucode file");