drivers/net/wireless/iwlwifi/iwl-4965.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of version 2 of the GNU General Public License as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program; if not, write to the Free Software Foundation, Inc.,
  16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17  *
  18  * The full GNU General Public License is included in this distribution in the
  19  * file called LICENSE.
  20  *
  21  * Contact Information:
  22  *  Intel Linux Wireless <ilw@linux.intel.com>
  23  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  24  *
  25  *****************************************************************************/
  26
  27 #include <linux/kernel.h>
  28 #include <linux/module.h>
  29 #include <linux/init.h>
  30 #include <linux/pci.h>
  31 #include <linux/dma-mapping.h>
  32 #include <linux/delay.h>
  33 #include <linux/sched.h>
  34 #include <linux/skbuff.h>
  35 #include <linux/netdevice.h>
  36 #include <linux/wireless.h>
  37 #include <net/mac80211.h>
  38 #include <linux/etherdevice.h>
  39 #include <asm/unaligned.h>
  40
  41 #include "iwl-eeprom.h"
  42 #include "iwl-dev.h"
  43 #include "iwl-core.h"
  44 #include "iwl-io.h"
  45 #include "iwl-helpers.h"
  46 #include "iwl-calib.h"
  47 #include "iwl-sta.h"
  48 #include "iwl-agn-led.h"
  49 #include "iwl-agn.h"
  50 #include "iwl-agn-debugfs.h"
  51
  52 static int iwl4965_send_tx_power(struct iwl_priv *priv);
  53 static int iwl4965_hw_get_temperature(struct iwl_priv *priv);
  54
  55 /* Highest firmware API version supported */
  56 #define IWL4965_UCODE_API_MAX 2
  57
  58 /* Lowest firmware API version supported */
  59 #define IWL4965_UCODE_API_MIN 2
  60
  61 #define IWL4965_FW_PRE "iwlwifi-4965-"
  62 #define _IWL4965_MODULE_FIRMWARE(api) IWL4965_FW_PRE #api ".ucode"
  63 #define IWL4965_MODULE_FIRMWARE(api) _IWL4965_MODULE_FIRMWARE(api)
  64
  65 /* check contents of special bootstrap uCode SRAM */
  66 static int iwl4965_verify_bsm(struct iwl_priv *priv)
  67 {
  68         __le32 *image = priv->ucode_boot.v_addr;
  69         u32 len = priv->ucode_boot.len;
  70         u32 reg;
  71         u32 val;
  72
  73         IWL_DEBUG_INFO(priv, "Begin verify bsm\n");
  74
  75         /* verify BSM SRAM contents */
  76         val = iwl_read_prph(priv, BSM_WR_DWCOUNT_REG);
  77         for (reg = BSM_SRAM_LOWER_BOUND;
  78              reg < BSM_SRAM_LOWER_BOUND + len;
  79              reg += sizeof(u32), image++) {
  80                 val = iwl_read_prph(priv, reg);
  81                 if (val != le32_to_cpu(*image)) {
  82                         IWL_ERR(priv, "BSM uCode verification failed at "
  83                                   "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
  84                                   BSM_SRAM_LOWER_BOUND,
  85                                   reg - BSM_SRAM_LOWER_BOUND, len,
  86                                   val, le32_to_cpu(*image));
  87                         return -EIO;
  88                 }
  89         }
  90
  91         IWL_DEBUG_INFO(priv, "BSM bootstrap uCode image OK\n");
  92
  93         return 0;
  94 }
  95
  96 /**
  97  * iwl4965_load_bsm - Load bootstrap instructions
  98  *
  99  * BSM operation:
 100  *
 101  * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
 102  * in special SRAM that does not power down during RFKILL.  When powering back
 103  * up after power-saving sleeps (or during initial uCode load), the BSM loads
 104  * the bootstrap program into the on-board processor, and starts it.
 105  *
 106  * The bootstrap program loads (via DMA) instructions and data for a new
 107  * program from host DRAM locations indicated by the host driver in the
 108  * BSM_DRAM_* registers.  Once the new program is loaded, it starts
 109  * automatically.
 110  *
 111  * When initializing the NIC, the host driver points the BSM to the
 112  * "initialize" uCode image.  This uCode sets up some internal data, then
 113  * notifies host via "initialize alive" that it is complete.
 114  *
 115  * The host then replaces the BSM_DRAM_* pointer values to point to the
 116  * normal runtime uCode instructions and a backup uCode data cache buffer
 117  * (filled initially with starting data values for the on-board processor),
 118  * then triggers the "initialize" uCode to load and launch the runtime uCode,
 119  * which begins normal operation.
 120  *
 121  * When doing a power-save shutdown, runtime uCode saves data SRAM into
 122  * the backup data cache in DRAM before SRAM is powered down.
 123  *
 124  * When powering back up, the BSM loads the bootstrap program.  This reloads
 125  * the runtime uCode instructions and the backup data cache into SRAM,
 126  * and re-launches the runtime uCode from where it left off.
 127  */
 128 static int iwl4965_load_bsm(struct iwl_priv *priv)
 129 {
 130         __le32 *image = priv->ucode_boot.v_addr;
 131         u32 len = priv->ucode_boot.len;
 132         dma_addr_t pinst;
 133         dma_addr_t pdata;
 134         u32 inst_len;
 135         u32 data_len;
 136         int i;
 137         u32 done;
 138         u32 reg_offset;
 139         int ret;
 140
 141         IWL_DEBUG_INFO(priv, "Begin load bsm\n");
 142
 143         priv->ucode_type = UCODE_RT;
 144
 145         /* make sure bootstrap program is no larger than BSM's SRAM size */
 146         if (len > IWL49_MAX_BSM_SIZE)
 147                 return -EINVAL;
 148
 149         /* Tell bootstrap uCode where to find the "Initialize" uCode
 150          *   in host DRAM ... host DRAM physical address bits 35:4 for 4965.
 151          * NOTE:  iwl_init_alive_start() will replace these values,
 152          *        after the "initialize" uCode has run, to point to
 153          *        runtime/protocol instructions and backup data cache.
 154          */
 155         pinst = priv->ucode_init.p_addr >> 4;
 156         pdata = priv->ucode_init_data.p_addr >> 4;
 157         inst_len = priv->ucode_init.len;
 158         data_len = priv->ucode_init_data.len;
 159
 160         iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
 161         iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
 162         iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
 163         iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
 164
 165         /* Fill BSM memory with bootstrap instructions */
 166         for (reg_offset = BSM_SRAM_LOWER_BOUND;
 167              reg_offset < BSM_SRAM_LOWER_BOUND + len;
 168              reg_offset += sizeof(u32), image++)
 169                 _iwl_write_prph(priv, reg_offset, le32_to_cpu(*image));
 170
 171         ret = iwl4965_verify_bsm(priv);
 172         if (ret)
 173                 return ret;
 174
 175         /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
 176         iwl_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
 177         iwl_write_prph(priv, BSM_WR_MEM_DST_REG, IWL49_RTC_INST_LOWER_BOUND);
 178         iwl_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
 179
 180         /* Load bootstrap code into instruction SRAM now,
 181          *   to prepare to load "initialize" uCode */
 182         iwl_write_prph(priv, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START);
 183
 184         /* Wait for load of bootstrap uCode to finish */
 185         for (i = 0; i < 100; i++) {
 186                 done = iwl_read_prph(priv, BSM_WR_CTRL_REG);
 187                 if (!(done & BSM_WR_CTRL_REG_BIT_START))
 188                         break;
 189                 udelay(10);
 190         }
 191         if (i < 100)
 192                 IWL_DEBUG_INFO(priv, "BSM write complete, poll %d iterations\n", i);
 193         else {
 194                 IWL_ERR(priv, "BSM write did not complete!\n");
 195                 return -EIO;
 196         }
 197
 198         /* Enable future boot loads whenever power management unit triggers it
 199          *   (e.g. when powering back up after power-save shutdown) */
 200         iwl_write_prph(priv, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START_EN);
 201
 202
 203         return 0;
 204 }
 205
 206 /**
 207  * iwl4965_set_ucode_ptrs - Set uCode address location
 208  *
 209  * Tell initialization uCode where to find runtime uCode.
 210  *
 211  * BSM registers initially contain pointers to initialization uCode.
 212  * We need to replace them to load runtime uCode inst and data,
 213  * and to save runtime data when powering down.
 214  */
 215 static int iwl4965_set_ucode_ptrs(struct iwl_priv *priv)
 216 {
 217         dma_addr_t pinst;
 218         dma_addr_t pdata;
 219         int ret = 0;
 220
 221         /* bits 35:4 for 4965 */
 222         pinst = priv->ucode_code.p_addr >> 4;
 223         pdata = priv->ucode_data_backup.p_addr >> 4;
 224
 225         /* Tell bootstrap uCode where to find image to load */
 226         iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
 227         iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
 228         iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
 229                                  priv->ucode_data.len);
 230
 231         /* Inst byte count must be last to set up, bit 31 signals uCode
 232          *   that all new ptr/size info is in place */
 233         iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
 234                                  priv->ucode_code.len | BSM_DRAM_INST_LOAD);
 235         IWL_DEBUG_INFO(priv, "Runtime uCode pointers are set.\n");
 236
 237         return ret;
 238 }
 239
 240 /**
 241  * iwl4965_init_alive_start - Called after REPLY_ALIVE notification received
 242  *
 243  * Called after REPLY_ALIVE notification received from "initialize" uCode.
 244  *
 245  * The 4965 "initialize" ALIVE reply contains calibration data for:
 246  *   Voltage, temperature, and MIMO tx gain correction, now stored in priv
 247  *   (3945 does not contain this data).
 248  *
 249  * Tell "initialize" uCode to go ahead and load the runtime uCode.
 250 */
 251 static void iwl4965_init_alive_start(struct iwl_priv *priv)
 252 {
 253         /* Check alive response for "valid" sign from uCode */
 254         if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
 255                 /* We had an error bringing up the hardware, so take it
 256                  * all the way back down so we can try again */
 257                 IWL_DEBUG_INFO(priv, "Initialize Alive failed.\n");
 258                 goto restart;
 259         }
 260
 261         /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
 262          * This is a paranoid check, because we would not have gotten the
 263          * "initialize" alive if code weren't properly loaded.  */
 264         if (iwl_verify_ucode(priv)) {
 265                 /* Runtime instruction load was bad;
 266                  * take it all the way back down so we can try again */
 267                 IWL_DEBUG_INFO(priv, "Bad \"initialize\" uCode load.\n");
 268                 goto restart;
 269         }
 270
 271         /* Calculate temperature */
 272         priv->temperature = iwl4965_hw_get_temperature(priv);
 273
 274         /* Send pointers to protocol/runtime uCode image ... init code will
 275          * load and launch runtime uCode, which will send us another "Alive"
 276          * notification. */
 277         IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
 278         if (iwl4965_set_ucode_ptrs(priv)) {
 279                 /* Runtime instruction load won't happen;
 280                  * take it all the way back down so we can try again */
 281                 IWL_DEBUG_INFO(priv, "Couldn't set up uCode pointers.\n");
 282                 goto restart;
 283         }
 284         return;
 285
 286 restart:
 287         queue_work(priv->workqueue, &priv->restart);
 288 }
 289
 290 static bool is_ht40_channel(__le32 rxon_flags)
 291 {
 292         int chan_mod = le32_to_cpu(rxon_flags & RXON_FLG_CHANNEL_MODE_MSK)
 293                                     >> RXON_FLG_CHANNEL_MODE_POS;
 294         return ((chan_mod == CHANNEL_MODE_PURE_40) ||
 295                   (chan_mod == CHANNEL_MODE_MIXED));
 296 }
 297
 298 /*
 299  * EEPROM handlers
 300  */
 301 static u16 iwl4965_eeprom_calib_version(struct iwl_priv *priv)
 302 {
 303         return iwl_eeprom_query16(priv, EEPROM_4965_CALIB_VERSION_OFFSET);
 304 }
 305
 306 /*
 307  * Activate/Deactivate Tx DMA/FIFO channels according tx fifos mask
 308  * must be called under priv->lock and mac access
 309  */
 310 static void iwl4965_txq_set_sched(struct iwl_priv *priv, u32 mask)
 311 {
 312         iwl_write_prph(priv, IWL49_SCD_TXFACT, mask);
 313 }
 314
 315 static void iwl4965_nic_config(struct iwl_priv *priv)
 316 {
 317         unsigned long flags;
 318         u16 radio_cfg;
 319
 320         spin_lock_irqsave(&priv->lock, flags);
 321
 322         radio_cfg = iwl_eeprom_query16(priv, EEPROM_RADIO_CONFIG);
 323
 324         /* write radio config values to register */
 325         if (EEPROM_RF_CFG_TYPE_MSK(radio_cfg) == EEPROM_4965_RF_CFG_TYPE_MAX)
 326                 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
 327                             EEPROM_RF_CFG_TYPE_MSK(radio_cfg) |
 328                             EEPROM_RF_CFG_STEP_MSK(radio_cfg) |
 329                             EEPROM_RF_CFG_DASH_MSK(radio_cfg));
 330
 331         /* set CSR_HW_CONFIG_REG for uCode use */
 332         iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
 333                     CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI |
 334                     CSR_HW_IF_CONFIG_REG_BIT_MAC_SI);
 335
 336         priv->calib_info = (struct iwl_eeprom_calib_info *)
 337                 iwl_eeprom_query_addr(priv, EEPROM_4965_CALIB_TXPOWER_OFFSET);
 338
 339         spin_unlock_irqrestore(&priv->lock, flags);
 340 }
 341
 342 /* Reset differential Rx gains in NIC to prepare for chain noise calibration.
 343  * Called after every association, but this runs only once!
 344  *  ... once chain noise is calibrated the first time, it's good forever.  */
 345 static void iwl4965_chain_noise_reset(struct iwl_priv *priv)
 346 {
 347         struct iwl_chain_noise_data *data = &(priv->chain_noise_data);
 348
 349         if ((data->state == IWL_CHAIN_NOISE_ALIVE) &&
 350              iwl_is_associated(priv)) {
 351                 struct iwl_calib_diff_gain_cmd cmd;
 352
 353                 /* clear data for chain noise calibration algorithm */
 354                 data->chain_noise_a = 0;
 355                 data->chain_noise_b = 0;
 356                 data->chain_noise_c = 0;
 357                 data->chain_signal_a = 0;
 358                 data->chain_signal_b = 0;
 359                 data->chain_signal_c = 0;
 360                 data->beacon_count = 0;
 361
 362                 memset(&cmd, 0, sizeof(cmd));
 363                 cmd.hdr.op_code = IWL_PHY_CALIBRATE_DIFF_GAIN_CMD;
 364                 cmd.diff_gain_a = 0;
 365                 cmd.diff_gain_b = 0;
 366                 cmd.diff_gain_c = 0;
 367                 if (iwl_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
 368                                  sizeof(cmd), &cmd))
 369                         IWL_ERR(priv,
 370                                 "Could not send REPLY_PHY_CALIBRATION_CMD\n");
 371                 data->state = IWL_CHAIN_NOISE_ACCUMULATE;
 372                 IWL_DEBUG_CALIB(priv, "Run chain_noise_calibrate\n");
 373         }
 374 }
 375
 376 static void iwl4965_gain_computation(struct iwl_priv *priv,
 377                 u32 *average_noise,
 378                 u16 min_average_noise_antenna_i,
 379                 u32 min_average_noise,
 380                 u8 default_chain)
 381 {
 382         int i, ret;
 383         struct iwl_chain_noise_data *data = &priv->chain_noise_data;
 384
 385         data->delta_gain_code[min_average_noise_antenna_i] = 0;
 386
 387         for (i = default_chain; i < NUM_RX_CHAINS; i++) {
 388                 s32 delta_g = 0;
 389
 390                 if (!(data->disconn_array[i]) &&
 391                     (data->delta_gain_code[i] ==
 392                              CHAIN_NOISE_DELTA_GAIN_INIT_VAL)) {
 393                         delta_g = average_noise[i] - min_average_noise;
 394                         data->delta_gain_code[i] = (u8)((delta_g * 10) / 15);
 395                         data->delta_gain_code[i] =
 396                                 min(data->delta_gain_code[i],
 397                                 (u8) CHAIN_NOISE_MAX_DELTA_GAIN_CODE);
 398
 399                         data->delta_gain_code[i] =
 400                                 (data->delta_gain_code[i] | (1 << 2));
 401                 } else {
 402                         data->delta_gain_code[i] = 0;
 403                 }
 404         }
 405         IWL_DEBUG_CALIB(priv, "delta_gain_codes: a %d b %d c %d\n",
 406                      data->delta_gain_code[0],
 407                      data->delta_gain_code[1],
 408                      data->delta_gain_code[2]);
 409
 410         /* Differential gain gets sent to uCode only once */
 411         if (!data->radio_write) {
 412                 struct iwl_calib_diff_gain_cmd cmd;
 413                 data->radio_write = 1;
 414
 415                 memset(&cmd, 0, sizeof(cmd));
 416                 cmd.hdr.op_code = IWL_PHY_CALIBRATE_DIFF_GAIN_CMD;
 417                 cmd.diff_gain_a = data->delta_gain_code[0];
 418                 cmd.diff_gain_b = data->delta_gain_code[1];
 419                 cmd.diff_gain_c = data->delta_gain_code[2];
 420                 ret = iwl_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
 421                                       sizeof(cmd), &cmd);
 422                 if (ret)
 423                         IWL_DEBUG_CALIB(priv, "fail sending cmd "
 424                                      "REPLY_PHY_CALIBRATION_CMD\n");
 425
 426                 /* TODO we might want recalculate
 427                  * rx_chain in rxon cmd */
 428
 429                 /* Mark so we run this algo only once! */
 430                 data->state = IWL_CHAIN_NOISE_CALIBRATED;
 431         }
 432 }
 433
 434 static void iwl4965_bg_txpower_work(struct work_struct *work)
 435 {
 436         struct iwl_priv *priv = container_of(work, struct iwl_priv,
 437                         txpower_work);
 438
 439         /* If a scan happened to start before we got here
 440          * then just return; the statistics notification will
 441          * kick off another scheduled work to compensate for
 442          * any temperature delta we missed here. */
 443         if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
 444             test_bit(STATUS_SCANNING, &priv->status))
 445                 return;
 446
 447         mutex_lock(&priv->mutex);
 448
 449         /* Regardless of if we are associated, we must reconfigure the
 450          * TX power since frames can be sent on non-radar channels while
 451          * not associated */
 452         iwl4965_send_tx_power(priv);
 453
 454         /* Update last_temperature to keep is_calib_needed from running
 455          * when it isn't needed... */
 456         priv->last_temperature = priv->temperature;
 457
 458         mutex_unlock(&priv->mutex);
 459 }
 460
 461 /*
 462  * Acquire priv->lock before calling this function !
 463  */
 464 static void iwl4965_set_wr_ptrs(struct iwl_priv *priv, int txq_id, u32 index)
 465 {
 466         iwl_write_direct32(priv, HBUS_TARG_WRPTR,
 467                              (index & 0xff) | (txq_id << 8));
 468         iwl_write_prph(priv, IWL49_SCD_QUEUE_RDPTR(txq_id), index);
 469 }
 470
 471 /**
 472  * iwl4965_tx_queue_set_status - (optionally) start Tx/Cmd queue
 473  * @tx_fifo_id: Tx DMA/FIFO channel (range 0-7) that the queue will feed
 474  * @scd_retry: (1) Indicates queue will be used in aggregation mode
 475  *
 476  * NOTE:  Acquire priv->lock before calling this function !
 477  */
 478 static void iwl4965_tx_queue_set_status(struct iwl_priv *priv,
 479                                         struct iwl_tx_queue *txq,
 480                                         int tx_fifo_id, int scd_retry)
 481 {
 482         int txq_id = txq->q.id;
 483
 484         /* Find out whether to activate Tx queue */
 485         int active = test_bit(txq_id, &priv->txq_ctx_active_msk) ? 1 : 0;
 486
 487         /* Set up and activate */
 488         iwl_write_prph(priv, IWL49_SCD_QUEUE_STATUS_BITS(txq_id),
 489                          (active << IWL49_SCD_QUEUE_STTS_REG_POS_ACTIVE) |
 490                          (tx_fifo_id << IWL49_SCD_QUEUE_STTS_REG_POS_TXF) |
 491                          (scd_retry << IWL49_SCD_QUEUE_STTS_REG_POS_WSL) |
 492                          (scd_retry << IWL49_SCD_QUEUE_STTS_REG_POS_SCD_ACK) |
 493                          IWL49_SCD_QUEUE_STTS_REG_MSK);
 494
 495         txq->sched_retry = scd_retry;
 496
 497         IWL_DEBUG_INFO(priv, "%s %s Queue %d on AC %d\n",
 498                        active ? "Activate" : "Deactivate",
 499                        scd_retry ? "BA" : "AC", txq_id, tx_fifo_id);
 500 }
 501
 502 static const s8 default_queue_to_tx_fifo[] = {
 503         IWL_TX_FIFO_VO,
 504         IWL_TX_FIFO_VI,
 505         IWL_TX_FIFO_BE,
 506         IWL_TX_FIFO_BK,
 507         IWL49_CMD_FIFO_NUM,
 508         IWL_TX_FIFO_UNUSED,
 509         IWL_TX_FIFO_UNUSED,
 510 };
 511
 512 static int iwl4965_alive_notify(struct iwl_priv *priv)
 513 {
 514         u32 a;
 515         unsigned long flags;
 516         int i, chan;
 517         u32 reg_val;
 518
 519         spin_lock_irqsave(&priv->lock, flags);
 520
 521         /* Clear 4965's internal Tx Scheduler data base */
 522         priv->scd_base_addr = iwl_read_prph(priv, IWL49_SCD_SRAM_BASE_ADDR);
 523         a = priv->scd_base_addr + IWL49_SCD_CONTEXT_DATA_OFFSET;
 524         for (; a < priv->scd_base_addr + IWL49_SCD_TX_STTS_BITMAP_OFFSET; a += 4)
 525                 iwl_write_targ_mem(priv, a, 0);
 526         for (; a < priv->scd_base_addr + IWL49_SCD_TRANSLATE_TBL_OFFSET; a += 4)
 527                 iwl_write_targ_mem(priv, a, 0);
 528         for (; a < priv->scd_base_addr +
 529                IWL49_SCD_TRANSLATE_TBL_OFFSET_QUEUE(priv->hw_params.max_txq_num); a += 4)
 530                 iwl_write_targ_mem(priv, a, 0);
 531
 532         /* Tel 4965 where to find Tx byte count tables */
 533         iwl_write_prph(priv, IWL49_SCD_DRAM_BASE_ADDR,
 534                         priv->scd_bc_tbls.dma >> 10);
 535
 536         /* Enable DMA channel */
 537         for (chan = 0; chan < FH49_TCSR_CHNL_NUM ; chan++)
 538                 iwl_write_direct32(priv, FH_TCSR_CHNL_TX_CONFIG_REG(chan),
 539                                 FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE |
 540                                 FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE);
 541
 542         /* Update FH chicken bits */
 543         reg_val = iwl_read_direct32(priv, FH_TX_CHICKEN_BITS_REG);
 544         iwl_write_direct32(priv, FH_TX_CHICKEN_BITS_REG,
 545                            reg_val | FH_TX_CHICKEN_BITS_SCD_AUTO_RETRY_EN);
 546
 547         /* Disable chain mode for all queues */
 548         iwl_write_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, 0);
 549
 550         /* Initialize each Tx queue (including the command queue) */
 551         for (i = 0; i < priv->hw_params.max_txq_num; i++) {
 552
 553                 /* TFD circular buffer read/write indexes */
 554                 iwl_write_prph(priv, IWL49_SCD_QUEUE_RDPTR(i), 0);
 555                 iwl_write_direct32(priv, HBUS_TARG_WRPTR, 0 | (i << 8));
 556
 557                 /* Max Tx Window size for Scheduler-ACK mode */
 558                 iwl_write_targ_mem(priv, priv->scd_base_addr +
 559                                 IWL49_SCD_CONTEXT_QUEUE_OFFSET(i),
 560                                 (SCD_WIN_SIZE <<
 561                                 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
 562                                 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
 563
 564                 /* Frame limit */
 565                 iwl_write_targ_mem(priv, priv->scd_base_addr +
 566                                 IWL49_SCD_CONTEXT_QUEUE_OFFSET(i) +
 567                                 sizeof(u32),
 568                                 (SCD_FRAME_LIMIT <<
 569                                 IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS) &
 570                                 IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
 571
 572         }
 573         iwl_write_prph(priv, IWL49_SCD_INTERRUPT_MASK,
 574                                  (1 << priv->hw_params.max_txq_num) - 1);
 575
 576         /* Activate all Tx DMA/FIFO channels */
 577         priv->cfg->ops->lib->txq_set_sched(priv, IWL_MASK(0, 6));
 578
 579         iwl4965_set_wr_ptrs(priv, IWL_CMD_QUEUE_NUM, 0);
 580
 581         /* make sure all queue are not stopped */
 582         memset(&priv->queue_stopped[0], 0, sizeof(priv->queue_stopped));
 583         for (i = 0; i < 4; i++)
 584                 atomic_set(&priv->queue_stop_count[i], 0);
 585
 586         /* reset to 0 to enable all the queue first */
 587         priv->txq_ctx_active_msk = 0;
 588         /* Map each Tx/cmd queue to its corresponding fifo */
 589         BUILD_BUG_ON(ARRAY_SIZE(default_queue_to_tx_fifo) != 7);
 590         for (i = 0; i < ARRAY_SIZE(default_queue_to_tx_fifo); i++) {
 591                 int ac = default_queue_to_tx_fifo[i];
 592
 593                 iwl_txq_ctx_activate(priv, i);
 594
 595                 if (ac == IWL_TX_FIFO_UNUSED)
 596                         continue;
 597
 598                 iwl4965_tx_queue_set_status(priv, &priv->txq[i], ac, 0);
 599         }
 600
 601         spin_unlock_irqrestore(&priv->lock, flags);
 602
 603         return 0;
 604 }
 605
 606 static struct iwl_sensitivity_ranges iwl4965_sensitivity = {
 607         .min_nrg_cck = 97,
 608         .max_nrg_cck = 0, /* not used, set to 0 */
 609
 610         .auto_corr_min_ofdm = 85,
 611         .auto_corr_min_ofdm_mrc = 170,
 612         .auto_corr_min_ofdm_x1 = 105,
 613         .auto_corr_min_ofdm_mrc_x1 = 220,
 614
 615         .auto_corr_max_ofdm = 120,
 616         .auto_corr_max_ofdm_mrc = 210,
 617         .auto_corr_max_ofdm_x1 = 140,
 618         .auto_corr_max_ofdm_mrc_x1 = 270,
 619
 620         .auto_corr_min_cck = 125,
 621         .auto_corr_max_cck = 200,
 622         .auto_corr_min_cck_mrc = 200,
 623         .auto_corr_max_cck_mrc = 400,
 624
 625         .nrg_th_cck = 100,
 626         .nrg_th_ofdm = 100,
 627
 628         .barker_corr_th_min = 190,
 629         .barker_corr_th_min_mrc = 390,
 630         .nrg_th_cca = 62,
 631 };
 632
 633 static void iwl4965_set_ct_threshold(struct iwl_priv *priv)
 634 {
 635         /* want Kelvin */
 636         priv->hw_params.ct_kill_threshold =
 637                 CELSIUS_TO_KELVIN(CT_KILL_THRESHOLD_LEGACY);
 638 }
 639
 640 /**
 641  * iwl4965_hw_set_hw_params
 642  *
 643  * Called when initializing driver
 644  */
 645 static int iwl4965_hw_set_hw_params(struct iwl_priv *priv)
 646 {
 647         if (priv->cfg->mod_params->num_of_queues >= IWL_MIN_NUM_QUEUES &&
 648             priv->cfg->mod_params->num_of_queues <= IWL49_NUM_QUEUES)
 649                 priv->cfg->num_of_queues =
 650                         priv->cfg->mod_params->num_of_queues;
 651
 652         priv->hw_params.max_txq_num = priv->cfg->num_of_queues;
 653         priv->hw_params.dma_chnl_num = FH49_TCSR_CHNL_NUM;
 654         priv->hw_params.scd_bc_tbls_size =
 655                         priv->cfg->num_of_queues *
 656                         sizeof(struct iwl4965_scd_bc_tbl);
 657         priv->hw_params.tfd_size = sizeof(struct iwl_tfd);
 658         priv->hw_params.max_stations = IWL4965_STATION_COUNT;
 659         priv->hw_params.bcast_sta_id = IWL4965_BROADCAST_ID;
 660         priv->hw_params.max_data_size = IWL49_RTC_DATA_SIZE;
 661         priv->hw_params.max_inst_size = IWL49_RTC_INST_SIZE;
 662         priv->hw_params.max_bsm_size = BSM_SRAM_SIZE;
 663         priv->hw_params.ht40_channel = BIT(IEEE80211_BAND_5GHZ);
 664
 665         priv->hw_params.rx_wrt_ptr_reg = FH_RSCSR_CHNL0_WPTR;
 666
 667         priv->hw_params.tx_chains_num = num_of_ant(priv->cfg->valid_tx_ant);
 668         priv->hw_params.rx_chains_num = num_of_ant(priv->cfg->valid_rx_ant);
 669         priv->hw_params.valid_tx_ant = priv->cfg->valid_tx_ant;
 670         priv->hw_params.valid_rx_ant = priv->cfg->valid_rx_ant;
 671         if (priv->cfg->ops->lib->temp_ops.set_ct_kill)
 672                 priv->cfg->ops->lib->temp_ops.set_ct_kill(priv);
 673
 674         priv->hw_params.sens = &iwl4965_sensitivity;
 675         priv->hw_params.beacon_time_tsf_bits = IWLAGN_EXT_BEACON_TIME_POS;
 676
 677         return 0;
 678 }
 679
 680 static s32 iwl4965_math_div_round(s32 num, s32 denom, s32 *res)
 681 {
 682         s32 sign = 1;
 683
 684         if (num < 0) {
 685                 sign = -sign;
 686                 num = -num;
 687         }
 688         if (denom < 0) {
 689                 sign = -sign;
 690                 denom = -denom;
 691         }
 692         *res = 1;
 693         *res = ((num * 2 + denom) / (denom * 2)) * sign;
 694
 695         return 1;
 696 }
 697
 698 /**
 699  * iwl4965_get_voltage_compensation - Power supply voltage comp for txpower
 700  *
 701  * Determines power supply voltage compensation for txpower calculations.
 702  * Returns number of 1/2-dB steps to subtract from gain table index,
 703  * to compensate for difference between power supply voltage during
 704  * factory measurements, vs. current power supply voltage.
 705  *
 706  * Voltage indication is higher for lower voltage.
 707  * Lower voltage requires more gain (lower gain table index).
 708  */
 709 static s32 iwl4965_get_voltage_compensation(s32 eeprom_voltage,
 710                                             s32 current_voltage)
 711 {
 712         s32 comp = 0;
 713
 714         if ((TX_POWER_IWL_ILLEGAL_VOLTAGE == eeprom_voltage) ||
 715             (TX_POWER_IWL_ILLEGAL_VOLTAGE == current_voltage))
 716                 return 0;
 717
 718         iwl4965_math_div_round(current_voltage - eeprom_voltage,
 719                                TX_POWER_IWL_VOLTAGE_CODES_PER_03V, &comp);
 720
 721         if (current_voltage > eeprom_voltage)
 722                 comp *= 2;
 723         if ((comp < -2) || (comp > 2))
 724                 comp = 0;
 725
 726         return comp;
 727 }
 728
 729 static s32 iwl4965_get_tx_atten_grp(u16 channel)
 730 {
 731         if (channel >= CALIB_IWL_TX_ATTEN_GR5_FCH &&
 732             channel <= CALIB_IWL_TX_ATTEN_GR5_LCH)
 733                 return CALIB_CH_GROUP_5;
 734
 735         if (channel >= CALIB_IWL_TX_ATTEN_GR1_FCH &&
 736             channel <= CALIB_IWL_TX_ATTEN_GR1_LCH)
 737                 return CALIB_CH_GROUP_1;
 738
 739         if (channel >= CALIB_IWL_TX_ATTEN_GR2_FCH &&
 740             channel <= CALIB_IWL_TX_ATTEN_GR2_LCH)
 741                 return CALIB_CH_GROUP_2;
 742
 743         if (channel >= CALIB_IWL_TX_ATTEN_GR3_FCH &&
 744             channel <= CALIB_IWL_TX_ATTEN_GR3_LCH)
 745                 return CALIB_CH_GROUP_3;
 746
 747         if (channel >= CALIB_IWL_TX_ATTEN_GR4_FCH &&
 748             channel <= CALIB_IWL_TX_ATTEN_GR4_LCH)
 749                 return CALIB_CH_GROUP_4;
 750
 751         return -1;
 752 }
 753
 754 static u32 iwl4965_get_sub_band(const struct iwl_priv *priv, u32 channel)
 755 {
 756         s32 b = -1;
 757
 758         for (b = 0; b < EEPROM_TX_POWER_BANDS; b++) {
 759                 if (priv->calib_info->band_info[b].ch_from == 0)
 760                         continue;
 761
 762                 if ((channel >= priv->calib_info->band_info[b].ch_from)
 763                     && (channel <= priv->calib_info->band_info[b].ch_to))
 764                         break;
 765         }
 766
 767         return b;
 768 }
 769
 770 static s32 iwl4965_interpolate_value(s32 x, s32 x1, s32 y1, s32 x2, s32 y2)
 771 {
 772         s32 val;
 773
 774         if (x2 == x1)
 775                 return y1;
 776         else {
 777                 iwl4965_math_div_round((x2 - x) * (y1 - y2), (x2 - x1), &val);
 778                 return val + y2;
 779         }
 780 }
 781
 782 /**
 783  * iwl4965_interpolate_chan - Interpolate factory measurements for one channel
 784  *
 785  * Interpolates factory measurements from the two sample channels within a
 786  * sub-band, to apply to channel of interest.  Interpolation is proportional to
 787  * differences in channel frequencies, which is proportional to differences
 788  * in channel number.
 789  */
 790 static int iwl4965_interpolate_chan(struct iwl_priv *priv, u32 channel,
 791                                     struct iwl_eeprom_calib_ch_info *chan_info)
 792 {
 793         s32 s = -1;
 794         u32 c;
 795         u32 m;
 796         const struct iwl_eeprom_calib_measure *m1;
 797         const struct iwl_eeprom_calib_measure *m2;
 798         struct iwl_eeprom_calib_measure *omeas;
 799         u32 ch_i1;
 800         u32 ch_i2;
 801
 802         s = iwl4965_get_sub_band(priv, channel);
 803         if (s >= EEPROM_TX_POWER_BANDS) {
 804                 IWL_ERR(priv, "Tx Power can not find channel %d\n", channel);
 805                 return -1;
 806         }
 807
 808         ch_i1 = priv->calib_info->band_info[s].ch1.ch_num;
 809         ch_i2 = priv->calib_info->band_info[s].ch2.ch_num;
 810         chan_info->ch_num = (u8) channel;
 811
 812         IWL_DEBUG_TXPOWER(priv, "channel %d subband %d factory cal ch %d & %d\n",
 813                           channel, s, ch_i1, ch_i2);
 814
 815         for (c = 0; c < EEPROM_TX_POWER_TX_CHAINS; c++) {
 816                 for (m = 0; m < EEPROM_TX_POWER_MEASUREMENTS; m++) {
 817                         m1 = &(priv->calib_info->band_info[s].ch1.
 818                                measurements[c][m]);
 819                         m2 = &(priv->calib_info->band_info[s].ch2.
 820                                measurements[c][m]);
 821                         omeas = &(chan_info->measurements[c][m]);
 822
 823                         omeas->actual_pow =
 824                             (u8) iwl4965_interpolate_value(channel, ch_i1,
 825                                                            m1->actual_pow,
 826                                                            ch_i2,
 827                                                            m2->actual_pow);
 828                         omeas->gain_idx =
 829                             (u8) iwl4965_interpolate_value(channel, ch_i1,
 830                                                            m1->gain_idx, ch_i2,
 831                                                            m2->gain_idx);
 832                         omeas->temperature =
 833                             (u8) iwl4965_interpolate_value(channel, ch_i1,
 834                                                            m1->temperature,
 835                                                            ch_i2,
 836                                                            m2->temperature);
 837                         omeas->pa_det =
 838                             (s8) iwl4965_interpolate_value(channel, ch_i1,
 839                                                            m1->pa_det, ch_i2,
 840                                                            m2->pa_det);
 841
 842                         IWL_DEBUG_TXPOWER(priv,
 843                                 "chain %d meas %d AP1=%d AP2=%d AP=%d\n", c, m,
 844                                 m1->actual_pow, m2->actual_pow, omeas->actual_pow);
 845                         IWL_DEBUG_TXPOWER(priv,
 846                                 "chain %d meas %d NI1=%d NI2=%d NI=%d\n", c, m,
 847                                 m1->gain_idx, m2->gain_idx, omeas->gain_idx);
 848                         IWL_DEBUG_TXPOWER(priv,
 849                                 "chain %d meas %d PA1=%d PA2=%d PA=%d\n", c, m,
 850                                 m1->pa_det, m2->pa_det, omeas->pa_det);
 851                         IWL_DEBUG_TXPOWER(priv,
 852                                 "chain %d meas %d  T1=%d  T2=%d  T=%d\n", c, m,
 853                                 m1->temperature, m2->temperature,
 854                                 omeas->temperature);
 855                 }
 856         }
 857
 858         return 0;
 859 }
 860
 861 /* bit-rate-dependent table to prevent Tx distortion, in half-dB units,
 862  * for OFDM 6, 12, 18, 24, 36, 48, 54, 60 MBit, and CCK all rates. */
 863 static s32 back_off_table[] = {
 864         10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 20 MHz */
 865         10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 20 MHz */
 866         10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 40 MHz */
 867         10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 40 MHz */
 868         10                      /* CCK */
 869 };
 870
 871 /* Thermal compensation values for txpower for various frequency ranges ...
 872  *   ratios from 3:1 to 4.5:1 of degrees (Celsius) per half-dB gain adjust */
 873 static struct iwl4965_txpower_comp_entry {
 874         s32 degrees_per_05db_a;
 875         s32 degrees_per_05db_a_denom;
 876 } tx_power_cmp_tble[CALIB_CH_GROUP_MAX] = {
 877         {9, 2},                 /* group 0 5.2, ch  34-43 */
 878         {4, 1},                 /* group 1 5.2, ch  44-70 */
 879         {4, 1},                 /* group 2 5.2, ch  71-124 */
 880         {4, 1},                 /* group 3 5.2, ch 125-200 */
 881         {3, 1}                  /* group 4 2.4, ch   all */
 882 };
 883
 884 static s32 get_min_power_index(s32 rate_power_index, u32 band)
 885 {
 886         if (!band) {
 887                 if ((rate_power_index & 7) <= 4)
 888                         return MIN_TX_GAIN_INDEX_52GHZ_EXT;
 889         }
 890         return MIN_TX_GAIN_INDEX;
 891 }
 892
 893 struct gain_entry {
 894         u8 dsp;
 895         u8 radio;
 896 };
 897
 898 static const struct gain_entry gain_table[2][108] = {
 899         /* 5.2GHz power gain index table */
 900         {
 901          {123, 0x3F},           /* highest txpower */
 902          {117, 0x3F},
 903          {110, 0x3F},
 904          {104, 0x3F},
 905          {98, 0x3F},
 906          {110, 0x3E},
 907          {104, 0x3E},
 908          {98, 0x3E},
 909          {110, 0x3D},
 910          {104, 0x3D},
 911          {98, 0x3D},
 912          {110, 0x3C},
 913          {104, 0x3C},
 914          {98, 0x3C},
 915          {110, 0x3B},
 916          {104, 0x3B},
 917          {98, 0x3B},
 918          {110, 0x3A},
 919          {104, 0x3A},
 920          {98, 0x3A},
 921          {110, 0x39},
 922          {104, 0x39},
 923          {98, 0x39},
 924          {110, 0x38},
 925          {104, 0x38},
 926          {98, 0x38},
 927          {110, 0x37},
 928          {104, 0x37},
 929          {98, 0x37},
 930          {110, 0x36},
 931          {104, 0x36},
 932          {98, 0x36},
 933          {110, 0x35},
 934          {104, 0x35},
 935          {98, 0x35},
 936          {110, 0x34},
 937          {104, 0x34},
 938          {98, 0x34},
 939          {110, 0x33},
 940          {104, 0x33},
 941          {98, 0x33},
 942          {110, 0x32},
 943          {104, 0x32},
 944          {98, 0x32},
 945          {110, 0x31},
 946          {104, 0x31},
 947          {98, 0x31},
 948          {110, 0x30},
 949          {104, 0x30},
 950          {98, 0x30},
 951          {110, 0x25},
 952          {104, 0x25},
 953          {98, 0x25},
 954          {110, 0x24},
 955          {104, 0x24},
 956          {98, 0x24},
 957          {110, 0x23},
 958          {104, 0x23},
 959          {98, 0x23},
 960          {110, 0x22},
 961          {104, 0x18},
 962          {98, 0x18},
 963          {110, 0x17},
 964          {104, 0x17},
 965          {98, 0x17},
 966          {110, 0x16},
 967          {104, 0x16},
 968          {98, 0x16},
 969          {110, 0x15},
 970          {104, 0x15},
 971          {98, 0x15},
 972          {110, 0x14},
 973          {104, 0x14},
 974          {98, 0x14},
 975          {110, 0x13},
 976          {104, 0x13},
 977          {98, 0x13},
 978          {110, 0x12},
 979          {104, 0x08},
 980          {98, 0x08},
 981          {110, 0x07},
 982          {104, 0x07},
 983          {98, 0x07},
 984          {110, 0x06},
 985          {104, 0x06},
 986          {98, 0x06},
 987          {110, 0x05},
 988          {104, 0x05},
 989          {98, 0x05},
 990          {110, 0x04},
 991          {104, 0x04},
 992          {98, 0x04},
 993          {110, 0x03},
 994          {104, 0x03},
 995          {98, 0x03},
 996          {110, 0x02},
 997          {104, 0x02},
 998          {98, 0x02},
 999          {110, 0x01},
1000          {104, 0x01},
1001          {98, 0x01},
1002          {110, 0x00},
1003          {104, 0x00},
1004          {98, 0x00},
1005          {93, 0x00},
1006          {88, 0x00},
1007          {83, 0x00},
1008          {78, 0x00},
1009          },
1010         /* 2.4GHz power gain index table */
1011         {
1012          {110, 0x3f},           /* highest txpower */
1013          {104, 0x3f},
1014          {98, 0x3f},
1015          {110, 0x3e},
1016          {104, 0x3e},
1017          {98, 0x3e},
1018          {110, 0x3d},
1019          {104, 0x3d},
1020          {98, 0x3d},
1021          {110, 0x3c},
1022          {104, 0x3c},
1023          {98, 0x3c},
1024          {110, 0x3b},
1025          {104, 0x3b},
1026          {98, 0x3b},
1027          {110, 0x3a},
1028          {104, 0x3a},
1029          {98, 0x3a},
1030          {110, 0x39},
1031          {104, 0x39},
1032          {98, 0x39},
1033          {110, 0x38},
1034          {104, 0x38},
1035          {98, 0x38},
1036          {110, 0x37},
1037          {104, 0x37},
1038          {98, 0x37},
1039          {110, 0x36},
1040          {104, 0x36},
1041          {98, 0x36},
1042          {110, 0x35},
1043          {104, 0x35},
1044          {98, 0x35},
1045          {110, 0x34},
1046          {104, 0x34},
1047          {98, 0x34},
1048          {110, 0x33},
1049          {104, 0x33},
1050          {98, 0x33},
1051          {110, 0x32},
1052          {104, 0x32},
1053          {98, 0x32},
1054          {110, 0x31},
1055          {104, 0x31},
1056          {98, 0x31},
1057          {110, 0x30},
1058          {104, 0x30},
1059          {98, 0x30},
1060          {110, 0x6},
1061          {104, 0x6},
1062          {98, 0x6},
1063          {110, 0x5},
1064          {104, 0x5},
1065          {98, 0x5},
1066          {110, 0x4},
1067          {104, 0x4},
1068          {98, 0x4},
1069          {110, 0x3},
1070          {104, 0x3},
1071          {98, 0x3},
1072          {110, 0x2},
1073          {104, 0x2},
1074          {98, 0x2},
1075          {110, 0x1},
1076          {104, 0x1},
1077          {98, 0x1},
1078          {110, 0x0},
1079          {104, 0x0},
1080          {98, 0x0},
1081          {97, 0},
1082          {96, 0},
1083          {95, 0},
1084          {94, 0},
1085          {93, 0},
1086          {92, 0},
1087          {91, 0},
1088          {90, 0},
1089          {89, 0},
1090          {88, 0},
1091          {87, 0},
1092          {86, 0},
1093          {85, 0},
1094          {84, 0},
1095          {83, 0},
1096          {82, 0},
1097          {81, 0},
1098          {80, 0},
1099          {79, 0},
1100          {78, 0},
1101          {77, 0},
1102          {76, 0},
1103          {75, 0},
1104          {74, 0},
1105          {73, 0},
1106          {72, 0},
1107          {71, 0},
1108          {70, 0},
1109          {69, 0},
1110          {68, 0},
1111          {67, 0},
1112          {66, 0},
1113          {65, 0},
1114          {64, 0},
1115          {63, 0},
1116          {62, 0},
1117          {61, 0},
1118          {60, 0},
1119          {59, 0},
1120          }
1121 };
1122
1123 static int iwl4965_fill_txpower_tbl(struct iwl_priv *priv, u8 band, u16 channel,
1124                                     u8 is_ht40, u8 ctrl_chan_high,
1125                                     struct iwl4965_tx_power_db *tx_power_tbl)
1126 {
1127         u8 saturation_power;
1128         s32 target_power;
1129         s32 user_target_power;
1130         s32 power_limit;
1131         s32 current_temp;
1132         s32 reg_limit;
1133         s32 current_regulatory;
1134         s32 txatten_grp = CALIB_CH_GROUP_MAX;
1135         int i;
1136         int c;
1137         const struct iwl_channel_info *ch_info = NULL;
1138         struct iwl_eeprom_calib_ch_info ch_eeprom_info;
1139         const struct iwl_eeprom_calib_measure *measurement;
1140         s16 voltage;
1141         s32 init_voltage;
1142         s32 voltage_compensation;
1143         s32 degrees_per_05db_num;
1144         s32 degrees_per_05db_denom;
1145         s32 factory_temp;
1146         s32 temperature_comp[2];
1147         s32 factory_gain_index[2];
1148         s32 factory_actual_pwr[2];
1149         s32 power_index;
1150
1151         /* tx_power_user_lmt is in dBm, convert to half-dBm (half-dB units
1152          *   are used for indexing into txpower table) */
1153         user_target_power = 2 * priv->tx_power_user_lmt;
1154
1155         /* Get current (RXON) channel, band, width */
1156         IWL_DEBUG_TXPOWER(priv, "chan %d band %d is_ht40 %d\n", channel, band,
1157                           is_ht40);
1158
1159         ch_info = iwl_get_channel_info(priv, priv->band, channel);
1160
1161         if (!is_channel_valid(ch_info))
1162                 return -EINVAL;
1163
1164         /* get txatten group, used to select 1) thermal txpower adjustment
1165          *   and 2) mimo txpower balance between Tx chains. */
1166         txatten_grp = iwl4965_get_tx_atten_grp(channel);
1167         if (txatten_grp < 0) {
1168                 IWL_ERR(priv, "Can't find txatten group for channel %d.\n",
1169                           channel);
1170                 return -EINVAL;
1171         }
1172
1173         IWL_DEBUG_TXPOWER(priv, "channel %d belongs to txatten group %d\n",
1174                           channel, txatten_grp);
1175
1176         if (is_ht40) {
1177                 if (ctrl_chan_high)
1178                         channel -= 2;
1179                 else
1180                         channel += 2;
1181         }
1182
1183         /* hardware txpower limits ...
1184          * saturation (clipping distortion) txpowers are in half-dBm */
1185         if (band)
1186                 saturation_power = priv->calib_info->saturation_power24;
1187         else
1188                 saturation_power = priv->calib_info->saturation_power52;
1189
1190         if (saturation_power < IWL_TX_POWER_SATURATION_MIN ||
1191             saturation_power > IWL_TX_POWER_SATURATION_MAX) {
1192                 if (band)
1193                         saturation_power = IWL_TX_POWER_DEFAULT_SATURATION_24;
1194                 else
1195                         saturation_power = IWL_TX_POWER_DEFAULT_SATURATION_52;
1196         }
1197
1198         /* regulatory txpower limits ... reg_limit values are in half-dBm,
1199          *   max_power_avg values are in dBm, convert * 2 */
1200         if (is_ht40)
1201                 reg_limit = ch_info->ht40_max_power_avg * 2;
1202         else
1203                 reg_limit = ch_info->max_power_avg * 2;
1204
1205         if ((reg_limit < IWL_TX_POWER_REGULATORY_MIN) ||
1206             (reg_limit > IWL_TX_POWER_REGULATORY_MAX)) {
1207                 if (band)
1208                         reg_limit = IWL_TX_POWER_DEFAULT_REGULATORY_24;
1209                 else
1210                         reg_limit = IWL_TX_POWER_DEFAULT_REGULATORY_52;
1211         }
1212
1213         /* Interpolate txpower calibration values for this channel,
1214          *   based on factory calibration tests on spaced channels. */
1215         iwl4965_interpolate_chan(priv, channel, &ch_eeprom_info);
1216
1217         /* calculate tx gain adjustment based on power supply voltage */
1218         voltage = le16_to_cpu(priv->calib_info->voltage);
1219         init_voltage = (s32)le32_to_cpu(priv->card_alive_init.voltage);
1220         voltage_compensation =
1221             iwl4965_get_voltage_compensation(voltage, init_voltage);
1222
1223         IWL_DEBUG_TXPOWER(priv, "curr volt %d eeprom volt %d volt comp %d\n",
1224                           init_voltage,
1225                           voltage, voltage_compensation);
1226
1227         /* get current temperature (Celsius) */
1228         current_temp = max(priv->temperature, IWL_TX_POWER_TEMPERATURE_MIN);
1229         current_temp = min(priv->temperature, IWL_TX_POWER_TEMPERATURE_MAX);
1230         current_temp = KELVIN_TO_CELSIUS(current_temp);
1231
1232         /* select thermal txpower adjustment params, based on channel group
1233          *   (same frequency group used for mimo txatten adjustment) */
1234         degrees_per_05db_num =
1235             tx_power_cmp_tble[txatten_grp].degrees_per_05db_a;
1236         degrees_per_05db_denom =
1237             tx_power_cmp_tble[txatten_grp].degrees_per_05db_a_denom;
1238
1239         /* get per-chain txpower values from factory measurements */
1240         for (c = 0; c < 2; c++) {
1241                 measurement = &ch_eeprom_info.measurements[c][1];
1242
1243                 /* txgain adjustment (in half-dB steps) based on difference
1244                  *   between factory and current temperature */
1245                 factory_temp = measurement->temperature;
1246                 iwl4965_math_div_round((current_temp - factory_temp) *
1247                                        degrees_per_05db_denom,
1248                                        degrees_per_05db_num,
1249                                        &temperature_comp[c]);
1250
1251                 factory_gain_index[c] = measurement->gain_idx;
1252                 factory_actual_pwr[c] = measurement->actual_pow;
1253
1254                 IWL_DEBUG_TXPOWER(priv, "chain = %d\n", c);
1255                 IWL_DEBUG_TXPOWER(priv, "fctry tmp %d, "
1256                                   "curr tmp %d, comp %d steps\n",
1257                                   factory_temp, current_temp,
1258                                   temperature_comp[c]);
1259
1260                 IWL_DEBUG_TXPOWER(priv, "fctry idx %d, fctry pwr %d\n",
1261                                   factory_gain_index[c],
1262                                   factory_actual_pwr[c]);
1263         }
1264
1265         /* for each of 33 bit-rates (including 1 for CCK) */
1266         for (i = 0; i < POWER_TABLE_NUM_ENTRIES; i++) {
1267                 u8 is_mimo_rate;
1268                 union iwl4965_tx_power_dual_stream tx_power;
1269
1270                 /* for mimo, reduce each chain's txpower by half
1271                  * (3dB, 6 steps), so total output power is regulatory
1272                  * compliant. */
1273                 if (i & 0x8) {
1274                         current_regulatory = reg_limit -
1275                             IWL_TX_POWER_MIMO_REGULATORY_COMPENSATION;
1276                         is_mimo_rate = 1;
1277                 } else {
1278                         current_regulatory = reg_limit;
1279                         is_mimo_rate = 0;
1280                 }
1281
1282                 /* find txpower limit, either hardware or regulatory */
1283                 power_limit = saturation_power - back_off_table[i];
1284                 if (power_limit > current_regulatory)
1285                         power_limit = current_regulatory;
1286
1287                 /* reduce user's txpower request if necessary
1288                  * for this rate on this channel */
1289                 target_power = user_target_power;
1290                 if (target_power > power_limit)
1291                         target_power = power_limit;
1292
1293                 IWL_DEBUG_TXPOWER(priv, "rate %d sat %d reg %d usr %d tgt %d\n",
1294                                   i, saturation_power - back_off_table[i],
1295                                   current_regulatory, user_target_power,
1296                                   target_power);
1297
1298                 /* for each of 2 Tx chains (radio transmitters) */
1299                 for (c = 0; c < 2; c++) {
1300                         s32 atten_value;
1301
1302                         if (is_mimo_rate)
1303                                 atten_value =
1304                                     (s32)le32_to_cpu(priv->card_alive_init.
1305                                     tx_atten[txatten_grp][c]);
1306                         else
1307                                 atten_value = 0;
1308
1309                         /* calculate index; higher index means lower txpower */
1310                         power_index = (u8) (factory_gain_index[c] -
1311                                             (target_power -
1312                                              factory_actual_pwr[c]) -
1313                                             temperature_comp[c] -
1314                                             voltage_compensation +
1315                                             atten_value);
1316
1317 /*                      IWL_DEBUG_TXPOWER(priv, "calculated txpower index %d\n",
1318                                                 power_index); */
1319
1320                         if (power_index < get_min_power_index(i, band))
1321                                 power_index = get_min_power_index(i, band);
1322
1323                         /* adjust 5 GHz index to support negative indexes */
1324                         if (!band)
1325                                 power_index += 9;
1326
1327                         /* CCK, rate 32, reduce txpower for CCK */
1328                         if (i == POWER_TABLE_CCK_ENTRY)
1329                                 power_index +=
1330                                     IWL_TX_POWER_CCK_COMPENSATION_C_STEP;
1331
1332                         /* stay within the table! */
1333                         if (power_index > 107) {
1334                                 IWL_WARN(priv, "txpower index %d > 107\n",
1335                                             power_index);
1336                                 power_index = 107;
1337                         }
1338                         if (power_index < 0) {
1339                                 IWL_WARN(priv, "txpower index %d < 0\n",
1340                                             power_index);
1341                                 power_index = 0;
1342                         }
1343
1344                         /* fill txpower command for this rate/chain */
1345                         tx_power.s.radio_tx_gain[c] =
1346                                 gain_table[band][power_index].radio;
1347                         tx_power.s.dsp_predis_atten[c] =
1348                                 gain_table[band][power_index].dsp;
1349
1350                         IWL_DEBUG_TXPOWER(priv, "chain %d mimo %d index %d "
1351                                           "gain 0x%02x dsp %d\n",
1352                                           c, atten_value, power_index,
1353                                         tx_power.s.radio_tx_gain[c],
1354                                         tx_power.s.dsp_predis_atten[c]);
1355                 } /* for each chain */
1356
1357                 tx_power_tbl->power_tbl[i].dw = cpu_to_le32(tx_power.dw);
1358
1359         } /* for each rate */
1360
1361         return 0;
1362 }
1363
1364 /**
1365  * iwl4965_send_tx_power - Configure the TXPOWER level user limit
1366  *
1367  * Uses the active RXON for channel, band, and characteristics (ht40, high)
1368  * The power limit is taken from priv->tx_power_user_lmt.
1369  */
1370 static int iwl4965_send_tx_power(struct iwl_priv *priv)
1371 {
1372         struct iwl4965_txpowertable_cmd cmd = { 0 };
1373         int ret;
1374         u8 band = 0;
1375         bool is_ht40 = false;
1376         u8 ctrl_chan_high = 0;
1377
1378         if (test_bit(STATUS_SCANNING, &priv->status)) {
1379                 /* If this gets hit a lot, switch it to a BUG() and catch
1380                  * the stack trace to find out who is calling this during
1381                  * a scan. */
1382                 IWL_WARN(priv, "TX Power requested while scanning!\n");
1383                 return -EAGAIN;
1384         }
1385
1386         band = priv->band == IEEE80211_BAND_2GHZ;
1387
1388         is_ht40 =  is_ht40_channel(priv->active_rxon.flags);
1389
1390         if (is_ht40 &&
1391             (priv->active_rxon.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
1392                 ctrl_chan_high = 1;
1393
1394         cmd.band = band;
1395         cmd.channel = priv->active_rxon.channel;
1396
1397         ret = iwl4965_fill_txpower_tbl(priv, band,
1398                                 le16_to_cpu(priv->active_rxon.channel),
1399                                 is_ht40, ctrl_chan_high, &cmd.tx_power);
1400         if (ret)
1401                 goto out;
1402
1403         ret = iwl_send_cmd_pdu(priv, REPLY_TX_PWR_TABLE_CMD, sizeof(cmd), &cmd);
1404
1405 out:
1406         return ret;
1407 }
1408
1409 static int iwl4965_send_rxon_assoc(struct iwl_priv *priv)
1410 {
1411         int ret = 0;
1412         struct iwl4965_rxon_assoc_cmd rxon_assoc;
1413         const struct iwl_rxon_cmd *rxon1 = &priv->staging_rxon;
1414         const struct iwl_rxon_cmd *rxon2 = &priv->active_rxon;
1415
1416         if ((rxon1->flags == rxon2->flags) &&
1417             (rxon1->filter_flags == rxon2->filter_flags) &&
1418             (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
1419             (rxon1->ofdm_ht_single_stream_basic_rates ==
1420              rxon2->ofdm_ht_single_stream_basic_rates) &&
1421             (rxon1->ofdm_ht_dual_stream_basic_rates ==
1422              rxon2->ofdm_ht_dual_stream_basic_rates) &&
1423             (rxon1->rx_chain == rxon2->rx_chain) &&
1424             (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
1425                 IWL_DEBUG_INFO(priv, "Using current RXON_ASSOC.  Not resending.\n");
1426                 return 0;
1427         }
1428
1429         rxon_assoc.flags = priv->staging_rxon.flags;
1430         rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
1431         rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
1432         rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
1433         rxon_assoc.reserved = 0;
1434         rxon_assoc.ofdm_ht_single_stream_basic_rates =
1435             priv->staging_rxon.ofdm_ht_single_stream_basic_rates;
1436         rxon_assoc.ofdm_ht_dual_stream_basic_rates =
1437             priv->staging_rxon.ofdm_ht_dual_stream_basic_rates;
1438         rxon_assoc.rx_chain_select_flags = priv->staging_rxon.rx_chain;
1439
1440         ret = iwl_send_cmd_pdu_async(priv, REPLY_RXON_ASSOC,
1441                                      sizeof(rxon_assoc), &rxon_assoc, NULL);
1442         if (ret)
1443                 return ret;
1444
1445         return ret;
1446 }
1447
1448 static int iwl4965_hw_channel_switch(struct iwl_priv *priv,
1449                                      struct ieee80211_channel_switch *ch_switch)
1450 {
1451         int rc;
1452         u8 band = 0;
1453         bool is_ht40 = false;
1454         u8 ctrl_chan_high = 0;
1455         struct iwl4965_channel_switch_cmd cmd;
1456         const struct iwl_channel_info *ch_info;
1457         u32 switch_time_in_usec, ucode_switch_time;
1458         u16 ch;
1459         u32 tsf_low;
1460         u8 switch_count;
1461         u16 beacon_interval = le16_to_cpu(priv->rxon_timing.beacon_interval);
1462         struct ieee80211_vif *vif = priv->vif;
1463         band = priv->band == IEEE80211_BAND_2GHZ;
1464
1465         is_ht40 = is_ht40_channel(priv->staging_rxon.flags);
1466
1467         if (is_ht40 &&
1468             (priv->staging_rxon.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
1469                 ctrl_chan_high = 1;
1470
1471         cmd.band = band;
1472         cmd.expect_beacon = 0;
1473         ch = ieee80211_frequency_to_channel(ch_switch->channel->center_freq);
1474         cmd.channel = cpu_to_le16(ch);
1475         cmd.rxon_flags = priv->staging_rxon.flags;
1476         cmd.rxon_filter_flags = priv->staging_rxon.filter_flags;
1477         switch_count = ch_switch->count;
1478         tsf_low = ch_switch->timestamp & 0x0ffffffff;
1479         /*
1480          * calculate the ucode channel switch time
1481          * adding TSF as one of the factor for when to switch
1482          */
1483         if ((priv->ucode_beacon_time > tsf_low) && beacon_interval) {
1484                 if (switch_count > ((priv->ucode_beacon_time - tsf_low) /
1485                     beacon_interval)) {
1486                         switch_count -= (priv->ucode_beacon_time -
1487                                 tsf_low) / beacon_interval;
1488                 } else
1489                         switch_count = 0;
1490         }
1491         if (switch_count <= 1)
1492                 cmd.switch_time = cpu_to_le32(priv->ucode_beacon_time);
1493         else {
1494                 switch_time_in_usec =
1495                         vif->bss_conf.beacon_int * switch_count * TIME_UNIT;
1496                 ucode_switch_time = iwl_usecs_to_beacons(priv,
1497                                                          switch_time_in_usec,
1498                                                          beacon_interval);
1499                 cmd.switch_time = iwl_add_beacon_time(priv,
1500                                                       priv->ucode_beacon_time,
1501                                                       ucode_switch_time,
1502                                                       beacon_interval);
1503         }
1504         IWL_DEBUG_11H(priv, "uCode time for the switch is 0x%x\n",
1505                       cmd.switch_time);
1506         ch_info = iwl_get_channel_info(priv, priv->band, ch);
1507         if (ch_info)
1508                 cmd.expect_beacon = is_channel_radar(ch_info);
1509         else {
1510                 IWL_ERR(priv, "invalid channel switch from %u to %u\n",
1511                         priv->active_rxon.channel, ch);
1512                 return -EFAULT;
1513         }
1514
1515         rc = iwl4965_fill_txpower_tbl(priv, band, ch, is_ht40,
1516                                       ctrl_chan_high, &cmd.tx_power);
1517         if (rc) {
1518                 IWL_DEBUG_11H(priv, "error:%d  fill txpower_tbl\n", rc);
1519                 return rc;
1520         }
1521
1522         priv->switch_rxon.channel = cmd.channel;
1523         priv->switch_rxon.switch_in_progress = true;
1524
1525         return iwl_send_cmd_pdu(priv, REPLY_CHANNEL_SWITCH, sizeof(cmd), &cmd);
1526 }
1527
1528 /**
1529  * iwl4965_txq_update_byte_cnt_tbl - Set up entry in Tx byte-count array
1530  */
1531 static void iwl4965_txq_update_byte_cnt_tbl(struct iwl_priv *priv,
1532                                             struct iwl_tx_queue *txq,
1533                                             u16 byte_cnt)
1534 {
1535         struct iwl4965_scd_bc_tbl *scd_bc_tbl = priv->scd_bc_tbls.addr;
1536         int txq_id = txq->q.id;
1537         int write_ptr = txq->q.write_ptr;
1538         int len = byte_cnt + IWL_TX_CRC_SIZE + IWL_TX_DELIMITER_SIZE;
1539         __le16 bc_ent;
1540
1541         WARN_ON(len > 0xFFF || write_ptr >= TFD_QUEUE_SIZE_MAX);
1542
1543         bc_ent = cpu_to_le16(len & 0xFFF);
1544         /* Set up byte count within first 256 entries */
1545         scd_bc_tbl[txq_id].tfd_offset[write_ptr] = bc_ent;
1546
1547         /* If within first 64 entries, duplicate at end */
1548         if (write_ptr < TFD_QUEUE_SIZE_BC_DUP)
1549                 scd_bc_tbl[txq_id].
1550                         tfd_offset[TFD_QUEUE_SIZE_MAX + write_ptr] = bc_ent;
1551 }
1552
1553 /**
1554  * sign_extend - Sign extend a value using specified bit as sign-bit
1555  *
1556  * Example: sign_extend(9, 3) would return -7 as bit3 of 1001b is 1
1557  * and bit0..2 is 001b which when sign extended to 1111111111111001b is -7.
1558  *
1559  * @param oper value to sign extend
1560  * @param index 0 based bit index (0<=index<32) to sign bit
1561  */
1562 static s32 sign_extend(u32 oper, int index)
1563 {
1564         u8 shift = 31 - index;
1565
1566         return (s32)(oper << shift) >> shift;
1567 }
1568
1569 /**
1570  * iwl4965_hw_get_temperature - return the calibrated temperature (in Kelvin)
1571  * @statistics: Provides the temperature reading from the uCode
1572  *
1573  * A return of <0 indicates bogus data in the statistics
1574  */
1575 static int iwl4965_hw_get_temperature(struct iwl_priv *priv)
1576 {
1577         s32 temperature;
1578         s32 vt;
1579         s32 R1, R2, R3;
1580         u32 R4;
1581
1582         if (test_bit(STATUS_TEMPERATURE, &priv->status) &&
1583                 (priv->statistics.flag & STATISTICS_REPLY_FLG_HT40_MODE_MSK)) {
1584                 IWL_DEBUG_TEMP(priv, "Running HT40 temperature calibration\n");
1585                 R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[1]);
1586                 R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[1]);
1587                 R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[1]);
1588                 R4 = le32_to_cpu(priv->card_alive_init.therm_r4[1]);
1589         } else {
1590                 IWL_DEBUG_TEMP(priv, "Running temperature calibration\n");
1591                 R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[0]);
1592                 R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[0]);
1593                 R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[0]);
1594                 R4 = le32_to_cpu(priv->card_alive_init.therm_r4[0]);
1595         }
1596
1597         /*
1598          * Temperature is only 23 bits, so sign extend out to 32.
1599          *
1600          * NOTE If we haven't received a statistics notification yet
1601          * with an updated temperature, use R4 provided to us in the
1602          * "initialize" ALIVE response.
1603          */
1604         if (!test_bit(STATUS_TEMPERATURE, &priv->status))
1605                 vt = sign_extend(R4, 23);
1606         else
1607                 vt = sign_extend(
1608                         le32_to_cpu(priv->statistics.general.temperature), 23);
1609
1610         IWL_DEBUG_TEMP(priv, "Calib values R[1-3]: %d %d %d R4: %d\n", R1, R2, R3, vt);
1611
1612         if (R3 == R1) {
1613                 IWL_ERR(priv, "Calibration conflict R1 == R3\n");
1614                 return -1;
1615         }
1616
1617         /* Calculate temperature in degrees Kelvin, adjust by 97%.
1618          * Add offset to center the adjustment around 0 degrees Centigrade. */
1619         temperature = TEMPERATURE_CALIB_A_VAL * (vt - R2);
1620         temperature /= (R3 - R1);
1621         temperature = (temperature * 97) / 100 + TEMPERATURE_CALIB_KELVIN_OFFSET;
1622
1623         IWL_DEBUG_TEMP(priv, "Calibrated temperature: %dK, %dC\n",
1624                         temperature, KELVIN_TO_CELSIUS(temperature));
1625
1626         return temperature;
1627 }
1628
1629 /* Adjust Txpower only if temperature variance is greater than threshold. */
1630 #define IWL_TEMPERATURE_THRESHOLD   3
1631
1632 /**
1633  * iwl4965_is_temp_calib_needed - determines if new calibration is needed
1634  *
1635  * If the temperature changed has changed sufficiently, then a recalibration
1636  * is needed.
1637  *
1638  * Assumes caller will replace priv->last_temperature once calibration
1639  * executed.
1640  */
1641 static int iwl4965_is_temp_calib_needed(struct iwl_priv *priv)
1642 {
1643         int temp_diff;
1644
1645         if (!test_bit(STATUS_STATISTICS, &priv->status)) {
1646                 IWL_DEBUG_TEMP(priv, "Temperature not updated -- no statistics.\n");
1647                 return 0;
1648         }
1649
1650         temp_diff = priv->temperature - priv->last_temperature;
1651
1652         /* get absolute value */
1653         if (temp_diff < 0) {
1654                 IWL_DEBUG_POWER(priv, "Getting cooler, delta %d\n", temp_diff);
1655                 temp_diff = -temp_diff;
1656         } else if (temp_diff == 0)
1657                 IWL_DEBUG_POWER(priv, "Temperature unchanged\n");
1658         else
1659                 IWL_DEBUG_POWER(priv, "Getting warmer, delta %d\n", temp_diff);
1660
1661         if (temp_diff < IWL_TEMPERATURE_THRESHOLD) {
1662                 IWL_DEBUG_POWER(priv, " => thermal txpower calib not needed\n");
1663                 return 0;
1664         }
1665
1666         IWL_DEBUG_POWER(priv, " => thermal txpower calib needed\n");
1667
1668         return 1;
1669 }
1670
1671 static void iwl4965_temperature_calib(struct iwl_priv *priv)
1672 {
1673         s32 temp;
1674
1675         temp = iwl4965_hw_get_temperature(priv);
1676         if (temp < 0)
1677                 return;
1678
1679         if (priv->temperature != temp) {
1680                 if (priv->temperature)
1681                         IWL_DEBUG_TEMP(priv, "Temperature changed "
1682                                        "from %dC to %dC\n",
1683                                        KELVIN_TO_CELSIUS(priv->temperature),
1684                                        KELVIN_TO_CELSIUS(temp));
1685                 else
1686                         IWL_DEBUG_TEMP(priv, "Temperature "
1687                                        "initialized to %dC\n",
1688                                        KELVIN_TO_CELSIUS(temp));
1689         }
1690
1691         priv->temperature = temp;
1692         iwl_tt_handler(priv);
1693         set_bit(STATUS_TEMPERATURE, &priv->status);
1694
1695         if (!priv->disable_tx_power_cal &&
1696              unlikely(!test_bit(STATUS_SCANNING, &priv->status)) &&
1697              iwl4965_is_temp_calib_needed(priv))
1698                 queue_work(priv->workqueue, &priv->txpower_work);
1699 }
1700
1701 /**
1702  * iwl4965_tx_queue_stop_scheduler - Stop queue, but keep configuration
1703  */
1704 static void iwl4965_tx_queue_stop_scheduler(struct iwl_priv *priv,
1705                                             u16 txq_id)
1706 {
1707         /* Simply stop the queue, but don't change any configuration;
1708          * the SCD_ACT_EN bit is the write-enable mask for the ACTIVE bit. */
1709         iwl_write_prph(priv,
1710                 IWL49_SCD_QUEUE_STATUS_BITS(txq_id),
1711                 (0 << IWL49_SCD_QUEUE_STTS_REG_POS_ACTIVE)|
1712                 (1 << IWL49_SCD_QUEUE_STTS_REG_POS_SCD_ACT_EN));
1713 }
1714
1715 /**
1716  * txq_id must be greater than IWL49_FIRST_AMPDU_QUEUE
1717  * priv->lock must be held by the caller
1718  */
1719 static int iwl4965_txq_agg_disable(struct iwl_priv *priv, u16 txq_id,
1720                                    u16 ssn_idx, u8 tx_fifo)
1721 {
1722         if ((IWL49_FIRST_AMPDU_QUEUE > txq_id) ||
1723             (IWL49_FIRST_AMPDU_QUEUE + priv->cfg->num_of_ampdu_queues
1724              <= txq_id)) {
1725                 IWL_WARN(priv,
1726                         "queue number out of range: %d, must be %d to %d\n",
1727                         txq_id, IWL49_FIRST_AMPDU_QUEUE,
1728                         IWL49_FIRST_AMPDU_QUEUE +
1729                         priv->cfg->num_of_ampdu_queues - 1);
1730                 return -EINVAL;
1731         }
1732
1733         iwl4965_tx_queue_stop_scheduler(priv, txq_id);
1734
1735         iwl_clear_bits_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, (1 << txq_id));
1736
1737         priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
1738         priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
1739         /* supposes that ssn_idx is valid (!= 0xFFF) */
1740         iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
1741
1742         iwl_clear_bits_prph(priv, IWL49_SCD_INTERRUPT_MASK, (1 << txq_id));
1743         iwl_txq_ctx_deactivate(priv, txq_id);
1744         iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 0);
1745
1746         return 0;
1747 }
1748
1749 /**
1750  * iwl4965_tx_queue_set_q2ratid - Map unique receiver/tid combination to a queue
1751  */
1752 static int iwl4965_tx_queue_set_q2ratid(struct iwl_priv *priv, u16 ra_tid,
1753                                         u16 txq_id)
1754 {
1755         u32 tbl_dw_addr;
1756         u32 tbl_dw;
1757         u16 scd_q2ratid;
1758
1759         scd_q2ratid = ra_tid & IWL_SCD_QUEUE_RA_TID_MAP_RATID_MSK;
1760
1761         tbl_dw_addr = priv->scd_base_addr +
1762                         IWL49_SCD_TRANSLATE_TBL_OFFSET_QUEUE(txq_id);
1763
1764         tbl_dw = iwl_read_targ_mem(priv, tbl_dw_addr);
1765
1766         if (txq_id & 0x1)
1767                 tbl_dw = (scd_q2ratid << 16) | (tbl_dw & 0x0000FFFF);
1768         else
1769                 tbl_dw = scd_q2ratid | (tbl_dw & 0xFFFF0000);
1770
1771         iwl_write_targ_mem(priv, tbl_dw_addr, tbl_dw);
1772
1773         return 0;
1774 }
1775
1776
1777 /**
1778  * iwl4965_tx_queue_agg_enable - Set up & enable aggregation for selected queue
1779  *
1780  * NOTE:  txq_id must be greater than IWL49_FIRST_AMPDU_QUEUE,
1781  *        i.e. it must be one of the higher queues used for aggregation
1782  */
1783 static int iwl4965_txq_agg_enable(struct iwl_priv *priv, int txq_id,
1784                                   int tx_fifo, int sta_id, int tid, u16 ssn_idx)
1785 {
1786         unsigned long flags;
1787         u16 ra_tid;
1788         int ret;
1789
1790         if ((IWL49_FIRST_AMPDU_QUEUE > txq_id) ||
1791             (IWL49_FIRST_AMPDU_QUEUE + priv->cfg->num_of_ampdu_queues
1792              <= txq_id)) {
1793                 IWL_WARN(priv,
1794                         "queue number out of range: %d, must be %d to %d\n",
1795                         txq_id, IWL49_FIRST_AMPDU_QUEUE,
1796                         IWL49_FIRST_AMPDU_QUEUE +
1797                         priv->cfg->num_of_ampdu_queues - 1);
1798                 return -EINVAL;
1799         }
1800
1801         ra_tid = BUILD_RAxTID(sta_id, tid);
1802
1803         /* Modify device's station table to Tx this TID */
1804         ret = iwl_sta_tx_modify_enable_tid(priv, sta_id, tid);
1805         if (ret)
1806                 return ret;
1807
1808         spin_lock_irqsave(&priv->lock, flags);
1809
1810         /* Stop this Tx queue before configuring it */
1811         iwl4965_tx_queue_stop_scheduler(priv, txq_id);
1812
1813         /* Map receiver-address / traffic-ID to this queue */
1814         iwl4965_tx_queue_set_q2ratid(priv, ra_tid, txq_id);
1815
1816         /* Set this queue as a chain-building queue */
1817         iwl_set_bits_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, (1 << txq_id));
1818
1819         /* Place first TFD at index corresponding to start sequence number.
1820          * Assumes that ssn_idx is valid (!= 0xFFF) */
1821         priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
1822         priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
1823         iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
1824
1825         /* Set up Tx window size and frame limit for this queue */
1826         iwl_write_targ_mem(priv,
1827                 priv->scd_base_addr + IWL49_SCD_CONTEXT_QUEUE_OFFSET(txq_id),
1828                 (SCD_WIN_SIZE << IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
1829                 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
1830
1831         iwl_write_targ_mem(priv, priv->scd_base_addr +
1832                 IWL49_SCD_CONTEXT_QUEUE_OFFSET(txq_id) + sizeof(u32),
1833                 (SCD_FRAME_LIMIT << IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS)
1834                 & IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
1835
1836         iwl_set_bits_prph(priv, IWL49_SCD_INTERRUPT_MASK, (1 << txq_id));
1837
1838         /* Set up Status area in SRAM, map to Tx DMA/FIFO, activate the queue */
1839         iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 1);
1840
1841         spin_unlock_irqrestore(&priv->lock, flags);
1842
1843         return 0;
1844 }
1845
1846
1847 static u16 iwl4965_get_hcmd_size(u8 cmd_id, u16 len)
1848 {
1849         switch (cmd_id) {
1850         case REPLY_RXON:
1851                 return (u16) sizeof(struct iwl4965_rxon_cmd);
1852         default:
1853                 return len;
1854         }
1855 }
1856
1857 static u16 iwl4965_build_addsta_hcmd(const struct iwl_addsta_cmd *cmd, u8 *data)
1858 {
1859         struct iwl4965_addsta_cmd *addsta = (struct iwl4965_addsta_cmd *)data;
1860         addsta->mode = cmd->mode;
1861         memcpy(&addsta->sta, &cmd->sta, sizeof(struct sta_id_modify));
1862         memcpy(&addsta->key, &cmd->key, sizeof(struct iwl4965_keyinfo));
1863         addsta->station_flags = cmd->station_flags;
1864         addsta->station_flags_msk = cmd->station_flags_msk;
1865         addsta->tid_disable_tx = cmd->tid_disable_tx;
1866         addsta->add_immediate_ba_tid = cmd->add_immediate_ba_tid;
1867         addsta->remove_immediate_ba_tid = cmd->remove_immediate_ba_tid;
1868         addsta->add_immediate_ba_ssn = cmd->add_immediate_ba_ssn;
1869         addsta->sleep_tx_count = cmd->sleep_tx_count;
1870         addsta->reserved1 = cpu_to_le16(0);
1871         addsta->reserved2 = cpu_to_le16(0);
1872
1873         return (u16)sizeof(struct iwl4965_addsta_cmd);
1874 }
1875
1876 static inline u32 iwl4965_get_scd_ssn(struct iwl4965_tx_resp *tx_resp)
1877 {
1878         return le32_to_cpup(&tx_resp->u.status + tx_resp->frame_count) & MAX_SN;
1879 }
1880
1881 /**
1882  * iwl4965_tx_status_reply_tx - Handle Tx response for frames in aggregation queue
1883  */
1884 static int iwl4965_tx_status_reply_tx(struct iwl_priv *priv,
1885                                       struct iwl_ht_agg *agg,
1886                                       struct iwl4965_tx_resp *tx_resp,
1887                                       int txq_id, u16 start_idx)
1888 {
1889         u16 status;
1890         struct agg_tx_status *frame_status = tx_resp->u.agg_status;
1891         struct ieee80211_tx_info *info = NULL;
1892         struct ieee80211_hdr *hdr = NULL;
1893         u32 rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
1894         int i, sh, idx;
1895         u16 seq;
1896         if (agg->wait_for_ba)
1897                 IWL_DEBUG_TX_REPLY(priv, "got tx response w/o block-ack\n");
1898
1899         agg->frame_count = tx_resp->frame_count;
1900         agg->start_idx = start_idx;
1901         agg->rate_n_flags = rate_n_flags;
1902         agg->bitmap = 0;
1903
1904         /* num frames attempted by Tx command */
1905         if (agg->frame_count == 1) {
1906                 /* Only one frame was attempted; no block-ack will arrive */
1907                 status = le16_to_cpu(frame_status[0].status);
1908                 idx = start_idx;
1909
1910                 /* FIXME: code repetition */
1911                 IWL_DEBUG_TX_REPLY(priv, "FrameCnt = %d, StartIdx=%d idx=%d\n",
1912                                    agg->frame_count, agg->start_idx, idx);
1913
1914                 info = IEEE80211_SKB_CB(priv->txq[txq_id].txb[idx].skb);
1915                 info->status.rates[0].count = tx_resp->failure_frame + 1;
1916                 info->flags &= ~IEEE80211_TX_CTL_AMPDU;
1917                 info->flags |= iwl_tx_status_to_mac80211(status);
1918                 iwlagn_hwrate_to_tx_control(priv, rate_n_flags, info);
1919                 /* FIXME: code repetition end */
1920
1921                 IWL_DEBUG_TX_REPLY(priv, "1 Frame 0x%x failure :%d\n",
1922                                     status & 0xff, tx_resp->failure_frame);
1923                 IWL_DEBUG_TX_REPLY(priv, "Rate Info rate_n_flags=%x\n", rate_n_flags);
1924
1925                 agg->wait_for_ba = 0;
1926         } else {
1927                 /* Two or more frames were attempted; expect block-ack */
1928                 u64 bitmap = 0;
1929                 int start = agg->start_idx;
1930
1931                 /* Construct bit-map of pending frames within Tx window */
1932                 for (i = 0; i < agg->frame_count; i++) {
1933                         u16 sc;
1934                         status = le16_to_cpu(frame_status[i].status);
1935                         seq  = le16_to_cpu(frame_status[i].sequence);
1936                         idx = SEQ_TO_INDEX(seq);
1937                         txq_id = SEQ_TO_QUEUE(seq);
1938
1939                         if (status & (AGG_TX_STATE_FEW_BYTES_MSK |
1940                                       AGG_TX_STATE_ABORT_MSK))
1941                                 continue;
1942
1943                         IWL_DEBUG_TX_REPLY(priv, "FrameCnt = %d, txq_id=%d idx=%d\n",
1944                                            agg->frame_count, txq_id, idx);
1945
1946                         hdr = iwl_tx_queue_get_hdr(priv, txq_id, idx);
1947                         if (!hdr) {
1948                                 IWL_ERR(priv,
1949                                         "BUG_ON idx doesn't point to valid skb"
1950                                         " idx=%d, txq_id=%d\n", idx, txq_id);
1951                                 return -1;
1952                         }
1953
1954                         sc = le16_to_cpu(hdr->seq_ctrl);
1955                         if (idx != (SEQ_TO_SN(sc) & 0xff)) {
1956                                 IWL_ERR(priv,
1957                                         "BUG_ON idx doesn't match seq control"
1958                                         " idx=%d, seq_idx=%d, seq=%d\n",
1959                                         idx, SEQ_TO_SN(sc), hdr->seq_ctrl);
1960                                 return -1;
1961                         }
1962
1963                         IWL_DEBUG_TX_REPLY(priv, "AGG Frame i=%d idx %d seq=%d\n",
1964                                            i, idx, SEQ_TO_SN(sc));
1965
1966                         sh = idx - start;
1967                         if (sh > 64) {
1968                                 sh = (start - idx) + 0xff;
1969                                 bitmap = bitmap << sh;
1970                                 sh = 0;
1971                                 start = idx;
1972                         } else if (sh < -64)
1973                                 sh  = 0xff - (start - idx);
1974                         else if (sh < 0) {
1975                                 sh = start - idx;
1976                                 start = idx;
1977                                 bitmap = bitmap << sh;
1978                                 sh = 0;
1979                         }
1980                         bitmap |= 1ULL << sh;
1981                         IWL_DEBUG_TX_REPLY(priv, "start=%d bitmap=0x%llx\n",
1982                                            start, (unsigned long long)bitmap);
1983                 }
1984
1985                 agg->bitmap = bitmap;
1986                 agg->start_idx = start;
1987                 IWL_DEBUG_TX_REPLY(priv, "Frames %d start_idx=%d bitmap=0x%llx\n",
1988                                    agg->frame_count, agg->start_idx,
1989                                    (unsigned long long)agg->bitmap);
1990
1991                 if (bitmap)
1992                         agg->wait_for_ba = 1;
1993         }
1994         return 0;
1995 }
1996
1997 static u8 iwl_find_station(struct iwl_priv *priv, const u8 *addr)
1998 {
1999         int i;
2000         int start = 0;
2001         int ret = IWL_INVALID_STATION;
2002         unsigned long flags;
2003
2004         if ((priv->iw_mode == NL80211_IFTYPE_ADHOC) ||
2005             (priv->iw_mode == NL80211_IFTYPE_AP))
2006                 start = IWL_STA_ID;
2007
2008         if (is_broadcast_ether_addr(addr))
2009                 return priv->hw_params.bcast_sta_id;
2010
2011         spin_lock_irqsave(&priv->sta_lock, flags);
2012         for (i = start; i < priv->hw_params.max_stations; i++)
2013                 if (priv->stations[i].used &&
2014                     (!compare_ether_addr(priv->stations[i].sta.sta.addr,
2015                                          addr))) {
2016                         ret = i;
2017                         goto out;
2018                 }
2019
2020         IWL_DEBUG_ASSOC_LIMIT(priv, "can not find STA %pM total %d\n",
2021                               addr, priv->num_stations);
2022
2023  out:
2024         /*
2025          * It may be possible that more commands interacting with stations
2026          * arrive before we completed processing the adding of
2027          * station
2028          */
2029         if (ret != IWL_INVALID_STATION &&
2030             (!(priv->stations[ret].used & IWL_STA_UCODE_ACTIVE) ||
2031              ((priv->stations[ret].used & IWL_STA_UCODE_ACTIVE) &&
2032               (priv->stations[ret].used & IWL_STA_UCODE_INPROGRESS)))) {
2033                 IWL_ERR(priv, "Requested station info for sta %d before ready.\n",
2034                         ret);
2035                 ret = IWL_INVALID_STATION;
2036         }
2037         spin_unlock_irqrestore(&priv->sta_lock, flags);
2038         return ret;
2039 }
2040
2041 static int iwl_get_ra_sta_id(struct iwl_priv *priv, struct ieee80211_hdr *hdr)
2042 {
2043         if (priv->iw_mode == NL80211_IFTYPE_STATION) {
2044                 return IWL_AP_ID;
2045         } else {
2046                 u8 *da = ieee80211_get_DA(hdr);
2047                 return iwl_find_station(priv, da);
2048         }
2049 }
2050
2051 /**
2052  * iwl4965_rx_reply_tx - Handle standard (non-aggregation) Tx response
2053  */
2054 static void iwl4965_rx_reply_tx(struct iwl_priv *priv,
2055                                 struct iwl_rx_mem_buffer *rxb)
2056 {
2057         struct iwl_rx_packet *pkt = rxb_addr(rxb);
2058         u16 sequence = le16_to_cpu(pkt->hdr.sequence);
2059         int txq_id = SEQ_TO_QUEUE(sequence);
2060         int index = SEQ_TO_INDEX(sequence);
2061         struct iwl_tx_queue *txq = &priv->txq[txq_id];
2062         struct ieee80211_hdr *hdr;
2063         struct ieee80211_tx_info *info;
2064         struct iwl4965_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
2065         u32  status = le32_to_cpu(tx_resp->u.status);
2066         int uninitialized_var(tid);
2067         int sta_id;
2068         int freed;
2069         u8 *qc = NULL;
2070         unsigned long flags;
2071
2072         if ((index >= txq->q.n_bd) || (iwl_queue_used(&txq->q, index) == 0)) {
2073                 IWL_ERR(priv, "Read index for DMA queue txq_id (%d) index %d "
2074                           "is out of range [0-%d] %d %d\n", txq_id,
2075                           index, txq->q.n_bd, txq->q.write_ptr,
2076                           txq->q.read_ptr);
2077                 return;
2078         }
2079
2080         info = IEEE80211_SKB_CB(txq->txb[txq->q.read_ptr].skb);
2081         memset(&info->status, 0, sizeof(info->status));
2082
2083         hdr = iwl_tx_queue_get_hdr(priv, txq_id, index);
2084         if (ieee80211_is_data_qos(hdr->frame_control)) {
2085                 qc = ieee80211_get_qos_ctl(hdr);
2086                 tid = qc[0] & 0xf;
2087         }
2088
2089         sta_id = iwl_get_ra_sta_id(priv, hdr);
2090         if (txq->sched_retry && unlikely(sta_id == IWL_INVALID_STATION)) {
2091                 IWL_ERR(priv, "Station not known\n");
2092                 return;
2093         }
2094
2095         spin_lock_irqsave(&priv->sta_lock, flags);
2096         if (txq->sched_retry) {
2097                 const u32 scd_ssn = iwl4965_get_scd_ssn(tx_resp);
2098                 struct iwl_ht_agg *agg = NULL;
2099                 WARN_ON(!qc);
2100
2101                 agg = &priv->stations[sta_id].tid[tid].agg;
2102
2103                 iwl4965_tx_status_reply_tx(priv, agg, tx_resp, txq_id, index);
2104
2105                 /* check if BAR is needed */
2106                 if ((tx_resp->frame_count == 1) && !iwl_is_tx_success(status))
2107                         info->flags |= IEEE80211_TX_STAT_AMPDU_NO_BACK;
2108
2109                 if (txq->q.read_ptr != (scd_ssn & 0xff)) {
2110                         index = iwl_queue_dec_wrap(scd_ssn & 0xff, txq->q.n_bd);
2111                         IWL_DEBUG_TX_REPLY(priv, "Retry scheduler reclaim scd_ssn "
2112                                            "%d index %d\n", scd_ssn , index);
2113                         freed = iwlagn_tx_queue_reclaim(priv, txq_id, index);
2114                         if (qc)
2115                                 iwl_free_tfds_in_queue(priv, sta_id,
2116                                                        tid, freed);
2117
2118                         if (priv->mac80211_registered &&
2119                             (iwl_queue_space(&txq->q) > txq->q.low_mark) &&
2120                             (agg->state != IWL_EMPTYING_HW_QUEUE_DELBA)) {
2121                                 if (agg->state == IWL_AGG_OFF)
2122                                         iwl_wake_queue(priv, txq_id);
2123                                 else
2124                                         iwl_wake_queue(priv, txq->swq_id);
2125                         }
2126                 }
2127         } else {
2128                 info->status.rates[0].count = tx_resp->failure_frame + 1;
2129                 info->flags |= iwl_tx_status_to_mac80211(status);
2130                 iwlagn_hwrate_to_tx_control(priv,
2131                                         le32_to_cpu(tx_resp->rate_n_flags),
2132                                         info);
2133
2134                 IWL_DEBUG_TX_REPLY(priv, "TXQ %d status %s (0x%08x) "
2135                                    "rate_n_flags 0x%x retries %d\n",
2136                                    txq_id,
2137                                    iwl_get_tx_fail_reason(status), status,
2138                                    le32_to_cpu(tx_resp->rate_n_flags),
2139                                    tx_resp->failure_frame);
2140
2141                 freed = iwlagn_tx_queue_reclaim(priv, txq_id, index);
2142                 if (qc && likely(sta_id != IWL_INVALID_STATION))
2143                         iwl_free_tfds_in_queue(priv, sta_id, tid, freed);
2144                 else if (sta_id == IWL_INVALID_STATION)
2145                         IWL_DEBUG_TX_REPLY(priv, "Station not known\n");
2146
2147                 if (priv->mac80211_registered &&
2148                     (iwl_queue_space(&txq->q) > txq->q.low_mark))
2149                         iwl_wake_queue(priv, txq_id);
2150         }
2151         if (qc && likely(sta_id != IWL_INVALID_STATION))
2152                 iwlagn_txq_check_empty(priv, sta_id, tid, txq_id);
2153
2154         iwl_check_abort_status(priv, tx_resp->frame_count, status);
2155
2156         spin_unlock_irqrestore(&priv->sta_lock, flags);
2157 }
2158
2159 static int iwl4965_calc_rssi(struct iwl_priv *priv,
2160                              struct iwl_rx_phy_res *rx_resp)
2161 {
2162         /* data from PHY/DSP regarding signal strength, etc.,
2163          *   contents are always there, not configurable by host.  */
2164         struct iwl4965_rx_non_cfg_phy *ncphy =
2165             (struct iwl4965_rx_non_cfg_phy *)rx_resp->non_cfg_phy_buf;
2166         u32 agc = (le16_to_cpu(ncphy->agc_info) & IWL49_AGC_DB_MASK)
2167                         >> IWL49_AGC_DB_POS;
2168
2169         u32 valid_antennae =
2170             (le16_to_cpu(rx_resp->phy_flags) & IWL49_RX_PHY_FLAGS_ANTENNAE_MASK)
2171                         >> IWL49_RX_PHY_FLAGS_ANTENNAE_OFFSET;
2172         u8 max_rssi = 0;
2173         u32 i;
2174
2175         /* Find max rssi among 3 possible receivers.
2176          * These values are measured by the digital signal processor (DSP).
2177          * They should stay fairly constant even as the signal strength varies,
2178          *   if the radio's automatic gain control (AGC) is working right.
2179          * AGC value (see below) will provide the "interesting" info. */
2180         for (i = 0; i < 3; i++)
2181                 if (valid_antennae & (1 << i))
2182                         max_rssi = max(ncphy->rssi_info[i << 1], max_rssi);
2183
2184         IWL_DEBUG_STATS(priv, "Rssi In A %d B %d C %d Max %d AGC dB %d\n",
2185                 ncphy->rssi_info[0], ncphy->rssi_info[2], ncphy->rssi_info[4],
2186                 max_rssi, agc);
2187
2188         /* dBm = max_rssi dB - agc dB - constant.
2189          * Higher AGC (higher radio gain) means lower signal. */
2190         return max_rssi - agc - IWLAGN_RSSI_OFFSET;
2191 }
2192
2193
2194 /* Set up 4965-specific Rx frame reply handlers */
2195 static void iwl4965_rx_handler_setup(struct iwl_priv *priv)
2196 {
2197         /* Legacy Rx frames */
2198         priv->rx_handlers[REPLY_RX] = iwlagn_rx_reply_rx;
2199         /* Tx response */
2200         priv->rx_handlers[REPLY_TX] = iwl4965_rx_reply_tx;
2201 }
2202
2203 static void iwl4965_setup_deferred_work(struct iwl_priv *priv)
2204 {
2205         INIT_WORK(&priv->txpower_work, iwl4965_bg_txpower_work);
2206 }
2207
2208 static void iwl4965_cancel_deferred_work(struct iwl_priv *priv)
2209 {
2210         cancel_work_sync(&priv->txpower_work);
2211 }
2212
2213 static struct iwl_hcmd_ops iwl4965_hcmd = {
2214         .rxon_assoc = iwl4965_send_rxon_assoc,
2215         .commit_rxon = iwl_commit_rxon,
2216         .set_rxon_chain = iwl_set_rxon_chain,
2217         .send_bt_config = iwl_send_bt_config,
2218 };
2219
2220 static struct iwl_hcmd_utils_ops iwl4965_hcmd_utils = {
2221         .get_hcmd_size = iwl4965_get_hcmd_size,
2222         .build_addsta_hcmd = iwl4965_build_addsta_hcmd,
2223         .chain_noise_reset = iwl4965_chain_noise_reset,
2224         .gain_computation = iwl4965_gain_computation,
2225         .rts_tx_cmd_flag = iwlcore_rts_tx_cmd_flag,
2226         .calc_rssi = iwl4965_calc_rssi,
2227         .request_scan = iwlagn_request_scan,
2228 };
2229
2230 static struct iwl_lib_ops iwl4965_lib = {
2231         .set_hw_params = iwl4965_hw_set_hw_params,
2232         .txq_update_byte_cnt_tbl = iwl4965_txq_update_byte_cnt_tbl,
2233         .txq_set_sched = iwl4965_txq_set_sched,
2234         .txq_agg_enable = iwl4965_txq_agg_enable,
2235         .txq_agg_disable = iwl4965_txq_agg_disable,
2236         .txq_attach_buf_to_tfd = iwl_hw_txq_attach_buf_to_tfd,
2237         .txq_free_tfd = iwl_hw_txq_free_tfd,
2238         .txq_init = iwl_hw_tx_queue_init,
2239         .rx_handler_setup = iwl4965_rx_handler_setup,
2240         .setup_deferred_work = iwl4965_setup_deferred_work,
2241         .cancel_deferred_work = iwl4965_cancel_deferred_work,
2242         .is_valid_rtc_data_addr = iwl4965_hw_valid_rtc_data_addr,
2243         .alive_notify = iwl4965_alive_notify,
2244         .init_alive_start = iwl4965_init_alive_start,
2245         .load_ucode = iwl4965_load_bsm,
2246         .dump_nic_event_log = iwl_dump_nic_event_log,
2247         .dump_nic_error_log = iwl_dump_nic_error_log,
2248         .dump_fh = iwl_dump_fh,
2249         .set_channel_switch = iwl4965_hw_channel_switch,
2250         .apm_ops = {
2251                 .init = iwl_apm_init,
2252                 .stop = iwl_apm_stop,
2253                 .config = iwl4965_nic_config,
2254                 .set_pwr_src = iwl_set_pwr_src,
2255         },
2256         .eeprom_ops = {
2257                 .regulatory_bands = {
2258                         EEPROM_REGULATORY_BAND_1_CHANNELS,
2259                         EEPROM_REGULATORY_BAND_2_CHANNELS,
2260                         EEPROM_REGULATORY_BAND_3_CHANNELS,
2261                         EEPROM_REGULATORY_BAND_4_CHANNELS,
2262                         EEPROM_REGULATORY_BAND_5_CHANNELS,
2263                         EEPROM_4965_REGULATORY_BAND_24_HT40_CHANNELS,
2264                         EEPROM_4965_REGULATORY_BAND_52_HT40_CHANNELS
2265                 },
2266                 .verify_signature  = iwlcore_eeprom_verify_signature,
2267                 .acquire_semaphore = iwlcore_eeprom_acquire_semaphore,
2268                 .release_semaphore = iwlcore_eeprom_release_semaphore,
2269                 .calib_version = iwl4965_eeprom_calib_version,
2270                 .query_addr = iwlcore_eeprom_query_addr,
2271         },
2272         .send_tx_power  = iwl4965_send_tx_power,
2273         .update_chain_flags = iwl_update_chain_flags,
2274         .post_associate = iwl_post_associate,
2275         .config_ap = iwl_config_ap,
2276         .isr = iwl_isr_legacy,
2277         .temp_ops = {
2278                 .temperature = iwl4965_temperature_calib,
2279                 .set_ct_kill = iwl4965_set_ct_threshold,
2280         },
2281         .manage_ibss_station = iwlagn_manage_ibss_station,
2282         .debugfs_ops = {
2283                 .rx_stats_read = iwl_ucode_rx_stats_read,
2284                 .tx_stats_read = iwl_ucode_tx_stats_read,
2285                 .general_stats_read = iwl_ucode_general_stats_read,
2286         },
2287         .check_plcp_health = iwl_good_plcp_health,
2288 };
2289
2290 static const struct iwl_ops iwl4965_ops = {
2291         .lib = &iwl4965_lib,
2292         .hcmd = &iwl4965_hcmd,
2293         .utils = &iwl4965_hcmd_utils,
2294         .led = &iwlagn_led_ops,
2295 };
2296
2297 struct iwl_cfg iwl4965_agn_cfg = {
2298         .name = "Intel(R) Wireless WiFi Link 4965AGN",
2299         .fw_name_pre = IWL4965_FW_PRE,
2300         .ucode_api_max = IWL4965_UCODE_API_MAX,
2301         .ucode_api_min = IWL4965_UCODE_API_MIN,
2302         .sku = IWL_SKU_A|IWL_SKU_G|IWL_SKU_N,
2303         .eeprom_size = IWL4965_EEPROM_IMG_SIZE,
2304         .eeprom_ver = EEPROM_4965_EEPROM_VERSION,
2305         .eeprom_calib_ver = EEPROM_4965_TX_POWER_VERSION,
2306         .ops = &iwl4965_ops,
2307         .num_of_queues = IWL49_NUM_QUEUES,
2308         .num_of_ampdu_queues = IWL49_NUM_AMPDU_QUEUES,
2309         .mod_params = &iwlagn_mod_params,
2310         .valid_tx_ant = ANT_AB,
2311         .valid_rx_ant = ANT_ABC,
2312         .pll_cfg_val = 0,
2313         .set_l0s = true,
2314         .use_bsm = true,
2315         .use_isr_legacy = true,
2316         .ht_greenfield_support = false,
2317         .broken_powersave = true,
2318         .led_compensation = 61,
2319         .chain_noise_num_beacons = IWL4965_CAL_NUM_BEACONS,
2320         .plcp_delta_threshold = IWL_MAX_PLCP_ERR_THRESHOLD_DEF,
2321         .monitor_recover_period = IWL_MONITORING_PERIOD,
2322         .temperature_kelvin = true,
2323         .max_event_log_size = 512,
2324         .tx_power_by_driver = true,
2325         .ucode_tracing = true,
2326         .sensitivity_calib_by_driver = true,
2327         .chain_noise_calib_by_driver = true,
2328         /*
2329          * Force use of chains B and C for scan RX on 5 GHz band
2330          * because the device has off-channel reception on chain A.
2331          */
2332         .scan_rx_antennas[IEEE80211_BAND_5GHZ] = ANT_BC,
2333 };
2334
2335 /* Module firmware */
2336 MODULE_FIRMWARE(IWL4965_MODULE_FIRMWARE(IWL4965_UCODE_API_MAX));
2337