1 /******************************************************************************
3 * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
18 * The full GNU General Public License is included in this distribution in the
19 * file called LICENSE.
21 * Contact Information:
22 * Intel Linux Wireless <ilw@linux.intel.com>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25 *****************************************************************************/
27 #include <linux/kernel.h>
28 #include <linux/module.h>
29 #include <linux/init.h>
30 #include <linux/pci.h>
31 #include <linux/dma-mapping.h>
32 #include <linux/delay.h>
33 #include <linux/skbuff.h>
34 #include <linux/netdevice.h>
35 #include <linux/wireless.h>
36 #include <net/mac80211.h>
37 #include <linux/etherdevice.h>
38 #include <asm/unaligned.h>
40 #include "iwl-eeprom.h"
44 #include "iwl-helpers.h"
45 #include "iwl-calib.h"
48 static int iwl4965_send_tx_power(struct iwl_priv *priv);
49 static int iwl4965_hw_get_temperature(const struct iwl_priv *priv);
51 /* Highest firmware API version supported */
52 #define IWL4965_UCODE_API_MAX 2
54 /* Lowest firmware API version supported */
55 #define IWL4965_UCODE_API_MIN 2
57 #define IWL4965_FW_PRE "iwlwifi-4965-"
58 #define _IWL4965_MODULE_FIRMWARE(api) IWL4965_FW_PRE #api ".ucode"
59 #define IWL4965_MODULE_FIRMWARE(api) _IWL4965_MODULE_FIRMWARE(api)
62 /* module parameters */
63 static struct iwl_mod_params iwl4965_mod_params = {
64 .num_of_queues = IWL49_NUM_QUEUES,
65 .num_of_ampdu_queues = IWL49_NUM_AMPDU_QUEUES,
68 /* the rest are 0 by default */
71 /* check contents of special bootstrap uCode SRAM */
72 static int iwl4965_verify_bsm(struct iwl_priv *priv)
74 __le32 *image = priv->ucode_boot.v_addr;
75 u32 len = priv->ucode_boot.len;
79 IWL_DEBUG_INFO(priv, "Begin verify bsm\n");
81 /* verify BSM SRAM contents */
82 val = iwl_read_prph(priv, BSM_WR_DWCOUNT_REG);
83 for (reg = BSM_SRAM_LOWER_BOUND;
84 reg < BSM_SRAM_LOWER_BOUND + len;
85 reg += sizeof(u32), image++) {
86 val = iwl_read_prph(priv, reg);
87 if (val != le32_to_cpu(*image)) {
88 IWL_ERR(priv, "BSM uCode verification failed at "
89 "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
91 reg - BSM_SRAM_LOWER_BOUND, len,
92 val, le32_to_cpu(*image));
97 IWL_DEBUG_INFO(priv, "BSM bootstrap uCode image OK\n");
103 * iwl4965_load_bsm - Load bootstrap instructions
107 * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
108 * in special SRAM that does not power down during RFKILL. When powering back
109 * up after power-saving sleeps (or during initial uCode load), the BSM loads
110 * the bootstrap program into the on-board processor, and starts it.
112 * The bootstrap program loads (via DMA) instructions and data for a new
113 * program from host DRAM locations indicated by the host driver in the
114 * BSM_DRAM_* registers. Once the new program is loaded, it starts
117 * When initializing the NIC, the host driver points the BSM to the
118 * "initialize" uCode image. This uCode sets up some internal data, then
119 * notifies host via "initialize alive" that it is complete.
121 * The host then replaces the BSM_DRAM_* pointer values to point to the
122 * normal runtime uCode instructions and a backup uCode data cache buffer
123 * (filled initially with starting data values for the on-board processor),
124 * then triggers the "initialize" uCode to load and launch the runtime uCode,
125 * which begins normal operation.
127 * When doing a power-save shutdown, runtime uCode saves data SRAM into
128 * the backup data cache in DRAM before SRAM is powered down.
130 * When powering back up, the BSM loads the bootstrap program. This reloads
131 * the runtime uCode instructions and the backup data cache into SRAM,
132 * and re-launches the runtime uCode from where it left off.
134 static int iwl4965_load_bsm(struct iwl_priv *priv)
136 __le32 *image = priv->ucode_boot.v_addr;
137 u32 len = priv->ucode_boot.len;
147 IWL_DEBUG_INFO(priv, "Begin load bsm\n");
149 priv->ucode_type = UCODE_RT;
151 /* make sure bootstrap program is no larger than BSM's SRAM size */
152 if (len > IWL49_MAX_BSM_SIZE)
155 /* Tell bootstrap uCode where to find the "Initialize" uCode
156 * in host DRAM ... host DRAM physical address bits 35:4 for 4965.
157 * NOTE: iwl_init_alive_start() will replace these values,
158 * after the "initialize" uCode has run, to point to
159 * runtime/protocol instructions and backup data cache.
161 pinst = priv->ucode_init.p_addr >> 4;
162 pdata = priv->ucode_init_data.p_addr >> 4;
163 inst_len = priv->ucode_init.len;
164 data_len = priv->ucode_init_data.len;
166 iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
167 iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
168 iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
169 iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
171 /* Fill BSM memory with bootstrap instructions */
172 for (reg_offset = BSM_SRAM_LOWER_BOUND;
173 reg_offset < BSM_SRAM_LOWER_BOUND + len;
174 reg_offset += sizeof(u32), image++)
175 _iwl_write_prph(priv, reg_offset, le32_to_cpu(*image));
177 ret = iwl4965_verify_bsm(priv);
181 /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
182 iwl_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
183 iwl_write_prph(priv, BSM_WR_MEM_DST_REG, IWL49_RTC_INST_LOWER_BOUND);
184 iwl_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
186 /* Load bootstrap code into instruction SRAM now,
187 * to prepare to load "initialize" uCode */
188 iwl_write_prph(priv, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START);
190 /* Wait for load of bootstrap uCode to finish */
191 for (i = 0; i < 100; i++) {
192 done = iwl_read_prph(priv, BSM_WR_CTRL_REG);
193 if (!(done & BSM_WR_CTRL_REG_BIT_START))
198 IWL_DEBUG_INFO(priv, "BSM write complete, poll %d iterations\n", i);
200 IWL_ERR(priv, "BSM write did not complete!\n");
204 /* Enable future boot loads whenever power management unit triggers it
205 * (e.g. when powering back up after power-save shutdown) */
206 iwl_write_prph(priv, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START_EN);
213 * iwl4965_set_ucode_ptrs - Set uCode address location
215 * Tell initialization uCode where to find runtime uCode.
217 * BSM registers initially contain pointers to initialization uCode.
218 * We need to replace them to load runtime uCode inst and data,
219 * and to save runtime data when powering down.
221 static int iwl4965_set_ucode_ptrs(struct iwl_priv *priv)
227 /* bits 35:4 for 4965 */
228 pinst = priv->ucode_code.p_addr >> 4;
229 pdata = priv->ucode_data_backup.p_addr >> 4;
231 /* Tell bootstrap uCode where to find image to load */
232 iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
233 iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
234 iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
235 priv->ucode_data.len);
237 /* Inst byte count must be last to set up, bit 31 signals uCode
238 * that all new ptr/size info is in place */
239 iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
240 priv->ucode_code.len | BSM_DRAM_INST_LOAD);
241 IWL_DEBUG_INFO(priv, "Runtime uCode pointers are set.\n");
247 * iwl4965_init_alive_start - Called after REPLY_ALIVE notification received
249 * Called after REPLY_ALIVE notification received from "initialize" uCode.
251 * The 4965 "initialize" ALIVE reply contains calibration data for:
252 * Voltage, temperature, and MIMO tx gain correction, now stored in priv
253 * (3945 does not contain this data).
255 * Tell "initialize" uCode to go ahead and load the runtime uCode.
257 static void iwl4965_init_alive_start(struct iwl_priv *priv)
259 /* Check alive response for "valid" sign from uCode */
260 if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
261 /* We had an error bringing up the hardware, so take it
262 * all the way back down so we can try again */
263 IWL_DEBUG_INFO(priv, "Initialize Alive failed.\n");
267 /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
268 * This is a paranoid check, because we would not have gotten the
269 * "initialize" alive if code weren't properly loaded. */
270 if (iwl_verify_ucode(priv)) {
271 /* Runtime instruction load was bad;
272 * take it all the way back down so we can try again */
273 IWL_DEBUG_INFO(priv, "Bad \"initialize\" uCode load.\n");
277 /* Calculate temperature */
278 priv->temperature = iwl4965_hw_get_temperature(priv);
280 /* Send pointers to protocol/runtime uCode image ... init code will
281 * load and launch runtime uCode, which will send us another "Alive"
283 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
284 if (iwl4965_set_ucode_ptrs(priv)) {
285 /* Runtime instruction load won't happen;
286 * take it all the way back down so we can try again */
287 IWL_DEBUG_INFO(priv, "Couldn't set up uCode pointers.\n");
293 queue_work(priv->workqueue, &priv->restart);
296 static int is_fat_channel(__le32 rxon_flags)
298 return (rxon_flags & RXON_FLG_CHANNEL_MODE_PURE_40_MSK) ||
299 (rxon_flags & RXON_FLG_CHANNEL_MODE_MIXED_MSK);
305 static u16 iwl4965_eeprom_calib_version(struct iwl_priv *priv)
307 return iwl_eeprom_query16(priv, EEPROM_4965_CALIB_VERSION_OFFSET);
311 * Activate/Deactivate Tx DMA/FIFO channels according tx fifos mask
312 * must be called under priv->lock and mac access
314 static void iwl4965_txq_set_sched(struct iwl_priv *priv, u32 mask)
316 iwl_write_prph(priv, IWL49_SCD_TXFACT, mask);
319 static int iwl4965_apm_init(struct iwl_priv *priv)
323 iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
324 CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
326 /* disable L0s without affecting L1 :don't wait for ICH L0s bug W/A) */
327 iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
328 CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
330 /* set "initialization complete" bit to move adapter
331 * D0U* --> D0A* state */
332 iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
334 /* wait for clock stabilization */
335 ret = iwl_poll_direct_bit(priv, CSR_GP_CNTRL,
336 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
338 IWL_DEBUG_INFO(priv, "Failed to init the card\n");
343 iwl_write_prph(priv, APMG_CLK_CTRL_REG, APMG_CLK_VAL_DMA_CLK_RQT |
344 APMG_CLK_VAL_BSM_CLK_RQT);
348 /* disable L1-Active */
349 iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
350 APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
357 static void iwl4965_nic_config(struct iwl_priv *priv)
363 spin_lock_irqsave(&priv->lock, flags);
365 lctl = iwl_pcie_link_ctl(priv);
367 /* HW bug W/A - negligible power consumption */
368 /* L1-ASPM is enabled by BIOS */
369 if ((lctl & PCI_CFG_LINK_CTRL_VAL_L1_EN) == PCI_CFG_LINK_CTRL_VAL_L1_EN)
370 /* L1-ASPM enabled: disable L0S */
371 iwl_set_bit(priv, CSR_GIO_REG, CSR_GIO_REG_VAL_L0S_ENABLED);
373 /* L1-ASPM disabled: enable L0S */
374 iwl_clear_bit(priv, CSR_GIO_REG, CSR_GIO_REG_VAL_L0S_ENABLED);
376 radio_cfg = iwl_eeprom_query16(priv, EEPROM_RADIO_CONFIG);
378 /* write radio config values to register */
379 if (EEPROM_RF_CFG_TYPE_MSK(radio_cfg) == EEPROM_4965_RF_CFG_TYPE_MAX)
380 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
381 EEPROM_RF_CFG_TYPE_MSK(radio_cfg) |
382 EEPROM_RF_CFG_STEP_MSK(radio_cfg) |
383 EEPROM_RF_CFG_DASH_MSK(radio_cfg));
385 /* set CSR_HW_CONFIG_REG for uCode use */
386 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
387 CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI |
388 CSR_HW_IF_CONFIG_REG_BIT_MAC_SI);
390 priv->calib_info = (struct iwl_eeprom_calib_info *)
391 iwl_eeprom_query_addr(priv, EEPROM_4965_CALIB_TXPOWER_OFFSET);
393 spin_unlock_irqrestore(&priv->lock, flags);
396 static int iwl4965_apm_stop_master(struct iwl_priv *priv)
400 spin_lock_irqsave(&priv->lock, flags);
402 /* set stop master bit */
403 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
405 iwl_poll_direct_bit(priv, CSR_RESET,
406 CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
408 spin_unlock_irqrestore(&priv->lock, flags);
409 IWL_DEBUG_INFO(priv, "stop master\n");
414 static void iwl4965_apm_stop(struct iwl_priv *priv)
418 iwl4965_apm_stop_master(priv);
420 spin_lock_irqsave(&priv->lock, flags);
422 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
425 /* clear "init complete" move adapter D0A* --> D0U state */
426 iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
427 spin_unlock_irqrestore(&priv->lock, flags);
430 static int iwl4965_apm_reset(struct iwl_priv *priv)
434 iwl4965_apm_stop_master(priv);
437 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
441 /* FIXME: put here L1A -L0S w/a */
443 iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
445 ret = iwl_poll_direct_bit(priv, CSR_GP_CNTRL,
446 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
452 /* Enable DMA and BSM Clock */
453 iwl_write_prph(priv, APMG_CLK_EN_REG, APMG_CLK_VAL_DMA_CLK_RQT |
454 APMG_CLK_VAL_BSM_CLK_RQT);
459 iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
460 APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
462 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
463 wake_up_interruptible(&priv->wait_command_queue);
469 /* Reset differential Rx gains in NIC to prepare for chain noise calibration.
470 * Called after every association, but this runs only once!
471 * ... once chain noise is calibrated the first time, it's good forever. */
472 static void iwl4965_chain_noise_reset(struct iwl_priv *priv)
474 struct iwl_chain_noise_data *data = &(priv->chain_noise_data);
476 if ((data->state == IWL_CHAIN_NOISE_ALIVE) && iwl_is_associated(priv)) {
477 struct iwl_calib_diff_gain_cmd cmd;
479 memset(&cmd, 0, sizeof(cmd));
480 cmd.hdr.op_code = IWL_PHY_CALIBRATE_DIFF_GAIN_CMD;
484 if (iwl_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
487 "Could not send REPLY_PHY_CALIBRATION_CMD\n");
488 data->state = IWL_CHAIN_NOISE_ACCUMULATE;
489 IWL_DEBUG_CALIB(priv, "Run chain_noise_calibrate\n");
493 static void iwl4965_gain_computation(struct iwl_priv *priv,
495 u16 min_average_noise_antenna_i,
496 u32 min_average_noise)
499 struct iwl_chain_noise_data *data = &priv->chain_noise_data;
501 data->delta_gain_code[min_average_noise_antenna_i] = 0;
503 for (i = 0; i < NUM_RX_CHAINS; i++) {
506 if (!(data->disconn_array[i]) &&
507 (data->delta_gain_code[i] ==
508 CHAIN_NOISE_DELTA_GAIN_INIT_VAL)) {
509 delta_g = average_noise[i] - min_average_noise;
510 data->delta_gain_code[i] = (u8)((delta_g * 10) / 15);
511 data->delta_gain_code[i] =
512 min(data->delta_gain_code[i],
513 (u8) CHAIN_NOISE_MAX_DELTA_GAIN_CODE);
515 data->delta_gain_code[i] =
516 (data->delta_gain_code[i] | (1 << 2));
518 data->delta_gain_code[i] = 0;
521 IWL_DEBUG_CALIB(priv, "delta_gain_codes: a %d b %d c %d\n",
522 data->delta_gain_code[0],
523 data->delta_gain_code[1],
524 data->delta_gain_code[2]);
526 /* Differential gain gets sent to uCode only once */
527 if (!data->radio_write) {
528 struct iwl_calib_diff_gain_cmd cmd;
529 data->radio_write = 1;
531 memset(&cmd, 0, sizeof(cmd));
532 cmd.hdr.op_code = IWL_PHY_CALIBRATE_DIFF_GAIN_CMD;
533 cmd.diff_gain_a = data->delta_gain_code[0];
534 cmd.diff_gain_b = data->delta_gain_code[1];
535 cmd.diff_gain_c = data->delta_gain_code[2];
536 ret = iwl_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
539 IWL_DEBUG_CALIB(priv, "fail sending cmd "
540 "REPLY_PHY_CALIBRATION_CMD \n");
542 /* TODO we might want recalculate
543 * rx_chain in rxon cmd */
545 /* Mark so we run this algo only once! */
546 data->state = IWL_CHAIN_NOISE_CALIBRATED;
548 data->chain_noise_a = 0;
549 data->chain_noise_b = 0;
550 data->chain_noise_c = 0;
551 data->chain_signal_a = 0;
552 data->chain_signal_b = 0;
553 data->chain_signal_c = 0;
554 data->beacon_count = 0;
557 static void iwl4965_rts_tx_cmd_flag(struct ieee80211_tx_info *info,
560 if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) {
561 *tx_flags |= TX_CMD_FLG_RTS_MSK;
562 *tx_flags &= ~TX_CMD_FLG_CTS_MSK;
563 } else if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
564 *tx_flags &= ~TX_CMD_FLG_RTS_MSK;
565 *tx_flags |= TX_CMD_FLG_CTS_MSK;
569 static void iwl4965_bg_txpower_work(struct work_struct *work)
571 struct iwl_priv *priv = container_of(work, struct iwl_priv,
574 /* If a scan happened to start before we got here
575 * then just return; the statistics notification will
576 * kick off another scheduled work to compensate for
577 * any temperature delta we missed here. */
578 if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
579 test_bit(STATUS_SCANNING, &priv->status))
582 mutex_lock(&priv->mutex);
584 /* Regardless of if we are associated, we must reconfigure the
585 * TX power since frames can be sent on non-radar channels while
587 iwl4965_send_tx_power(priv);
589 /* Update last_temperature to keep is_calib_needed from running
590 * when it isn't needed... */
591 priv->last_temperature = priv->temperature;
593 mutex_unlock(&priv->mutex);
597 * Acquire priv->lock before calling this function !
599 static void iwl4965_set_wr_ptrs(struct iwl_priv *priv, int txq_id, u32 index)
601 iwl_write_direct32(priv, HBUS_TARG_WRPTR,
602 (index & 0xff) | (txq_id << 8));
603 iwl_write_prph(priv, IWL49_SCD_QUEUE_RDPTR(txq_id), index);
607 * iwl4965_tx_queue_set_status - (optionally) start Tx/Cmd queue
608 * @tx_fifo_id: Tx DMA/FIFO channel (range 0-7) that the queue will feed
609 * @scd_retry: (1) Indicates queue will be used in aggregation mode
611 * NOTE: Acquire priv->lock before calling this function !
613 static void iwl4965_tx_queue_set_status(struct iwl_priv *priv,
614 struct iwl_tx_queue *txq,
615 int tx_fifo_id, int scd_retry)
617 int txq_id = txq->q.id;
619 /* Find out whether to activate Tx queue */
620 int active = test_bit(txq_id, &priv->txq_ctx_active_msk) ? 1 : 0;
622 /* Set up and activate */
623 iwl_write_prph(priv, IWL49_SCD_QUEUE_STATUS_BITS(txq_id),
624 (active << IWL49_SCD_QUEUE_STTS_REG_POS_ACTIVE) |
625 (tx_fifo_id << IWL49_SCD_QUEUE_STTS_REG_POS_TXF) |
626 (scd_retry << IWL49_SCD_QUEUE_STTS_REG_POS_WSL) |
627 (scd_retry << IWL49_SCD_QUEUE_STTS_REG_POS_SCD_ACK) |
628 IWL49_SCD_QUEUE_STTS_REG_MSK);
630 txq->sched_retry = scd_retry;
632 IWL_DEBUG_INFO(priv, "%s %s Queue %d on AC %d\n",
633 active ? "Activate" : "Deactivate",
634 scd_retry ? "BA" : "AC", txq_id, tx_fifo_id);
637 static const u16 default_queue_to_tx_fifo[] = {
647 static int iwl4965_alive_notify(struct iwl_priv *priv)
654 spin_lock_irqsave(&priv->lock, flags);
656 /* Clear 4965's internal Tx Scheduler data base */
657 priv->scd_base_addr = iwl_read_prph(priv, IWL49_SCD_SRAM_BASE_ADDR);
658 a = priv->scd_base_addr + IWL49_SCD_CONTEXT_DATA_OFFSET;
659 for (; a < priv->scd_base_addr + IWL49_SCD_TX_STTS_BITMAP_OFFSET; a += 4)
660 iwl_write_targ_mem(priv, a, 0);
661 for (; a < priv->scd_base_addr + IWL49_SCD_TRANSLATE_TBL_OFFSET; a += 4)
662 iwl_write_targ_mem(priv, a, 0);
663 for (; a < sizeof(u16) * priv->hw_params.max_txq_num; a += 4)
664 iwl_write_targ_mem(priv, a, 0);
666 /* Tel 4965 where to find Tx byte count tables */
667 iwl_write_prph(priv, IWL49_SCD_DRAM_BASE_ADDR,
668 priv->scd_bc_tbls.dma >> 10);
670 /* Enable DMA channel */
671 for (chan = 0; chan < FH49_TCSR_CHNL_NUM ; chan++)
672 iwl_write_direct32(priv, FH_TCSR_CHNL_TX_CONFIG_REG(chan),
673 FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE |
674 FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE);
676 /* Update FH chicken bits */
677 reg_val = iwl_read_direct32(priv, FH_TX_CHICKEN_BITS_REG);
678 iwl_write_direct32(priv, FH_TX_CHICKEN_BITS_REG,
679 reg_val | FH_TX_CHICKEN_BITS_SCD_AUTO_RETRY_EN);
681 /* Disable chain mode for all queues */
682 iwl_write_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, 0);
684 /* Initialize each Tx queue (including the command queue) */
685 for (i = 0; i < priv->hw_params.max_txq_num; i++) {
687 /* TFD circular buffer read/write indexes */
688 iwl_write_prph(priv, IWL49_SCD_QUEUE_RDPTR(i), 0);
689 iwl_write_direct32(priv, HBUS_TARG_WRPTR, 0 | (i << 8));
691 /* Max Tx Window size for Scheduler-ACK mode */
692 iwl_write_targ_mem(priv, priv->scd_base_addr +
693 IWL49_SCD_CONTEXT_QUEUE_OFFSET(i),
695 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
696 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
699 iwl_write_targ_mem(priv, priv->scd_base_addr +
700 IWL49_SCD_CONTEXT_QUEUE_OFFSET(i) +
703 IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS) &
704 IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
707 iwl_write_prph(priv, IWL49_SCD_INTERRUPT_MASK,
708 (1 << priv->hw_params.max_txq_num) - 1);
710 /* Activate all Tx DMA/FIFO channels */
711 priv->cfg->ops->lib->txq_set_sched(priv, IWL_MASK(0, 6));
713 iwl4965_set_wr_ptrs(priv, IWL_CMD_QUEUE_NUM, 0);
715 /* Map each Tx/cmd queue to its corresponding fifo */
716 for (i = 0; i < ARRAY_SIZE(default_queue_to_tx_fifo); i++) {
717 int ac = default_queue_to_tx_fifo[i];
718 iwl_txq_ctx_activate(priv, i);
719 iwl4965_tx_queue_set_status(priv, &priv->txq[i], ac, 0);
722 spin_unlock_irqrestore(&priv->lock, flags);
727 static struct iwl_sensitivity_ranges iwl4965_sensitivity = {
731 .auto_corr_min_ofdm = 85,
732 .auto_corr_min_ofdm_mrc = 170,
733 .auto_corr_min_ofdm_x1 = 105,
734 .auto_corr_min_ofdm_mrc_x1 = 220,
736 .auto_corr_max_ofdm = 120,
737 .auto_corr_max_ofdm_mrc = 210,
738 .auto_corr_max_ofdm_x1 = 140,
739 .auto_corr_max_ofdm_mrc_x1 = 270,
741 .auto_corr_min_cck = 125,
742 .auto_corr_max_cck = 200,
743 .auto_corr_min_cck_mrc = 200,
744 .auto_corr_max_cck_mrc = 400,
750 static void iwl4965_set_ct_threshold(struct iwl_priv *priv)
753 priv->hw_params.ct_kill_threshold = CELSIUS_TO_KELVIN(CT_KILL_THRESHOLD);
757 * iwl4965_hw_set_hw_params
759 * Called when initializing driver
761 static int iwl4965_hw_set_hw_params(struct iwl_priv *priv)
764 if ((priv->cfg->mod_params->num_of_queues > IWL49_NUM_QUEUES) ||
765 (priv->cfg->mod_params->num_of_queues < IWL_MIN_NUM_QUEUES)) {
767 "invalid queues_num, should be between %d and %d\n",
768 IWL_MIN_NUM_QUEUES, IWL49_NUM_QUEUES);
772 priv->hw_params.max_txq_num = priv->cfg->mod_params->num_of_queues;
773 priv->hw_params.dma_chnl_num = FH49_TCSR_CHNL_NUM;
774 priv->hw_params.scd_bc_tbls_size =
775 IWL49_NUM_QUEUES * sizeof(struct iwl4965_scd_bc_tbl);
776 priv->hw_params.tfd_size = sizeof(struct iwl_tfd);
777 priv->hw_params.max_stations = IWL4965_STATION_COUNT;
778 priv->hw_params.bcast_sta_id = IWL4965_BROADCAST_ID;
779 priv->hw_params.max_data_size = IWL49_RTC_DATA_SIZE;
780 priv->hw_params.max_inst_size = IWL49_RTC_INST_SIZE;
781 priv->hw_params.max_bsm_size = BSM_SRAM_SIZE;
782 priv->hw_params.fat_channel = BIT(IEEE80211_BAND_5GHZ);
784 priv->hw_params.rx_wrt_ptr_reg = FH_RSCSR_CHNL0_WPTR;
786 priv->hw_params.tx_chains_num = 2;
787 priv->hw_params.rx_chains_num = 2;
788 priv->hw_params.valid_tx_ant = ANT_A | ANT_B;
789 priv->hw_params.valid_rx_ant = ANT_A | ANT_B;
790 if (priv->cfg->ops->lib->temp_ops.set_ct_kill)
791 priv->cfg->ops->lib->temp_ops.set_ct_kill(priv);
793 priv->hw_params.sens = &iwl4965_sensitivity;
798 static s32 iwl4965_math_div_round(s32 num, s32 denom, s32 *res)
811 *res = ((num * 2 + denom) / (denom * 2)) * sign;
817 * iwl4965_get_voltage_compensation - Power supply voltage comp for txpower
819 * Determines power supply voltage compensation for txpower calculations.
820 * Returns number of 1/2-dB steps to subtract from gain table index,
821 * to compensate for difference between power supply voltage during
822 * factory measurements, vs. current power supply voltage.
824 * Voltage indication is higher for lower voltage.
825 * Lower voltage requires more gain (lower gain table index).
827 static s32 iwl4965_get_voltage_compensation(s32 eeprom_voltage,
832 if ((TX_POWER_IWL_ILLEGAL_VOLTAGE == eeprom_voltage) ||
833 (TX_POWER_IWL_ILLEGAL_VOLTAGE == current_voltage))
836 iwl4965_math_div_round(current_voltage - eeprom_voltage,
837 TX_POWER_IWL_VOLTAGE_CODES_PER_03V, &comp);
839 if (current_voltage > eeprom_voltage)
841 if ((comp < -2) || (comp > 2))
847 static s32 iwl4965_get_tx_atten_grp(u16 channel)
849 if (channel >= CALIB_IWL_TX_ATTEN_GR5_FCH &&
850 channel <= CALIB_IWL_TX_ATTEN_GR5_LCH)
851 return CALIB_CH_GROUP_5;
853 if (channel >= CALIB_IWL_TX_ATTEN_GR1_FCH &&
854 channel <= CALIB_IWL_TX_ATTEN_GR1_LCH)
855 return CALIB_CH_GROUP_1;
857 if (channel >= CALIB_IWL_TX_ATTEN_GR2_FCH &&
858 channel <= CALIB_IWL_TX_ATTEN_GR2_LCH)
859 return CALIB_CH_GROUP_2;
861 if (channel >= CALIB_IWL_TX_ATTEN_GR3_FCH &&
862 channel <= CALIB_IWL_TX_ATTEN_GR3_LCH)
863 return CALIB_CH_GROUP_3;
865 if (channel >= CALIB_IWL_TX_ATTEN_GR4_FCH &&
866 channel <= CALIB_IWL_TX_ATTEN_GR4_LCH)
867 return CALIB_CH_GROUP_4;
872 static u32 iwl4965_get_sub_band(const struct iwl_priv *priv, u32 channel)
876 for (b = 0; b < EEPROM_TX_POWER_BANDS; b++) {
877 if (priv->calib_info->band_info[b].ch_from == 0)
880 if ((channel >= priv->calib_info->band_info[b].ch_from)
881 && (channel <= priv->calib_info->band_info[b].ch_to))
888 static s32 iwl4965_interpolate_value(s32 x, s32 x1, s32 y1, s32 x2, s32 y2)
895 iwl4965_math_div_round((x2 - x) * (y1 - y2), (x2 - x1), &val);
901 * iwl4965_interpolate_chan - Interpolate factory measurements for one channel
903 * Interpolates factory measurements from the two sample channels within a
904 * sub-band, to apply to channel of interest. Interpolation is proportional to
905 * differences in channel frequencies, which is proportional to differences
908 static int iwl4965_interpolate_chan(struct iwl_priv *priv, u32 channel,
909 struct iwl_eeprom_calib_ch_info *chan_info)
914 const struct iwl_eeprom_calib_measure *m1;
915 const struct iwl_eeprom_calib_measure *m2;
916 struct iwl_eeprom_calib_measure *omeas;
920 s = iwl4965_get_sub_band(priv, channel);
921 if (s >= EEPROM_TX_POWER_BANDS) {
922 IWL_ERR(priv, "Tx Power can not find channel %d\n", channel);
926 ch_i1 = priv->calib_info->band_info[s].ch1.ch_num;
927 ch_i2 = priv->calib_info->band_info[s].ch2.ch_num;
928 chan_info->ch_num = (u8) channel;
930 IWL_DEBUG_TXPOWER(priv, "channel %d subband %d factory cal ch %d & %d\n",
931 channel, s, ch_i1, ch_i2);
933 for (c = 0; c < EEPROM_TX_POWER_TX_CHAINS; c++) {
934 for (m = 0; m < EEPROM_TX_POWER_MEASUREMENTS; m++) {
935 m1 = &(priv->calib_info->band_info[s].ch1.
937 m2 = &(priv->calib_info->band_info[s].ch2.
939 omeas = &(chan_info->measurements[c][m]);
942 (u8) iwl4965_interpolate_value(channel, ch_i1,
947 (u8) iwl4965_interpolate_value(channel, ch_i1,
951 (u8) iwl4965_interpolate_value(channel, ch_i1,
956 (s8) iwl4965_interpolate_value(channel, ch_i1,
960 IWL_DEBUG_TXPOWER(priv,
961 "chain %d meas %d AP1=%d AP2=%d AP=%d\n", c, m,
962 m1->actual_pow, m2->actual_pow, omeas->actual_pow);
963 IWL_DEBUG_TXPOWER(priv,
964 "chain %d meas %d NI1=%d NI2=%d NI=%d\n", c, m,
965 m1->gain_idx, m2->gain_idx, omeas->gain_idx);
966 IWL_DEBUG_TXPOWER(priv,
967 "chain %d meas %d PA1=%d PA2=%d PA=%d\n", c, m,
968 m1->pa_det, m2->pa_det, omeas->pa_det);
969 IWL_DEBUG_TXPOWER(priv,
970 "chain %d meas %d T1=%d T2=%d T=%d\n", c, m,
971 m1->temperature, m2->temperature,
979 /* bit-rate-dependent table to prevent Tx distortion, in half-dB units,
980 * for OFDM 6, 12, 18, 24, 36, 48, 54, 60 MBit, and CCK all rates. */
981 static s32 back_off_table[] = {
982 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 20 MHz */
983 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 20 MHz */
984 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 40 MHz */
985 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 40 MHz */
989 /* Thermal compensation values for txpower for various frequency ranges ...
990 * ratios from 3:1 to 4.5:1 of degrees (Celsius) per half-dB gain adjust */
991 static struct iwl4965_txpower_comp_entry {
992 s32 degrees_per_05db_a;
993 s32 degrees_per_05db_a_denom;
994 } tx_power_cmp_tble[CALIB_CH_GROUP_MAX] = {
995 {9, 2}, /* group 0 5.2, ch 34-43 */
996 {4, 1}, /* group 1 5.2, ch 44-70 */
997 {4, 1}, /* group 2 5.2, ch 71-124 */
998 {4, 1}, /* group 3 5.2, ch 125-200 */
999 {3, 1} /* group 4 2.4, ch all */
1002 static s32 get_min_power_index(s32 rate_power_index, u32 band)
1005 if ((rate_power_index & 7) <= 4)
1006 return MIN_TX_GAIN_INDEX_52GHZ_EXT;
1008 return MIN_TX_GAIN_INDEX;
1016 static const struct gain_entry gain_table[2][108] = {
1017 /* 5.2GHz power gain index table */
1019 {123, 0x3F}, /* highest txpower */
1128 /* 2.4GHz power gain index table */
1130 {110, 0x3f}, /* highest txpower */
1241 static int iwl4965_fill_txpower_tbl(struct iwl_priv *priv, u8 band, u16 channel,
1242 u8 is_fat, u8 ctrl_chan_high,
1243 struct iwl4965_tx_power_db *tx_power_tbl)
1245 u8 saturation_power;
1247 s32 user_target_power;
1251 s32 current_regulatory;
1252 s32 txatten_grp = CALIB_CH_GROUP_MAX;
1255 const struct iwl_channel_info *ch_info = NULL;
1256 struct iwl_eeprom_calib_ch_info ch_eeprom_info;
1257 const struct iwl_eeprom_calib_measure *measurement;
1260 s32 voltage_compensation;
1261 s32 degrees_per_05db_num;
1262 s32 degrees_per_05db_denom;
1264 s32 temperature_comp[2];
1265 s32 factory_gain_index[2];
1266 s32 factory_actual_pwr[2];
1269 /* tx_power_user_lmt is in dBm, convert to half-dBm (half-dB units
1270 * are used for indexing into txpower table) */
1271 user_target_power = 2 * priv->tx_power_user_lmt;
1273 /* Get current (RXON) channel, band, width */
1274 IWL_DEBUG_TXPOWER(priv, "chan %d band %d is_fat %d\n", channel, band,
1277 ch_info = iwl_get_channel_info(priv, priv->band, channel);
1279 if (!is_channel_valid(ch_info))
1282 /* get txatten group, used to select 1) thermal txpower adjustment
1283 * and 2) mimo txpower balance between Tx chains. */
1284 txatten_grp = iwl4965_get_tx_atten_grp(channel);
1285 if (txatten_grp < 0) {
1286 IWL_ERR(priv, "Can't find txatten group for channel %d.\n",
1291 IWL_DEBUG_TXPOWER(priv, "channel %d belongs to txatten group %d\n",
1292 channel, txatten_grp);
1301 /* hardware txpower limits ...
1302 * saturation (clipping distortion) txpowers are in half-dBm */
1304 saturation_power = priv->calib_info->saturation_power24;
1306 saturation_power = priv->calib_info->saturation_power52;
1308 if (saturation_power < IWL_TX_POWER_SATURATION_MIN ||
1309 saturation_power > IWL_TX_POWER_SATURATION_MAX) {
1311 saturation_power = IWL_TX_POWER_DEFAULT_SATURATION_24;
1313 saturation_power = IWL_TX_POWER_DEFAULT_SATURATION_52;
1316 /* regulatory txpower limits ... reg_limit values are in half-dBm,
1317 * max_power_avg values are in dBm, convert * 2 */
1319 reg_limit = ch_info->fat_max_power_avg * 2;
1321 reg_limit = ch_info->max_power_avg * 2;
1323 if ((reg_limit < IWL_TX_POWER_REGULATORY_MIN) ||
1324 (reg_limit > IWL_TX_POWER_REGULATORY_MAX)) {
1326 reg_limit = IWL_TX_POWER_DEFAULT_REGULATORY_24;
1328 reg_limit = IWL_TX_POWER_DEFAULT_REGULATORY_52;
1331 /* Interpolate txpower calibration values for this channel,
1332 * based on factory calibration tests on spaced channels. */
1333 iwl4965_interpolate_chan(priv, channel, &ch_eeprom_info);
1335 /* calculate tx gain adjustment based on power supply voltage */
1336 voltage = priv->calib_info->voltage;
1337 init_voltage = (s32)le32_to_cpu(priv->card_alive_init.voltage);
1338 voltage_compensation =
1339 iwl4965_get_voltage_compensation(voltage, init_voltage);
1341 IWL_DEBUG_TXPOWER(priv, "curr volt %d eeprom volt %d volt comp %d\n",
1343 voltage, voltage_compensation);
1345 /* get current temperature (Celsius) */
1346 current_temp = max(priv->temperature, IWL_TX_POWER_TEMPERATURE_MIN);
1347 current_temp = min(priv->temperature, IWL_TX_POWER_TEMPERATURE_MAX);
1348 current_temp = KELVIN_TO_CELSIUS(current_temp);
1350 /* select thermal txpower adjustment params, based on channel group
1351 * (same frequency group used for mimo txatten adjustment) */
1352 degrees_per_05db_num =
1353 tx_power_cmp_tble[txatten_grp].degrees_per_05db_a;
1354 degrees_per_05db_denom =
1355 tx_power_cmp_tble[txatten_grp].degrees_per_05db_a_denom;
1357 /* get per-chain txpower values from factory measurements */
1358 for (c = 0; c < 2; c++) {
1359 measurement = &ch_eeprom_info.measurements[c][1];
1361 /* txgain adjustment (in half-dB steps) based on difference
1362 * between factory and current temperature */
1363 factory_temp = measurement->temperature;
1364 iwl4965_math_div_round((current_temp - factory_temp) *
1365 degrees_per_05db_denom,
1366 degrees_per_05db_num,
1367 &temperature_comp[c]);
1369 factory_gain_index[c] = measurement->gain_idx;
1370 factory_actual_pwr[c] = measurement->actual_pow;
1372 IWL_DEBUG_TXPOWER(priv, "chain = %d\n", c);
1373 IWL_DEBUG_TXPOWER(priv, "fctry tmp %d, "
1374 "curr tmp %d, comp %d steps\n",
1375 factory_temp, current_temp,
1376 temperature_comp[c]);
1378 IWL_DEBUG_TXPOWER(priv, "fctry idx %d, fctry pwr %d\n",
1379 factory_gain_index[c],
1380 factory_actual_pwr[c]);
1383 /* for each of 33 bit-rates (including 1 for CCK) */
1384 for (i = 0; i < POWER_TABLE_NUM_ENTRIES; i++) {
1386 union iwl4965_tx_power_dual_stream tx_power;
1388 /* for mimo, reduce each chain's txpower by half
1389 * (3dB, 6 steps), so total output power is regulatory
1392 current_regulatory = reg_limit -
1393 IWL_TX_POWER_MIMO_REGULATORY_COMPENSATION;
1396 current_regulatory = reg_limit;
1400 /* find txpower limit, either hardware or regulatory */
1401 power_limit = saturation_power - back_off_table[i];
1402 if (power_limit > current_regulatory)
1403 power_limit = current_regulatory;
1405 /* reduce user's txpower request if necessary
1406 * for this rate on this channel */
1407 target_power = user_target_power;
1408 if (target_power > power_limit)
1409 target_power = power_limit;
1411 IWL_DEBUG_TXPOWER(priv, "rate %d sat %d reg %d usr %d tgt %d\n",
1412 i, saturation_power - back_off_table[i],
1413 current_regulatory, user_target_power,
1416 /* for each of 2 Tx chains (radio transmitters) */
1417 for (c = 0; c < 2; c++) {
1422 (s32)le32_to_cpu(priv->card_alive_init.
1423 tx_atten[txatten_grp][c]);
1427 /* calculate index; higher index means lower txpower */
1428 power_index = (u8) (factory_gain_index[c] -
1430 factory_actual_pwr[c]) -
1431 temperature_comp[c] -
1432 voltage_compensation +
1435 /* IWL_DEBUG_TXPOWER(priv, "calculated txpower index %d\n",
1438 if (power_index < get_min_power_index(i, band))
1439 power_index = get_min_power_index(i, band);
1441 /* adjust 5 GHz index to support negative indexes */
1445 /* CCK, rate 32, reduce txpower for CCK */
1446 if (i == POWER_TABLE_CCK_ENTRY)
1448 IWL_TX_POWER_CCK_COMPENSATION_C_STEP;
1450 /* stay within the table! */
1451 if (power_index > 107) {
1452 IWL_WARN(priv, "txpower index %d > 107\n",
1456 if (power_index < 0) {
1457 IWL_WARN(priv, "txpower index %d < 0\n",
1462 /* fill txpower command for this rate/chain */
1463 tx_power.s.radio_tx_gain[c] =
1464 gain_table[band][power_index].radio;
1465 tx_power.s.dsp_predis_atten[c] =
1466 gain_table[band][power_index].dsp;
1468 IWL_DEBUG_TXPOWER(priv, "chain %d mimo %d index %d "
1469 "gain 0x%02x dsp %d\n",
1470 c, atten_value, power_index,
1471 tx_power.s.radio_tx_gain[c],
1472 tx_power.s.dsp_predis_atten[c]);
1473 } /* for each chain */
1475 tx_power_tbl->power_tbl[i].dw = cpu_to_le32(tx_power.dw);
1477 } /* for each rate */
1483 * iwl4965_send_tx_power - Configure the TXPOWER level user limit
1485 * Uses the active RXON for channel, band, and characteristics (fat, high)
1486 * The power limit is taken from priv->tx_power_user_lmt.
1488 static int iwl4965_send_tx_power(struct iwl_priv *priv)
1490 struct iwl4965_txpowertable_cmd cmd = { 0 };
1494 u8 ctrl_chan_high = 0;
1496 if (test_bit(STATUS_SCANNING, &priv->status)) {
1497 /* If this gets hit a lot, switch it to a BUG() and catch
1498 * the stack trace to find out who is calling this during
1500 IWL_WARN(priv, "TX Power requested while scanning!\n");
1504 band = priv->band == IEEE80211_BAND_2GHZ;
1506 is_fat = is_fat_channel(priv->active_rxon.flags);
1509 (priv->active_rxon.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
1513 cmd.channel = priv->active_rxon.channel;
1515 ret = iwl4965_fill_txpower_tbl(priv, band,
1516 le16_to_cpu(priv->active_rxon.channel),
1517 is_fat, ctrl_chan_high, &cmd.tx_power);
1521 ret = iwl_send_cmd_pdu(priv, REPLY_TX_PWR_TABLE_CMD, sizeof(cmd), &cmd);
1527 static int iwl4965_send_rxon_assoc(struct iwl_priv *priv)
1530 struct iwl4965_rxon_assoc_cmd rxon_assoc;
1531 const struct iwl_rxon_cmd *rxon1 = &priv->staging_rxon;
1532 const struct iwl_rxon_cmd *rxon2 = &priv->active_rxon;
1534 if ((rxon1->flags == rxon2->flags) &&
1535 (rxon1->filter_flags == rxon2->filter_flags) &&
1536 (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
1537 (rxon1->ofdm_ht_single_stream_basic_rates ==
1538 rxon2->ofdm_ht_single_stream_basic_rates) &&
1539 (rxon1->ofdm_ht_dual_stream_basic_rates ==
1540 rxon2->ofdm_ht_dual_stream_basic_rates) &&
1541 (rxon1->rx_chain == rxon2->rx_chain) &&
1542 (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
1543 IWL_DEBUG_INFO(priv, "Using current RXON_ASSOC. Not resending.\n");
1547 rxon_assoc.flags = priv->staging_rxon.flags;
1548 rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
1549 rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
1550 rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
1551 rxon_assoc.reserved = 0;
1552 rxon_assoc.ofdm_ht_single_stream_basic_rates =
1553 priv->staging_rxon.ofdm_ht_single_stream_basic_rates;
1554 rxon_assoc.ofdm_ht_dual_stream_basic_rates =
1555 priv->staging_rxon.ofdm_ht_dual_stream_basic_rates;
1556 rxon_assoc.rx_chain_select_flags = priv->staging_rxon.rx_chain;
1558 ret = iwl_send_cmd_pdu_async(priv, REPLY_RXON_ASSOC,
1559 sizeof(rxon_assoc), &rxon_assoc, NULL);
1566 #ifdef IEEE80211_CONF_CHANNEL_SWITCH
1567 static int iwl4965_hw_channel_switch(struct iwl_priv *priv, u16 channel)
1572 u8 ctrl_chan_high = 0;
1573 struct iwl4965_channel_switch_cmd cmd = { 0 };
1574 const struct iwl_channel_info *ch_info;
1576 band = priv->band == IEEE80211_BAND_2GHZ;
1578 ch_info = iwl_get_channel_info(priv, priv->band, channel);
1580 is_fat = is_fat_channel(priv->staging_rxon.flags);
1583 (priv->active_rxon.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
1587 cmd.expect_beacon = 0;
1588 cmd.channel = cpu_to_le16(channel);
1589 cmd.rxon_flags = priv->active_rxon.flags;
1590 cmd.rxon_filter_flags = priv->active_rxon.filter_flags;
1591 cmd.switch_time = cpu_to_le32(priv->ucode_beacon_time);
1593 cmd.expect_beacon = is_channel_radar(ch_info);
1595 cmd.expect_beacon = 1;
1597 rc = iwl4965_fill_txpower_tbl(priv, band, channel, is_fat,
1598 ctrl_chan_high, &cmd.tx_power);
1600 IWL_DEBUG_11H(priv, "error:%d fill txpower_tbl\n", rc);
1604 rc = iwl_send_cmd_pdu(priv, REPLY_CHANNEL_SWITCH, sizeof(cmd), &cmd);
1610 * iwl4965_txq_update_byte_cnt_tbl - Set up entry in Tx byte-count array
1612 static void iwl4965_txq_update_byte_cnt_tbl(struct iwl_priv *priv,
1613 struct iwl_tx_queue *txq,
1616 struct iwl4965_scd_bc_tbl *scd_bc_tbl = priv->scd_bc_tbls.addr;
1617 int txq_id = txq->q.id;
1618 int write_ptr = txq->q.write_ptr;
1619 int len = byte_cnt + IWL_TX_CRC_SIZE + IWL_TX_DELIMITER_SIZE;
1622 WARN_ON(len > 0xFFF || write_ptr >= TFD_QUEUE_SIZE_MAX);
1624 bc_ent = cpu_to_le16(len & 0xFFF);
1625 /* Set up byte count within first 256 entries */
1626 scd_bc_tbl[txq_id].tfd_offset[write_ptr] = bc_ent;
1628 /* If within first 64 entries, duplicate at end */
1629 if (write_ptr < TFD_QUEUE_SIZE_BC_DUP)
1631 tfd_offset[TFD_QUEUE_SIZE_MAX + write_ptr] = bc_ent;
1635 * sign_extend - Sign extend a value using specified bit as sign-bit
1637 * Example: sign_extend(9, 3) would return -7 as bit3 of 1001b is 1
1638 * and bit0..2 is 001b which when sign extended to 1111111111111001b is -7.
1640 * @param oper value to sign extend
1641 * @param index 0 based bit index (0<=index<32) to sign bit
1643 static s32 sign_extend(u32 oper, int index)
1645 u8 shift = 31 - index;
1647 return (s32)(oper << shift) >> shift;
1651 * iwl4965_hw_get_temperature - return the calibrated temperature (in Kelvin)
1652 * @statistics: Provides the temperature reading from the uCode
1654 * A return of <0 indicates bogus data in the statistics
1656 static int iwl4965_hw_get_temperature(const struct iwl_priv *priv)
1663 if (test_bit(STATUS_TEMPERATURE, &priv->status) &&
1664 (priv->statistics.flag & STATISTICS_REPLY_FLG_FAT_MODE_MSK)) {
1665 IWL_DEBUG_TEMP(priv, "Running FAT temperature calibration\n");
1666 R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[1]);
1667 R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[1]);
1668 R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[1]);
1669 R4 = le32_to_cpu(priv->card_alive_init.therm_r4[1]);
1671 IWL_DEBUG_TEMP(priv, "Running temperature calibration\n");
1672 R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[0]);
1673 R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[0]);
1674 R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[0]);
1675 R4 = le32_to_cpu(priv->card_alive_init.therm_r4[0]);
1679 * Temperature is only 23 bits, so sign extend out to 32.
1681 * NOTE If we haven't received a statistics notification yet
1682 * with an updated temperature, use R4 provided to us in the
1683 * "initialize" ALIVE response.
1685 if (!test_bit(STATUS_TEMPERATURE, &priv->status))
1686 vt = sign_extend(R4, 23);
1689 le32_to_cpu(priv->statistics.general.temperature), 23);
1691 IWL_DEBUG_TEMP(priv, "Calib values R[1-3]: %d %d %d R4: %d\n", R1, R2, R3, vt);
1694 IWL_ERR(priv, "Calibration conflict R1 == R3\n");
1698 /* Calculate temperature in degrees Kelvin, adjust by 97%.
1699 * Add offset to center the adjustment around 0 degrees Centigrade. */
1700 temperature = TEMPERATURE_CALIB_A_VAL * (vt - R2);
1701 temperature /= (R3 - R1);
1702 temperature = (temperature * 97) / 100 + TEMPERATURE_CALIB_KELVIN_OFFSET;
1704 IWL_DEBUG_TEMP(priv, "Calibrated temperature: %dK, %dC\n",
1705 temperature, KELVIN_TO_CELSIUS(temperature));
1710 /* Adjust Txpower only if temperature variance is greater than threshold. */
1711 #define IWL_TEMPERATURE_THRESHOLD 3
1714 * iwl4965_is_temp_calib_needed - determines if new calibration is needed
1716 * If the temperature changed has changed sufficiently, then a recalibration
1719 * Assumes caller will replace priv->last_temperature once calibration
1722 static int iwl4965_is_temp_calib_needed(struct iwl_priv *priv)
1726 if (!test_bit(STATUS_STATISTICS, &priv->status)) {
1727 IWL_DEBUG_TEMP(priv, "Temperature not updated -- no statistics.\n");
1731 temp_diff = priv->temperature - priv->last_temperature;
1733 /* get absolute value */
1734 if (temp_diff < 0) {
1735 IWL_DEBUG_POWER(priv, "Getting cooler, delta %d, \n", temp_diff);
1736 temp_diff = -temp_diff;
1737 } else if (temp_diff == 0)
1738 IWL_DEBUG_POWER(priv, "Same temp, \n");
1740 IWL_DEBUG_POWER(priv, "Getting warmer, delta %d, \n", temp_diff);
1742 if (temp_diff < IWL_TEMPERATURE_THRESHOLD) {
1743 IWL_DEBUG_POWER(priv, "Thermal txpower calib not needed\n");
1747 IWL_DEBUG_POWER(priv, "Thermal txpower calib needed\n");
1752 static void iwl4965_temperature_calib(struct iwl_priv *priv)
1756 temp = iwl4965_hw_get_temperature(priv);
1760 if (priv->temperature != temp) {
1761 if (priv->temperature)
1762 IWL_DEBUG_TEMP(priv, "Temperature changed "
1763 "from %dC to %dC\n",
1764 KELVIN_TO_CELSIUS(priv->temperature),
1765 KELVIN_TO_CELSIUS(temp));
1767 IWL_DEBUG_TEMP(priv, "Temperature "
1768 "initialized to %dC\n",
1769 KELVIN_TO_CELSIUS(temp));
1772 priv->temperature = temp;
1773 set_bit(STATUS_TEMPERATURE, &priv->status);
1775 if (!priv->disable_tx_power_cal &&
1776 unlikely(!test_bit(STATUS_SCANNING, &priv->status)) &&
1777 iwl4965_is_temp_calib_needed(priv))
1778 queue_work(priv->workqueue, &priv->txpower_work);
1782 * iwl4965_tx_queue_stop_scheduler - Stop queue, but keep configuration
1784 static void iwl4965_tx_queue_stop_scheduler(struct iwl_priv *priv,
1787 /* Simply stop the queue, but don't change any configuration;
1788 * the SCD_ACT_EN bit is the write-enable mask for the ACTIVE bit. */
1789 iwl_write_prph(priv,
1790 IWL49_SCD_QUEUE_STATUS_BITS(txq_id),
1791 (0 << IWL49_SCD_QUEUE_STTS_REG_POS_ACTIVE)|
1792 (1 << IWL49_SCD_QUEUE_STTS_REG_POS_SCD_ACT_EN));
1796 * txq_id must be greater than IWL49_FIRST_AMPDU_QUEUE
1797 * priv->lock must be held by the caller
1799 static int iwl4965_txq_agg_disable(struct iwl_priv *priv, u16 txq_id,
1800 u16 ssn_idx, u8 tx_fifo)
1802 if ((IWL49_FIRST_AMPDU_QUEUE > txq_id) ||
1803 (IWL49_FIRST_AMPDU_QUEUE + IWL49_NUM_AMPDU_QUEUES <= txq_id)) {
1805 "queue number out of range: %d, must be %d to %d\n",
1806 txq_id, IWL49_FIRST_AMPDU_QUEUE,
1807 IWL49_FIRST_AMPDU_QUEUE + IWL49_NUM_AMPDU_QUEUES - 1);
1811 iwl4965_tx_queue_stop_scheduler(priv, txq_id);
1813 iwl_clear_bits_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, (1 << txq_id));
1815 priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
1816 priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
1817 /* supposes that ssn_idx is valid (!= 0xFFF) */
1818 iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
1820 iwl_clear_bits_prph(priv, IWL49_SCD_INTERRUPT_MASK, (1 << txq_id));
1821 iwl_txq_ctx_deactivate(priv, txq_id);
1822 iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 0);
1828 * iwl4965_tx_queue_set_q2ratid - Map unique receiver/tid combination to a queue
1830 static int iwl4965_tx_queue_set_q2ratid(struct iwl_priv *priv, u16 ra_tid,
1837 scd_q2ratid = ra_tid & IWL_SCD_QUEUE_RA_TID_MAP_RATID_MSK;
1839 tbl_dw_addr = priv->scd_base_addr +
1840 IWL49_SCD_TRANSLATE_TBL_OFFSET_QUEUE(txq_id);
1842 tbl_dw = iwl_read_targ_mem(priv, tbl_dw_addr);
1845 tbl_dw = (scd_q2ratid << 16) | (tbl_dw & 0x0000FFFF);
1847 tbl_dw = scd_q2ratid | (tbl_dw & 0xFFFF0000);
1849 iwl_write_targ_mem(priv, tbl_dw_addr, tbl_dw);
1856 * iwl4965_tx_queue_agg_enable - Set up & enable aggregation for selected queue
1858 * NOTE: txq_id must be greater than IWL49_FIRST_AMPDU_QUEUE,
1859 * i.e. it must be one of the higher queues used for aggregation
1861 static int iwl4965_txq_agg_enable(struct iwl_priv *priv, int txq_id,
1862 int tx_fifo, int sta_id, int tid, u16 ssn_idx)
1864 unsigned long flags;
1867 if ((IWL49_FIRST_AMPDU_QUEUE > txq_id) ||
1868 (IWL49_FIRST_AMPDU_QUEUE + IWL49_NUM_AMPDU_QUEUES <= txq_id)) {
1870 "queue number out of range: %d, must be %d to %d\n",
1871 txq_id, IWL49_FIRST_AMPDU_QUEUE,
1872 IWL49_FIRST_AMPDU_QUEUE + IWL49_NUM_AMPDU_QUEUES - 1);
1876 ra_tid = BUILD_RAxTID(sta_id, tid);
1878 /* Modify device's station table to Tx this TID */
1879 iwl_sta_tx_modify_enable_tid(priv, sta_id, tid);
1881 spin_lock_irqsave(&priv->lock, flags);
1883 /* Stop this Tx queue before configuring it */
1884 iwl4965_tx_queue_stop_scheduler(priv, txq_id);
1886 /* Map receiver-address / traffic-ID to this queue */
1887 iwl4965_tx_queue_set_q2ratid(priv, ra_tid, txq_id);
1889 /* Set this queue as a chain-building queue */
1890 iwl_set_bits_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, (1 << txq_id));
1892 /* Place first TFD at index corresponding to start sequence number.
1893 * Assumes that ssn_idx is valid (!= 0xFFF) */
1894 priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
1895 priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
1896 iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
1898 /* Set up Tx window size and frame limit for this queue */
1899 iwl_write_targ_mem(priv,
1900 priv->scd_base_addr + IWL49_SCD_CONTEXT_QUEUE_OFFSET(txq_id),
1901 (SCD_WIN_SIZE << IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
1902 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
1904 iwl_write_targ_mem(priv, priv->scd_base_addr +
1905 IWL49_SCD_CONTEXT_QUEUE_OFFSET(txq_id) + sizeof(u32),
1906 (SCD_FRAME_LIMIT << IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS)
1907 & IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
1909 iwl_set_bits_prph(priv, IWL49_SCD_INTERRUPT_MASK, (1 << txq_id));
1911 /* Set up Status area in SRAM, map to Tx DMA/FIFO, activate the queue */
1912 iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 1);
1914 spin_unlock_irqrestore(&priv->lock, flags);
1920 static u16 iwl4965_get_hcmd_size(u8 cmd_id, u16 len)
1924 return (u16) sizeof(struct iwl4965_rxon_cmd);
1930 static u16 iwl4965_build_addsta_hcmd(const struct iwl_addsta_cmd *cmd, u8 *data)
1932 struct iwl4965_addsta_cmd *addsta = (struct iwl4965_addsta_cmd *)data;
1933 addsta->mode = cmd->mode;
1934 memcpy(&addsta->sta, &cmd->sta, sizeof(struct sta_id_modify));
1935 memcpy(&addsta->key, &cmd->key, sizeof(struct iwl4965_keyinfo));
1936 addsta->station_flags = cmd->station_flags;
1937 addsta->station_flags_msk = cmd->station_flags_msk;
1938 addsta->tid_disable_tx = cmd->tid_disable_tx;
1939 addsta->add_immediate_ba_tid = cmd->add_immediate_ba_tid;
1940 addsta->remove_immediate_ba_tid = cmd->remove_immediate_ba_tid;
1941 addsta->add_immediate_ba_ssn = cmd->add_immediate_ba_ssn;
1942 addsta->reserved1 = cpu_to_le16(0);
1943 addsta->reserved2 = cpu_to_le32(0);
1945 return (u16)sizeof(struct iwl4965_addsta_cmd);
1948 static inline u32 iwl4965_get_scd_ssn(struct iwl4965_tx_resp *tx_resp)
1950 return le32_to_cpup(&tx_resp->u.status + tx_resp->frame_count) & MAX_SN;
1954 * iwl4965_tx_status_reply_tx - Handle Tx response for frames in aggregation queue
1956 static int iwl4965_tx_status_reply_tx(struct iwl_priv *priv,
1957 struct iwl_ht_agg *agg,
1958 struct iwl4965_tx_resp *tx_resp,
1959 int txq_id, u16 start_idx)
1962 struct agg_tx_status *frame_status = tx_resp->u.agg_status;
1963 struct ieee80211_tx_info *info = NULL;
1964 struct ieee80211_hdr *hdr = NULL;
1965 u32 rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
1968 if (agg->wait_for_ba)
1969 IWL_DEBUG_TX_REPLY(priv, "got tx response w/o block-ack\n");
1971 agg->frame_count = tx_resp->frame_count;
1972 agg->start_idx = start_idx;
1973 agg->rate_n_flags = rate_n_flags;
1976 /* num frames attempted by Tx command */
1977 if (agg->frame_count == 1) {
1978 /* Only one frame was attempted; no block-ack will arrive */
1979 status = le16_to_cpu(frame_status[0].status);
1982 /* FIXME: code repetition */
1983 IWL_DEBUG_TX_REPLY(priv, "FrameCnt = %d, StartIdx=%d idx=%d\n",
1984 agg->frame_count, agg->start_idx, idx);
1986 info = IEEE80211_SKB_CB(priv->txq[txq_id].txb[idx].skb[0]);
1987 info->status.rates[0].count = tx_resp->failure_frame + 1;
1988 info->flags &= ~IEEE80211_TX_CTL_AMPDU;
1989 info->flags |= iwl_is_tx_success(status) ?
1990 IEEE80211_TX_STAT_ACK : 0;
1991 iwl_hwrate_to_tx_control(priv, rate_n_flags, info);
1992 /* FIXME: code repetition end */
1994 IWL_DEBUG_TX_REPLY(priv, "1 Frame 0x%x failure :%d\n",
1995 status & 0xff, tx_resp->failure_frame);
1996 IWL_DEBUG_TX_REPLY(priv, "Rate Info rate_n_flags=%x\n", rate_n_flags);
1998 agg->wait_for_ba = 0;
2000 /* Two or more frames were attempted; expect block-ack */
2002 int start = agg->start_idx;
2004 /* Construct bit-map of pending frames within Tx window */
2005 for (i = 0; i < agg->frame_count; i++) {
2007 status = le16_to_cpu(frame_status[i].status);
2008 seq = le16_to_cpu(frame_status[i].sequence);
2009 idx = SEQ_TO_INDEX(seq);
2010 txq_id = SEQ_TO_QUEUE(seq);
2012 if (status & (AGG_TX_STATE_FEW_BYTES_MSK |
2013 AGG_TX_STATE_ABORT_MSK))
2016 IWL_DEBUG_TX_REPLY(priv, "FrameCnt = %d, txq_id=%d idx=%d\n",
2017 agg->frame_count, txq_id, idx);
2019 hdr = iwl_tx_queue_get_hdr(priv, txq_id, idx);
2021 sc = le16_to_cpu(hdr->seq_ctrl);
2022 if (idx != (SEQ_TO_SN(sc) & 0xff)) {
2024 "BUG_ON idx doesn't match seq control"
2025 " idx=%d, seq_idx=%d, seq=%d\n",
2026 idx, SEQ_TO_SN(sc), hdr->seq_ctrl);
2030 IWL_DEBUG_TX_REPLY(priv, "AGG Frame i=%d idx %d seq=%d\n",
2031 i, idx, SEQ_TO_SN(sc));
2035 sh = (start - idx) + 0xff;
2036 bitmap = bitmap << sh;
2039 } else if (sh < -64)
2040 sh = 0xff - (start - idx);
2044 bitmap = bitmap << sh;
2047 bitmap |= 1ULL << sh;
2048 IWL_DEBUG_TX_REPLY(priv, "start=%d bitmap=0x%llx\n",
2049 start, (unsigned long long)bitmap);
2052 agg->bitmap = bitmap;
2053 agg->start_idx = start;
2054 IWL_DEBUG_TX_REPLY(priv, "Frames %d start_idx=%d bitmap=0x%llx\n",
2055 agg->frame_count, agg->start_idx,
2056 (unsigned long long)agg->bitmap);
2059 agg->wait_for_ba = 1;
2065 * iwl4965_rx_reply_tx - Handle standard (non-aggregation) Tx response
2067 static void iwl4965_rx_reply_tx(struct iwl_priv *priv,
2068 struct iwl_rx_mem_buffer *rxb)
2070 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
2071 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
2072 int txq_id = SEQ_TO_QUEUE(sequence);
2073 int index = SEQ_TO_INDEX(sequence);
2074 struct iwl_tx_queue *txq = &priv->txq[txq_id];
2075 struct ieee80211_hdr *hdr;
2076 struct ieee80211_tx_info *info;
2077 struct iwl4965_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
2078 u32 status = le32_to_cpu(tx_resp->u.status);
2079 int tid = MAX_TID_COUNT;
2084 if ((index >= txq->q.n_bd) || (iwl_queue_used(&txq->q, index) == 0)) {
2085 IWL_ERR(priv, "Read index for DMA queue txq_id (%d) index %d "
2086 "is out of range [0-%d] %d %d\n", txq_id,
2087 index, txq->q.n_bd, txq->q.write_ptr,
2092 info = IEEE80211_SKB_CB(txq->txb[txq->q.read_ptr].skb[0]);
2093 memset(&info->status, 0, sizeof(info->status));
2095 hdr = iwl_tx_queue_get_hdr(priv, txq_id, index);
2096 if (ieee80211_is_data_qos(hdr->frame_control)) {
2097 qc = ieee80211_get_qos_ctl(hdr);
2101 sta_id = iwl_get_ra_sta_id(priv, hdr);
2102 if (txq->sched_retry && unlikely(sta_id == IWL_INVALID_STATION)) {
2103 IWL_ERR(priv, "Station not known\n");
2107 if (txq->sched_retry) {
2108 const u32 scd_ssn = iwl4965_get_scd_ssn(tx_resp);
2109 struct iwl_ht_agg *agg = NULL;
2113 agg = &priv->stations[sta_id].tid[tid].agg;
2115 iwl4965_tx_status_reply_tx(priv, agg, tx_resp, txq_id, index);
2117 /* check if BAR is needed */
2118 if ((tx_resp->frame_count == 1) && !iwl_is_tx_success(status))
2119 info->flags |= IEEE80211_TX_STAT_AMPDU_NO_BACK;
2121 if (txq->q.read_ptr != (scd_ssn & 0xff)) {
2122 index = iwl_queue_dec_wrap(scd_ssn & 0xff, txq->q.n_bd);
2123 IWL_DEBUG_TX_REPLY(priv, "Retry scheduler reclaim scd_ssn "
2124 "%d index %d\n", scd_ssn , index);
2125 freed = iwl_tx_queue_reclaim(priv, txq_id, index);
2126 priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
2128 if (priv->mac80211_registered &&
2129 (iwl_queue_space(&txq->q) > txq->q.low_mark) &&
2130 (agg->state != IWL_EMPTYING_HW_QUEUE_DELBA)) {
2131 if (agg->state == IWL_AGG_OFF)
2132 iwl_wake_queue(priv, txq_id);
2134 iwl_wake_queue(priv, txq->swq_id);
2138 info->status.rates[0].count = tx_resp->failure_frame + 1;
2139 info->flags |= iwl_is_tx_success(status) ?
2140 IEEE80211_TX_STAT_ACK : 0;
2141 iwl_hwrate_to_tx_control(priv,
2142 le32_to_cpu(tx_resp->rate_n_flags),
2145 IWL_DEBUG_TX_REPLY(priv, "TXQ %d status %s (0x%08x) "
2146 "rate_n_flags 0x%x retries %d\n",
2148 iwl_get_tx_fail_reason(status), status,
2149 le32_to_cpu(tx_resp->rate_n_flags),
2150 tx_resp->failure_frame);
2152 freed = iwl_tx_queue_reclaim(priv, txq_id, index);
2153 if (qc && likely(sta_id != IWL_INVALID_STATION))
2154 priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
2156 if (priv->mac80211_registered &&
2157 (iwl_queue_space(&txq->q) > txq->q.low_mark))
2158 iwl_wake_queue(priv, txq_id);
2161 if (qc && likely(sta_id != IWL_INVALID_STATION))
2162 iwl_txq_check_empty(priv, sta_id, tid, txq_id);
2164 if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
2165 IWL_ERR(priv, "TODO: Implement Tx ABORT REQUIRED!!!\n");
2168 static int iwl4965_calc_rssi(struct iwl_priv *priv,
2169 struct iwl_rx_phy_res *rx_resp)
2171 /* data from PHY/DSP regarding signal strength, etc.,
2172 * contents are always there, not configurable by host. */
2173 struct iwl4965_rx_non_cfg_phy *ncphy =
2174 (struct iwl4965_rx_non_cfg_phy *)rx_resp->non_cfg_phy_buf;
2175 u32 agc = (le16_to_cpu(ncphy->agc_info) & IWL49_AGC_DB_MASK)
2176 >> IWL49_AGC_DB_POS;
2178 u32 valid_antennae =
2179 (le16_to_cpu(rx_resp->phy_flags) & IWL49_RX_PHY_FLAGS_ANTENNAE_MASK)
2180 >> IWL49_RX_PHY_FLAGS_ANTENNAE_OFFSET;
2184 /* Find max rssi among 3 possible receivers.
2185 * These values are measured by the digital signal processor (DSP).
2186 * They should stay fairly constant even as the signal strength varies,
2187 * if the radio's automatic gain control (AGC) is working right.
2188 * AGC value (see below) will provide the "interesting" info. */
2189 for (i = 0; i < 3; i++)
2190 if (valid_antennae & (1 << i))
2191 max_rssi = max(ncphy->rssi_info[i << 1], max_rssi);
2193 IWL_DEBUG_STATS(priv, "Rssi In A %d B %d C %d Max %d AGC dB %d\n",
2194 ncphy->rssi_info[0], ncphy->rssi_info[2], ncphy->rssi_info[4],
2197 /* dBm = max_rssi dB - agc dB - constant.
2198 * Higher AGC (higher radio gain) means lower signal. */
2199 return max_rssi - agc - IWL49_RSSI_OFFSET;
2203 /* Set up 4965-specific Rx frame reply handlers */
2204 static void iwl4965_rx_handler_setup(struct iwl_priv *priv)
2206 /* Legacy Rx frames */
2207 priv->rx_handlers[REPLY_RX] = iwl_rx_reply_rx;
2209 priv->rx_handlers[REPLY_TX] = iwl4965_rx_reply_tx;
2212 static void iwl4965_setup_deferred_work(struct iwl_priv *priv)
2214 INIT_WORK(&priv->txpower_work, iwl4965_bg_txpower_work);
2217 static void iwl4965_cancel_deferred_work(struct iwl_priv *priv)
2219 cancel_work_sync(&priv->txpower_work);
2222 static struct iwl_station_mgmt_ops iwl4965_station_mgmt = {
2223 .add_station = iwl_add_station_flags,
2224 .remove_station = iwl_remove_station,
2225 .find_station = iwl_find_station,
2226 .clear_station_table = iwl_clear_stations_table,
2229 static struct iwl_hcmd_ops iwl4965_hcmd = {
2230 .rxon_assoc = iwl4965_send_rxon_assoc,
2231 .commit_rxon = iwl_commit_rxon,
2232 .set_rxon_chain = iwl_set_rxon_chain,
2235 static struct iwl_hcmd_utils_ops iwl4965_hcmd_utils = {
2236 .get_hcmd_size = iwl4965_get_hcmd_size,
2237 .build_addsta_hcmd = iwl4965_build_addsta_hcmd,
2238 .chain_noise_reset = iwl4965_chain_noise_reset,
2239 .gain_computation = iwl4965_gain_computation,
2240 .rts_tx_cmd_flag = iwl4965_rts_tx_cmd_flag,
2241 .calc_rssi = iwl4965_calc_rssi,
2244 static struct iwl_lib_ops iwl4965_lib = {
2245 .set_hw_params = iwl4965_hw_set_hw_params,
2246 .txq_update_byte_cnt_tbl = iwl4965_txq_update_byte_cnt_tbl,
2247 .txq_set_sched = iwl4965_txq_set_sched,
2248 .txq_agg_enable = iwl4965_txq_agg_enable,
2249 .txq_agg_disable = iwl4965_txq_agg_disable,
2250 .txq_attach_buf_to_tfd = iwl_hw_txq_attach_buf_to_tfd,
2251 .txq_free_tfd = iwl_hw_txq_free_tfd,
2252 .txq_init = iwl_hw_tx_queue_init,
2253 .rx_handler_setup = iwl4965_rx_handler_setup,
2254 .setup_deferred_work = iwl4965_setup_deferred_work,
2255 .cancel_deferred_work = iwl4965_cancel_deferred_work,
2256 .is_valid_rtc_data_addr = iwl4965_hw_valid_rtc_data_addr,
2257 .alive_notify = iwl4965_alive_notify,
2258 .init_alive_start = iwl4965_init_alive_start,
2259 .load_ucode = iwl4965_load_bsm,
2261 .init = iwl4965_apm_init,
2262 .reset = iwl4965_apm_reset,
2263 .stop = iwl4965_apm_stop,
2264 .config = iwl4965_nic_config,
2265 .set_pwr_src = iwl_set_pwr_src,
2268 .regulatory_bands = {
2269 EEPROM_REGULATORY_BAND_1_CHANNELS,
2270 EEPROM_REGULATORY_BAND_2_CHANNELS,
2271 EEPROM_REGULATORY_BAND_3_CHANNELS,
2272 EEPROM_REGULATORY_BAND_4_CHANNELS,
2273 EEPROM_REGULATORY_BAND_5_CHANNELS,
2274 EEPROM_4965_REGULATORY_BAND_24_FAT_CHANNELS,
2275 EEPROM_4965_REGULATORY_BAND_52_FAT_CHANNELS
2277 .verify_signature = iwlcore_eeprom_verify_signature,
2278 .acquire_semaphore = iwlcore_eeprom_acquire_semaphore,
2279 .release_semaphore = iwlcore_eeprom_release_semaphore,
2280 .calib_version = iwl4965_eeprom_calib_version,
2281 .query_addr = iwlcore_eeprom_query_addr,
2283 .send_tx_power = iwl4965_send_tx_power,
2284 .update_chain_flags = iwl_update_chain_flags,
2285 .post_associate = iwl_post_associate,
2286 .config_ap = iwl_config_ap,
2288 .temperature = iwl4965_temperature_calib,
2289 .set_ct_kill = iwl4965_set_ct_threshold,
2293 static struct iwl_ops iwl4965_ops = {
2294 .lib = &iwl4965_lib,
2295 .hcmd = &iwl4965_hcmd,
2296 .utils = &iwl4965_hcmd_utils,
2297 .smgmt = &iwl4965_station_mgmt,
2300 struct iwl_cfg iwl4965_agn_cfg = {
2302 .fw_name_pre = IWL4965_FW_PRE,
2303 .ucode_api_max = IWL4965_UCODE_API_MAX,
2304 .ucode_api_min = IWL4965_UCODE_API_MIN,
2305 .sku = IWL_SKU_A|IWL_SKU_G|IWL_SKU_N,
2306 .eeprom_size = IWL4965_EEPROM_IMG_SIZE,
2307 .eeprom_ver = EEPROM_4965_EEPROM_VERSION,
2308 .eeprom_calib_ver = EEPROM_4965_TX_POWER_VERSION,
2309 .ops = &iwl4965_ops,
2310 .mod_params = &iwl4965_mod_params,
2313 /* Module firmware */
2314 MODULE_FIRMWARE(IWL4965_MODULE_FIRMWARE(IWL4965_UCODE_API_MAX));
2316 module_param_named(antenna, iwl4965_mod_params.antenna, int, 0444);
2317 MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
2318 module_param_named(swcrypto, iwl4965_mod_params.sw_crypto, int, 0444);
2319 MODULE_PARM_DESC(swcrypto, "using crypto in software (default 0 [hardware])");
2320 module_param_named(debug, iwl4965_mod_params.debug, uint, 0444);
2321 MODULE_PARM_DESC(debug, "debug output mask");
2323 disable_hw_scan, iwl4965_mod_params.disable_hw_scan, int, 0444);
2324 MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
2326 module_param_named(queues_num, iwl4965_mod_params.num_of_queues, int, 0444);
2327 MODULE_PARM_DESC(queues_num, "number of hw queues.");
2329 module_param_named(11n_disable, iwl4965_mod_params.disable_11n, int, 0444);
2330 MODULE_PARM_DESC(11n_disable, "disable 11n functionality");
2331 module_param_named(amsdu_size_8K, iwl4965_mod_params.amsdu_size_8K, int, 0444);
2332 MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size");
2334 module_param_named(fw_restart4965, iwl4965_mod_params.restart_fw, int, 0444);
2335 MODULE_PARM_DESC(fw_restart4965, "restart firmware in case of error");