2 * Copyright (c) 2010 Broadcom Corporation
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
11 * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
13 * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
14 * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 #include <linux/types.h>
18 #include <linux/kernel.h>
19 #include <linux/kthread.h>
20 #include <linux/printk.h>
21 #include <linux/pci_ids.h>
22 #include <linux/netdevice.h>
23 #include <linux/interrupt.h>
24 #include <linux/sched.h>
25 #include <linux/mmc/sdio.h>
26 #include <linux/mmc/sdio_func.h>
27 #include <linux/mmc/card.h>
28 #include <linux/semaphore.h>
29 #include <linux/firmware.h>
30 #include <linux/module.h>
31 #include <linux/bcma/bcma.h>
32 #include <asm/unaligned.h>
34 #include <brcmu_wifi.h>
35 #include <brcmu_utils.h>
36 #include <brcm_hw_ids.h>
38 #include "sdio_host.h"
39 #include "sdio_chip.h"
41 #define DCMD_RESP_TIMEOUT 2000 /* In milli second */
45 #define BRCMF_TRAP_INFO_SIZE 80
47 #define CBUF_LEN (128)
50 __le32 buf; /* Can't be pointer on (64-bit) hosts */
53 char *_buf_compat; /* Redundant pointer for backward compat. */
58 * When there is no UART (e.g. Quickturn),
59 * the host should write a complete
60 * input line directly into cbuf and then write
61 * the length into vcons_in.
62 * This may also be used when there is a real UART
63 * (at risk of conflicting with
64 * the real UART). vcons_out is currently unused.
69 /* Output (logging) buffer
70 * Console output is written to a ring buffer log_buf at index log_idx.
71 * The host may read the output when it sees log_idx advance.
72 * Output will be lost if the output wraps around faster than the host
75 struct rte_log_le log_le;
77 /* Console input line buffer
78 * Characters are read one at a time into cbuf
79 * until <CR> is received, then
80 * the buffer is processed as a command line.
81 * Also used for virtual UART.
88 #include <chipcommon.h>
92 #include "dhd_proto.h"
95 #define TXQLEN 2048 /* bulk tx queue length */
96 #define TXHI (TXQLEN - 256) /* turn on flow control above TXHI */
97 #define TXLOW (TXHI - 256) /* turn off flow control below TXLOW */
100 #define TXRETRIES 2 /* # of retries for tx frames */
102 #define BRCMF_RXBOUND 50 /* Default for max rx frames in
105 #define BRCMF_TXBOUND 20 /* Default for max tx frames in
108 #define BRCMF_TXMINMAX 1 /* Max tx frames if rx still pending */
110 #define MEMBLOCK 2048 /* Block size used for downloading
112 #define MAX_DATA_BUF (32 * 1024) /* Must be large enough to hold
113 biggest possible glom */
115 #define BRCMF_FIRSTREAD (1 << 6)
118 /* SBSDIO_DEVICE_CTL */
120 /* 1: device will assert busy signal when receiving CMD53 */
121 #define SBSDIO_DEVCTL_SETBUSY 0x01
122 /* 1: assertion of sdio interrupt is synchronous to the sdio clock */
123 #define SBSDIO_DEVCTL_SPI_INTR_SYNC 0x02
124 /* 1: mask all interrupts to host except the chipActive (rev 8) */
125 #define SBSDIO_DEVCTL_CA_INT_ONLY 0x04
126 /* 1: isolate internal sdio signals, put external pads in tri-state; requires
127 * sdio bus power cycle to clear (rev 9) */
128 #define SBSDIO_DEVCTL_PADS_ISO 0x08
129 /* Force SD->SB reset mapping (rev 11) */
130 #define SBSDIO_DEVCTL_SB_RST_CTL 0x30
131 /* Determined by CoreControl bit */
132 #define SBSDIO_DEVCTL_RST_CORECTL 0x00
133 /* Force backplane reset */
134 #define SBSDIO_DEVCTL_RST_BPRESET 0x10
135 /* Force no backplane reset */
136 #define SBSDIO_DEVCTL_RST_NOBPRESET 0x20
138 /* direct(mapped) cis space */
140 /* MAPPED common CIS address */
141 #define SBSDIO_CIS_BASE_COMMON 0x1000
142 /* maximum bytes in one CIS */
143 #define SBSDIO_CIS_SIZE_LIMIT 0x200
144 /* cis offset addr is < 17 bits */
145 #define SBSDIO_CIS_OFT_ADDR_MASK 0x1FFFF
147 /* manfid tuple length, include tuple, link bytes */
148 #define SBSDIO_CIS_MANFID_TUPLE_LEN 6
151 #define I_SMB_SW0 (1 << 0) /* To SB Mail S/W interrupt 0 */
152 #define I_SMB_SW1 (1 << 1) /* To SB Mail S/W interrupt 1 */
153 #define I_SMB_SW2 (1 << 2) /* To SB Mail S/W interrupt 2 */
154 #define I_SMB_SW3 (1 << 3) /* To SB Mail S/W interrupt 3 */
155 #define I_SMB_SW_MASK 0x0000000f /* To SB Mail S/W interrupts mask */
156 #define I_SMB_SW_SHIFT 0 /* To SB Mail S/W interrupts shift */
157 #define I_HMB_SW0 (1 << 4) /* To Host Mail S/W interrupt 0 */
158 #define I_HMB_SW1 (1 << 5) /* To Host Mail S/W interrupt 1 */
159 #define I_HMB_SW2 (1 << 6) /* To Host Mail S/W interrupt 2 */
160 #define I_HMB_SW3 (1 << 7) /* To Host Mail S/W interrupt 3 */
161 #define I_HMB_SW_MASK 0x000000f0 /* To Host Mail S/W interrupts mask */
162 #define I_HMB_SW_SHIFT 4 /* To Host Mail S/W interrupts shift */
163 #define I_WR_OOSYNC (1 << 8) /* Write Frame Out Of Sync */
164 #define I_RD_OOSYNC (1 << 9) /* Read Frame Out Of Sync */
165 #define I_PC (1 << 10) /* descriptor error */
166 #define I_PD (1 << 11) /* data error */
167 #define I_DE (1 << 12) /* Descriptor protocol Error */
168 #define I_RU (1 << 13) /* Receive descriptor Underflow */
169 #define I_RO (1 << 14) /* Receive fifo Overflow */
170 #define I_XU (1 << 15) /* Transmit fifo Underflow */
171 #define I_RI (1 << 16) /* Receive Interrupt */
172 #define I_BUSPWR (1 << 17) /* SDIO Bus Power Change (rev 9) */
173 #define I_XMTDATA_AVAIL (1 << 23) /* bits in fifo */
174 #define I_XI (1 << 24) /* Transmit Interrupt */
175 #define I_RF_TERM (1 << 25) /* Read Frame Terminate */
176 #define I_WF_TERM (1 << 26) /* Write Frame Terminate */
177 #define I_PCMCIA_XU (1 << 27) /* PCMCIA Transmit FIFO Underflow */
178 #define I_SBINT (1 << 28) /* sbintstatus Interrupt */
179 #define I_CHIPACTIVE (1 << 29) /* chip from doze to active state */
180 #define I_SRESET (1 << 30) /* CCCR RES interrupt */
181 #define I_IOE2 (1U << 31) /* CCCR IOE2 Bit Changed */
182 #define I_ERRORS (I_PC | I_PD | I_DE | I_RU | I_RO | I_XU)
183 #define I_DMA (I_RI | I_XI | I_ERRORS)
186 #define CC_CISRDY (1 << 0) /* CIS Ready */
187 #define CC_BPRESEN (1 << 1) /* CCCR RES signal */
188 #define CC_F2RDY (1 << 2) /* set CCCR IOR2 bit */
189 #define CC_CLRPADSISO (1 << 3) /* clear SDIO pads isolation */
190 #define CC_XMTDATAAVAIL_MODE (1 << 4)
191 #define CC_XMTDATAAVAIL_CTRL (1 << 5)
194 #define SFC_RF_TERM (1 << 0) /* Read Frame Terminate */
195 #define SFC_WF_TERM (1 << 1) /* Write Frame Terminate */
196 #define SFC_CRC4WOOS (1 << 2) /* CRC error for write out of sync */
197 #define SFC_ABORTALL (1 << 3) /* Abort all in-progress frames */
200 #define SDPCM_FRAMETAG_LEN 4 /* 2 bytes len, 2 bytes check val */
202 /* Total length of frame header for dongle protocol */
203 #define SDPCM_HDRLEN (SDPCM_FRAMETAG_LEN + SDPCM_SWHEADER_LEN)
204 #define SDPCM_RESERVE (SDPCM_HDRLEN + BRCMF_SDALIGN)
207 * Software allocation of To SB Mailbox resources
210 /* tosbmailbox bits corresponding to intstatus bits */
211 #define SMB_NAK (1 << 0) /* Frame NAK */
212 #define SMB_INT_ACK (1 << 1) /* Host Interrupt ACK */
213 #define SMB_USE_OOB (1 << 2) /* Use OOB Wakeup */
214 #define SMB_DEV_INT (1 << 3) /* Miscellaneous Interrupt */
216 /* tosbmailboxdata */
217 #define SMB_DATA_VERSION_SHIFT 16 /* host protocol version */
220 * Software allocation of To Host Mailbox resources
224 #define I_HMB_FC_STATE I_HMB_SW0 /* Flow Control State */
225 #define I_HMB_FC_CHANGE I_HMB_SW1 /* Flow Control State Changed */
226 #define I_HMB_FRAME_IND I_HMB_SW2 /* Frame Indication */
227 #define I_HMB_HOST_INT I_HMB_SW3 /* Miscellaneous Interrupt */
229 /* tohostmailboxdata */
230 #define HMB_DATA_NAKHANDLED 1 /* retransmit NAK'd frame */
231 #define HMB_DATA_DEVREADY 2 /* talk to host after enable */
232 #define HMB_DATA_FC 4 /* per prio flowcontrol update flag */
233 #define HMB_DATA_FWREADY 8 /* fw ready for protocol activity */
235 #define HMB_DATA_FCDATA_MASK 0xff000000
236 #define HMB_DATA_FCDATA_SHIFT 24
238 #define HMB_DATA_VERSION_MASK 0x00ff0000
239 #define HMB_DATA_VERSION_SHIFT 16
242 * Software-defined protocol header
245 /* Current protocol version */
246 #define SDPCM_PROT_VERSION 4
248 /* SW frame header */
249 #define SDPCM_PACKET_SEQUENCE(p) (((u8 *)p)[0] & 0xff)
251 #define SDPCM_CHANNEL_MASK 0x00000f00
252 #define SDPCM_CHANNEL_SHIFT 8
253 #define SDPCM_PACKET_CHANNEL(p) (((u8 *)p)[1] & 0x0f)
255 #define SDPCM_NEXTLEN_OFFSET 2
257 /* Data Offset from SOF (HW Tag, SW Tag, Pad) */
258 #define SDPCM_DOFFSET_OFFSET 3 /* Data Offset */
259 #define SDPCM_DOFFSET_VALUE(p) (((u8 *)p)[SDPCM_DOFFSET_OFFSET] & 0xff)
260 #define SDPCM_DOFFSET_MASK 0xff000000
261 #define SDPCM_DOFFSET_SHIFT 24
262 #define SDPCM_FCMASK_OFFSET 4 /* Flow control */
263 #define SDPCM_FCMASK_VALUE(p) (((u8 *)p)[SDPCM_FCMASK_OFFSET] & 0xff)
264 #define SDPCM_WINDOW_OFFSET 5 /* Credit based fc */
265 #define SDPCM_WINDOW_VALUE(p) (((u8 *)p)[SDPCM_WINDOW_OFFSET] & 0xff)
267 #define SDPCM_SWHEADER_LEN 8 /* SW header is 64 bits */
269 /* logical channel numbers */
270 #define SDPCM_CONTROL_CHANNEL 0 /* Control channel Id */
271 #define SDPCM_EVENT_CHANNEL 1 /* Asyc Event Indication Channel Id */
272 #define SDPCM_DATA_CHANNEL 2 /* Data Xmit/Recv Channel Id */
273 #define SDPCM_GLOM_CHANNEL 3 /* For coalesced packets */
274 #define SDPCM_TEST_CHANNEL 15 /* Reserved for test/debug packets */
276 #define SDPCM_SEQUENCE_WRAP 256 /* wrap-around val for 8bit frame seq */
278 #define SDPCM_GLOMDESC(p) (((u8 *)p)[1] & 0x80)
281 * Shared structure between dongle and the host.
282 * The structure contains pointers to trap or assert information.
284 #define SDPCM_SHARED_VERSION 0x0002
285 #define SDPCM_SHARED_VERSION_MASK 0x00FF
286 #define SDPCM_SHARED_ASSERT_BUILT 0x0100
287 #define SDPCM_SHARED_ASSERT 0x0200
288 #define SDPCM_SHARED_TRAP 0x0400
290 /* Space for header read, limit for data packets */
291 #define MAX_HDR_READ (1 << 6)
292 #define MAX_RX_DATASZ 2048
294 /* Maximum milliseconds to wait for F2 to come up */
295 #define BRCMF_WAIT_F2RDY 3000
297 /* Bump up limit on waiting for HT to account for first startup;
298 * if the image is doing a CRC calculation before programming the PMU
299 * for HT availability, it could take a couple hundred ms more, so
300 * max out at a 1 second (1000000us).
302 #undef PMU_MAX_TRANSITION_DLY
303 #define PMU_MAX_TRANSITION_DLY 1000000
305 /* Value for ChipClockCSR during initial setup */
306 #define BRCMF_INIT_CLKCTL1 (SBSDIO_FORCE_HW_CLKREQ_OFF | \
307 SBSDIO_ALP_AVAIL_REQ)
309 /* Flags for SDH calls */
310 #define F2SYNC (SDIO_REQ_4BYTE | SDIO_REQ_FIXED)
312 #define BRCMFMAC_FW_NAME "brcm/brcmfmac.bin"
313 #define BRCMFMAC_NV_NAME "brcm/brcmfmac.txt"
314 MODULE_FIRMWARE(BRCMFMAC_FW_NAME);
315 MODULE_FIRMWARE(BRCMFMAC_NV_NAME);
318 * Conversion of 802.1D priority to precedence level
320 static uint prio2prec(u32 prio)
322 return (prio == PRIO_8021D_NONE || prio == PRIO_8021D_BE) ?
328 u32 corecontrol; /* 0x00, rev8 */
329 u32 corestatus; /* rev8 */
331 u32 biststatus; /* rev8 */
334 u16 pcmciamesportaladdr; /* 0x010, rev8 */
336 u16 pcmciamesportalmask; /* rev8 */
338 u16 pcmciawrframebc; /* rev8 */
340 u16 pcmciaunderflowtimer; /* rev8 */
344 u32 intstatus; /* 0x020, rev8 */
345 u32 hostintmask; /* rev8 */
346 u32 intmask; /* rev8 */
347 u32 sbintstatus; /* rev8 */
348 u32 sbintmask; /* rev8 */
349 u32 funcintmask; /* rev4 */
351 u32 tosbmailbox; /* 0x040, rev8 */
352 u32 tohostmailbox; /* rev8 */
353 u32 tosbmailboxdata; /* rev8 */
354 u32 tohostmailboxdata; /* rev8 */
356 /* synchronized access to registers in SDIO clock domain */
357 u32 sdioaccess; /* 0x050, rev8 */
360 /* PCMCIA frame control */
361 u8 pcmciaframectrl; /* 0x060, rev8 */
363 u8 pcmciawatermark; /* rev8 */
366 /* interrupt batching control */
367 u32 intrcvlazy; /* 0x100, rev8 */
371 u32 cmd52rd; /* 0x110, rev8 */
372 u32 cmd52wr; /* rev8 */
373 u32 cmd53rd; /* rev8 */
374 u32 cmd53wr; /* rev8 */
375 u32 abort; /* rev8 */
376 u32 datacrcerror; /* rev8 */
377 u32 rdoutofsync; /* rev8 */
378 u32 wroutofsync; /* rev8 */
379 u32 writebusy; /* rev8 */
380 u32 readwait; /* rev8 */
381 u32 readterm; /* rev8 */
382 u32 writeterm; /* rev8 */
384 u32 clockctlstatus; /* rev8 */
387 u32 PAD[128]; /* DMA engines */
389 /* SDIO/PCMCIA CIS region */
390 char cis[512]; /* 0x400-0x5ff, rev6 */
392 /* PCMCIA function control registers */
393 char pcmciafcr[256]; /* 0x600-6ff, rev6 */
396 /* PCMCIA backplane access */
397 u16 backplanecsr; /* 0x76E, rev6 */
398 u16 backplaneaddr0; /* rev6 */
399 u16 backplaneaddr1; /* rev6 */
400 u16 backplaneaddr2; /* rev6 */
401 u16 backplaneaddr3; /* rev6 */
402 u16 backplanedata0; /* rev6 */
403 u16 backplanedata1; /* rev6 */
404 u16 backplanedata2; /* rev6 */
405 u16 backplanedata3; /* rev6 */
408 /* sprom "size" & "blank" info */
409 u16 spromstatus; /* 0x7BE, rev2 */
416 /* Device console log buffer state */
417 struct brcmf_console {
418 uint count; /* Poll interval msec counter */
419 uint log_addr; /* Log struct address (fixed) */
420 struct rte_log_le log_le; /* Log struct (host copy) */
421 uint bufsize; /* Size of log buffer */
422 u8 *buf; /* Log buffer (host copy) */
423 uint last; /* Last buffer read index */
427 struct sdpcm_shared {
431 u32 assert_file_addr;
433 u32 console_addr; /* Address of struct rte_console */
438 struct sdpcm_shared_le {
441 __le32 assert_exp_addr;
442 __le32 assert_file_addr;
444 __le32 console_addr; /* Address of struct rte_console */
445 __le32 msgtrace_addr;
450 /* misc chip info needed by some of the routines */
451 /* Private data for SDIO bus interaction */
453 struct brcmf_pub *drvr;
455 struct brcmf_sdio_dev *sdiodev; /* sdio device handler */
456 struct chip_info *ci; /* Chip info struct */
457 char *vars; /* Variables (from CIS and/or other) */
458 uint varsz; /* Size of variables buffer */
460 u32 ramsize; /* Size of RAM in SOCRAM (bytes) */
462 u32 hostintmask; /* Copy of Host Interrupt Mask */
463 u32 intstatus; /* Intstatus bits (events) pending */
464 bool dpc_sched; /* Indicates DPC schedule (intrpt rcvd) */
465 bool fcstate; /* State of dongle flow-control */
467 uint blocksize; /* Block size of SDIO transfers */
468 uint roundup; /* Max roundup limit */
470 struct pktq txq; /* Queue length used for flow-control */
471 u8 flowcontrol; /* per prio flow control bitmask */
472 u8 tx_seq; /* Transmit sequence number (next) */
473 u8 tx_max; /* Maximum transmit sequence allowed */
475 u8 hdrbuf[MAX_HDR_READ + BRCMF_SDALIGN];
476 u8 *rxhdr; /* Header of current rx frame (in hdrbuf) */
477 u16 nextlen; /* Next Read Len from last header */
478 u8 rx_seq; /* Receive sequence number (expected) */
479 bool rxskip; /* Skip receive (awaiting NAK ACK) */
481 uint rxbound; /* Rx frames to read before resched */
482 uint txbound; /* Tx frames to send before resched */
485 struct sk_buff *glomd; /* Packet containing glomming descriptor */
486 struct sk_buff_head glom; /* Packet list for glommed superframe */
487 uint glomerr; /* Glom packet read errors */
489 u8 *rxbuf; /* Buffer for receiving control packets */
490 uint rxblen; /* Allocated length of rxbuf */
491 u8 *rxctl; /* Aligned pointer into rxbuf */
492 u8 *databuf; /* Buffer for receiving big glom packet */
493 u8 *dataptr; /* Aligned pointer into databuf */
494 uint rxlen; /* Length of valid data in buffer */
496 u8 sdpcm_ver; /* Bus protocol reported by dongle */
498 bool intr; /* Use interrupts */
499 bool poll; /* Use polling */
500 bool ipend; /* Device interrupt is pending */
501 uint intrcount; /* Count of device interrupt callbacks */
502 uint lastintrs; /* Count as of last watchdog timer */
503 uint spurious; /* Count of spurious interrupts */
504 uint pollrate; /* Ticks between device polls */
505 uint polltick; /* Tick counter */
506 uint pollcnt; /* Count of active polls */
509 uint console_interval;
510 struct brcmf_console console; /* Console output polling support */
511 uint console_addr; /* Console address from shared struct */
514 uint regfails; /* Count of R_REG failures */
516 uint clkstate; /* State of sd and backplane clock(s) */
517 bool activity; /* Activity flag for clock down */
518 s32 idletime; /* Control for activity timeout */
519 s32 idlecount; /* Activity timeout counter */
520 s32 idleclock; /* How to set bus driver when idle */
522 bool use_rxchain; /* If brcmf should use PKT chains */
523 bool sleeping; /* Is SDIO bus sleeping? */
524 bool rxflow_mode; /* Rx flow control mode */
525 bool rxflow; /* Is rx flow control on */
526 bool alp_only; /* Don't use HT clock (ALP only) */
527 /* Field to decide if rx of control frames happen in rxbuf or lb-pool */
530 /* Some additional counters */
531 uint tx_sderrs; /* Count of tx attempts with sd errors */
532 uint fcqueued; /* Tx packets that got queued */
533 uint rxrtx; /* Count of rtx requests (NAK to dongle) */
534 uint rx_toolong; /* Receive frames too long to receive */
535 uint rxc_errors; /* SDIO errors when reading control frames */
536 uint rx_hdrfail; /* SDIO errors on header reads */
537 uint rx_badhdr; /* Bad received headers (roosync?) */
538 uint rx_badseq; /* Mismatched rx sequence number */
539 uint fc_rcvd; /* Number of flow-control events received */
540 uint fc_xoff; /* Number which turned on flow-control */
541 uint fc_xon; /* Number which turned off flow-control */
542 uint rxglomfail; /* Failed deglom attempts */
543 uint rxglomframes; /* Number of glom frames (superframes) */
544 uint rxglompkts; /* Number of packets from glom frames */
545 uint f2rxhdrs; /* Number of header reads */
546 uint f2rxdata; /* Number of frame data reads */
547 uint f2txdata; /* Number of f2 frame writes */
548 uint f1regdata; /* Number of f1 register accesses */
549 uint tickcnt; /* Number of watchdog been schedule */
550 unsigned long tx_ctlerrs; /* Err of sending ctrl frames */
551 unsigned long tx_ctlpkts; /* Ctrl frames sent to dongle */
552 unsigned long rx_ctlerrs; /* Err of processing rx ctrl frames */
553 unsigned long rx_ctlpkts; /* Ctrl frames processed from dongle */
554 unsigned long rx_readahead_cnt; /* Number of packets where header
555 * read-ahead was used. */
559 bool ctrl_frame_stat;
562 wait_queue_head_t ctrl_wait;
563 wait_queue_head_t dcmd_resp_wait;
565 struct timer_list timer;
566 struct completion watchdog_wait;
567 struct task_struct *watchdog_tsk;
571 struct task_struct *dpc_tsk;
572 struct completion dpc_wait;
574 struct semaphore sdsem;
576 const struct firmware *firmware;
579 bool txoff; /* Transmit flow-controlled */
585 #define CLK_PENDING 2 /* Not used yet */
589 static int qcount[NUMPRIO];
590 static int tx_packets[NUMPRIO];
593 #define SDIO_DRIVE_STRENGTH 6 /* in milliamps */
595 #define RETRYCHAN(chan) ((chan) == SDPCM_EVENT_CHANNEL)
597 /* Retry count for register access failures */
598 static const uint retry_limit = 2;
600 /* Limit on rounding up frames */
601 static const uint max_roundup = 512;
605 static void pkt_align(struct sk_buff *p, int len, int align)
608 datalign = (unsigned long)(p->data);
609 datalign = roundup(datalign, (align)) - datalign;
611 skb_pull(p, datalign);
615 /* To check if there's window offered */
616 static bool data_ok(struct brcmf_sdio *bus)
618 return (u8)(bus->tx_max - bus->tx_seq) != 0 &&
619 ((u8)(bus->tx_max - bus->tx_seq) & 0x80) == 0;
623 * Reads a register in the SDIO hardware block. This block occupies a series of
624 * adresses on the 32 bit backplane bus.
627 r_sdreg32(struct brcmf_sdio *bus, u32 *regvar, u32 reg_offset, u32 *retryvar)
629 u8 idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
632 *regvar = brcmf_sdcard_reg_read(bus->sdiodev,
633 bus->ci->c_inf[idx].base + reg_offset,
635 } while (brcmf_sdcard_regfail(bus->sdiodev) &&
636 (++(*retryvar) <= retry_limit));
638 bus->regfails += (*retryvar-1);
639 if (*retryvar > retry_limit) {
640 brcmf_dbg(ERROR, "FAILED READ %Xh\n", reg_offset);
647 w_sdreg32(struct brcmf_sdio *bus, u32 regval, u32 reg_offset, u32 *retryvar)
649 u8 idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
652 brcmf_sdcard_reg_write(bus->sdiodev,
653 bus->ci->c_inf[idx].base + reg_offset,
654 sizeof(u32), regval);
655 } while (brcmf_sdcard_regfail(bus->sdiodev) &&
656 (++(*retryvar) <= retry_limit));
658 bus->regfails += (*retryvar-1);
659 if (*retryvar > retry_limit)
660 brcmf_dbg(ERROR, "FAILED REGISTER WRITE %Xh\n",
665 #define PKT_AVAILABLE() (intstatus & I_HMB_FRAME_IND)
667 #define HOSTINTMASK (I_HMB_SW_MASK | I_CHIPACTIVE)
669 /* Packet free applicable unconditionally for sdio and sdspi.
670 * Conditional if bufpool was present for gspi bus.
672 static void brcmf_sdbrcm_pktfree2(struct brcmf_sdio *bus, struct sk_buff *pkt)
675 brcmu_pkt_buf_free_skb(pkt);
678 /* Turn backplane clock on or off */
679 static int brcmf_sdbrcm_htclk(struct brcmf_sdio *bus, bool on, bool pendok)
682 u8 clkctl, clkreq, devctl;
683 unsigned long timeout;
685 brcmf_dbg(TRACE, "Enter\n");
690 /* Request HT Avail */
692 bus->alp_only ? SBSDIO_ALP_AVAIL_REQ : SBSDIO_HT_AVAIL_REQ;
694 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
695 SBSDIO_FUNC1_CHIPCLKCSR, clkreq, &err);
697 brcmf_dbg(ERROR, "HT Avail request error: %d\n", err);
701 /* Check current status */
702 clkctl = brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1,
703 SBSDIO_FUNC1_CHIPCLKCSR, &err);
705 brcmf_dbg(ERROR, "HT Avail read error: %d\n", err);
709 /* Go to pending and await interrupt if appropriate */
710 if (!SBSDIO_CLKAV(clkctl, bus->alp_only) && pendok) {
711 /* Allow only clock-available interrupt */
712 devctl = brcmf_sdcard_cfg_read(bus->sdiodev,
714 SBSDIO_DEVICE_CTL, &err);
716 brcmf_dbg(ERROR, "Devctl error setting CA: %d\n",
721 devctl |= SBSDIO_DEVCTL_CA_INT_ONLY;
722 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
723 SBSDIO_DEVICE_CTL, devctl, &err);
724 brcmf_dbg(INFO, "CLKCTL: set PENDING\n");
725 bus->clkstate = CLK_PENDING;
728 } else if (bus->clkstate == CLK_PENDING) {
729 /* Cancel CA-only interrupt filter */
731 brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1,
732 SBSDIO_DEVICE_CTL, &err);
733 devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
734 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
735 SBSDIO_DEVICE_CTL, devctl, &err);
738 /* Otherwise, wait here (polling) for HT Avail */
740 msecs_to_jiffies(PMU_MAX_TRANSITION_DLY/1000);
741 while (!SBSDIO_CLKAV(clkctl, bus->alp_only)) {
742 clkctl = brcmf_sdcard_cfg_read(bus->sdiodev,
744 SBSDIO_FUNC1_CHIPCLKCSR,
746 if (time_after(jiffies, timeout))
749 usleep_range(5000, 10000);
752 brcmf_dbg(ERROR, "HT Avail request error: %d\n", err);
755 if (!SBSDIO_CLKAV(clkctl, bus->alp_only)) {
756 brcmf_dbg(ERROR, "HT Avail timeout (%d): clkctl 0x%02x\n",
757 PMU_MAX_TRANSITION_DLY, clkctl);
761 /* Mark clock available */
762 bus->clkstate = CLK_AVAIL;
763 brcmf_dbg(INFO, "CLKCTL: turned ON\n");
766 if (bus->alp_only != true) {
767 if (SBSDIO_ALPONLY(clkctl))
768 brcmf_dbg(ERROR, "HT Clock should be on\n");
770 #endif /* defined (BCMDBG) */
772 bus->activity = true;
776 if (bus->clkstate == CLK_PENDING) {
777 /* Cancel CA-only interrupt filter */
778 devctl = brcmf_sdcard_cfg_read(bus->sdiodev,
780 SBSDIO_DEVICE_CTL, &err);
781 devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
782 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
783 SBSDIO_DEVICE_CTL, devctl, &err);
786 bus->clkstate = CLK_SDONLY;
787 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
788 SBSDIO_FUNC1_CHIPCLKCSR, clkreq, &err);
789 brcmf_dbg(INFO, "CLKCTL: turned OFF\n");
791 brcmf_dbg(ERROR, "Failed access turning clock off: %d\n",
799 /* Change idle/active SD state */
800 static int brcmf_sdbrcm_sdclk(struct brcmf_sdio *bus, bool on)
802 brcmf_dbg(TRACE, "Enter\n");
805 bus->clkstate = CLK_SDONLY;
807 bus->clkstate = CLK_NONE;
812 /* Transition SD and backplane clock readiness */
813 static int brcmf_sdbrcm_clkctl(struct brcmf_sdio *bus, uint target, bool pendok)
816 uint oldstate = bus->clkstate;
819 brcmf_dbg(TRACE, "Enter\n");
821 /* Early exit if we're already there */
822 if (bus->clkstate == target) {
823 if (target == CLK_AVAIL) {
824 brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
825 bus->activity = true;
832 /* Make sure SD clock is available */
833 if (bus->clkstate == CLK_NONE)
834 brcmf_sdbrcm_sdclk(bus, true);
835 /* Now request HT Avail on the backplane */
836 brcmf_sdbrcm_htclk(bus, true, pendok);
837 brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
838 bus->activity = true;
842 /* Remove HT request, or bring up SD clock */
843 if (bus->clkstate == CLK_NONE)
844 brcmf_sdbrcm_sdclk(bus, true);
845 else if (bus->clkstate == CLK_AVAIL)
846 brcmf_sdbrcm_htclk(bus, false, false);
848 brcmf_dbg(ERROR, "request for %d -> %d\n",
849 bus->clkstate, target);
850 brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
854 /* Make sure to remove HT request */
855 if (bus->clkstate == CLK_AVAIL)
856 brcmf_sdbrcm_htclk(bus, false, false);
857 /* Now remove the SD clock */
858 brcmf_sdbrcm_sdclk(bus, false);
859 brcmf_sdbrcm_wd_timer(bus, 0);
863 brcmf_dbg(INFO, "%d -> %d\n", oldstate, bus->clkstate);
869 static int brcmf_sdbrcm_bussleep(struct brcmf_sdio *bus, bool sleep)
873 brcmf_dbg(INFO, "request %s (currently %s)\n",
874 sleep ? "SLEEP" : "WAKE",
875 bus->sleeping ? "SLEEP" : "WAKE");
877 /* Done if we're already in the requested state */
878 if (sleep == bus->sleeping)
881 /* Going to sleep: set the alarm and turn off the lights... */
883 /* Don't sleep if something is pending */
884 if (bus->dpc_sched || bus->rxskip || pktq_len(&bus->txq))
887 /* Make sure the controller has the bus up */
888 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
890 /* Tell device to start using OOB wakeup */
891 w_sdreg32(bus, SMB_USE_OOB,
892 offsetof(struct sdpcmd_regs, tosbmailbox), &retries);
893 if (retries > retry_limit)
894 brcmf_dbg(ERROR, "CANNOT SIGNAL CHIP, WILL NOT WAKE UP!!\n");
896 /* Turn off our contribution to the HT clock request */
897 brcmf_sdbrcm_clkctl(bus, CLK_SDONLY, false);
899 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
900 SBSDIO_FUNC1_CHIPCLKCSR,
901 SBSDIO_FORCE_HW_CLKREQ_OFF, NULL);
903 /* Isolate the bus */
904 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
906 SBSDIO_DEVCTL_PADS_ISO, NULL);
909 bus->sleeping = true;
912 /* Waking up: bus power up is ok, set local state */
914 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
915 SBSDIO_FUNC1_CHIPCLKCSR, 0, NULL);
917 /* Make sure the controller has the bus up */
918 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
920 /* Send misc interrupt to indicate OOB not needed */
921 w_sdreg32(bus, 0, offsetof(struct sdpcmd_regs, tosbmailboxdata),
923 if (retries <= retry_limit)
924 w_sdreg32(bus, SMB_DEV_INT,
925 offsetof(struct sdpcmd_regs, tosbmailbox),
928 if (retries > retry_limit)
929 brcmf_dbg(ERROR, "CANNOT SIGNAL CHIP TO CLEAR OOB!!\n");
931 /* Make sure we have SD bus access */
932 brcmf_sdbrcm_clkctl(bus, CLK_SDONLY, false);
935 bus->sleeping = false;
941 static void bus_wake(struct brcmf_sdio *bus)
944 brcmf_sdbrcm_bussleep(bus, false);
947 static u32 brcmf_sdbrcm_hostmail(struct brcmf_sdio *bus)
954 brcmf_dbg(TRACE, "Enter\n");
956 /* Read mailbox data and ack that we did so */
957 r_sdreg32(bus, &hmb_data,
958 offsetof(struct sdpcmd_regs, tohostmailboxdata), &retries);
960 if (retries <= retry_limit)
961 w_sdreg32(bus, SMB_INT_ACK,
962 offsetof(struct sdpcmd_regs, tosbmailbox), &retries);
965 /* Dongle recomposed rx frames, accept them again */
966 if (hmb_data & HMB_DATA_NAKHANDLED) {
967 brcmf_dbg(INFO, "Dongle reports NAK handled, expect rtx of %d\n",
970 brcmf_dbg(ERROR, "unexpected NAKHANDLED!\n");
973 intstatus |= I_HMB_FRAME_IND;
977 * DEVREADY does not occur with gSPI.
979 if (hmb_data & (HMB_DATA_DEVREADY | HMB_DATA_FWREADY)) {
981 (hmb_data & HMB_DATA_VERSION_MASK) >>
982 HMB_DATA_VERSION_SHIFT;
983 if (bus->sdpcm_ver != SDPCM_PROT_VERSION)
984 brcmf_dbg(ERROR, "Version mismatch, dongle reports %d, "
986 bus->sdpcm_ver, SDPCM_PROT_VERSION);
988 brcmf_dbg(INFO, "Dongle ready, protocol version %d\n",
993 * Flow Control has been moved into the RX headers and this out of band
994 * method isn't used any more.
995 * remaining backward compatible with older dongles.
997 if (hmb_data & HMB_DATA_FC) {
998 fcbits = (hmb_data & HMB_DATA_FCDATA_MASK) >>
999 HMB_DATA_FCDATA_SHIFT;
1001 if (fcbits & ~bus->flowcontrol)
1004 if (bus->flowcontrol & ~fcbits)
1008 bus->flowcontrol = fcbits;
1011 /* Shouldn't be any others */
1012 if (hmb_data & ~(HMB_DATA_DEVREADY |
1013 HMB_DATA_NAKHANDLED |
1016 HMB_DATA_FCDATA_MASK | HMB_DATA_VERSION_MASK))
1017 brcmf_dbg(ERROR, "Unknown mailbox data content: 0x%02x\n",
1023 static void brcmf_sdbrcm_rxfail(struct brcmf_sdio *bus, bool abort, bool rtx)
1030 brcmf_dbg(ERROR, "%sterminate frame%s\n",
1031 abort ? "abort command, " : "",
1032 rtx ? ", send NAK" : "");
1035 brcmf_sdcard_abort(bus->sdiodev, SDIO_FUNC_2);
1037 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
1038 SBSDIO_FUNC1_FRAMECTRL,
1042 /* Wait until the packet has been flushed (device/FIFO stable) */
1043 for (lastrbc = retries = 0xffff; retries > 0; retries--) {
1044 hi = brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1,
1045 SBSDIO_FUNC1_RFRAMEBCHI, NULL);
1046 lo = brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1,
1047 SBSDIO_FUNC1_RFRAMEBCLO, NULL);
1048 bus->f1regdata += 2;
1050 if ((hi == 0) && (lo == 0))
1053 if ((hi > (lastrbc >> 8)) && (lo > (lastrbc & 0x00ff))) {
1054 brcmf_dbg(ERROR, "count growing: last 0x%04x now 0x%04x\n",
1055 lastrbc, (hi << 8) + lo);
1057 lastrbc = (hi << 8) + lo;
1061 brcmf_dbg(ERROR, "count never zeroed: last 0x%04x\n", lastrbc);
1063 brcmf_dbg(INFO, "flush took %d iterations\n", 0xffff - retries);
1067 w_sdreg32(bus, SMB_NAK,
1068 offsetof(struct sdpcmd_regs, tosbmailbox), &retries);
1071 if (retries <= retry_limit)
1075 /* Clear partial in any case */
1078 /* If we can't reach the device, signal failure */
1079 if (err || brcmf_sdcard_regfail(bus->sdiodev))
1080 bus->drvr->bus_if->state = BRCMF_BUS_DOWN;
1083 /* copy a buffer into a pkt buffer chain */
1084 static uint brcmf_sdbrcm_glom_from_buf(struct brcmf_sdio *bus, uint len)
1093 skb_queue_walk(&bus->glom, p) {
1094 n = min_t(uint, p->len, len);
1095 memcpy(p->data, buf, n);
1106 /* return total length of buffer chain */
1107 static uint brcmf_sdbrcm_glom_len(struct brcmf_sdio *bus)
1113 skb_queue_walk(&bus->glom, p)
1118 static void brcmf_sdbrcm_free_glom(struct brcmf_sdio *bus)
1120 struct sk_buff *cur, *next;
1122 skb_queue_walk_safe(&bus->glom, cur, next) {
1123 skb_unlink(cur, &bus->glom);
1124 brcmu_pkt_buf_free_skb(cur);
1128 static u8 brcmf_sdbrcm_rxglom(struct brcmf_sdio *bus, u8 rxseq)
1134 struct sk_buff *pfirst, *pnext;
1137 u8 chan, seq, doff, sfdoff;
1141 bool usechain = bus->use_rxchain;
1143 /* If packets, issue read(s) and send up packet chain */
1144 /* Return sequence numbers consumed? */
1146 brcmf_dbg(TRACE, "start: glomd %p glom %p\n",
1147 bus->glomd, skb_peek(&bus->glom));
1149 /* If there's a descriptor, generate the packet chain */
1151 pfirst = pnext = NULL;
1152 dlen = (u16) (bus->glomd->len);
1153 dptr = bus->glomd->data;
1154 if (!dlen || (dlen & 1)) {
1155 brcmf_dbg(ERROR, "bad glomd len(%d), ignore descriptor\n",
1160 for (totlen = num = 0; dlen; num++) {
1161 /* Get (and move past) next length */
1162 sublen = get_unaligned_le16(dptr);
1163 dlen -= sizeof(u16);
1164 dptr += sizeof(u16);
1165 if ((sublen < SDPCM_HDRLEN) ||
1166 ((num == 0) && (sublen < (2 * SDPCM_HDRLEN)))) {
1167 brcmf_dbg(ERROR, "descriptor len %d bad: %d\n",
1172 if (sublen % BRCMF_SDALIGN) {
1173 brcmf_dbg(ERROR, "sublen %d not multiple of %d\n",
1174 sublen, BRCMF_SDALIGN);
1179 /* For last frame, adjust read len so total
1180 is a block multiple */
1183 (roundup(totlen, bus->blocksize) - totlen);
1184 totlen = roundup(totlen, bus->blocksize);
1187 /* Allocate/chain packet for next subframe */
1188 pnext = brcmu_pkt_buf_get_skb(sublen + BRCMF_SDALIGN);
1189 if (pnext == NULL) {
1190 brcmf_dbg(ERROR, "bcm_pkt_buf_get_skb failed, num %d len %d\n",
1194 skb_queue_tail(&bus->glom, pnext);
1196 /* Adhere to start alignment requirements */
1197 pkt_align(pnext, sublen, BRCMF_SDALIGN);
1200 /* If all allocations succeeded, save packet chain
1203 brcmf_dbg(GLOM, "allocated %d-byte packet chain for %d subframes\n",
1205 if (BRCMF_GLOM_ON() && bus->nextlen &&
1206 totlen != bus->nextlen) {
1207 brcmf_dbg(GLOM, "glomdesc mismatch: nextlen %d glomdesc %d rxseq %d\n",
1208 bus->nextlen, totlen, rxseq);
1210 pfirst = pnext = NULL;
1212 brcmf_sdbrcm_free_glom(bus);
1216 /* Done with descriptor packet */
1217 brcmu_pkt_buf_free_skb(bus->glomd);
1222 /* Ok -- either we just generated a packet chain,
1223 or had one from before */
1224 if (!skb_queue_empty(&bus->glom)) {
1225 if (BRCMF_GLOM_ON()) {
1226 brcmf_dbg(GLOM, "try superframe read, packet chain:\n");
1227 skb_queue_walk(&bus->glom, pnext) {
1228 brcmf_dbg(GLOM, " %p: %p len 0x%04x (%d)\n",
1229 pnext, (u8 *) (pnext->data),
1230 pnext->len, pnext->len);
1234 pfirst = skb_peek(&bus->glom);
1235 dlen = (u16) brcmf_sdbrcm_glom_len(bus);
1237 /* Do an SDIO read for the superframe. Configurable iovar to
1238 * read directly into the chained packet, or allocate a large
1239 * packet and and copy into the chain.
1242 errcode = brcmf_sdcard_recv_chain(bus->sdiodev,
1243 bus->sdiodev->sbwad,
1244 SDIO_FUNC_2, F2SYNC, &bus->glom);
1245 } else if (bus->dataptr) {
1246 errcode = brcmf_sdcard_recv_buf(bus->sdiodev,
1247 bus->sdiodev->sbwad,
1248 SDIO_FUNC_2, F2SYNC,
1249 bus->dataptr, dlen);
1250 sublen = (u16) brcmf_sdbrcm_glom_from_buf(bus, dlen);
1251 if (sublen != dlen) {
1252 brcmf_dbg(ERROR, "FAILED TO COPY, dlen %d sublen %d\n",
1258 brcmf_dbg(ERROR, "COULDN'T ALLOC %d-BYTE GLOM, FORCE FAILURE\n",
1264 /* On failure, kill the superframe, allow a couple retries */
1266 brcmf_dbg(ERROR, "glom read of %d bytes failed: %d\n",
1268 bus->sdiodev->bus_if->dstats.rx_errors++;
1270 if (bus->glomerr++ < 3) {
1271 brcmf_sdbrcm_rxfail(bus, true, true);
1274 brcmf_sdbrcm_rxfail(bus, true, false);
1276 brcmf_sdbrcm_free_glom(bus);
1281 if (BRCMF_GLOM_ON()) {
1282 printk(KERN_DEBUG "SUPERFRAME:\n");
1283 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
1284 pfirst->data, min_t(int, pfirst->len, 48));
1288 /* Validate the superframe header */
1289 dptr = (u8 *) (pfirst->data);
1290 sublen = get_unaligned_le16(dptr);
1291 check = get_unaligned_le16(dptr + sizeof(u16));
1293 chan = SDPCM_PACKET_CHANNEL(&dptr[SDPCM_FRAMETAG_LEN]);
1294 seq = SDPCM_PACKET_SEQUENCE(&dptr[SDPCM_FRAMETAG_LEN]);
1295 bus->nextlen = dptr[SDPCM_FRAMETAG_LEN + SDPCM_NEXTLEN_OFFSET];
1296 if ((bus->nextlen << 4) > MAX_RX_DATASZ) {
1297 brcmf_dbg(INFO, "nextlen too large (%d) seq %d\n",
1301 doff = SDPCM_DOFFSET_VALUE(&dptr[SDPCM_FRAMETAG_LEN]);
1302 txmax = SDPCM_WINDOW_VALUE(&dptr[SDPCM_FRAMETAG_LEN]);
1305 if ((u16)~(sublen ^ check)) {
1306 brcmf_dbg(ERROR, "(superframe): HW hdr error: len/check 0x%04x/0x%04x\n",
1309 } else if (roundup(sublen, bus->blocksize) != dlen) {
1310 brcmf_dbg(ERROR, "(superframe): len 0x%04x, rounded 0x%04x, expect 0x%04x\n",
1311 sublen, roundup(sublen, bus->blocksize),
1314 } else if (SDPCM_PACKET_CHANNEL(&dptr[SDPCM_FRAMETAG_LEN]) !=
1315 SDPCM_GLOM_CHANNEL) {
1316 brcmf_dbg(ERROR, "(superframe): bad channel %d\n",
1317 SDPCM_PACKET_CHANNEL(
1318 &dptr[SDPCM_FRAMETAG_LEN]));
1320 } else if (SDPCM_GLOMDESC(&dptr[SDPCM_FRAMETAG_LEN])) {
1321 brcmf_dbg(ERROR, "(superframe): got 2nd descriptor?\n");
1323 } else if ((doff < SDPCM_HDRLEN) ||
1324 (doff > (pfirst->len - SDPCM_HDRLEN))) {
1325 brcmf_dbg(ERROR, "(superframe): Bad data offset %d: HW %d pkt %d min %d\n",
1326 doff, sublen, pfirst->len, SDPCM_HDRLEN);
1330 /* Check sequence number of superframe SW header */
1332 brcmf_dbg(INFO, "(superframe) rx_seq %d, expected %d\n",
1338 /* Check window for sanity */
1339 if ((u8) (txmax - bus->tx_seq) > 0x40) {
1340 brcmf_dbg(ERROR, "unlikely tx max %d with tx_seq %d\n",
1341 txmax, bus->tx_seq);
1342 txmax = bus->tx_seq + 2;
1344 bus->tx_max = txmax;
1346 /* Remove superframe header, remember offset */
1347 skb_pull(pfirst, doff);
1351 /* Validate all the subframe headers */
1352 skb_queue_walk(&bus->glom, pnext) {
1353 /* leave when invalid subframe is found */
1357 dptr = (u8 *) (pnext->data);
1358 dlen = (u16) (pnext->len);
1359 sublen = get_unaligned_le16(dptr);
1360 check = get_unaligned_le16(dptr + sizeof(u16));
1361 chan = SDPCM_PACKET_CHANNEL(&dptr[SDPCM_FRAMETAG_LEN]);
1362 doff = SDPCM_DOFFSET_VALUE(&dptr[SDPCM_FRAMETAG_LEN]);
1364 if (BRCMF_GLOM_ON()) {
1365 printk(KERN_DEBUG "subframe:\n");
1366 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
1371 if ((u16)~(sublen ^ check)) {
1372 brcmf_dbg(ERROR, "(subframe %d): HW hdr error: len/check 0x%04x/0x%04x\n",
1373 num, sublen, check);
1375 } else if ((sublen > dlen) || (sublen < SDPCM_HDRLEN)) {
1376 brcmf_dbg(ERROR, "(subframe %d): length mismatch: len 0x%04x, expect 0x%04x\n",
1379 } else if ((chan != SDPCM_DATA_CHANNEL) &&
1380 (chan != SDPCM_EVENT_CHANNEL)) {
1381 brcmf_dbg(ERROR, "(subframe %d): bad channel %d\n",
1384 } else if ((doff < SDPCM_HDRLEN) || (doff > sublen)) {
1385 brcmf_dbg(ERROR, "(subframe %d): Bad data offset %d: HW %d min %d\n",
1386 num, doff, sublen, SDPCM_HDRLEN);
1389 /* increase the subframe count */
1394 /* Terminate frame on error, request
1396 if (bus->glomerr++ < 3) {
1397 /* Restore superframe header space */
1398 skb_push(pfirst, sfdoff);
1399 brcmf_sdbrcm_rxfail(bus, true, true);
1402 brcmf_sdbrcm_rxfail(bus, true, false);
1404 brcmf_sdbrcm_free_glom(bus);
1410 /* Basic SD framing looks ok - process each packet (header) */
1412 skb_queue_walk_safe(&bus->glom, pfirst, pnext) {
1413 dptr = (u8 *) (pfirst->data);
1414 sublen = get_unaligned_le16(dptr);
1415 chan = SDPCM_PACKET_CHANNEL(&dptr[SDPCM_FRAMETAG_LEN]);
1416 seq = SDPCM_PACKET_SEQUENCE(&dptr[SDPCM_FRAMETAG_LEN]);
1417 doff = SDPCM_DOFFSET_VALUE(&dptr[SDPCM_FRAMETAG_LEN]);
1419 brcmf_dbg(GLOM, "Get subframe %d, %p(%p/%d), sublen %d chan %d seq %d\n",
1420 num, pfirst, pfirst->data,
1421 pfirst->len, sublen, chan, seq);
1423 /* precondition: chan == SDPCM_DATA_CHANNEL ||
1424 chan == SDPCM_EVENT_CHANNEL */
1427 brcmf_dbg(GLOM, "rx_seq %d, expected %d\n",
1435 if (BRCMF_BYTES_ON() && BRCMF_DATA_ON()) {
1436 printk(KERN_DEBUG "Rx Subframe Data:\n");
1437 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
1442 __skb_trim(pfirst, sublen);
1443 skb_pull(pfirst, doff);
1445 if (pfirst->len == 0) {
1446 skb_unlink(pfirst, &bus->glom);
1447 brcmu_pkt_buf_free_skb(pfirst);
1449 } else if (brcmf_proto_hdrpull(bus->sdiodev->dev,
1450 &ifidx, pfirst) != 0) {
1451 brcmf_dbg(ERROR, "rx protocol error\n");
1452 bus->sdiodev->bus_if->dstats.rx_errors++;
1453 skb_unlink(pfirst, &bus->glom);
1454 brcmu_pkt_buf_free_skb(pfirst);
1459 if (BRCMF_GLOM_ON()) {
1460 brcmf_dbg(GLOM, "subframe %d to stack, %p (%p/%d) nxt/lnk %p/%p\n",
1461 bus->glom.qlen, pfirst, pfirst->data,
1462 pfirst->len, pfirst->next,
1464 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
1466 min_t(int, pfirst->len, 32));
1470 /* sent any remaining packets up */
1471 if (bus->glom.qlen) {
1473 brcmf_rx_frame(bus->sdiodev->dev, ifidx, &bus->glom);
1477 bus->rxglomframes++;
1478 bus->rxglompkts += bus->glom.qlen;
1483 static int brcmf_sdbrcm_dcmd_resp_wait(struct brcmf_sdio *bus, uint *condition,
1486 DECLARE_WAITQUEUE(wait, current);
1487 int timeout = msecs_to_jiffies(DCMD_RESP_TIMEOUT);
1489 /* Wait until control frame is available */
1490 add_wait_queue(&bus->dcmd_resp_wait, &wait);
1491 set_current_state(TASK_INTERRUPTIBLE);
1493 while (!(*condition) && (!signal_pending(current) && timeout))
1494 timeout = schedule_timeout(timeout);
1496 if (signal_pending(current))
1499 set_current_state(TASK_RUNNING);
1500 remove_wait_queue(&bus->dcmd_resp_wait, &wait);
1505 static int brcmf_sdbrcm_dcmd_resp_wake(struct brcmf_sdio *bus)
1507 if (waitqueue_active(&bus->dcmd_resp_wait))
1508 wake_up_interruptible(&bus->dcmd_resp_wait);
1513 brcmf_sdbrcm_read_control(struct brcmf_sdio *bus, u8 *hdr, uint len, uint doff)
1519 brcmf_dbg(TRACE, "Enter\n");
1521 /* Set rxctl for frame (w/optional alignment) */
1522 bus->rxctl = bus->rxbuf;
1523 bus->rxctl += BRCMF_FIRSTREAD;
1524 pad = ((unsigned long)bus->rxctl % BRCMF_SDALIGN);
1526 bus->rxctl += (BRCMF_SDALIGN - pad);
1527 bus->rxctl -= BRCMF_FIRSTREAD;
1529 /* Copy the already-read portion over */
1530 memcpy(bus->rxctl, hdr, BRCMF_FIRSTREAD);
1531 if (len <= BRCMF_FIRSTREAD)
1534 /* Raise rdlen to next SDIO block to avoid tail command */
1535 rdlen = len - BRCMF_FIRSTREAD;
1536 if (bus->roundup && bus->blocksize && (rdlen > bus->blocksize)) {
1537 pad = bus->blocksize - (rdlen % bus->blocksize);
1538 if ((pad <= bus->roundup) && (pad < bus->blocksize) &&
1539 ((len + pad) < bus->sdiodev->bus_if->maxctl))
1541 } else if (rdlen % BRCMF_SDALIGN) {
1542 rdlen += BRCMF_SDALIGN - (rdlen % BRCMF_SDALIGN);
1545 /* Satisfy length-alignment requirements */
1546 if (rdlen & (ALIGNMENT - 1))
1547 rdlen = roundup(rdlen, ALIGNMENT);
1549 /* Drop if the read is too big or it exceeds our maximum */
1550 if ((rdlen + BRCMF_FIRSTREAD) > bus->sdiodev->bus_if->maxctl) {
1551 brcmf_dbg(ERROR, "%d-byte control read exceeds %d-byte buffer\n",
1552 rdlen, bus->sdiodev->bus_if->maxctl);
1553 bus->sdiodev->bus_if->dstats.rx_errors++;
1554 brcmf_sdbrcm_rxfail(bus, false, false);
1558 if ((len - doff) > bus->sdiodev->bus_if->maxctl) {
1559 brcmf_dbg(ERROR, "%d-byte ctl frame (%d-byte ctl data) exceeds %d-byte limit\n",
1560 len, len - doff, bus->sdiodev->bus_if->maxctl);
1561 bus->sdiodev->bus_if->dstats.rx_errors++;
1563 brcmf_sdbrcm_rxfail(bus, false, false);
1567 /* Read remainder of frame body into the rxctl buffer */
1568 sdret = brcmf_sdcard_recv_buf(bus->sdiodev,
1569 bus->sdiodev->sbwad,
1571 F2SYNC, (bus->rxctl + BRCMF_FIRSTREAD), rdlen);
1574 /* Control frame failures need retransmission */
1576 brcmf_dbg(ERROR, "read %d control bytes failed: %d\n",
1579 brcmf_sdbrcm_rxfail(bus, true, true);
1586 if (BRCMF_BYTES_ON() && BRCMF_CTL_ON()) {
1587 printk(KERN_DEBUG "RxCtrl:\n");
1588 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET, bus->rxctl, len);
1592 /* Point to valid data and indicate its length */
1594 bus->rxlen = len - doff;
1597 /* Awake any waiters */
1598 brcmf_sdbrcm_dcmd_resp_wake(bus);
1601 /* Pad read to blocksize for efficiency */
1602 static void brcmf_pad(struct brcmf_sdio *bus, u16 *pad, u16 *rdlen)
1604 if (bus->roundup && bus->blocksize && *rdlen > bus->blocksize) {
1605 *pad = bus->blocksize - (*rdlen % bus->blocksize);
1606 if (*pad <= bus->roundup && *pad < bus->blocksize &&
1607 *rdlen + *pad + BRCMF_FIRSTREAD < MAX_RX_DATASZ)
1609 } else if (*rdlen % BRCMF_SDALIGN) {
1610 *rdlen += BRCMF_SDALIGN - (*rdlen % BRCMF_SDALIGN);
1615 brcmf_alloc_pkt_and_read(struct brcmf_sdio *bus, u16 rdlen,
1616 struct sk_buff **pkt, u8 **rxbuf)
1618 int sdret; /* Return code from calls */
1620 *pkt = brcmu_pkt_buf_get_skb(rdlen + BRCMF_SDALIGN);
1624 pkt_align(*pkt, rdlen, BRCMF_SDALIGN);
1625 *rxbuf = (u8 *) ((*pkt)->data);
1626 /* Read the entire frame */
1627 sdret = brcmf_sdcard_recv_pkt(bus->sdiodev, bus->sdiodev->sbwad,
1628 SDIO_FUNC_2, F2SYNC, *pkt);
1632 brcmf_dbg(ERROR, "(nextlen): read %d bytes failed: %d\n",
1634 brcmu_pkt_buf_free_skb(*pkt);
1635 bus->sdiodev->bus_if->dstats.rx_errors++;
1636 /* Force retry w/normal header read.
1637 * Don't attempt NAK for
1640 brcmf_sdbrcm_rxfail(bus, true, true);
1645 /* Checks the header */
1647 brcmf_check_rxbuf(struct brcmf_sdio *bus, struct sk_buff *pkt, u8 *rxbuf,
1648 u8 rxseq, u16 nextlen, u16 *len)
1651 bool len_consistent; /* Result of comparing readahead len and
1654 memcpy(bus->rxhdr, rxbuf, SDPCM_HDRLEN);
1656 /* Extract hardware header fields */
1657 *len = get_unaligned_le16(bus->rxhdr);
1658 check = get_unaligned_le16(bus->rxhdr + sizeof(u16));
1660 /* All zeros means readahead info was bad */
1661 if (!(*len | check)) {
1662 brcmf_dbg(INFO, "(nextlen): read zeros in HW header???\n");
1666 /* Validate check bytes */
1667 if ((u16)~(*len ^ check)) {
1668 brcmf_dbg(ERROR, "(nextlen): HW hdr error: nextlen/len/check 0x%04x/0x%04x/0x%04x\n",
1669 nextlen, *len, check);
1671 brcmf_sdbrcm_rxfail(bus, false, false);
1675 /* Validate frame length */
1676 if (*len < SDPCM_HDRLEN) {
1677 brcmf_dbg(ERROR, "(nextlen): HW hdr length invalid: %d\n",
1682 /* Check for consistency with readahead info */
1683 len_consistent = (nextlen != (roundup(*len, 16) >> 4));
1684 if (len_consistent) {
1685 /* Mismatch, force retry w/normal
1686 header (may be >4K) */
1687 brcmf_dbg(ERROR, "(nextlen): mismatch, nextlen %d len %d rnd %d; expected rxseq %d\n",
1688 nextlen, *len, roundup(*len, 16),
1690 brcmf_sdbrcm_rxfail(bus, true, true);
1697 brcmf_sdbrcm_pktfree2(bus, pkt);
1701 /* Return true if there may be more frames to read */
1703 brcmf_sdbrcm_readframes(struct brcmf_sdio *bus, uint maxframes, bool *finished)
1705 u16 len, check; /* Extracted hardware header fields */
1706 u8 chan, seq, doff; /* Extracted software header fields */
1707 u8 fcbits; /* Extracted fcbits from software header */
1709 struct sk_buff *pkt; /* Packet for event or data frames */
1710 u16 pad; /* Number of pad bytes to read */
1711 u16 rdlen; /* Total number of bytes to read */
1712 u8 rxseq; /* Next sequence number to expect */
1713 uint rxleft = 0; /* Remaining number of frames allowed */
1714 int sdret; /* Return code from calls */
1715 u8 txmax; /* Maximum tx sequence offered */
1718 uint rxcount = 0; /* Total frames read */
1720 brcmf_dbg(TRACE, "Enter\n");
1722 /* Not finished unless we encounter no more frames indication */
1725 for (rxseq = bus->rx_seq, rxleft = maxframes;
1726 !bus->rxskip && rxleft &&
1727 bus->drvr->bus_if->state != BRCMF_BUS_DOWN;
1728 rxseq++, rxleft--) {
1730 /* Handle glomming separately */
1731 if (bus->glomd || !skb_queue_empty(&bus->glom)) {
1733 brcmf_dbg(GLOM, "calling rxglom: glomd %p, glom %p\n",
1734 bus->glomd, skb_peek(&bus->glom));
1735 cnt = brcmf_sdbrcm_rxglom(bus, rxseq);
1736 brcmf_dbg(GLOM, "rxglom returned %d\n", cnt);
1738 rxleft = (rxleft > cnt) ? (rxleft - cnt) : 1;
1742 /* Try doing single read if we can */
1744 u16 nextlen = bus->nextlen;
1747 rdlen = len = nextlen << 4;
1748 brcmf_pad(bus, &pad, &rdlen);
1751 * After the frame is received we have to
1752 * distinguish whether it is data
1753 * or non-data frame.
1755 brcmf_alloc_pkt_and_read(bus, rdlen, &pkt, &rxbuf);
1757 /* Give up on data, request rtx of events */
1758 brcmf_dbg(ERROR, "(nextlen): brcmf_alloc_pkt_and_read failed: len %d rdlen %d expected rxseq %d\n",
1763 if (brcmf_check_rxbuf(bus, pkt, rxbuf, rxseq, nextlen,
1767 /* Extract software header fields */
1768 chan = SDPCM_PACKET_CHANNEL(
1769 &bus->rxhdr[SDPCM_FRAMETAG_LEN]);
1770 seq = SDPCM_PACKET_SEQUENCE(
1771 &bus->rxhdr[SDPCM_FRAMETAG_LEN]);
1772 doff = SDPCM_DOFFSET_VALUE(
1773 &bus->rxhdr[SDPCM_FRAMETAG_LEN]);
1774 txmax = SDPCM_WINDOW_VALUE(
1775 &bus->rxhdr[SDPCM_FRAMETAG_LEN]);
1778 bus->rxhdr[SDPCM_FRAMETAG_LEN +
1779 SDPCM_NEXTLEN_OFFSET];
1780 if ((bus->nextlen << 4) > MAX_RX_DATASZ) {
1781 brcmf_dbg(INFO, "(nextlen): got frame w/nextlen too large (%d), seq %d\n",
1786 bus->rx_readahead_cnt++;
1788 /* Handle Flow Control */
1789 fcbits = SDPCM_FCMASK_VALUE(
1790 &bus->rxhdr[SDPCM_FRAMETAG_LEN]);
1792 if (bus->flowcontrol != fcbits) {
1793 if (~bus->flowcontrol & fcbits)
1796 if (bus->flowcontrol & ~fcbits)
1800 bus->flowcontrol = fcbits;
1803 /* Check and update sequence number */
1805 brcmf_dbg(INFO, "(nextlen): rx_seq %d, expected %d\n",
1811 /* Check window for sanity */
1812 if ((u8) (txmax - bus->tx_seq) > 0x40) {
1813 brcmf_dbg(ERROR, "got unlikely tx max %d with tx_seq %d\n",
1814 txmax, bus->tx_seq);
1815 txmax = bus->tx_seq + 2;
1817 bus->tx_max = txmax;
1820 if (BRCMF_BYTES_ON() && BRCMF_DATA_ON()) {
1821 printk(KERN_DEBUG "Rx Data:\n");
1822 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
1824 } else if (BRCMF_HDRS_ON()) {
1825 printk(KERN_DEBUG "RxHdr:\n");
1826 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
1827 bus->rxhdr, SDPCM_HDRLEN);
1831 if (chan == SDPCM_CONTROL_CHANNEL) {
1832 brcmf_dbg(ERROR, "(nextlen): readahead on control packet %d?\n",
1834 /* Force retry w/normal header read */
1836 brcmf_sdbrcm_rxfail(bus, false, true);
1837 brcmf_sdbrcm_pktfree2(bus, pkt);
1841 /* Validate data offset */
1842 if ((doff < SDPCM_HDRLEN) || (doff > len)) {
1843 brcmf_dbg(ERROR, "(nextlen): bad data offset %d: HW len %d min %d\n",
1844 doff, len, SDPCM_HDRLEN);
1845 brcmf_sdbrcm_rxfail(bus, false, false);
1846 brcmf_sdbrcm_pktfree2(bus, pkt);
1850 /* All done with this one -- now deliver the packet */
1854 /* Read frame header (hardware and software) */
1855 sdret = brcmf_sdcard_recv_buf(bus->sdiodev, bus->sdiodev->sbwad,
1856 SDIO_FUNC_2, F2SYNC, bus->rxhdr,
1861 brcmf_dbg(ERROR, "RXHEADER FAILED: %d\n", sdret);
1863 brcmf_sdbrcm_rxfail(bus, true, true);
1867 if (BRCMF_BYTES_ON() || BRCMF_HDRS_ON()) {
1868 printk(KERN_DEBUG "RxHdr:\n");
1869 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
1870 bus->rxhdr, SDPCM_HDRLEN);
1874 /* Extract hardware header fields */
1875 len = get_unaligned_le16(bus->rxhdr);
1876 check = get_unaligned_le16(bus->rxhdr + sizeof(u16));
1878 /* All zeros means no more frames */
1879 if (!(len | check)) {
1884 /* Validate check bytes */
1885 if ((u16) ~(len ^ check)) {
1886 brcmf_dbg(ERROR, "HW hdr err: len/check 0x%04x/0x%04x\n",
1889 brcmf_sdbrcm_rxfail(bus, false, false);
1893 /* Validate frame length */
1894 if (len < SDPCM_HDRLEN) {
1895 brcmf_dbg(ERROR, "HW hdr length invalid: %d\n", len);
1899 /* Extract software header fields */
1900 chan = SDPCM_PACKET_CHANNEL(&bus->rxhdr[SDPCM_FRAMETAG_LEN]);
1901 seq = SDPCM_PACKET_SEQUENCE(&bus->rxhdr[SDPCM_FRAMETAG_LEN]);
1902 doff = SDPCM_DOFFSET_VALUE(&bus->rxhdr[SDPCM_FRAMETAG_LEN]);
1903 txmax = SDPCM_WINDOW_VALUE(&bus->rxhdr[SDPCM_FRAMETAG_LEN]);
1905 /* Validate data offset */
1906 if ((doff < SDPCM_HDRLEN) || (doff > len)) {
1907 brcmf_dbg(ERROR, "Bad data offset %d: HW len %d, min %d seq %d\n",
1908 doff, len, SDPCM_HDRLEN, seq);
1910 brcmf_sdbrcm_rxfail(bus, false, false);
1914 /* Save the readahead length if there is one */
1916 bus->rxhdr[SDPCM_FRAMETAG_LEN + SDPCM_NEXTLEN_OFFSET];
1917 if ((bus->nextlen << 4) > MAX_RX_DATASZ) {
1918 brcmf_dbg(INFO, "(nextlen): got frame w/nextlen too large (%d), seq %d\n",
1923 /* Handle Flow Control */
1924 fcbits = SDPCM_FCMASK_VALUE(&bus->rxhdr[SDPCM_FRAMETAG_LEN]);
1926 if (bus->flowcontrol != fcbits) {
1927 if (~bus->flowcontrol & fcbits)
1930 if (bus->flowcontrol & ~fcbits)
1934 bus->flowcontrol = fcbits;
1937 /* Check and update sequence number */
1939 brcmf_dbg(INFO, "rx_seq %d, expected %d\n", seq, rxseq);
1944 /* Check window for sanity */
1945 if ((u8) (txmax - bus->tx_seq) > 0x40) {
1946 brcmf_dbg(ERROR, "unlikely tx max %d with tx_seq %d\n",
1947 txmax, bus->tx_seq);
1948 txmax = bus->tx_seq + 2;
1950 bus->tx_max = txmax;
1952 /* Call a separate function for control frames */
1953 if (chan == SDPCM_CONTROL_CHANNEL) {
1954 brcmf_sdbrcm_read_control(bus, bus->rxhdr, len, doff);
1958 /* precondition: chan is either SDPCM_DATA_CHANNEL,
1959 SDPCM_EVENT_CHANNEL, SDPCM_TEST_CHANNEL or
1960 SDPCM_GLOM_CHANNEL */
1962 /* Length to read */
1963 rdlen = (len > BRCMF_FIRSTREAD) ? (len - BRCMF_FIRSTREAD) : 0;
1965 /* May pad read to blocksize for efficiency */
1966 if (bus->roundup && bus->blocksize &&
1967 (rdlen > bus->blocksize)) {
1968 pad = bus->blocksize - (rdlen % bus->blocksize);
1969 if ((pad <= bus->roundup) && (pad < bus->blocksize) &&
1970 ((rdlen + pad + BRCMF_FIRSTREAD) < MAX_RX_DATASZ))
1972 } else if (rdlen % BRCMF_SDALIGN) {
1973 rdlen += BRCMF_SDALIGN - (rdlen % BRCMF_SDALIGN);
1976 /* Satisfy length-alignment requirements */
1977 if (rdlen & (ALIGNMENT - 1))
1978 rdlen = roundup(rdlen, ALIGNMENT);
1980 if ((rdlen + BRCMF_FIRSTREAD) > MAX_RX_DATASZ) {
1981 /* Too long -- skip this frame */
1982 brcmf_dbg(ERROR, "too long: len %d rdlen %d\n",
1984 bus->sdiodev->bus_if->dstats.rx_errors++;
1986 brcmf_sdbrcm_rxfail(bus, false, false);
1990 pkt = brcmu_pkt_buf_get_skb(rdlen +
1991 BRCMF_FIRSTREAD + BRCMF_SDALIGN);
1993 /* Give up on data, request rtx of events */
1994 brcmf_dbg(ERROR, "brcmu_pkt_buf_get_skb failed: rdlen %d chan %d\n",
1996 bus->sdiodev->bus_if->dstats.rx_dropped++;
1997 brcmf_sdbrcm_rxfail(bus, false, RETRYCHAN(chan));
2001 /* Leave room for what we already read, and align remainder */
2002 skb_pull(pkt, BRCMF_FIRSTREAD);
2003 pkt_align(pkt, rdlen, BRCMF_SDALIGN);
2005 /* Read the remaining frame data */
2006 sdret = brcmf_sdcard_recv_pkt(bus->sdiodev, bus->sdiodev->sbwad,
2007 SDIO_FUNC_2, F2SYNC, pkt);
2011 brcmf_dbg(ERROR, "read %d %s bytes failed: %d\n", rdlen,
2012 ((chan == SDPCM_EVENT_CHANNEL) ? "event"
2013 : ((chan == SDPCM_DATA_CHANNEL) ? "data"
2015 brcmu_pkt_buf_free_skb(pkt);
2016 bus->sdiodev->bus_if->dstats.rx_errors++;
2017 brcmf_sdbrcm_rxfail(bus, true, RETRYCHAN(chan));
2021 /* Copy the already-read portion */
2022 skb_push(pkt, BRCMF_FIRSTREAD);
2023 memcpy(pkt->data, bus->rxhdr, BRCMF_FIRSTREAD);
2026 if (BRCMF_BYTES_ON() && BRCMF_DATA_ON()) {
2027 printk(KERN_DEBUG "Rx Data:\n");
2028 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
2034 /* Save superframe descriptor and allocate packet frame */
2035 if (chan == SDPCM_GLOM_CHANNEL) {
2036 if (SDPCM_GLOMDESC(&bus->rxhdr[SDPCM_FRAMETAG_LEN])) {
2037 brcmf_dbg(GLOM, "glom descriptor, %d bytes:\n",
2040 if (BRCMF_GLOM_ON()) {
2041 printk(KERN_DEBUG "Glom Data:\n");
2042 print_hex_dump_bytes("",
2047 __skb_trim(pkt, len);
2048 skb_pull(pkt, SDPCM_HDRLEN);
2051 brcmf_dbg(ERROR, "%s: glom superframe w/o "
2052 "descriptor!\n", __func__);
2053 brcmf_sdbrcm_rxfail(bus, false, false);
2058 /* Fill in packet len and prio, deliver upward */
2059 __skb_trim(pkt, len);
2060 skb_pull(pkt, doff);
2062 if (pkt->len == 0) {
2063 brcmu_pkt_buf_free_skb(pkt);
2065 } else if (brcmf_proto_hdrpull(bus->sdiodev->dev, &ifidx,
2067 brcmf_dbg(ERROR, "rx protocol error\n");
2068 brcmu_pkt_buf_free_skb(pkt);
2069 bus->sdiodev->bus_if->dstats.rx_errors++;
2073 /* Unlock during rx call */
2075 brcmf_rx_packet(bus->sdiodev->dev, ifidx, pkt);
2078 rxcount = maxframes - rxleft;
2080 /* Message if we hit the limit */
2082 brcmf_dbg(DATA, "hit rx limit of %d frames\n",
2086 brcmf_dbg(DATA, "processed %d frames\n", rxcount);
2087 /* Back off rxseq if awaiting rtx, update rx_seq */
2090 bus->rx_seq = rxseq;
2096 brcmf_sdbrcm_wait_for_event(struct brcmf_sdio *bus, bool *lockvar)
2099 wait_event_interruptible_timeout(bus->ctrl_wait,
2100 (*lockvar == false), HZ * 2);
2106 brcmf_sdbrcm_wait_event_wakeup(struct brcmf_sdio *bus)
2108 if (waitqueue_active(&bus->ctrl_wait))
2109 wake_up_interruptible(&bus->ctrl_wait);
2113 /* Writes a HW/SW header into the packet and sends it. */
2114 /* Assumes: (a) header space already there, (b) caller holds lock */
2115 static int brcmf_sdbrcm_txpkt(struct brcmf_sdio *bus, struct sk_buff *pkt,
2116 uint chan, bool free_pkt)
2122 struct sk_buff *new;
2125 brcmf_dbg(TRACE, "Enter\n");
2127 frame = (u8 *) (pkt->data);
2129 /* Add alignment padding, allocate new packet if needed */
2130 pad = ((unsigned long)frame % BRCMF_SDALIGN);
2132 if (skb_headroom(pkt) < pad) {
2133 brcmf_dbg(INFO, "insufficient headroom %d for %d pad\n",
2134 skb_headroom(pkt), pad);
2135 bus->sdiodev->bus_if->tx_realloc++;
2136 new = brcmu_pkt_buf_get_skb(pkt->len + BRCMF_SDALIGN);
2138 brcmf_dbg(ERROR, "couldn't allocate new %d-byte packet\n",
2139 pkt->len + BRCMF_SDALIGN);
2144 pkt_align(new, pkt->len, BRCMF_SDALIGN);
2145 memcpy(new->data, pkt->data, pkt->len);
2147 brcmu_pkt_buf_free_skb(pkt);
2148 /* free the pkt if canned one is not used */
2151 frame = (u8 *) (pkt->data);
2152 /* precondition: (frame % BRCMF_SDALIGN) == 0) */
2156 frame = (u8 *) (pkt->data);
2157 /* precondition: pad + SDPCM_HDRLEN <= pkt->len */
2158 memset(frame, 0, pad + SDPCM_HDRLEN);
2161 /* precondition: pad < BRCMF_SDALIGN */
2163 /* Hardware tag: 2 byte len followed by 2 byte ~len check (all LE) */
2164 len = (u16) (pkt->len);
2165 *(__le16 *) frame = cpu_to_le16(len);
2166 *(((__le16 *) frame) + 1) = cpu_to_le16(~len);
2168 /* Software tag: channel, sequence number, data offset */
2170 ((chan << SDPCM_CHANNEL_SHIFT) & SDPCM_CHANNEL_MASK) | bus->tx_seq |
2172 SDPCM_HDRLEN) << SDPCM_DOFFSET_SHIFT) & SDPCM_DOFFSET_MASK);
2174 put_unaligned_le32(swheader, frame + SDPCM_FRAMETAG_LEN);
2175 put_unaligned_le32(0, frame + SDPCM_FRAMETAG_LEN + sizeof(swheader));
2178 tx_packets[pkt->priority]++;
2179 if (BRCMF_BYTES_ON() &&
2180 (((BRCMF_CTL_ON() && (chan == SDPCM_CONTROL_CHANNEL)) ||
2181 (BRCMF_DATA_ON() && (chan != SDPCM_CONTROL_CHANNEL))))) {
2182 printk(KERN_DEBUG "Tx Frame:\n");
2183 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET, frame, len);
2184 } else if (BRCMF_HDRS_ON()) {
2185 printk(KERN_DEBUG "TxHdr:\n");
2186 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
2187 frame, min_t(u16, len, 16));
2191 /* Raise len to next SDIO block to eliminate tail command */
2192 if (bus->roundup && bus->blocksize && (len > bus->blocksize)) {
2193 u16 pad = bus->blocksize - (len % bus->blocksize);
2194 if ((pad <= bus->roundup) && (pad < bus->blocksize))
2196 } else if (len % BRCMF_SDALIGN) {
2197 len += BRCMF_SDALIGN - (len % BRCMF_SDALIGN);
2200 /* Some controllers have trouble with odd bytes -- round to even */
2201 if (len & (ALIGNMENT - 1))
2202 len = roundup(len, ALIGNMENT);
2204 ret = brcmf_sdcard_send_pkt(bus->sdiodev, bus->sdiodev->sbwad,
2205 SDIO_FUNC_2, F2SYNC, pkt);
2209 /* On failure, abort the command and terminate the frame */
2210 brcmf_dbg(INFO, "sdio error %d, abort command and terminate frame\n",
2214 brcmf_sdcard_abort(bus->sdiodev, SDIO_FUNC_2);
2215 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
2216 SBSDIO_FUNC1_FRAMECTRL, SFC_WF_TERM,
2220 for (i = 0; i < 3; i++) {
2222 hi = brcmf_sdcard_cfg_read(bus->sdiodev,
2224 SBSDIO_FUNC1_WFRAMEBCHI,
2226 lo = brcmf_sdcard_cfg_read(bus->sdiodev,
2228 SBSDIO_FUNC1_WFRAMEBCLO,
2230 bus->f1regdata += 2;
2231 if ((hi == 0) && (lo == 0))
2237 bus->tx_seq = (bus->tx_seq + 1) % SDPCM_SEQUENCE_WRAP;
2240 /* restore pkt buffer pointer before calling tx complete routine */
2241 skb_pull(pkt, SDPCM_HDRLEN + pad);
2243 brcmf_txcomplete(bus->sdiodev->dev, pkt, ret != 0);
2247 brcmu_pkt_buf_free_skb(pkt);
2252 static uint brcmf_sdbrcm_sendfromq(struct brcmf_sdio *bus, uint maxframes)
2254 struct sk_buff *pkt;
2257 int ret = 0, prec_out;
2262 struct brcmf_pub *drvr = bus->drvr;
2264 brcmf_dbg(TRACE, "Enter\n");
2266 tx_prec_map = ~bus->flowcontrol;
2268 /* Send frames until the limit or some other event */
2269 for (cnt = 0; (cnt < maxframes) && data_ok(bus); cnt++) {
2270 spin_lock_bh(&bus->txqlock);
2271 pkt = brcmu_pktq_mdeq(&bus->txq, tx_prec_map, &prec_out);
2273 spin_unlock_bh(&bus->txqlock);
2276 spin_unlock_bh(&bus->txqlock);
2277 datalen = pkt->len - SDPCM_HDRLEN;
2279 ret = brcmf_sdbrcm_txpkt(bus, pkt, SDPCM_DATA_CHANNEL, true);
2281 bus->sdiodev->bus_if->dstats.tx_errors++;
2283 bus->sdiodev->bus_if->dstats.tx_bytes += datalen;
2285 /* In poll mode, need to check for other events */
2286 if (!bus->intr && cnt) {
2287 /* Check device status, signal pending interrupt */
2288 r_sdreg32(bus, &intstatus,
2289 offsetof(struct sdpcmd_regs, intstatus),
2292 if (brcmf_sdcard_regfail(bus->sdiodev))
2294 if (intstatus & bus->hostintmask)
2299 /* Deflow-control stack if needed */
2300 if (drvr->bus_if->drvr_up &&
2301 (drvr->bus_if->state == BRCMF_BUS_DATA) &&
2302 bus->txoff && (pktq_len(&bus->txq) < TXLOW)) {
2304 brcmf_txflowcontrol(bus->sdiodev->dev, 0, OFF);
2310 static bool brcmf_sdbrcm_dpc(struct brcmf_sdio *bus)
2312 u32 intstatus, newstatus = 0;
2314 uint rxlimit = bus->rxbound; /* Rx frames to read before resched */
2315 uint txlimit = bus->txbound; /* Tx frames to send before resched */
2316 uint framecnt = 0; /* Temporary counter of tx/rx frames */
2317 bool rxdone = true; /* Flag for no more read data */
2318 bool resched = false; /* Flag indicating resched wanted */
2320 brcmf_dbg(TRACE, "Enter\n");
2322 /* Start with leftover status bits */
2323 intstatus = bus->intstatus;
2327 /* If waiting for HTAVAIL, check status */
2328 if (bus->clkstate == CLK_PENDING) {
2330 u8 clkctl, devctl = 0;
2333 /* Check for inconsistent device control */
2334 devctl = brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1,
2335 SBSDIO_DEVICE_CTL, &err);
2337 brcmf_dbg(ERROR, "error reading DEVCTL: %d\n", err);
2338 bus->drvr->bus_if->state = BRCMF_BUS_DOWN;
2342 /* Read CSR, if clock on switch to AVAIL, else ignore */
2343 clkctl = brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1,
2344 SBSDIO_FUNC1_CHIPCLKCSR, &err);
2346 brcmf_dbg(ERROR, "error reading CSR: %d\n",
2348 bus->drvr->bus_if->state = BRCMF_BUS_DOWN;
2351 brcmf_dbg(INFO, "DPC: PENDING, devctl 0x%02x clkctl 0x%02x\n",
2354 if (SBSDIO_HTAV(clkctl)) {
2355 devctl = brcmf_sdcard_cfg_read(bus->sdiodev,
2357 SBSDIO_DEVICE_CTL, &err);
2359 brcmf_dbg(ERROR, "error reading DEVCTL: %d\n",
2361 bus->drvr->bus_if->state = BRCMF_BUS_DOWN;
2363 devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
2364 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
2365 SBSDIO_DEVICE_CTL, devctl, &err);
2367 brcmf_dbg(ERROR, "error writing DEVCTL: %d\n",
2369 bus->drvr->bus_if->state = BRCMF_BUS_DOWN;
2371 bus->clkstate = CLK_AVAIL;
2379 /* Make sure backplane clock is on */
2380 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, true);
2381 if (bus->clkstate == CLK_PENDING)
2384 /* Pending interrupt indicates new device status */
2387 r_sdreg32(bus, &newstatus,
2388 offsetof(struct sdpcmd_regs, intstatus), &retries);
2390 if (brcmf_sdcard_regfail(bus->sdiodev))
2392 newstatus &= bus->hostintmask;
2393 bus->fcstate = !!(newstatus & I_HMB_FC_STATE);
2395 w_sdreg32(bus, newstatus,
2396 offsetof(struct sdpcmd_regs, intstatus),
2402 /* Merge new bits with previous */
2403 intstatus |= newstatus;
2406 /* Handle flow-control change: read new state in case our ack
2407 * crossed another change interrupt. If change still set, assume
2408 * FC ON for safety, let next loop through do the debounce.
2410 if (intstatus & I_HMB_FC_CHANGE) {
2411 intstatus &= ~I_HMB_FC_CHANGE;
2412 w_sdreg32(bus, I_HMB_FC_CHANGE,
2413 offsetof(struct sdpcmd_regs, intstatus), &retries);
2415 r_sdreg32(bus, &newstatus,
2416 offsetof(struct sdpcmd_regs, intstatus), &retries);
2417 bus->f1regdata += 2;
2419 !!(newstatus & (I_HMB_FC_STATE | I_HMB_FC_CHANGE));
2420 intstatus |= (newstatus & bus->hostintmask);
2423 /* Handle host mailbox indication */
2424 if (intstatus & I_HMB_HOST_INT) {
2425 intstatus &= ~I_HMB_HOST_INT;
2426 intstatus |= brcmf_sdbrcm_hostmail(bus);
2429 /* Generally don't ask for these, can get CRC errors... */
2430 if (intstatus & I_WR_OOSYNC) {
2431 brcmf_dbg(ERROR, "Dongle reports WR_OOSYNC\n");
2432 intstatus &= ~I_WR_OOSYNC;
2435 if (intstatus & I_RD_OOSYNC) {
2436 brcmf_dbg(ERROR, "Dongle reports RD_OOSYNC\n");
2437 intstatus &= ~I_RD_OOSYNC;
2440 if (intstatus & I_SBINT) {
2441 brcmf_dbg(ERROR, "Dongle reports SBINT\n");
2442 intstatus &= ~I_SBINT;
2445 /* Would be active due to wake-wlan in gSPI */
2446 if (intstatus & I_CHIPACTIVE) {
2447 brcmf_dbg(INFO, "Dongle reports CHIPACTIVE\n");
2448 intstatus &= ~I_CHIPACTIVE;
2451 /* Ignore frame indications if rxskip is set */
2453 intstatus &= ~I_HMB_FRAME_IND;
2455 /* On frame indication, read available frames */
2456 if (PKT_AVAILABLE()) {
2457 framecnt = brcmf_sdbrcm_readframes(bus, rxlimit, &rxdone);
2458 if (rxdone || bus->rxskip)
2459 intstatus &= ~I_HMB_FRAME_IND;
2460 rxlimit -= min(framecnt, rxlimit);
2463 /* Keep still-pending events for next scheduling */
2464 bus->intstatus = intstatus;
2467 if (data_ok(bus) && bus->ctrl_frame_stat &&
2468 (bus->clkstate == CLK_AVAIL)) {
2471 ret = brcmf_sdcard_send_buf(bus->sdiodev, bus->sdiodev->sbwad,
2472 SDIO_FUNC_2, F2SYNC, (u8 *) bus->ctrl_frame_buf,
2473 (u32) bus->ctrl_frame_len);
2476 /* On failure, abort the command and
2477 terminate the frame */
2478 brcmf_dbg(INFO, "sdio error %d, abort command and terminate frame\n",
2482 brcmf_sdcard_abort(bus->sdiodev, SDIO_FUNC_2);
2484 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
2485 SBSDIO_FUNC1_FRAMECTRL, SFC_WF_TERM,
2489 for (i = 0; i < 3; i++) {
2491 hi = brcmf_sdcard_cfg_read(bus->sdiodev,
2493 SBSDIO_FUNC1_WFRAMEBCHI,
2495 lo = brcmf_sdcard_cfg_read(bus->sdiodev,
2497 SBSDIO_FUNC1_WFRAMEBCLO,
2499 bus->f1regdata += 2;
2500 if ((hi == 0) && (lo == 0))
2506 bus->tx_seq = (bus->tx_seq + 1) % SDPCM_SEQUENCE_WRAP;
2508 brcmf_dbg(INFO, "Return_dpc value is : %d\n", ret);
2509 bus->ctrl_frame_stat = false;
2510 brcmf_sdbrcm_wait_event_wakeup(bus);
2512 /* Send queued frames (limit 1 if rx may still be pending) */
2513 else if ((bus->clkstate == CLK_AVAIL) && !bus->fcstate &&
2514 brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol) && txlimit
2516 framecnt = rxdone ? txlimit : min(txlimit, bus->txminmax);
2517 framecnt = brcmf_sdbrcm_sendfromq(bus, framecnt);
2518 txlimit -= framecnt;
2521 /* Resched if events or tx frames are pending,
2522 else await next interrupt */
2523 /* On failed register access, all bets are off:
2524 no resched or interrupts */
2525 if ((bus->drvr->bus_if->state == BRCMF_BUS_DOWN) ||
2526 brcmf_sdcard_regfail(bus->sdiodev)) {
2527 brcmf_dbg(ERROR, "failed backplane access over SDIO, halting operation %d\n",
2528 brcmf_sdcard_regfail(bus->sdiodev));
2529 bus->drvr->bus_if->state = BRCMF_BUS_DOWN;
2531 } else if (bus->clkstate == CLK_PENDING) {
2532 brcmf_dbg(INFO, "rescheduled due to CLK_PENDING awaiting I_CHIPACTIVE interrupt\n");
2534 } else if (bus->intstatus || bus->ipend ||
2535 (!bus->fcstate && brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol)
2536 && data_ok(bus)) || PKT_AVAILABLE()) {
2540 bus->dpc_sched = resched;
2542 /* If we're done for now, turn off clock request. */
2543 if ((bus->clkstate != CLK_PENDING)
2544 && bus->idletime == BRCMF_IDLE_IMMEDIATE) {
2545 bus->activity = false;
2546 brcmf_sdbrcm_clkctl(bus, CLK_NONE, false);
2554 static int brcmf_sdbrcm_dpc_thread(void *data)
2556 struct brcmf_sdio *bus = (struct brcmf_sdio *) data;
2558 allow_signal(SIGTERM);
2559 /* Run until signal received */
2561 if (kthread_should_stop())
2563 if (!wait_for_completion_interruptible(&bus->dpc_wait)) {
2564 /* Call bus dpc unless it indicated down
2565 (then clean stop) */
2566 if (bus->drvr->bus_if->state != BRCMF_BUS_DOWN) {
2567 if (brcmf_sdbrcm_dpc(bus))
2568 complete(&bus->dpc_wait);
2570 /* after stopping the bus, exit thread */
2571 brcmf_sdbrcm_bus_stop(bus->sdiodev->dev);
2572 bus->dpc_tsk = NULL;
2581 int brcmf_sdbrcm_bus_txdata(struct device *dev, struct sk_buff *pkt)
2585 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2586 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv;
2587 struct brcmf_sdio *bus = sdiodev->bus;
2589 brcmf_dbg(TRACE, "Enter\n");
2593 /* Add space for the header */
2594 skb_push(pkt, SDPCM_HDRLEN);
2595 /* precondition: IS_ALIGNED((unsigned long)(pkt->data), 2) */
2597 prec = prio2prec((pkt->priority & PRIOMASK));
2599 /* Check for existing queue, current flow-control,
2600 pending event, or pending clock */
2601 brcmf_dbg(TRACE, "deferring pktq len %d\n", pktq_len(&bus->txq));
2604 /* Priority based enq */
2605 spin_lock_bh(&bus->txqlock);
2606 if (brcmf_c_prec_enq(bus->sdiodev->dev, &bus->txq, pkt, prec) ==
2608 skb_pull(pkt, SDPCM_HDRLEN);
2609 brcmf_txcomplete(bus->sdiodev->dev, pkt, false);
2610 brcmu_pkt_buf_free_skb(pkt);
2611 brcmf_dbg(ERROR, "out of bus->txq !!!\n");
2616 spin_unlock_bh(&bus->txqlock);
2618 if (pktq_len(&bus->txq) >= TXHI) {
2620 brcmf_txflowcontrol(bus->sdiodev->dev, 0, ON);
2624 if (pktq_plen(&bus->txq, prec) > qcount[prec])
2625 qcount[prec] = pktq_plen(&bus->txq, prec);
2627 /* Schedule DPC if needed to send queued packet(s) */
2628 if (!bus->dpc_sched) {
2629 bus->dpc_sched = true;
2631 complete(&bus->dpc_wait);
2638 brcmf_sdbrcm_membytes(struct brcmf_sdio *bus, bool write, u32 address, u8 *data,
2645 /* Determine initial transfer parameters */
2646 sdaddr = address & SBSDIO_SB_OFT_ADDR_MASK;
2647 if ((sdaddr + size) & SBSDIO_SBWINDOW_MASK)
2648 dsize = (SBSDIO_SB_OFT_ADDR_LIMIT - sdaddr);
2652 /* Set the backplane window to include the start address */
2653 bcmerror = brcmf_sdcard_set_sbaddr_window(bus->sdiodev, address);
2655 brcmf_dbg(ERROR, "window change failed\n");
2659 /* Do the transfer(s) */
2661 brcmf_dbg(INFO, "%s %d bytes at offset 0x%08x in window 0x%08x\n",
2662 write ? "write" : "read", dsize,
2663 sdaddr, address & SBSDIO_SBWINDOW_MASK);
2664 bcmerror = brcmf_sdcard_rwdata(bus->sdiodev, write,
2665 sdaddr, data, dsize);
2667 brcmf_dbg(ERROR, "membytes transfer failed\n");
2671 /* Adjust for next transfer (if any) */
2676 bcmerror = brcmf_sdcard_set_sbaddr_window(bus->sdiodev,
2679 brcmf_dbg(ERROR, "window change failed\n");
2683 dsize = min_t(uint, SBSDIO_SB_OFT_ADDR_LIMIT, size);
2688 /* Return the window to backplane enumeration space for core access */
2689 if (brcmf_sdcard_set_sbaddr_window(bus->sdiodev, bus->sdiodev->sbwad))
2690 brcmf_dbg(ERROR, "FAILED to set window back to 0x%x\n",
2691 bus->sdiodev->sbwad);
2697 #define CONSOLE_LINE_MAX 192
2699 static int brcmf_sdbrcm_readconsole(struct brcmf_sdio *bus)
2701 struct brcmf_console *c = &bus->console;
2702 u8 line[CONSOLE_LINE_MAX], ch;
2706 /* Don't do anything until FWREADY updates console address */
2707 if (bus->console_addr == 0)
2710 /* Read console log struct */
2711 addr = bus->console_addr + offsetof(struct rte_console, log_le);
2712 rv = brcmf_sdbrcm_membytes(bus, false, addr, (u8 *)&c->log_le,
2717 /* Allocate console buffer (one time only) */
2718 if (c->buf == NULL) {
2719 c->bufsize = le32_to_cpu(c->log_le.buf_size);
2720 c->buf = kmalloc(c->bufsize, GFP_ATOMIC);
2725 idx = le32_to_cpu(c->log_le.idx);
2727 /* Protect against corrupt value */
2728 if (idx > c->bufsize)
2731 /* Skip reading the console buffer if the index pointer
2736 /* Read the console buffer */
2737 addr = le32_to_cpu(c->log_le.buf);
2738 rv = brcmf_sdbrcm_membytes(bus, false, addr, c->buf, c->bufsize);
2742 while (c->last != idx) {
2743 for (n = 0; n < CONSOLE_LINE_MAX - 2; n++) {
2744 if (c->last == idx) {
2745 /* This would output a partial line.
2747 * the buffer pointer and output this
2748 * line next time around.
2753 c->last = c->bufsize - n;
2756 ch = c->buf[c->last];
2757 c->last = (c->last + 1) % c->bufsize;
2764 if (line[n - 1] == '\r')
2767 printk(KERN_DEBUG "CONSOLE: %s\n", line);
2776 static int brcmf_tx_frame(struct brcmf_sdio *bus, u8 *frame, u16 len)
2781 bus->ctrl_frame_stat = false;
2782 ret = brcmf_sdcard_send_buf(bus->sdiodev, bus->sdiodev->sbwad,
2783 SDIO_FUNC_2, F2SYNC, frame, len);
2786 /* On failure, abort the command and terminate the frame */
2787 brcmf_dbg(INFO, "sdio error %d, abort command and terminate frame\n",
2791 brcmf_sdcard_abort(bus->sdiodev, SDIO_FUNC_2);
2793 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
2794 SBSDIO_FUNC1_FRAMECTRL,
2798 for (i = 0; i < 3; i++) {
2800 hi = brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1,
2801 SBSDIO_FUNC1_WFRAMEBCHI,
2803 lo = brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1,
2804 SBSDIO_FUNC1_WFRAMEBCLO,
2806 bus->f1regdata += 2;
2807 if (hi == 0 && lo == 0)
2813 bus->tx_seq = (bus->tx_seq + 1) % SDPCM_SEQUENCE_WRAP;
2819 brcmf_sdbrcm_bus_txctl(struct device *dev, unsigned char *msg, uint msglen)
2827 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2828 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv;
2829 struct brcmf_sdio *bus = sdiodev->bus;
2831 brcmf_dbg(TRACE, "Enter\n");
2833 /* Back the pointer to make a room for bus header */
2834 frame = msg - SDPCM_HDRLEN;
2835 len = (msglen += SDPCM_HDRLEN);
2837 /* Add alignment padding (optional for ctl frames) */
2838 doff = ((unsigned long)frame % BRCMF_SDALIGN);
2843 memset(frame, 0, doff + SDPCM_HDRLEN);
2845 /* precondition: doff < BRCMF_SDALIGN */
2846 doff += SDPCM_HDRLEN;
2848 /* Round send length to next SDIO block */
2849 if (bus->roundup && bus->blocksize && (len > bus->blocksize)) {
2850 u16 pad = bus->blocksize - (len % bus->blocksize);
2851 if ((pad <= bus->roundup) && (pad < bus->blocksize))
2853 } else if (len % BRCMF_SDALIGN) {
2854 len += BRCMF_SDALIGN - (len % BRCMF_SDALIGN);
2857 /* Satisfy length-alignment requirements */
2858 if (len & (ALIGNMENT - 1))
2859 len = roundup(len, ALIGNMENT);
2861 /* precondition: IS_ALIGNED((unsigned long)frame, 2) */
2863 /* Need to lock here to protect txseq and SDIO tx calls */
2868 /* Make sure backplane clock is on */
2869 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
2871 /* Hardware tag: 2 byte len followed by 2 byte ~len check (all LE) */
2872 *(__le16 *) frame = cpu_to_le16((u16) msglen);
2873 *(((__le16 *) frame) + 1) = cpu_to_le16(~msglen);
2875 /* Software tag: channel, sequence number, data offset */
2877 ((SDPCM_CONTROL_CHANNEL << SDPCM_CHANNEL_SHIFT) &
2879 | bus->tx_seq | ((doff << SDPCM_DOFFSET_SHIFT) &
2880 SDPCM_DOFFSET_MASK);
2881 put_unaligned_le32(swheader, frame + SDPCM_FRAMETAG_LEN);
2882 put_unaligned_le32(0, frame + SDPCM_FRAMETAG_LEN + sizeof(swheader));
2884 if (!data_ok(bus)) {
2885 brcmf_dbg(INFO, "No bus credit bus->tx_max %d, bus->tx_seq %d\n",
2886 bus->tx_max, bus->tx_seq);
2887 bus->ctrl_frame_stat = true;
2889 bus->ctrl_frame_buf = frame;
2890 bus->ctrl_frame_len = len;
2892 brcmf_sdbrcm_wait_for_event(bus, &bus->ctrl_frame_stat);
2894 if (bus->ctrl_frame_stat == false) {
2895 brcmf_dbg(INFO, "ctrl_frame_stat == false\n");
2898 brcmf_dbg(INFO, "ctrl_frame_stat == true\n");
2905 if (BRCMF_BYTES_ON() && BRCMF_CTL_ON()) {
2906 printk(KERN_DEBUG "Tx Frame:\n");
2907 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
2909 } else if (BRCMF_HDRS_ON()) {
2910 printk(KERN_DEBUG "TxHdr:\n");
2911 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
2912 frame, min_t(u16, len, 16));
2917 ret = brcmf_tx_frame(bus, frame, len);
2918 } while (ret < 0 && retries++ < TXRETRIES);
2921 if ((bus->idletime == BRCMF_IDLE_IMMEDIATE) && !bus->dpc_sched) {
2922 bus->activity = false;
2923 brcmf_sdbrcm_clkctl(bus, CLK_NONE, true);
2933 return ret ? -EIO : 0;
2937 brcmf_sdbrcm_bus_rxctl(struct device *dev, unsigned char *msg, uint msglen)
2942 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2943 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv;
2944 struct brcmf_sdio *bus = sdiodev->bus;
2946 brcmf_dbg(TRACE, "Enter\n");
2948 /* Wait until control frame is available */
2949 timeleft = brcmf_sdbrcm_dcmd_resp_wait(bus, &bus->rxlen, &pending);
2953 memcpy(msg, bus->rxctl, min(msglen, rxlen));
2958 brcmf_dbg(CTL, "resumed on rxctl frame, got %d expected %d\n",
2960 } else if (timeleft == 0) {
2961 brcmf_dbg(ERROR, "resumed on timeout\n");
2962 } else if (pending == true) {
2963 brcmf_dbg(CTL, "cancelled\n");
2964 return -ERESTARTSYS;
2966 brcmf_dbg(CTL, "resumed for unknown reason?\n");
2974 return rxlen ? (int)rxlen : -ETIMEDOUT;
2977 static int brcmf_sdbrcm_downloadvars(struct brcmf_sdio *bus, void *arg, int len)
2981 brcmf_dbg(TRACE, "Enter\n");
2983 /* Basic sanity checks */
2984 if (bus->sdiodev->bus_if->drvr_up) {
2985 bcmerror = -EISCONN;
2989 bcmerror = -EOVERFLOW;
2993 /* Free the old ones and replace with passed variables */
2996 bus->vars = kmalloc(len, GFP_ATOMIC);
2997 bus->varsz = bus->vars ? len : 0;
2998 if (bus->vars == NULL) {
3003 /* Copy the passed variables, which should include the
3004 terminating double-null */
3005 memcpy(bus->vars, arg, bus->varsz);
3010 static int brcmf_sdbrcm_write_vars(struct brcmf_sdio *bus)
3019 char *nvram_ularray;
3022 /* Even if there are no vars are to be written, we still
3023 need to set the ramsize. */
3024 varsize = bus->varsz ? roundup(bus->varsz, 4) : 0;
3025 varaddr = (bus->ramsize - 4) - varsize;
3028 vbuffer = kzalloc(varsize, GFP_ATOMIC);
3032 memcpy(vbuffer, bus->vars, bus->varsz);
3034 /* Write the vars list */
3036 brcmf_sdbrcm_membytes(bus, true, varaddr, vbuffer, varsize);
3038 /* Verify NVRAM bytes */
3039 brcmf_dbg(INFO, "Compare NVRAM dl & ul; varsize=%d\n", varsize);
3040 nvram_ularray = kmalloc(varsize, GFP_ATOMIC);
3044 /* Upload image to verify downloaded contents. */
3045 memset(nvram_ularray, 0xaa, varsize);
3047 /* Read the vars list to temp buffer for comparison */
3049 brcmf_sdbrcm_membytes(bus, false, varaddr, nvram_ularray,
3052 brcmf_dbg(ERROR, "error %d on reading %d nvram bytes at 0x%08x\n",
3053 bcmerror, varsize, varaddr);
3055 /* Compare the org NVRAM with the one read from RAM */
3056 if (memcmp(vbuffer, nvram_ularray, varsize))
3057 brcmf_dbg(ERROR, "Downloaded NVRAM image is corrupted\n");
3059 brcmf_dbg(ERROR, "Download/Upload/Compare of NVRAM ok\n");
3061 kfree(nvram_ularray);
3067 /* adjust to the user specified RAM */
3068 brcmf_dbg(INFO, "Physical memory size: %d\n", bus->ramsize);
3069 brcmf_dbg(INFO, "Vars are at %d, orig varsize is %d\n",
3071 varsize = ((bus->ramsize - 4) - varaddr);
3074 * Determine the length token:
3075 * Varsize, converted to words, in lower 16-bits, checksum
3080 varsizew_le = cpu_to_le32(0);
3082 varsizew = varsize / 4;
3083 varsizew = (~varsizew << 16) | (varsizew & 0x0000FFFF);
3084 varsizew_le = cpu_to_le32(varsizew);
3087 brcmf_dbg(INFO, "New varsize is %d, length token=0x%08x\n",
3090 /* Write the length token to the last word */
3091 bcmerror = brcmf_sdbrcm_membytes(bus, true, (bus->ramsize - 4),
3092 (u8 *)&varsizew_le, 4);
3097 static int brcmf_sdbrcm_download_state(struct brcmf_sdio *bus, bool enter)
3101 struct chip_info *ci = bus->ci;
3103 /* To enter download state, disable ARM and reset SOCRAM.
3104 * To exit download state, simply reset ARM (default is RAM boot).
3107 bus->alp_only = true;
3109 ci->coredisable(bus->sdiodev, ci, BCMA_CORE_ARM_CM3);
3111 ci->resetcore(bus->sdiodev, ci, BCMA_CORE_INTERNAL_MEM);
3113 /* Clear the top bit of memory */
3116 brcmf_sdbrcm_membytes(bus, true, bus->ramsize - 4,
3120 if (!ci->iscoreup(bus->sdiodev, ci, BCMA_CORE_INTERNAL_MEM)) {
3121 brcmf_dbg(ERROR, "SOCRAM core is down after reset?\n");
3126 bcmerror = brcmf_sdbrcm_write_vars(bus);
3128 brcmf_dbg(ERROR, "no vars written to RAM\n");
3132 w_sdreg32(bus, 0xFFFFFFFF,
3133 offsetof(struct sdpcmd_regs, intstatus), &retries);
3135 ci->resetcore(bus->sdiodev, ci, BCMA_CORE_ARM_CM3);
3137 /* Allow HT Clock now that the ARM is running. */
3138 bus->alp_only = false;
3140 bus->drvr->bus_if->state = BRCMF_BUS_LOAD;
3146 static int brcmf_sdbrcm_get_image(char *buf, int len, struct brcmf_sdio *bus)
3148 if (bus->firmware->size < bus->fw_ptr + len)
3149 len = bus->firmware->size - bus->fw_ptr;
3151 memcpy(buf, &bus->firmware->data[bus->fw_ptr], len);
3156 static int brcmf_sdbrcm_download_code_file(struct brcmf_sdio *bus)
3160 u8 *memblock = NULL, *memptr;
3163 brcmf_dbg(INFO, "Enter\n");
3165 ret = request_firmware(&bus->firmware, BRCMFMAC_FW_NAME,
3166 &bus->sdiodev->func[2]->dev);
3168 brcmf_dbg(ERROR, "Fail to request firmware %d\n", ret);
3173 memptr = memblock = kmalloc(MEMBLOCK + BRCMF_SDALIGN, GFP_ATOMIC);
3174 if (memblock == NULL) {
3178 if ((u32)(unsigned long)memblock % BRCMF_SDALIGN)
3179 memptr += (BRCMF_SDALIGN -
3180 ((u32)(unsigned long)memblock % BRCMF_SDALIGN));
3182 /* Download image */
3184 brcmf_sdbrcm_get_image((char *)memptr, MEMBLOCK, bus))) {
3185 ret = brcmf_sdbrcm_membytes(bus, true, offset, memptr, len);
3187 brcmf_dbg(ERROR, "error %d on writing %d membytes at 0x%08x\n",
3188 ret, MEMBLOCK, offset);
3198 release_firmware(bus->firmware);
3205 * ProcessVars:Takes a buffer of "<var>=<value>\n" lines read from a file
3206 * and ending in a NUL.
3207 * Removes carriage returns, empty lines, comment lines, and converts
3209 * Shortens buffer as needed and pads with NULs. End of buffer is marked
3213 static uint brcmf_process_nvram_vars(char *varbuf, uint len)
3222 findNewline = false;
3225 for (n = 0; n < len; n++) {
3228 if (varbuf[n] == '\r')
3230 if (findNewline && varbuf[n] != '\n')
3232 findNewline = false;
3233 if (varbuf[n] == '#') {
3237 if (varbuf[n] == '\n') {
3247 buf_len = dp - varbuf;
3249 while (dp < varbuf + n)
3255 static int brcmf_sdbrcm_download_nvram(struct brcmf_sdio *bus)
3258 char *memblock = NULL;
3262 ret = request_firmware(&bus->firmware, BRCMFMAC_NV_NAME,
3263 &bus->sdiodev->func[2]->dev);
3265 brcmf_dbg(ERROR, "Fail to request nvram %d\n", ret);
3270 memblock = kmalloc(MEMBLOCK, GFP_ATOMIC);
3271 if (memblock == NULL) {
3276 len = brcmf_sdbrcm_get_image(memblock, MEMBLOCK, bus);
3278 if (len > 0 && len < MEMBLOCK) {
3279 bufp = (char *)memblock;
3281 len = brcmf_process_nvram_vars(bufp, len);
3285 ret = brcmf_sdbrcm_downloadvars(bus, memblock, len + 1);
3287 brcmf_dbg(ERROR, "error downloading vars: %d\n", ret);
3289 brcmf_dbg(ERROR, "error reading nvram file: %d\n", len);
3296 release_firmware(bus->firmware);
3302 static int _brcmf_sdbrcm_download_firmware(struct brcmf_sdio *bus)
3306 /* Keep arm in reset */
3307 if (brcmf_sdbrcm_download_state(bus, true)) {
3308 brcmf_dbg(ERROR, "error placing ARM core in reset\n");
3312 /* External image takes precedence if specified */
3313 if (brcmf_sdbrcm_download_code_file(bus)) {
3314 brcmf_dbg(ERROR, "dongle image file download failed\n");
3318 /* External nvram takes precedence if specified */
3319 if (brcmf_sdbrcm_download_nvram(bus))
3320 brcmf_dbg(ERROR, "dongle nvram file download failed\n");
3322 /* Take arm out of reset */
3323 if (brcmf_sdbrcm_download_state(bus, false)) {
3324 brcmf_dbg(ERROR, "error getting out of ARM core reset\n");
3335 brcmf_sdbrcm_download_firmware(struct brcmf_sdio *bus)
3339 /* Download the firmware */
3340 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
3342 ret = _brcmf_sdbrcm_download_firmware(bus) == 0;
3344 brcmf_sdbrcm_clkctl(bus, CLK_SDONLY, false);
3349 void brcmf_sdbrcm_bus_stop(struct device *dev)
3351 u32 local_hostintmask;
3355 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3356 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv;
3357 struct brcmf_sdio *bus = sdiodev->bus;
3359 brcmf_dbg(TRACE, "Enter\n");
3361 if (bus->watchdog_tsk) {
3362 send_sig(SIGTERM, bus->watchdog_tsk, 1);
3363 kthread_stop(bus->watchdog_tsk);
3364 bus->watchdog_tsk = NULL;
3367 if (bus->dpc_tsk && bus->dpc_tsk != current) {
3368 send_sig(SIGTERM, bus->dpc_tsk, 1);
3369 kthread_stop(bus->dpc_tsk);
3370 bus->dpc_tsk = NULL;
3377 /* Enable clock for device interrupts */
3378 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
3380 /* Disable and clear interrupts at the chip level also */
3381 w_sdreg32(bus, 0, offsetof(struct sdpcmd_regs, hostintmask), &retries);
3382 local_hostintmask = bus->hostintmask;
3383 bus->hostintmask = 0;
3385 /* Change our idea of bus state */
3386 bus->drvr->bus_if->state = BRCMF_BUS_DOWN;
3388 /* Force clocks on backplane to be sure F2 interrupt propagates */
3389 saveclk = brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1,
3390 SBSDIO_FUNC1_CHIPCLKCSR, &err);
3392 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
3393 SBSDIO_FUNC1_CHIPCLKCSR,
3394 (saveclk | SBSDIO_FORCE_HT), &err);
3397 brcmf_dbg(ERROR, "Failed to force clock for F2: err %d\n", err);
3399 /* Turn off the bus (F2), free any pending packets */
3400 brcmf_dbg(INTR, "disable SDIO interrupts\n");
3401 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_0, SDIO_CCCR_IOEx,
3402 SDIO_FUNC_ENABLE_1, NULL);
3404 /* Clear any pending interrupts now that F2 is disabled */
3405 w_sdreg32(bus, local_hostintmask,
3406 offsetof(struct sdpcmd_regs, intstatus), &retries);
3408 /* Turn off the backplane clock (only) */
3409 brcmf_sdbrcm_clkctl(bus, CLK_SDONLY, false);
3411 /* Clear the data packet queues */
3412 brcmu_pktq_flush(&bus->txq, true, NULL, NULL);
3414 /* Clear any held glomming stuff */
3416 brcmu_pkt_buf_free_skb(bus->glomd);
3417 brcmf_sdbrcm_free_glom(bus);
3419 /* Clear rx control and wake any waiters */
3421 brcmf_sdbrcm_dcmd_resp_wake(bus);
3423 /* Reset some F2 state stuff */
3424 bus->rxskip = false;
3425 bus->tx_seq = bus->rx_seq = 0;
3430 int brcmf_sdbrcm_bus_init(struct device *dev)
3432 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3433 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv;
3434 struct brcmf_sdio *bus = sdiodev->bus;
3435 unsigned long timeout;
3441 brcmf_dbg(TRACE, "Enter\n");
3443 /* try to download image and nvram to the dongle */
3444 if (bus_if->state == BRCMF_BUS_DOWN) {
3445 if (!(brcmf_sdbrcm_download_firmware(bus)))
3452 /* Start the watchdog timer */
3454 brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
3458 /* Make sure backplane clock is on, needed to generate F2 interrupt */
3459 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
3460 if (bus->clkstate != CLK_AVAIL)
3463 /* Force clocks on backplane to be sure F2 interrupt propagates */
3465 brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1,
3466 SBSDIO_FUNC1_CHIPCLKCSR, &err);
3468 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
3469 SBSDIO_FUNC1_CHIPCLKCSR,
3470 (saveclk | SBSDIO_FORCE_HT), &err);
3473 brcmf_dbg(ERROR, "Failed to force clock for F2: err %d\n", err);
3477 /* Enable function 2 (frame transfers) */
3478 w_sdreg32(bus, SDPCM_PROT_VERSION << SMB_DATA_VERSION_SHIFT,
3479 offsetof(struct sdpcmd_regs, tosbmailboxdata), &retries);
3480 enable = (SDIO_FUNC_ENABLE_1 | SDIO_FUNC_ENABLE_2);
3482 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_0, SDIO_CCCR_IOEx,
3485 timeout = jiffies + msecs_to_jiffies(BRCMF_WAIT_F2RDY);
3487 while (enable != ready) {
3488 ready = brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_0,
3489 SDIO_CCCR_IORx, NULL);
3490 if (time_after(jiffies, timeout))
3492 else if (time_after(jiffies, timeout - BRCMF_WAIT_F2RDY + 50))
3493 /* prevent busy waiting if it takes too long */
3494 msleep_interruptible(20);
3497 brcmf_dbg(INFO, "enable 0x%02x, ready 0x%02x\n", enable, ready);
3499 /* If F2 successfully enabled, set core and enable interrupts */
3500 if (ready == enable) {
3501 /* Set up the interrupt mask and enable interrupts */
3502 bus->hostintmask = HOSTINTMASK;
3503 w_sdreg32(bus, bus->hostintmask,
3504 offsetof(struct sdpcmd_regs, hostintmask), &retries);
3506 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
3507 SBSDIO_WATERMARK, 8, &err);
3509 /* Set bus state according to enable result */
3510 bus_if->state = BRCMF_BUS_DATA;
3514 /* Disable F2 again */
3515 enable = SDIO_FUNC_ENABLE_1;
3516 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_0,
3517 SDIO_CCCR_IOEx, enable, NULL);
3520 /* Restore previous clock setting */
3521 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
3522 SBSDIO_FUNC1_CHIPCLKCSR, saveclk, &err);
3524 /* If we didn't come up, turn off backplane clock */
3525 if (bus_if->state != BRCMF_BUS_DATA)
3526 brcmf_sdbrcm_clkctl(bus, CLK_NONE, false);
3534 void brcmf_sdbrcm_isr(void *arg)
3536 struct brcmf_sdio *bus = (struct brcmf_sdio *) arg;
3538 brcmf_dbg(TRACE, "Enter\n");
3541 brcmf_dbg(ERROR, "bus is null pointer, exiting\n");
3545 if (bus->drvr->bus_if->state == BRCMF_BUS_DOWN) {
3546 brcmf_dbg(ERROR, "bus is down. we have nothing to do\n");
3549 /* Count the interrupt call */
3553 /* Shouldn't get this interrupt if we're sleeping? */
3554 if (bus->sleeping) {
3555 brcmf_dbg(ERROR, "INTERRUPT WHILE SLEEPING??\n");
3559 /* Disable additional interrupts (is this needed now)? */
3561 brcmf_dbg(ERROR, "isr w/o interrupt configured!\n");
3563 bus->dpc_sched = true;
3565 complete(&bus->dpc_wait);
3568 static bool brcmf_sdbrcm_bus_watchdog(struct brcmf_sdio *bus)
3571 struct brcmf_bus *bus_if = dev_get_drvdata(bus->sdiodev->dev);
3574 brcmf_dbg(TIMER, "Enter\n");
3576 /* Ignore the timer if simulating bus down */
3582 /* Poll period: check device if appropriate. */
3583 if (bus->poll && (++bus->polltick >= bus->pollrate)) {
3586 /* Reset poll tick */
3589 /* Check device if no interrupts */
3590 if (!bus->intr || (bus->intrcount == bus->lastintrs)) {
3592 if (!bus->dpc_sched) {
3594 devpend = brcmf_sdcard_cfg_read(bus->sdiodev,
3595 SDIO_FUNC_0, SDIO_CCCR_INTx,
3598 devpend & (INTR_STATUS_FUNC1 |
3602 /* If there is something, make like the ISR and
3608 bus->dpc_sched = true;
3610 complete(&bus->dpc_wait);
3614 /* Update interrupt tracking */
3615 bus->lastintrs = bus->intrcount;
3618 /* Poll for console output periodically */
3619 if (bus_if->state == BRCMF_BUS_DATA &&
3620 bus->console_interval != 0) {
3621 bus->console.count += BRCMF_WD_POLL_MS;
3622 if (bus->console.count >= bus->console_interval) {
3623 bus->console.count -= bus->console_interval;
3624 /* Make sure backplane clock is on */
3625 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
3626 if (brcmf_sdbrcm_readconsole(bus) < 0)
3628 bus->console_interval = 0;
3633 /* On idle timeout clear activity flag and/or turn off clock */
3634 if ((bus->idletime > 0) && (bus->clkstate == CLK_AVAIL)) {
3635 if (++bus->idlecount >= bus->idletime) {
3637 if (bus->activity) {
3638 bus->activity = false;
3639 brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
3641 brcmf_sdbrcm_clkctl(bus, CLK_NONE, false);
3651 static bool brcmf_sdbrcm_chipmatch(u16 chipid)
3653 if (chipid == BCM4329_CHIP_ID)
3655 if (chipid == BCM4330_CHIP_ID)
3660 static void brcmf_sdbrcm_release_malloc(struct brcmf_sdio *bus)
3662 brcmf_dbg(TRACE, "Enter\n");
3665 bus->rxctl = bus->rxbuf = NULL;
3668 kfree(bus->databuf);
3669 bus->databuf = NULL;
3672 static bool brcmf_sdbrcm_probe_malloc(struct brcmf_sdio *bus)
3674 brcmf_dbg(TRACE, "Enter\n");
3676 if (bus->sdiodev->bus_if->maxctl) {
3678 roundup((bus->sdiodev->bus_if->maxctl + SDPCM_HDRLEN),
3679 ALIGNMENT) + BRCMF_SDALIGN;
3680 bus->rxbuf = kmalloc(bus->rxblen, GFP_ATOMIC);
3685 /* Allocate buffer to receive glomed packet */
3686 bus->databuf = kmalloc(MAX_DATA_BUF, GFP_ATOMIC);
3687 if (!(bus->databuf)) {
3688 /* release rxbuf which was already located as above */
3694 /* Align the buffer */
3695 if ((unsigned long)bus->databuf % BRCMF_SDALIGN)
3696 bus->dataptr = bus->databuf + (BRCMF_SDALIGN -
3697 ((unsigned long)bus->databuf % BRCMF_SDALIGN));
3699 bus->dataptr = bus->databuf;
3708 brcmf_sdbrcm_probe_attach(struct brcmf_sdio *bus, u32 regsva)
3716 bus->alp_only = true;
3718 /* Return the window to backplane enumeration space for core access */
3719 if (brcmf_sdcard_set_sbaddr_window(bus->sdiodev, SI_ENUM_BASE))
3720 brcmf_dbg(ERROR, "FAILED to return to SI_ENUM_BASE\n");
3723 printk(KERN_DEBUG "F1 signature read @0x18000000=0x%4x\n",
3724 brcmf_sdcard_reg_read(bus->sdiodev, SI_ENUM_BASE, 4));
3729 * Force PLL off until brcmf_sdio_chip_attach()
3730 * programs PLL control regs
3733 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
3734 SBSDIO_FUNC1_CHIPCLKCSR,
3735 BRCMF_INIT_CLKCTL1, &err);
3738 brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1,
3739 SBSDIO_FUNC1_CHIPCLKCSR, &err);
3741 if (err || ((clkctl & ~SBSDIO_AVBITS) != BRCMF_INIT_CLKCTL1)) {
3742 brcmf_dbg(ERROR, "ChipClkCSR access: err %d wrote 0x%02x read 0x%02x\n",
3743 err, BRCMF_INIT_CLKCTL1, clkctl);
3747 if (brcmf_sdio_chip_attach(bus->sdiodev, &bus->ci, regsva)) {
3748 brcmf_dbg(ERROR, "brcmf_sdio_chip_attach failed!\n");
3752 if (!brcmf_sdbrcm_chipmatch((u16) bus->ci->chip)) {
3753 brcmf_dbg(ERROR, "unsupported chip: 0x%04x\n", bus->ci->chip);
3757 brcmf_sdio_chip_drivestrengthinit(bus->sdiodev, bus->ci,
3758 SDIO_DRIVE_STRENGTH);
3760 /* Get info on the SOCRAM cores... */
3761 bus->ramsize = bus->ci->ramsize;
3762 if (!(bus->ramsize)) {
3763 brcmf_dbg(ERROR, "failed to find SOCRAM memory!\n");
3767 /* Set core control so an SDIO reset does a backplane reset */
3768 idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
3769 reg_addr = bus->ci->c_inf[idx].base +
3770 offsetof(struct sdpcmd_regs, corecontrol);
3771 reg_val = brcmf_sdcard_reg_read(bus->sdiodev, reg_addr, sizeof(u32));
3772 brcmf_sdcard_reg_write(bus->sdiodev, reg_addr, sizeof(u32),
3773 reg_val | CC_BPRESEN);
3775 brcmu_pktq_init(&bus->txq, (PRIOMASK + 1), TXQLEN);
3777 /* Locate an appropriately-aligned portion of hdrbuf */
3778 bus->rxhdr = (u8 *) roundup((unsigned long)&bus->hdrbuf[0],
3781 /* Set the poll and/or interrupt flags */
3793 static bool brcmf_sdbrcm_probe_init(struct brcmf_sdio *bus)
3795 brcmf_dbg(TRACE, "Enter\n");
3797 /* Disable F2 to clear any intermediate frame state on the dongle */
3798 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_0, SDIO_CCCR_IOEx,
3799 SDIO_FUNC_ENABLE_1, NULL);
3801 bus->drvr->bus_if->state = BRCMF_BUS_DOWN;
3802 bus->sleeping = false;
3803 bus->rxflow = false;
3805 /* Done with backplane-dependent accesses, can drop clock... */
3806 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
3807 SBSDIO_FUNC1_CHIPCLKCSR, 0, NULL);
3809 /* ...and initialize clock/power states */
3810 bus->clkstate = CLK_SDONLY;
3811 bus->idletime = BRCMF_IDLE_INTERVAL;
3812 bus->idleclock = BRCMF_IDLE_ACTIVE;
3814 /* Query the F2 block size, set roundup accordingly */
3815 bus->blocksize = bus->sdiodev->func[2]->cur_blksize;
3816 bus->roundup = min(max_roundup, bus->blocksize);
3818 /* bus module does not support packet chaining */
3819 bus->use_rxchain = false;
3820 bus->sd_rxchain = false;
3826 brcmf_sdbrcm_watchdog_thread(void *data)
3828 struct brcmf_sdio *bus = (struct brcmf_sdio *)data;
3830 allow_signal(SIGTERM);
3831 /* Run until signal received */
3833 if (kthread_should_stop())
3835 if (!wait_for_completion_interruptible(&bus->watchdog_wait)) {
3836 brcmf_sdbrcm_bus_watchdog(bus);
3837 /* Count the tick for reference */
3846 brcmf_sdbrcm_watchdog(unsigned long data)
3848 struct brcmf_sdio *bus = (struct brcmf_sdio *)data;
3850 if (bus->watchdog_tsk) {
3851 complete(&bus->watchdog_wait);
3852 /* Reschedule the watchdog */
3853 if (bus->wd_timer_valid)
3854 mod_timer(&bus->timer,
3855 jiffies + BRCMF_WD_POLL_MS * HZ / 1000);
3859 static void brcmf_sdbrcm_release_dongle(struct brcmf_sdio *bus)
3861 brcmf_dbg(TRACE, "Enter\n");
3864 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
3865 brcmf_sdbrcm_clkctl(bus, CLK_NONE, false);
3866 brcmf_sdio_chip_detach(&bus->ci);
3867 if (bus->vars && bus->varsz)
3872 brcmf_dbg(TRACE, "Disconnected\n");
3875 /* Detach and free everything */
3876 static void brcmf_sdbrcm_release(struct brcmf_sdio *bus)
3878 brcmf_dbg(TRACE, "Enter\n");
3881 /* De-register interrupt handler */
3882 brcmf_sdcard_intr_dereg(bus->sdiodev);
3884 if (bus->sdiodev->bus_if->drvr) {
3885 brcmf_detach(bus->sdiodev->dev);
3886 brcmf_sdbrcm_release_dongle(bus);
3890 brcmf_sdbrcm_release_malloc(bus);
3895 brcmf_dbg(TRACE, "Disconnected\n");
3898 void *brcmf_sdbrcm_probe(u32 regsva, struct brcmf_sdio_dev *sdiodev)
3901 struct brcmf_sdio *bus;
3903 brcmf_dbg(TRACE, "Enter\n");
3905 /* We make an assumption about address window mappings:
3906 * regsva == SI_ENUM_BASE*/
3908 /* Allocate private bus interface state */
3909 bus = kzalloc(sizeof(struct brcmf_sdio), GFP_ATOMIC);
3913 bus->sdiodev = sdiodev;
3915 skb_queue_head_init(&bus->glom);
3916 bus->txbound = BRCMF_TXBOUND;
3917 bus->rxbound = BRCMF_RXBOUND;
3918 bus->txminmax = BRCMF_TXMINMAX;
3919 bus->tx_seq = SDPCM_SEQUENCE_WRAP - 1;
3920 bus->usebufpool = false; /* Use bufpool if allocated,
3921 else use locally malloced rxbuf */
3923 /* attempt to attach to the dongle */
3924 if (!(brcmf_sdbrcm_probe_attach(bus, regsva))) {
3925 brcmf_dbg(ERROR, "brcmf_sdbrcm_probe_attach failed\n");
3929 spin_lock_init(&bus->txqlock);
3930 init_waitqueue_head(&bus->ctrl_wait);
3931 init_waitqueue_head(&bus->dcmd_resp_wait);
3933 /* Set up the watchdog timer */
3934 init_timer(&bus->timer);
3935 bus->timer.data = (unsigned long)bus;
3936 bus->timer.function = brcmf_sdbrcm_watchdog;
3938 /* Initialize thread based operation and lock */
3939 sema_init(&bus->sdsem, 1);
3941 /* Initialize watchdog thread */
3942 init_completion(&bus->watchdog_wait);
3943 bus->watchdog_tsk = kthread_run(brcmf_sdbrcm_watchdog_thread,
3944 bus, "brcmf_watchdog");
3945 if (IS_ERR(bus->watchdog_tsk)) {
3947 "brcmf_watchdog thread failed to start\n");
3948 bus->watchdog_tsk = NULL;
3950 /* Initialize DPC thread */
3951 init_completion(&bus->dpc_wait);
3952 bus->dpc_tsk = kthread_run(brcmf_sdbrcm_dpc_thread,
3954 if (IS_ERR(bus->dpc_tsk)) {
3956 "brcmf_dpc thread failed to start\n");
3957 bus->dpc_tsk = NULL;
3960 /* Attach to the brcmf/OS/network interface */
3961 bus->drvr = brcmf_attach(bus, SDPCM_RESERVE, bus->sdiodev->dev);
3963 brcmf_dbg(ERROR, "brcmf_attach failed\n");
3967 /* Allocate buffers */
3968 if (!(brcmf_sdbrcm_probe_malloc(bus))) {
3969 brcmf_dbg(ERROR, "brcmf_sdbrcm_probe_malloc failed\n");
3973 if (!(brcmf_sdbrcm_probe_init(bus))) {
3974 brcmf_dbg(ERROR, "brcmf_sdbrcm_probe_init failed\n");
3978 /* Register interrupt callback, but mask it (not operational yet). */
3979 brcmf_dbg(INTR, "disable SDIO interrupts (not interested yet)\n");
3980 ret = brcmf_sdcard_intr_reg(bus->sdiodev);
3982 brcmf_dbg(ERROR, "FAILED: sdcard_intr_reg returned %d\n", ret);
3985 brcmf_dbg(INTR, "registered SDIO interrupt function ok\n");
3987 brcmf_dbg(INFO, "completed!!\n");
3989 /* if firmware path present try to download and bring up bus */
3990 ret = brcmf_bus_start(bus->sdiodev->dev);
3992 if (ret == -ENOLINK) {
3993 brcmf_dbg(ERROR, "dongle is not responding\n");
3998 /* add interface and open for business */
3999 if (brcmf_add_if(bus->sdiodev->dev, 0, "wlan%d", NULL)) {
4000 brcmf_dbg(ERROR, "Add primary net device interface failed!!\n");
4007 brcmf_sdbrcm_release(bus);
4011 void brcmf_sdbrcm_disconnect(void *ptr)
4013 struct brcmf_sdio *bus = (struct brcmf_sdio *)ptr;
4015 brcmf_dbg(TRACE, "Enter\n");
4018 brcmf_sdbrcm_release(bus);
4020 brcmf_dbg(TRACE, "Disconnected\n");
4024 brcmf_sdbrcm_wd_timer(struct brcmf_sdio *bus, uint wdtick)
4026 /* Totally stop the timer */
4027 if (!wdtick && bus->wd_timer_valid == true) {
4028 del_timer_sync(&bus->timer);
4029 bus->wd_timer_valid = false;
4030 bus->save_ms = wdtick;
4034 /* don't start the wd until fw is loaded */
4035 if (bus->drvr->bus_if->state == BRCMF_BUS_DOWN)
4039 if (bus->save_ms != BRCMF_WD_POLL_MS) {
4040 if (bus->wd_timer_valid == true)
4041 /* Stop timer and restart at new value */
4042 del_timer_sync(&bus->timer);
4044 /* Create timer again when watchdog period is
4045 dynamically changed or in the first instance
4047 bus->timer.expires =
4048 jiffies + BRCMF_WD_POLL_MS * HZ / 1000;
4049 add_timer(&bus->timer);
4052 /* Re arm the timer, at last watchdog period */
4053 mod_timer(&bus->timer,
4054 jiffies + BRCMF_WD_POLL_MS * HZ / 1000);
4057 bus->wd_timer_valid = true;
4058 bus->save_ms = wdtick;