drivers/net/wireless/ath/ath9k/main.c

   1 /*
   2  * Copyright (c) 2008-2009 Atheros Communications Inc.
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #include <linux/nl80211.h>
  18 #include "ath9k.h"
  19 #include "btcoex.h"
  20
  21 static void ath_update_txpow(struct ath_softc *sc)
  22 {
  23         struct ath_hw *ah = sc->sc_ah;
  24
  25         if (sc->curtxpow != sc->config.txpowlimit) {
  26                 ath9k_hw_set_txpowerlimit(ah, sc->config.txpowlimit, false);
  27                 /* read back in case value is clamped */
  28                 sc->curtxpow = ath9k_hw_regulatory(ah)->power_limit;
  29         }
  30 }
  31
  32 static u8 parse_mpdudensity(u8 mpdudensity)
  33 {
  34         /*
  35          * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
  36          *   0 for no restriction
  37          *   1 for 1/4 us
  38          *   2 for 1/2 us
  39          *   3 for 1 us
  40          *   4 for 2 us
  41          *   5 for 4 us
  42          *   6 for 8 us
  43          *   7 for 16 us
  44          */
  45         switch (mpdudensity) {
  46         case 0:
  47                 return 0;
  48         case 1:
  49         case 2:
  50         case 3:
  51                 /* Our lower layer calculations limit our precision to
  52                    1 microsecond */
  53                 return 1;
  54         case 4:
  55                 return 2;
  56         case 5:
  57                 return 4;
  58         case 6:
  59                 return 8;
  60         case 7:
  61                 return 16;
  62         default:
  63                 return 0;
  64         }
  65 }
  66
  67 static struct ath9k_channel *ath_get_curchannel(struct ath_softc *sc,
  68                                                 struct ieee80211_hw *hw)
  69 {
  70         struct ieee80211_channel *curchan = hw->conf.channel;
  71         struct ath9k_channel *channel;
  72         u8 chan_idx;
  73
  74         chan_idx = curchan->hw_value;
  75         channel = &sc->sc_ah->channels[chan_idx];
  76         ath9k_update_ichannel(sc, hw, channel);
  77         return channel;
  78 }
  79
  80 bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
  81 {
  82         unsigned long flags;
  83         bool ret;
  84
  85         spin_lock_irqsave(&sc->sc_pm_lock, flags);
  86         ret = ath9k_hw_setpower(sc->sc_ah, mode);
  87         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  88
  89         return ret;
  90 }
  91
  92 void ath9k_ps_wakeup(struct ath_softc *sc)
  93 {
  94         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  95         unsigned long flags;
  96         enum ath9k_power_mode power_mode;
  97
  98         spin_lock_irqsave(&sc->sc_pm_lock, flags);
  99         if (++sc->ps_usecount != 1)
 100                 goto unlock;
 101
 102         power_mode = sc->sc_ah->power_mode;
 103         ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
 104
 105         /*
 106          * While the hardware is asleep, the cycle counters contain no
 107          * useful data. Better clear them now so that they don't mess up
 108          * survey data results.
 109          */
 110         if (power_mode != ATH9K_PM_AWAKE) {
 111                 spin_lock(&common->cc_lock);
 112                 ath_hw_cycle_counters_update(common);
 113                 memset(&common->cc_survey, 0, sizeof(common->cc_survey));
 114                 spin_unlock(&common->cc_lock);
 115         }
 116
 117  unlock:
 118         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 119 }
 120
 121 void ath9k_ps_restore(struct ath_softc *sc)
 122 {
 123         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 124         unsigned long flags;
 125
 126         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 127         if (--sc->ps_usecount != 0)
 128                 goto unlock;
 129
 130         spin_lock(&common->cc_lock);
 131         ath_hw_cycle_counters_update(common);
 132         spin_unlock(&common->cc_lock);
 133
 134         if (sc->ps_idle)
 135                 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
 136         else if (sc->ps_enabled &&
 137                  !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
 138                               PS_WAIT_FOR_CAB |
 139                               PS_WAIT_FOR_PSPOLL_DATA |
 140                               PS_WAIT_FOR_TX_ACK)))
 141                 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
 142
 143  unlock:
 144         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 145 }
 146
 147 static void ath_start_ani(struct ath_common *common)
 148 {
 149         struct ath_hw *ah = common->ah;
 150         unsigned long timestamp = jiffies_to_msecs(jiffies);
 151         struct ath_softc *sc = (struct ath_softc *) common->priv;
 152
 153         if (!(sc->sc_flags & SC_OP_ANI_RUN))
 154                 return;
 155
 156         if (sc->sc_flags & SC_OP_OFFCHANNEL)
 157                 return;
 158
 159         common->ani.longcal_timer = timestamp;
 160         common->ani.shortcal_timer = timestamp;
 161         common->ani.checkani_timer = timestamp;
 162
 163         mod_timer(&common->ani.timer,
 164                   jiffies +
 165                         msecs_to_jiffies((u32)ah->config.ani_poll_interval));
 166 }
 167
 168 static void ath_update_survey_nf(struct ath_softc *sc, int channel)
 169 {
 170         struct ath_hw *ah = sc->sc_ah;
 171         struct ath9k_channel *chan = &ah->channels[channel];
 172         struct survey_info *survey = &sc->survey[channel];
 173
 174         if (chan->noisefloor) {
 175                 survey->filled |= SURVEY_INFO_NOISE_DBM;
 176                 survey->noise = chan->noisefloor;
 177         }
 178 }
 179
 180 static void ath_update_survey_stats(struct ath_softc *sc)
 181 {
 182         struct ath_hw *ah = sc->sc_ah;
 183         struct ath_common *common = ath9k_hw_common(ah);
 184         int pos = ah->curchan - &ah->channels[0];
 185         struct survey_info *survey = &sc->survey[pos];
 186         struct ath_cycle_counters *cc = &common->cc_survey;
 187         unsigned int div = common->clockrate * 1000;
 188
 189         if (!ah->curchan)
 190                 return;
 191
 192         if (ah->power_mode == ATH9K_PM_AWAKE)
 193                 ath_hw_cycle_counters_update(common);
 194
 195         if (cc->cycles > 0) {
 196                 survey->filled |= SURVEY_INFO_CHANNEL_TIME |
 197                         SURVEY_INFO_CHANNEL_TIME_BUSY |
 198                         SURVEY_INFO_CHANNEL_TIME_RX |
 199                         SURVEY_INFO_CHANNEL_TIME_TX;
 200                 survey->channel_time += cc->cycles / div;
 201                 survey->channel_time_busy += cc->rx_busy / div;
 202                 survey->channel_time_rx += cc->rx_frame / div;
 203                 survey->channel_time_tx += cc->tx_frame / div;
 204         }
 205         memset(cc, 0, sizeof(*cc));
 206
 207         ath_update_survey_nf(sc, pos);
 208 }
 209
 210 /*
 211  * Set/change channels.  If the channel is really being changed, it's done
 212  * by reseting the chip.  To accomplish this we must first cleanup any pending
 213  * DMA, then restart stuff.
 214 */
 215 int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
 216                     struct ath9k_channel *hchan)
 217 {
 218         struct ath_wiphy *aphy = hw->priv;
 219         struct ath_hw *ah = sc->sc_ah;
 220         struct ath_common *common = ath9k_hw_common(ah);
 221         struct ieee80211_conf *conf = &common->hw->conf;
 222         bool fastcc = true, stopped;
 223         struct ieee80211_channel *channel = hw->conf.channel;
 224         struct ath9k_hw_cal_data *caldata = NULL;
 225         int r;
 226
 227         if (sc->sc_flags & SC_OP_INVALID)
 228                 return -EIO;
 229
 230         del_timer_sync(&common->ani.timer);
 231         cancel_work_sync(&sc->paprd_work);
 232         cancel_work_sync(&sc->hw_check_work);
 233         cancel_delayed_work_sync(&sc->tx_complete_work);
 234
 235         ath9k_ps_wakeup(sc);
 236
 237         spin_lock_bh(&sc->sc_pcu_lock);
 238
 239         /*
 240          * This is only performed if the channel settings have
 241          * actually changed.
 242          *
 243          * To switch channels clear any pending DMA operations;
 244          * wait long enough for the RX fifo to drain, reset the
 245          * hardware at the new frequency, and then re-enable
 246          * the relevant bits of the h/w.
 247          */
 248         ath9k_hw_disable_interrupts(ah);
 249         stopped = ath_drain_all_txq(sc, false);
 250
 251         if (!ath_stoprecv(sc))
 252                 stopped = false;
 253
 254         /* XXX: do not flush receive queue here. We don't want
 255          * to flush data frames already in queue because of
 256          * changing channel. */
 257
 258         if (!stopped || !(sc->sc_flags & SC_OP_OFFCHANNEL))
 259                 fastcc = false;
 260
 261         if (!(sc->sc_flags & SC_OP_OFFCHANNEL))
 262                 caldata = &aphy->caldata;
 263
 264         ath_dbg(common, ATH_DBG_CONFIG,
 265                 "(%u MHz) -> (%u MHz), conf_is_ht40: %d fastcc: %d\n",
 266                 sc->sc_ah->curchan->channel,
 267                 channel->center_freq, conf_is_ht40(conf),
 268                 fastcc);
 269
 270         r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
 271         if (r) {
 272                 ath_err(common,
 273                         "Unable to reset channel (%u MHz), reset status %d\n",
 274                         channel->center_freq, r);
 275                 goto ps_restore;
 276         }
 277
 278         if (ath_startrecv(sc) != 0) {
 279                 ath_err(common, "Unable to restart recv logic\n");
 280                 r = -EIO;
 281                 goto ps_restore;
 282         }
 283
 284         ath_update_txpow(sc);
 285         ath9k_hw_set_interrupts(ah, ah->imask);
 286
 287         if (!(sc->sc_flags & (SC_OP_OFFCHANNEL))) {
 288                 if (sc->sc_flags & SC_OP_BEACONS)
 289                         ath_beacon_config(sc, NULL);
 290                 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
 291                 ath_start_ani(common);
 292         }
 293
 294  ps_restore:
 295         spin_unlock_bh(&sc->sc_pcu_lock);
 296
 297         ath9k_ps_restore(sc);
 298         return r;
 299 }
 300
 301 static void ath_paprd_activate(struct ath_softc *sc)
 302 {
 303         struct ath_hw *ah = sc->sc_ah;
 304         struct ath9k_hw_cal_data *caldata = ah->caldata;
 305         struct ath_common *common = ath9k_hw_common(ah);
 306         int chain;
 307
 308         if (!caldata || !caldata->paprd_done)
 309                 return;
 310
 311         ath9k_ps_wakeup(sc);
 312         ar9003_paprd_enable(ah, false);
 313         for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
 314                 if (!(common->tx_chainmask & BIT(chain)))
 315                         continue;
 316
 317                 ar9003_paprd_populate_single_table(ah, caldata, chain);
 318         }
 319
 320         ar9003_paprd_enable(ah, true);
 321         ath9k_ps_restore(sc);
 322 }
 323
 324 static bool ath_paprd_send_frame(struct ath_softc *sc, struct sk_buff *skb, int chain)
 325 {
 326         struct ieee80211_hw *hw = sc->hw;
 327         struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
 328         struct ath_tx_control txctl;
 329         int time_left;
 330
 331         memset(&txctl, 0, sizeof(txctl));
 332         txctl.txq = sc->tx.txq_map[WME_AC_BE];
 333
 334         memset(tx_info, 0, sizeof(*tx_info));
 335         tx_info->band = hw->conf.channel->band;
 336         tx_info->flags |= IEEE80211_TX_CTL_NO_ACK;
 337         tx_info->control.rates[0].idx = 0;
 338         tx_info->control.rates[0].count = 1;
 339         tx_info->control.rates[0].flags = IEEE80211_TX_RC_MCS;
 340         tx_info->control.rates[1].idx = -1;
 341
 342         init_completion(&sc->paprd_complete);
 343         sc->paprd_pending = true;
 344         txctl.paprd = BIT(chain);
 345         if (ath_tx_start(hw, skb, &txctl) != 0)
 346                 return false;
 347
 348         time_left = wait_for_completion_timeout(&sc->paprd_complete,
 349                         msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
 350         sc->paprd_pending = false;
 351
 352         if (!time_left)
 353                 ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_CALIBRATE,
 354                         "Timeout waiting for paprd training on TX chain %d\n",
 355                         chain);
 356
 357         return !!time_left;
 358 }
 359
 360 void ath_paprd_calibrate(struct work_struct *work)
 361 {
 362         struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
 363         struct ieee80211_hw *hw = sc->hw;
 364         struct ath_hw *ah = sc->sc_ah;
 365         struct ieee80211_hdr *hdr;
 366         struct sk_buff *skb = NULL;
 367         struct ath9k_hw_cal_data *caldata = ah->caldata;
 368         struct ath_common *common = ath9k_hw_common(ah);
 369         int ftype;
 370         int chain_ok = 0;
 371         int chain;
 372         int len = 1800;
 373
 374         if (!caldata)
 375                 return;
 376
 377         if (ar9003_paprd_init_table(ah) < 0)
 378                 return;
 379
 380         skb = alloc_skb(len, GFP_KERNEL);
 381         if (!skb)
 382                 return;
 383
 384         skb_put(skb, len);
 385         memset(skb->data, 0, len);
 386         hdr = (struct ieee80211_hdr *)skb->data;
 387         ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
 388         hdr->frame_control = cpu_to_le16(ftype);
 389         hdr->duration_id = cpu_to_le16(10);
 390         memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
 391         memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
 392         memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
 393
 394         ath9k_ps_wakeup(sc);
 395         for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
 396                 if (!(common->tx_chainmask & BIT(chain)))
 397                         continue;
 398
 399                 chain_ok = 0;
 400
 401                 ath_dbg(common, ATH_DBG_CALIBRATE,
 402                         "Sending PAPRD frame for thermal measurement "
 403                         "on chain %d\n", chain);
 404                 if (!ath_paprd_send_frame(sc, skb, chain))
 405                         goto fail_paprd;
 406
 407                 ar9003_paprd_setup_gain_table(ah, chain);
 408
 409                 ath_dbg(common, ATH_DBG_CALIBRATE,
 410                         "Sending PAPRD training frame on chain %d\n", chain);
 411                 if (!ath_paprd_send_frame(sc, skb, chain))
 412                         goto fail_paprd;
 413
 414                 if (!ar9003_paprd_is_done(ah))
 415                         break;
 416
 417                 if (ar9003_paprd_create_curve(ah, caldata, chain) != 0)
 418                         break;
 419
 420                 chain_ok = 1;
 421         }
 422         kfree_skb(skb);
 423
 424         if (chain_ok) {
 425                 caldata->paprd_done = true;
 426                 ath_paprd_activate(sc);
 427         }
 428
 429 fail_paprd:
 430         ath9k_ps_restore(sc);
 431 }
 432
 433 /*
 434  *  This routine performs the periodic noise floor calibration function
 435  *  that is used to adjust and optimize the chip performance.  This
 436  *  takes environmental changes (location, temperature) into account.
 437  *  When the task is complete, it reschedules itself depending on the
 438  *  appropriate interval that was calculated.
 439  */
 440 void ath_ani_calibrate(unsigned long data)
 441 {
 442         struct ath_softc *sc = (struct ath_softc *)data;
 443         struct ath_hw *ah = sc->sc_ah;
 444         struct ath_common *common = ath9k_hw_common(ah);
 445         bool longcal = false;
 446         bool shortcal = false;
 447         bool aniflag = false;
 448         unsigned int timestamp = jiffies_to_msecs(jiffies);
 449         u32 cal_interval, short_cal_interval, long_cal_interval;
 450         unsigned long flags;
 451
 452         if (ah->caldata && ah->caldata->nfcal_interference)
 453                 long_cal_interval = ATH_LONG_CALINTERVAL_INT;
 454         else
 455                 long_cal_interval = ATH_LONG_CALINTERVAL;
 456
 457         short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
 458                 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
 459
 460         /* Only calibrate if awake */
 461         if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
 462                 goto set_timer;
 463
 464         ath9k_ps_wakeup(sc);
 465
 466         /* Long calibration runs independently of short calibration. */
 467         if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) {
 468                 longcal = true;
 469                 ath_dbg(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
 470                 common->ani.longcal_timer = timestamp;
 471         }
 472
 473         /* Short calibration applies only while caldone is false */
 474         if (!common->ani.caldone) {
 475                 if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
 476                         shortcal = true;
 477                         ath_dbg(common, ATH_DBG_ANI,
 478                                 "shortcal @%lu\n", jiffies);
 479                         common->ani.shortcal_timer = timestamp;
 480                         common->ani.resetcal_timer = timestamp;
 481                 }
 482         } else {
 483                 if ((timestamp - common->ani.resetcal_timer) >=
 484                     ATH_RESTART_CALINTERVAL) {
 485                         common->ani.caldone = ath9k_hw_reset_calvalid(ah);
 486                         if (common->ani.caldone)
 487                                 common->ani.resetcal_timer = timestamp;
 488                 }
 489         }
 490
 491         /* Verify whether we must check ANI */
 492         if ((timestamp - common->ani.checkani_timer) >=
 493              ah->config.ani_poll_interval) {
 494                 aniflag = true;
 495                 common->ani.checkani_timer = timestamp;
 496         }
 497
 498         /* Skip all processing if there's nothing to do. */
 499         if (longcal || shortcal || aniflag) {
 500                 /* Call ANI routine if necessary */
 501                 if (aniflag) {
 502                         spin_lock_irqsave(&common->cc_lock, flags);
 503                         ath9k_hw_ani_monitor(ah, ah->curchan);
 504                         ath_update_survey_stats(sc);
 505                         spin_unlock_irqrestore(&common->cc_lock, flags);
 506                 }
 507
 508                 /* Perform calibration if necessary */
 509                 if (longcal || shortcal) {
 510                         common->ani.caldone =
 511                                 ath9k_hw_calibrate(ah,
 512                                                    ah->curchan,
 513                                                    common->rx_chainmask,
 514                                                    longcal);
 515                 }
 516         }
 517
 518         ath9k_ps_restore(sc);
 519
 520 set_timer:
 521         /*
 522         * Set timer interval based on previous results.
 523         * The interval must be the shortest necessary to satisfy ANI,
 524         * short calibration and long calibration.
 525         */
 526         cal_interval = ATH_LONG_CALINTERVAL;
 527         if (sc->sc_ah->config.enable_ani)
 528                 cal_interval = min(cal_interval,
 529                                    (u32)ah->config.ani_poll_interval);
 530         if (!common->ani.caldone)
 531                 cal_interval = min(cal_interval, (u32)short_cal_interval);
 532
 533         mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
 534         if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) {
 535                 if (!ah->caldata->paprd_done)
 536                         ieee80211_queue_work(sc->hw, &sc->paprd_work);
 537                 else if (!ah->paprd_table_write_done)
 538                         ath_paprd_activate(sc);
 539         }
 540 }
 541
 542 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
 543 {
 544         struct ath_node *an;
 545         struct ath_hw *ah = sc->sc_ah;
 546         an = (struct ath_node *)sta->drv_priv;
 547
 548         if ((ah->caps.hw_caps) & ATH9K_HW_CAP_APM)
 549                 sc->sc_flags |= SC_OP_ENABLE_APM;
 550
 551         if (sc->sc_flags & SC_OP_TXAGGR) {
 552                 ath_tx_node_init(sc, an);
 553                 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
 554                                      sta->ht_cap.ampdu_factor);
 555                 an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
 556         }
 557 }
 558
 559 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
 560 {
 561         struct ath_node *an = (struct ath_node *)sta->drv_priv;
 562
 563         if (sc->sc_flags & SC_OP_TXAGGR)
 564                 ath_tx_node_cleanup(sc, an);
 565 }
 566
 567 void ath_hw_check(struct work_struct *work)
 568 {
 569         struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
 570         int i;
 571
 572         ath9k_ps_wakeup(sc);
 573
 574         for (i = 0; i < 3; i++) {
 575                 if (ath9k_hw_check_alive(sc->sc_ah))
 576                         goto out;
 577
 578                 msleep(1);
 579         }
 580         ath_reset(sc, true);
 581
 582 out:
 583         ath9k_ps_restore(sc);
 584 }
 585
 586 void ath9k_tasklet(unsigned long data)
 587 {
 588         struct ath_softc *sc = (struct ath_softc *)data;
 589         struct ath_hw *ah = sc->sc_ah;
 590         struct ath_common *common = ath9k_hw_common(ah);
 591
 592         u32 status = sc->intrstatus;
 593         u32 rxmask;
 594
 595         if (status & ATH9K_INT_FATAL) {
 596                 ath_reset(sc, true);
 597                 return;
 598         }
 599
 600         ath9k_ps_wakeup(sc);
 601         spin_lock(&sc->sc_pcu_lock);
 602
 603         if (!ath9k_hw_check_alive(ah))
 604                 ieee80211_queue_work(sc->hw, &sc->hw_check_work);
 605
 606         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 607                 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
 608                           ATH9K_INT_RXORN);
 609         else
 610                 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 611
 612         if (status & rxmask) {
 613                 /* Check for high priority Rx first */
 614                 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
 615                     (status & ATH9K_INT_RXHP))
 616                         ath_rx_tasklet(sc, 0, true);
 617
 618                 ath_rx_tasklet(sc, 0, false);
 619         }
 620
 621         if (status & ATH9K_INT_TX) {
 622                 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 623                         ath_tx_edma_tasklet(sc);
 624                 else
 625                         ath_tx_tasklet(sc);
 626         }
 627
 628         if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
 629                 /*
 630                  * TSF sync does not look correct; remain awake to sync with
 631                  * the next Beacon.
 632                  */
 633                 ath_dbg(common, ATH_DBG_PS,
 634                         "TSFOOR - Sync with next Beacon\n");
 635                 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
 636         }
 637
 638         if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
 639                 if (status & ATH9K_INT_GENTIMER)
 640                         ath_gen_timer_isr(sc->sc_ah);
 641
 642         /* re-enable hardware interrupt */
 643         ath9k_hw_enable_interrupts(ah);
 644
 645         spin_unlock(&sc->sc_pcu_lock);
 646         ath9k_ps_restore(sc);
 647 }
 648
 649 irqreturn_t ath_isr(int irq, void *dev)
 650 {
 651 #define SCHED_INTR (                            \
 652                 ATH9K_INT_FATAL |               \
 653                 ATH9K_INT_RXORN |               \
 654                 ATH9K_INT_RXEOL |               \
 655                 ATH9K_INT_RX |                  \
 656                 ATH9K_INT_RXLP |                \
 657                 ATH9K_INT_RXHP |                \
 658                 ATH9K_INT_TX |                  \
 659                 ATH9K_INT_BMISS |               \
 660                 ATH9K_INT_CST |                 \
 661                 ATH9K_INT_TSFOOR |              \
 662                 ATH9K_INT_GENTIMER)
 663
 664         struct ath_softc *sc = dev;
 665         struct ath_hw *ah = sc->sc_ah;
 666         struct ath_common *common = ath9k_hw_common(ah);
 667         enum ath9k_int status;
 668         bool sched = false;
 669
 670         /*
 671          * The hardware is not ready/present, don't
 672          * touch anything. Note this can happen early
 673          * on if the IRQ is shared.
 674          */
 675         if (sc->sc_flags & SC_OP_INVALID)
 676                 return IRQ_NONE;
 677
 678
 679         /* shared irq, not for us */
 680
 681         if (!ath9k_hw_intrpend(ah))
 682                 return IRQ_NONE;
 683
 684         /*
 685          * Figure out the reason(s) for the interrupt.  Note
 686          * that the hal returns a pseudo-ISR that may include
 687          * bits we haven't explicitly enabled so we mask the
 688          * value to insure we only process bits we requested.
 689          */
 690         ath9k_hw_getisr(ah, &status);   /* NB: clears ISR too */
 691         status &= ah->imask;    /* discard unasked-for bits */
 692
 693         /*
 694          * If there are no status bits set, then this interrupt was not
 695          * for me (should have been caught above).
 696          */
 697         if (!status)
 698                 return IRQ_NONE;
 699
 700         /* Cache the status */
 701         sc->intrstatus = status;
 702
 703         if (status & SCHED_INTR)
 704                 sched = true;
 705
 706         /*
 707          * If a FATAL or RXORN interrupt is received, we have to reset the
 708          * chip immediately.
 709          */
 710         if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
 711             !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
 712                 goto chip_reset;
 713
 714         if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
 715             (status & ATH9K_INT_BB_WATCHDOG)) {
 716
 717                 spin_lock(&common->cc_lock);
 718                 ath_hw_cycle_counters_update(common);
 719                 ar9003_hw_bb_watchdog_dbg_info(ah);
 720                 spin_unlock(&common->cc_lock);
 721
 722                 goto chip_reset;
 723         }
 724
 725         if (status & ATH9K_INT_SWBA)
 726                 tasklet_schedule(&sc->bcon_tasklet);
 727
 728         if (status & ATH9K_INT_TXURN)
 729                 ath9k_hw_updatetxtriglevel(ah, true);
 730
 731         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
 732                 if (status & ATH9K_INT_RXEOL) {
 733                         ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 734                         ath9k_hw_set_interrupts(ah, ah->imask);
 735                 }
 736         }
 737
 738         if (status & ATH9K_INT_MIB) {
 739                 /*
 740                  * Disable interrupts until we service the MIB
 741                  * interrupt; otherwise it will continue to
 742                  * fire.
 743                  */
 744                 ath9k_hw_disable_interrupts(ah);
 745                 /*
 746                  * Let the hal handle the event. We assume
 747                  * it will clear whatever condition caused
 748                  * the interrupt.
 749                  */
 750                 spin_lock(&common->cc_lock);
 751                 ath9k_hw_proc_mib_event(ah);
 752                 spin_unlock(&common->cc_lock);
 753                 ath9k_hw_enable_interrupts(ah);
 754         }
 755
 756         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
 757                 if (status & ATH9K_INT_TIM_TIMER) {
 758                         if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle))
 759                                 goto chip_reset;
 760                         /* Clear RxAbort bit so that we can
 761                          * receive frames */
 762                         ath9k_setpower(sc, ATH9K_PM_AWAKE);
 763                         ath9k_hw_setrxabort(sc->sc_ah, 0);
 764                         sc->ps_flags |= PS_WAIT_FOR_BEACON;
 765                 }
 766
 767 chip_reset:
 768
 769         ath_debug_stat_interrupt(sc, status);
 770
 771         if (sched) {
 772                 /* turn off every interrupt */
 773                 ath9k_hw_disable_interrupts(ah);
 774                 tasklet_schedule(&sc->intr_tq);
 775         }
 776
 777         return IRQ_HANDLED;
 778
 779 #undef SCHED_INTR
 780 }
 781
 782 static u32 ath_get_extchanmode(struct ath_softc *sc,
 783                                struct ieee80211_channel *chan,
 784                                enum nl80211_channel_type channel_type)
 785 {
 786         u32 chanmode = 0;
 787
 788         switch (chan->band) {
 789         case IEEE80211_BAND_2GHZ:
 790                 switch(channel_type) {
 791                 case NL80211_CHAN_NO_HT:
 792                 case NL80211_CHAN_HT20:
 793                         chanmode = CHANNEL_G_HT20;
 794                         break;
 795                 case NL80211_CHAN_HT40PLUS:
 796                         chanmode = CHANNEL_G_HT40PLUS;
 797                         break;
 798                 case NL80211_CHAN_HT40MINUS:
 799                         chanmode = CHANNEL_G_HT40MINUS;
 800                         break;
 801                 }
 802                 break;
 803         case IEEE80211_BAND_5GHZ:
 804                 switch(channel_type) {
 805                 case NL80211_CHAN_NO_HT:
 806                 case NL80211_CHAN_HT20:
 807                         chanmode = CHANNEL_A_HT20;
 808                         break;
 809                 case NL80211_CHAN_HT40PLUS:
 810                         chanmode = CHANNEL_A_HT40PLUS;
 811                         break;
 812                 case NL80211_CHAN_HT40MINUS:
 813                         chanmode = CHANNEL_A_HT40MINUS;
 814                         break;
 815                 }
 816                 break;
 817         default:
 818                 break;
 819         }
 820
 821         return chanmode;
 822 }
 823
 824 static void ath9k_bss_assoc_info(struct ath_softc *sc,
 825                                  struct ieee80211_hw *hw,
 826                                  struct ieee80211_vif *vif,
 827                                  struct ieee80211_bss_conf *bss_conf)
 828 {
 829         struct ath_wiphy *aphy = hw->priv;
 830         struct ath_hw *ah = sc->sc_ah;
 831         struct ath_common *common = ath9k_hw_common(ah);
 832
 833         if (bss_conf->assoc) {
 834                 ath_dbg(common, ATH_DBG_CONFIG,
 835                         "Bss Info ASSOC %d, bssid: %pM\n",
 836                         bss_conf->aid, common->curbssid);
 837
 838                 /* New association, store aid */
 839                 common->curaid = bss_conf->aid;
 840                 ath9k_hw_write_associd(ah);
 841
 842                 /*
 843                  * Request a re-configuration of Beacon related timers
 844                  * on the receipt of the first Beacon frame (i.e.,
 845                  * after time sync with the AP).
 846                  */
 847                 sc->ps_flags |= PS_BEACON_SYNC;
 848
 849                 /* Configure the beacon */
 850                 ath_beacon_config(sc, vif);
 851
 852                 /* Reset rssi stats */
 853                 aphy->last_rssi = ATH_RSSI_DUMMY_MARKER;
 854                 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
 855
 856                 sc->sc_flags |= SC_OP_ANI_RUN;
 857                 ath_start_ani(common);
 858         } else {
 859                 ath_dbg(common, ATH_DBG_CONFIG, "Bss Info DISASSOC\n");
 860                 common->curaid = 0;
 861                 /* Stop ANI */
 862                 sc->sc_flags &= ~SC_OP_ANI_RUN;
 863                 del_timer_sync(&common->ani.timer);
 864         }
 865 }
 866
 867 void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
 868 {
 869         struct ath_hw *ah = sc->sc_ah;
 870         struct ath_common *common = ath9k_hw_common(ah);
 871         struct ieee80211_channel *channel = hw->conf.channel;
 872         int r;
 873
 874         ath9k_ps_wakeup(sc);
 875         spin_lock_bh(&sc->sc_pcu_lock);
 876
 877         ath9k_hw_configpcipowersave(ah, 0, 0);
 878
 879         if (!ah->curchan)
 880                 ah->curchan = ath_get_curchannel(sc, sc->hw);
 881
 882         r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
 883         if (r) {
 884                 ath_err(common,
 885                         "Unable to reset channel (%u MHz), reset status %d\n",
 886                         channel->center_freq, r);
 887         }
 888
 889         ath_update_txpow(sc);
 890         if (ath_startrecv(sc) != 0) {
 891                 ath_err(common, "Unable to restart recv logic\n");
 892                 goto out;
 893         }
 894         if (sc->sc_flags & SC_OP_BEACONS)
 895                 ath_beacon_config(sc, NULL);    /* restart beacons */
 896
 897         /* Re-Enable  interrupts */
 898         ath9k_hw_set_interrupts(ah, ah->imask);
 899
 900         /* Enable LED */
 901         ath9k_hw_cfg_output(ah, ah->led_pin,
 902                             AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
 903         ath9k_hw_set_gpio(ah, ah->led_pin, 0);
 904
 905         ieee80211_wake_queues(hw);
 906 out:
 907         spin_unlock_bh(&sc->sc_pcu_lock);
 908
 909         ath9k_ps_restore(sc);
 910 }
 911
 912 void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
 913 {
 914         struct ath_hw *ah = sc->sc_ah;
 915         struct ieee80211_channel *channel = hw->conf.channel;
 916         int r;
 917
 918         ath9k_ps_wakeup(sc);
 919         spin_lock_bh(&sc->sc_pcu_lock);
 920
 921         ieee80211_stop_queues(hw);
 922
 923         /*
 924          * Keep the LED on when the radio is disabled
 925          * during idle unassociated state.
 926          */
 927         if (!sc->ps_idle) {
 928                 ath9k_hw_set_gpio(ah, ah->led_pin, 1);
 929                 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
 930         }
 931
 932         /* Disable interrupts */
 933         ath9k_hw_disable_interrupts(ah);
 934
 935         ath_drain_all_txq(sc, false);   /* clear pending tx frames */
 936
 937         ath_stoprecv(sc);               /* turn off frame recv */
 938         ath_flushrecv(sc);              /* flush recv queue */
 939
 940         if (!ah->curchan)
 941                 ah->curchan = ath_get_curchannel(sc, hw);
 942
 943         r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
 944         if (r) {
 945                 ath_err(ath9k_hw_common(sc->sc_ah),
 946                         "Unable to reset channel (%u MHz), reset status %d\n",
 947                         channel->center_freq, r);
 948         }
 949
 950         ath9k_hw_phy_disable(ah);
 951
 952         ath9k_hw_configpcipowersave(ah, 1, 1);
 953
 954         spin_unlock_bh(&sc->sc_pcu_lock);
 955         ath9k_ps_restore(sc);
 956 }
 957
 958 int ath_reset(struct ath_softc *sc, bool retry_tx)
 959 {
 960         struct ath_hw *ah = sc->sc_ah;
 961         struct ath_common *common = ath9k_hw_common(ah);
 962         struct ieee80211_hw *hw = sc->hw;
 963         int r;
 964
 965         /* Stop ANI */
 966         del_timer_sync(&common->ani.timer);
 967
 968         ath9k_ps_wakeup(sc);
 969         spin_lock_bh(&sc->sc_pcu_lock);
 970
 971         ieee80211_stop_queues(hw);
 972
 973         ath9k_hw_disable_interrupts(ah);
 974         ath_drain_all_txq(sc, retry_tx);
 975
 976         ath_stoprecv(sc);
 977         ath_flushrecv(sc);
 978
 979         r = ath9k_hw_reset(ah, sc->sc_ah->curchan, ah->caldata, false);
 980         if (r)
 981                 ath_err(common,
 982                         "Unable to reset hardware; reset status %d\n", r);
 983
 984         if (ath_startrecv(sc) != 0)
 985                 ath_err(common, "Unable to start recv logic\n");
 986
 987         /*
 988          * We may be doing a reset in response to a request
 989          * that changes the channel so update any state that
 990          * might change as a result.
 991          */
 992         ath_update_txpow(sc);
 993
 994         if ((sc->sc_flags & SC_OP_BEACONS) || !(sc->sc_flags & (SC_OP_OFFCHANNEL)))
 995                 ath_beacon_config(sc, NULL);    /* restart beacons */
 996
 997         ath9k_hw_set_interrupts(ah, ah->imask);
 998
 999         if (retry_tx) {
1000                 int i;
1001                 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
1002                         if (ATH_TXQ_SETUP(sc, i)) {
1003                                 spin_lock_bh(&sc->tx.txq[i].axq_lock);
1004                                 ath_txq_schedule(sc, &sc->tx.txq[i]);
1005                                 spin_unlock_bh(&sc->tx.txq[i].axq_lock);
1006                         }
1007                 }
1008         }
1009
1010         ieee80211_wake_queues(hw);
1011         spin_unlock_bh(&sc->sc_pcu_lock);
1012
1013         /* Start ANI */
1014         ath_start_ani(common);
1015         ath9k_ps_restore(sc);
1016
1017         return r;
1018 }
1019
1020 /* XXX: Remove me once we don't depend on ath9k_channel for all
1021  * this redundant data */
1022 void ath9k_update_ichannel(struct ath_softc *sc, struct ieee80211_hw *hw,
1023                            struct ath9k_channel *ichan)
1024 {
1025         struct ieee80211_channel *chan = hw->conf.channel;
1026         struct ieee80211_conf *conf = &hw->conf;
1027
1028         ichan->channel = chan->center_freq;
1029         ichan->chan = chan;
1030
1031         if (chan->band == IEEE80211_BAND_2GHZ) {
1032                 ichan->chanmode = CHANNEL_G;
1033                 ichan->channelFlags = CHANNEL_2GHZ | CHANNEL_OFDM | CHANNEL_G;
1034         } else {
1035                 ichan->chanmode = CHANNEL_A;
1036                 ichan->channelFlags = CHANNEL_5GHZ | CHANNEL_OFDM;
1037         }
1038
1039         if (conf_is_ht(conf))
1040                 ichan->chanmode = ath_get_extchanmode(sc, chan,
1041                                             conf->channel_type);
1042 }
1043
1044 /**********************/
1045 /* mac80211 callbacks */
1046 /**********************/
1047
1048 static int ath9k_start(struct ieee80211_hw *hw)
1049 {
1050         struct ath_wiphy *aphy = hw->priv;
1051         struct ath_softc *sc = aphy->sc;
1052         struct ath_hw *ah = sc->sc_ah;
1053         struct ath_common *common = ath9k_hw_common(ah);
1054         struct ieee80211_channel *curchan = hw->conf.channel;
1055         struct ath9k_channel *init_channel;
1056         int r;
1057
1058         ath_dbg(common, ATH_DBG_CONFIG,
1059                 "Starting driver with initial channel: %d MHz\n",
1060                 curchan->center_freq);
1061
1062         mutex_lock(&sc->mutex);
1063
1064         if (ath9k_wiphy_started(sc)) {
1065                 if (sc->chan_idx == curchan->hw_value) {
1066                         /*
1067                          * Already on the operational channel, the new wiphy
1068                          * can be marked active.
1069                          */
1070                         aphy->state = ATH_WIPHY_ACTIVE;
1071                         ieee80211_wake_queues(hw);
1072                 } else {
1073                         /*
1074                          * Another wiphy is on another channel, start the new
1075                          * wiphy in paused state.
1076                          */
1077                         aphy->state = ATH_WIPHY_PAUSED;
1078                         ieee80211_stop_queues(hw);
1079                 }
1080                 mutex_unlock(&sc->mutex);
1081                 return 0;
1082         }
1083         aphy->state = ATH_WIPHY_ACTIVE;
1084
1085         /* setup initial channel */
1086
1087         sc->chan_idx = curchan->hw_value;
1088
1089         init_channel = ath_get_curchannel(sc, hw);
1090
1091         /* Reset SERDES registers */
1092         ath9k_hw_configpcipowersave(ah, 0, 0);
1093
1094         /*
1095          * The basic interface to setting the hardware in a good
1096          * state is ``reset''.  On return the hardware is known to
1097          * be powered up and with interrupts disabled.  This must
1098          * be followed by initialization of the appropriate bits
1099          * and then setup of the interrupt mask.
1100          */
1101         spin_lock_bh(&sc->sc_pcu_lock);
1102         r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
1103         if (r) {
1104                 ath_err(common,
1105                         "Unable to reset hardware; reset status %d (freq %u MHz)\n",
1106                         r, curchan->center_freq);
1107                 spin_unlock_bh(&sc->sc_pcu_lock);
1108                 goto mutex_unlock;
1109         }
1110
1111         /*
1112          * This is needed only to setup initial state
1113          * but it's best done after a reset.
1114          */
1115         ath_update_txpow(sc);
1116
1117         /*
1118          * Setup the hardware after reset:
1119          * The receive engine is set going.
1120          * Frame transmit is handled entirely
1121          * in the frame output path; there's nothing to do
1122          * here except setup the interrupt mask.
1123          */
1124         if (ath_startrecv(sc) != 0) {
1125                 ath_err(common, "Unable to start recv logic\n");
1126                 r = -EIO;
1127                 spin_unlock_bh(&sc->sc_pcu_lock);
1128                 goto mutex_unlock;
1129         }
1130         spin_unlock_bh(&sc->sc_pcu_lock);
1131
1132         /* Setup our intr mask. */
1133         ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
1134                     ATH9K_INT_RXORN | ATH9K_INT_FATAL |
1135                     ATH9K_INT_GLOBAL;
1136
1137         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
1138                 ah->imask |= ATH9K_INT_RXHP |
1139                              ATH9K_INT_RXLP |
1140                              ATH9K_INT_BB_WATCHDOG;
1141         else
1142                 ah->imask |= ATH9K_INT_RX;
1143
1144         ah->imask |= ATH9K_INT_GTT;
1145
1146         if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
1147                 ah->imask |= ATH9K_INT_CST;
1148
1149         sc->sc_flags &= ~SC_OP_INVALID;
1150         sc->sc_ah->is_monitoring = false;
1151
1152         /* Disable BMISS interrupt when we're not associated */
1153         ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
1154         ath9k_hw_set_interrupts(ah, ah->imask);
1155
1156         ieee80211_wake_queues(hw);
1157
1158         ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
1159
1160         if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
1161             !ah->btcoex_hw.enabled) {
1162                 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
1163                                            AR_STOMP_LOW_WLAN_WGHT);
1164                 ath9k_hw_btcoex_enable(ah);
1165
1166                 if (common->bus_ops->bt_coex_prep)
1167                         common->bus_ops->bt_coex_prep(common);
1168                 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1169                         ath9k_btcoex_timer_resume(sc);
1170         }
1171
1172         /* User has the option to provide pm-qos value as a module
1173          * parameter rather than using the default value of
1174          * 'ATH9K_PM_QOS_DEFAULT_VALUE'.
1175          */
1176         pm_qos_update_request(&sc->pm_qos_req, ath9k_pm_qos_value);
1177
1178         if (ah->caps.pcie_lcr_extsync_en && common->bus_ops->extn_synch_en)
1179                 common->bus_ops->extn_synch_en(common);
1180
1181 mutex_unlock:
1182         mutex_unlock(&sc->mutex);
1183
1184         return r;
1185 }
1186
1187 static int ath9k_tx(struct ieee80211_hw *hw,
1188                     struct sk_buff *skb)
1189 {
1190         struct ath_wiphy *aphy = hw->priv;
1191         struct ath_softc *sc = aphy->sc;
1192         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1193         struct ath_tx_control txctl;
1194         struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1195
1196         if (aphy->state != ATH_WIPHY_ACTIVE && aphy->state != ATH_WIPHY_SCAN) {
1197                 ath_dbg(common, ATH_DBG_XMIT,
1198                         "ath9k: %s: TX in unexpected wiphy state %d\n",
1199                         wiphy_name(hw->wiphy), aphy->state);
1200                 goto exit;
1201         }
1202
1203         if (sc->ps_enabled) {
1204                 /*
1205                  * mac80211 does not set PM field for normal data frames, so we
1206                  * need to update that based on the current PS mode.
1207                  */
1208                 if (ieee80211_is_data(hdr->frame_control) &&
1209                     !ieee80211_is_nullfunc(hdr->frame_control) &&
1210                     !ieee80211_has_pm(hdr->frame_control)) {
1211                         ath_dbg(common, ATH_DBG_PS,
1212                                 "Add PM=1 for a TX frame while in PS mode\n");
1213                         hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1214                 }
1215         }
1216
1217         if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
1218                 /*
1219                  * We are using PS-Poll and mac80211 can request TX while in
1220                  * power save mode. Need to wake up hardware for the TX to be
1221                  * completed and if needed, also for RX of buffered frames.
1222                  */
1223                 ath9k_ps_wakeup(sc);
1224                 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
1225                         ath9k_hw_setrxabort(sc->sc_ah, 0);
1226                 if (ieee80211_is_pspoll(hdr->frame_control)) {
1227                         ath_dbg(common, ATH_DBG_PS,
1228                                 "Sending PS-Poll to pick a buffered frame\n");
1229                         sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
1230                 } else {
1231                         ath_dbg(common, ATH_DBG_PS,
1232                                 "Wake up to complete TX\n");
1233                         sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
1234                 }
1235                 /*
1236                  * The actual restore operation will happen only after
1237                  * the sc_flags bit is cleared. We are just dropping
1238                  * the ps_usecount here.
1239                  */
1240                 ath9k_ps_restore(sc);
1241         }
1242
1243         memset(&txctl, 0, sizeof(struct ath_tx_control));
1244         txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
1245
1246         ath_dbg(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
1247
1248         if (ath_tx_start(hw, skb, &txctl) != 0) {
1249                 ath_dbg(common, ATH_DBG_XMIT, "TX failed\n");
1250                 goto exit;
1251         }
1252
1253         return 0;
1254 exit:
1255         dev_kfree_skb_any(skb);
1256         return 0;
1257 }
1258
1259 static void ath9k_stop(struct ieee80211_hw *hw)
1260 {
1261         struct ath_wiphy *aphy = hw->priv;
1262         struct ath_softc *sc = aphy->sc;
1263         struct ath_hw *ah = sc->sc_ah;
1264         struct ath_common *common = ath9k_hw_common(ah);
1265         int i;
1266
1267         mutex_lock(&sc->mutex);
1268
1269         aphy->state = ATH_WIPHY_INACTIVE;
1270
1271         if (led_blink)
1272                 cancel_delayed_work_sync(&sc->ath_led_blink_work);
1273
1274         cancel_delayed_work_sync(&sc->tx_complete_work);
1275         cancel_work_sync(&sc->paprd_work);
1276         cancel_work_sync(&sc->hw_check_work);
1277
1278         for (i = 0; i < sc->num_sec_wiphy; i++) {
1279                 if (sc->sec_wiphy[i])
1280                         break;
1281         }
1282
1283         if (i == sc->num_sec_wiphy) {
1284                 cancel_delayed_work_sync(&sc->wiphy_work);
1285                 cancel_work_sync(&sc->chan_work);
1286         }
1287
1288         if (sc->sc_flags & SC_OP_INVALID) {
1289                 ath_dbg(common, ATH_DBG_ANY, "Device not present\n");
1290                 mutex_unlock(&sc->mutex);
1291                 return;
1292         }
1293
1294         if (ath9k_wiphy_started(sc)) {
1295                 mutex_unlock(&sc->mutex);
1296                 return; /* another wiphy still in use */
1297         }
1298
1299         /* Ensure HW is awake when we try to shut it down. */
1300         ath9k_ps_wakeup(sc);
1301
1302         if (ah->btcoex_hw.enabled) {
1303                 ath9k_hw_btcoex_disable(ah);
1304                 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1305                         ath9k_btcoex_timer_pause(sc);
1306         }
1307
1308         spin_lock_bh(&sc->sc_pcu_lock);
1309
1310         /* prevent tasklets to enable interrupts once we disable them */
1311         ah->imask &= ~ATH9K_INT_GLOBAL;
1312
1313         /* make sure h/w will not generate any interrupt
1314          * before setting the invalid flag. */
1315         ath9k_hw_disable_interrupts(ah);
1316
1317         if (!(sc->sc_flags & SC_OP_INVALID)) {
1318                 ath_drain_all_txq(sc, false);
1319                 ath_stoprecv(sc);
1320                 ath9k_hw_phy_disable(ah);
1321         } else
1322                 sc->rx.rxlink = NULL;
1323
1324         /* disable HAL and put h/w to sleep */
1325         ath9k_hw_disable(ah);
1326         ath9k_hw_configpcipowersave(ah, 1, 1);
1327
1328         spin_unlock_bh(&sc->sc_pcu_lock);
1329
1330         /* we can now sync irq and kill any running tasklets, since we already
1331          * disabled interrupts and not holding a spin lock */
1332         synchronize_irq(sc->irq);
1333         tasklet_kill(&sc->intr_tq);
1334         tasklet_kill(&sc->bcon_tasklet);
1335
1336         ath9k_ps_restore(sc);
1337
1338         sc->ps_idle = true;
1339         ath9k_set_wiphy_idle(aphy, true);
1340         ath_radio_disable(sc, hw);
1341
1342         sc->sc_flags |= SC_OP_INVALID;
1343
1344         pm_qos_update_request(&sc->pm_qos_req, PM_QOS_DEFAULT_VALUE);
1345
1346         mutex_unlock(&sc->mutex);
1347
1348         ath_dbg(common, ATH_DBG_CONFIG, "Driver halt\n");
1349 }
1350
1351 static int ath9k_add_interface(struct ieee80211_hw *hw,
1352                                struct ieee80211_vif *vif)
1353 {
1354         struct ath_wiphy *aphy = hw->priv;
1355         struct ath_softc *sc = aphy->sc;
1356         struct ath_hw *ah = sc->sc_ah;
1357         struct ath_common *common = ath9k_hw_common(ah);
1358         struct ath_vif *avp = (void *)vif->drv_priv;
1359         enum nl80211_iftype ic_opmode = NL80211_IFTYPE_UNSPECIFIED;
1360         int ret = 0;
1361
1362         mutex_lock(&sc->mutex);
1363
1364         switch (vif->type) {
1365         case NL80211_IFTYPE_STATION:
1366                 ic_opmode = NL80211_IFTYPE_STATION;
1367                 break;
1368         case NL80211_IFTYPE_WDS:
1369                 ic_opmode = NL80211_IFTYPE_WDS;
1370                 break;
1371         case NL80211_IFTYPE_ADHOC:
1372         case NL80211_IFTYPE_AP:
1373         case NL80211_IFTYPE_MESH_POINT:
1374                 if (sc->nbcnvifs >= ATH_BCBUF) {
1375                         ret = -ENOBUFS;
1376                         goto out;
1377                 }
1378                 ic_opmode = vif->type;
1379                 break;
1380         default:
1381                 ath_err(common, "Interface type %d not yet supported\n",
1382                         vif->type);
1383                 ret = -EOPNOTSUPP;
1384                 goto out;
1385         }
1386
1387         ath_dbg(common, ATH_DBG_CONFIG,
1388                 "Attach a VIF of type: %d\n", ic_opmode);
1389
1390         /* Set the VIF opmode */
1391         avp->av_opmode = ic_opmode;
1392         avp->av_bslot = -1;
1393
1394         sc->nvifs++;
1395
1396         ath9k_set_bssid_mask(hw, vif);
1397
1398         if (sc->nvifs > 1)
1399                 goto out; /* skip global settings for secondary vif */
1400
1401         if (ic_opmode == NL80211_IFTYPE_AP) {
1402                 ath9k_hw_set_tsfadjust(ah, 1);
1403                 sc->sc_flags |= SC_OP_TSF_RESET;
1404         }
1405
1406         /* Set the device opmode */
1407         ah->opmode = ic_opmode;
1408
1409         /*
1410          * Enable MIB interrupts when there are hardware phy counters.
1411          * Note we only do this (at the moment) for station mode.
1412          */
1413         if ((vif->type == NL80211_IFTYPE_STATION) ||
1414             (vif->type == NL80211_IFTYPE_ADHOC) ||
1415             (vif->type == NL80211_IFTYPE_MESH_POINT)) {
1416                 if (ah->config.enable_ani)
1417                         ah->imask |= ATH9K_INT_MIB;
1418                 ah->imask |= ATH9K_INT_TSFOOR;
1419         }
1420
1421         ath9k_hw_set_interrupts(ah, ah->imask);
1422
1423         if (vif->type == NL80211_IFTYPE_AP    ||
1424             vif->type == NL80211_IFTYPE_ADHOC) {
1425                 sc->sc_flags |= SC_OP_ANI_RUN;
1426                 ath_start_ani(common);
1427         }
1428
1429 out:
1430         mutex_unlock(&sc->mutex);
1431         return ret;
1432 }
1433
1434 static void ath9k_reclaim_beacon(struct ath_softc *sc,
1435                                  struct ieee80211_vif *vif)
1436 {
1437         struct ath_vif *avp = (void *)vif->drv_priv;
1438
1439         /* Disable SWBA interrupt */
1440         sc->sc_ah->imask &= ~ATH9K_INT_SWBA;
1441         ath9k_ps_wakeup(sc);
1442         ath9k_hw_set_interrupts(sc->sc_ah, sc->sc_ah->imask);
1443         ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1444         tasklet_kill(&sc->bcon_tasklet);
1445         ath9k_ps_restore(sc);
1446
1447         ath_beacon_return(sc, avp);
1448         sc->sc_flags &= ~SC_OP_BEACONS;
1449
1450         if (sc->nbcnvifs > 0) {
1451                 /* Re-enable beaconing */
1452                 sc->sc_ah->imask |= ATH9K_INT_SWBA;
1453                 ath9k_ps_wakeup(sc);
1454                 ath9k_hw_set_interrupts(sc->sc_ah, sc->sc_ah->imask);
1455                 ath9k_ps_restore(sc);
1456         }
1457 }
1458
1459 static int ath9k_change_interface(struct ieee80211_hw *hw,
1460                                   struct ieee80211_vif *vif,
1461                                   enum nl80211_iftype new_type,
1462                                   bool p2p)
1463 {
1464         struct ath_wiphy *aphy = hw->priv;
1465         struct ath_softc *sc = aphy->sc;
1466         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1467         int ret = 0;
1468
1469         ath_dbg(common, ATH_DBG_CONFIG, "Change Interface\n");
1470         mutex_lock(&sc->mutex);
1471
1472         switch (new_type) {
1473         case NL80211_IFTYPE_AP:
1474         case NL80211_IFTYPE_ADHOC:
1475                 if (sc->nbcnvifs >= ATH_BCBUF) {
1476                         ath_err(common, "No beacon slot available\n");
1477                         ret = -ENOBUFS;
1478                         goto out;
1479                 }
1480                 break;
1481         case NL80211_IFTYPE_STATION:
1482                 /* Stop ANI */
1483                 sc->sc_flags &= ~SC_OP_ANI_RUN;
1484                 del_timer_sync(&common->ani.timer);
1485                 if ((vif->type == NL80211_IFTYPE_AP) ||
1486                     (vif->type == NL80211_IFTYPE_ADHOC))
1487                         ath9k_reclaim_beacon(sc, vif);
1488                 break;
1489         default:
1490                 ath_err(common, "Interface type %d not yet supported\n",
1491                                 vif->type);
1492                 ret = -ENOTSUPP;
1493                 goto out;
1494         }
1495         vif->type = new_type;
1496         vif->p2p = p2p;
1497
1498 out:
1499         mutex_unlock(&sc->mutex);
1500         return ret;
1501 }
1502
1503 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1504                                    struct ieee80211_vif *vif)
1505 {
1506         struct ath_wiphy *aphy = hw->priv;
1507         struct ath_softc *sc = aphy->sc;
1508         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1509
1510         ath_dbg(common, ATH_DBG_CONFIG, "Detach Interface\n");
1511
1512         mutex_lock(&sc->mutex);
1513
1514         /* Stop ANI */
1515         sc->sc_flags &= ~SC_OP_ANI_RUN;
1516         del_timer_sync(&common->ani.timer);
1517
1518         /* Reclaim beacon resources */
1519         if ((sc->sc_ah->opmode == NL80211_IFTYPE_AP) ||
1520             (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC) ||
1521             (sc->sc_ah->opmode == NL80211_IFTYPE_MESH_POINT))
1522                 ath9k_reclaim_beacon(sc, vif);
1523
1524         sc->nvifs--;
1525
1526         mutex_unlock(&sc->mutex);
1527 }
1528
1529 static void ath9k_enable_ps(struct ath_softc *sc)
1530 {
1531         struct ath_hw *ah = sc->sc_ah;
1532
1533         sc->ps_enabled = true;
1534         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1535                 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1536                         ah->imask |= ATH9K_INT_TIM_TIMER;
1537                         ath9k_hw_set_interrupts(ah, ah->imask);
1538                 }
1539                 ath9k_hw_setrxabort(ah, 1);
1540         }
1541 }
1542
1543 static void ath9k_disable_ps(struct ath_softc *sc)
1544 {
1545         struct ath_hw *ah = sc->sc_ah;
1546
1547         sc->ps_enabled = false;
1548         ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
1549         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1550                 ath9k_hw_setrxabort(ah, 0);
1551                 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1552                                   PS_WAIT_FOR_CAB |
1553                                   PS_WAIT_FOR_PSPOLL_DATA |
1554                                   PS_WAIT_FOR_TX_ACK);
1555                 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1556                         ah->imask &= ~ATH9K_INT_TIM_TIMER;
1557                         ath9k_hw_set_interrupts(ah, ah->imask);
1558                 }
1559         }
1560
1561 }
1562
1563 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1564 {
1565         struct ath_wiphy *aphy = hw->priv;
1566         struct ath_softc *sc = aphy->sc;
1567         struct ath_hw *ah = sc->sc_ah;
1568         struct ath_common *common = ath9k_hw_common(ah);
1569         struct ieee80211_conf *conf = &hw->conf;
1570         bool disable_radio;
1571
1572         mutex_lock(&sc->mutex);
1573
1574         /*
1575          * Leave this as the first check because we need to turn on the
1576          * radio if it was disabled before prior to processing the rest
1577          * of the changes. Likewise we must only disable the radio towards
1578          * the end.
1579          */
1580         if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1581                 bool enable_radio;
1582                 bool all_wiphys_idle;
1583                 bool idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1584
1585                 spin_lock_bh(&sc->wiphy_lock);
1586                 all_wiphys_idle =  ath9k_all_wiphys_idle(sc);
1587                 ath9k_set_wiphy_idle(aphy, idle);
1588
1589                 enable_radio = (!idle && all_wiphys_idle);
1590
1591                 /*
1592                  * After we unlock here its possible another wiphy
1593                  * can be re-renabled so to account for that we will
1594                  * only disable the radio toward the end of this routine
1595                  * if by then all wiphys are still idle.
1596                  */
1597                 spin_unlock_bh(&sc->wiphy_lock);
1598
1599                 if (enable_radio) {
1600                         sc->ps_idle = false;
1601                         ath_radio_enable(sc, hw);
1602                         ath_dbg(common, ATH_DBG_CONFIG,
1603                                 "not-idle: enabling radio\n");
1604                 }
1605         }
1606
1607         /*
1608          * We just prepare to enable PS. We have to wait until our AP has
1609          * ACK'd our null data frame to disable RX otherwise we'll ignore
1610          * those ACKs and end up retransmitting the same null data frames.
1611          * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1612          */
1613         if (changed & IEEE80211_CONF_CHANGE_PS) {
1614                 unsigned long flags;
1615                 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1616                 if (conf->flags & IEEE80211_CONF_PS)
1617                         ath9k_enable_ps(sc);
1618                 else
1619                         ath9k_disable_ps(sc);
1620                 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1621         }
1622
1623         if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1624                 if (conf->flags & IEEE80211_CONF_MONITOR) {
1625                         ath_dbg(common, ATH_DBG_CONFIG,
1626                                 "Monitor mode is enabled\n");
1627                         sc->sc_ah->is_monitoring = true;
1628                 } else {
1629                         ath_dbg(common, ATH_DBG_CONFIG,
1630                                 "Monitor mode is disabled\n");
1631                         sc->sc_ah->is_monitoring = false;
1632                 }
1633         }
1634
1635         if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
1636                 struct ieee80211_channel *curchan = hw->conf.channel;
1637                 int pos = curchan->hw_value;
1638                 int old_pos = -1;
1639                 unsigned long flags;
1640
1641                 if (ah->curchan)
1642                         old_pos = ah->curchan - &ah->channels[0];
1643
1644                 aphy->chan_idx = pos;
1645                 aphy->chan_is_ht = conf_is_ht(conf);
1646                 if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
1647                         sc->sc_flags |= SC_OP_OFFCHANNEL;
1648                 else
1649                         sc->sc_flags &= ~SC_OP_OFFCHANNEL;
1650
1651                 if (aphy->state == ATH_WIPHY_SCAN ||
1652                     aphy->state == ATH_WIPHY_ACTIVE)
1653                         ath9k_wiphy_pause_all_forced(sc, aphy);
1654                 else {
1655                         /*
1656                          * Do not change operational channel based on a paused
1657                          * wiphy changes.
1658                          */
1659                         goto skip_chan_change;
1660                 }
1661
1662                 ath_dbg(common, ATH_DBG_CONFIG, "Set channel: %d MHz\n",
1663                         curchan->center_freq);
1664
1665                 /* XXX: remove me eventualy */
1666                 ath9k_update_ichannel(sc, hw, &sc->sc_ah->channels[pos]);
1667
1668                 /* update survey stats for the old channel before switching */
1669                 spin_lock_irqsave(&common->cc_lock, flags);
1670                 ath_update_survey_stats(sc);
1671                 spin_unlock_irqrestore(&common->cc_lock, flags);
1672
1673                 /*
1674                  * If the operating channel changes, change the survey in-use flags
1675                  * along with it.
1676                  * Reset the survey data for the new channel, unless we're switching
1677                  * back to the operating channel from an off-channel operation.
1678                  */
1679                 if (!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) &&
1680                     sc->cur_survey != &sc->survey[pos]) {
1681
1682                         if (sc->cur_survey)
1683                                 sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE;
1684
1685                         sc->cur_survey = &sc->survey[pos];
1686
1687                         memset(sc->cur_survey, 0, sizeof(struct survey_info));
1688                         sc->cur_survey->filled |= SURVEY_INFO_IN_USE;
1689                 } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) {
1690                         memset(&sc->survey[pos], 0, sizeof(struct survey_info));
1691                 }
1692
1693                 if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
1694                         ath_err(common, "Unable to set channel\n");
1695                         mutex_unlock(&sc->mutex);
1696                         return -EINVAL;
1697                 }
1698
1699                 /*
1700                  * The most recent snapshot of channel->noisefloor for the old
1701                  * channel is only available after the hardware reset. Copy it to
1702                  * the survey stats now.
1703                  */
1704                 if (old_pos >= 0)
1705                         ath_update_survey_nf(sc, old_pos);
1706         }
1707
1708 skip_chan_change:
1709         if (changed & IEEE80211_CONF_CHANGE_POWER) {
1710                 sc->config.txpowlimit = 2 * conf->power_level;
1711                 ath9k_ps_wakeup(sc);
1712                 ath_update_txpow(sc);
1713                 ath9k_ps_restore(sc);
1714         }
1715
1716         spin_lock_bh(&sc->wiphy_lock);
1717         disable_radio = ath9k_all_wiphys_idle(sc);
1718         spin_unlock_bh(&sc->wiphy_lock);
1719
1720         if (disable_radio) {
1721                 ath_dbg(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
1722                 sc->ps_idle = true;
1723                 ath_radio_disable(sc, hw);
1724         }
1725
1726         mutex_unlock(&sc->mutex);
1727
1728         return 0;
1729 }
1730
1731 #define SUPPORTED_FILTERS                       \
1732         (FIF_PROMISC_IN_BSS |                   \
1733         FIF_ALLMULTI |                          \
1734         FIF_CONTROL |                           \
1735         FIF_PSPOLL |                            \
1736         FIF_OTHER_BSS |                         \
1737         FIF_BCN_PRBRESP_PROMISC |               \
1738         FIF_PROBE_REQ |                         \
1739         FIF_FCSFAIL)
1740
1741 /* FIXME: sc->sc_full_reset ? */
1742 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1743                                    unsigned int changed_flags,
1744                                    unsigned int *total_flags,
1745                                    u64 multicast)
1746 {
1747         struct ath_wiphy *aphy = hw->priv;
1748         struct ath_softc *sc = aphy->sc;
1749         u32 rfilt;
1750
1751         changed_flags &= SUPPORTED_FILTERS;
1752         *total_flags &= SUPPORTED_FILTERS;
1753
1754         sc->rx.rxfilter = *total_flags;
1755         ath9k_ps_wakeup(sc);
1756         rfilt = ath_calcrxfilter(sc);
1757         ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1758         ath9k_ps_restore(sc);
1759
1760         ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
1761                 "Set HW RX filter: 0x%x\n", rfilt);
1762 }
1763
1764 static int ath9k_sta_add(struct ieee80211_hw *hw,
1765                          struct ieee80211_vif *vif,
1766                          struct ieee80211_sta *sta)
1767 {
1768         struct ath_wiphy *aphy = hw->priv;
1769         struct ath_softc *sc = aphy->sc;
1770
1771         ath_node_attach(sc, sta);
1772
1773         return 0;
1774 }
1775
1776 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1777                             struct ieee80211_vif *vif,
1778                             struct ieee80211_sta *sta)
1779 {
1780         struct ath_wiphy *aphy = hw->priv;
1781         struct ath_softc *sc = aphy->sc;
1782
1783         ath_node_detach(sc, sta);
1784
1785         return 0;
1786 }
1787
1788 static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
1789                          const struct ieee80211_tx_queue_params *params)
1790 {
1791         struct ath_wiphy *aphy = hw->priv;
1792         struct ath_softc *sc = aphy->sc;
1793         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1794         struct ath_txq *txq;
1795         struct ath9k_tx_queue_info qi;
1796         int ret = 0;
1797
1798         if (queue >= WME_NUM_AC)
1799                 return 0;
1800
1801         txq = sc->tx.txq_map[queue];
1802
1803         mutex_lock(&sc->mutex);
1804
1805         memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1806
1807         qi.tqi_aifs = params->aifs;
1808         qi.tqi_cwmin = params->cw_min;
1809         qi.tqi_cwmax = params->cw_max;
1810         qi.tqi_burstTime = params->txop;
1811
1812         ath_dbg(common, ATH_DBG_CONFIG,
1813                 "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1814                 queue, txq->axq_qnum, params->aifs, params->cw_min,
1815                 params->cw_max, params->txop);
1816
1817         ret = ath_txq_update(sc, txq->axq_qnum, &qi);
1818         if (ret)
1819                 ath_err(common, "TXQ Update failed\n");
1820
1821         if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
1822                 if (queue == WME_AC_BE && !ret)
1823                         ath_beaconq_config(sc);
1824
1825         mutex_unlock(&sc->mutex);
1826
1827         return ret;
1828 }
1829
1830 static int ath9k_set_key(struct ieee80211_hw *hw,
1831                          enum set_key_cmd cmd,
1832                          struct ieee80211_vif *vif,
1833                          struct ieee80211_sta *sta,
1834                          struct ieee80211_key_conf *key)
1835 {
1836         struct ath_wiphy *aphy = hw->priv;
1837         struct ath_softc *sc = aphy->sc;
1838         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1839         int ret = 0;
1840
1841         if (ath9k_modparam_nohwcrypt)
1842                 return -ENOSPC;
1843
1844         mutex_lock(&sc->mutex);
1845         ath9k_ps_wakeup(sc);
1846         ath_dbg(common, ATH_DBG_CONFIG, "Set HW Key\n");
1847
1848         switch (cmd) {
1849         case SET_KEY:
1850                 ret = ath_key_config(common, vif, sta, key);
1851                 if (ret >= 0) {
1852                         key->hw_key_idx = ret;
1853                         /* push IV and Michael MIC generation to stack */
1854                         key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1855                         if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
1856                                 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1857                         if (sc->sc_ah->sw_mgmt_crypto &&
1858                             key->cipher == WLAN_CIPHER_SUITE_CCMP)
1859                                 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
1860                         ret = 0;
1861                 }
1862                 break;
1863         case DISABLE_KEY:
1864                 ath_key_delete(common, key);
1865                 break;
1866         default:
1867                 ret = -EINVAL;
1868         }
1869
1870         ath9k_ps_restore(sc);
1871         mutex_unlock(&sc->mutex);
1872
1873         return ret;
1874 }
1875
1876 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1877                                    struct ieee80211_vif *vif,
1878                                    struct ieee80211_bss_conf *bss_conf,
1879                                    u32 changed)
1880 {
1881         struct ath_wiphy *aphy = hw->priv;
1882         struct ath_softc *sc = aphy->sc;
1883         struct ath_hw *ah = sc->sc_ah;
1884         struct ath_common *common = ath9k_hw_common(ah);
1885         struct ath_vif *avp = (void *)vif->drv_priv;
1886         int slottime;
1887         int error;
1888
1889         mutex_lock(&sc->mutex);
1890
1891         if (changed & BSS_CHANGED_BSSID) {
1892                 /* Set BSSID */
1893                 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1894                 memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
1895                 common->curaid = 0;
1896                 ath9k_hw_write_associd(ah);
1897
1898                 /* Set aggregation protection mode parameters */
1899                 sc->config.ath_aggr_prot = 0;
1900
1901                 ath_dbg(common, ATH_DBG_CONFIG, "BSSID: %pM aid: 0x%x\n",
1902                         common->curbssid, common->curaid);
1903
1904                 /* need to reconfigure the beacon */
1905                 sc->sc_flags &= ~SC_OP_BEACONS ;
1906         }
1907
1908         /* Enable transmission of beacons (AP, IBSS, MESH) */
1909         if ((changed & BSS_CHANGED_BEACON) ||
1910             ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
1911                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1912                 error = ath_beacon_alloc(aphy, vif);
1913                 if (!error)
1914                         ath_beacon_config(sc, vif);
1915         }
1916
1917         if (changed & BSS_CHANGED_ERP_SLOT) {
1918                 if (bss_conf->use_short_slot)
1919                         slottime = 9;
1920                 else
1921                         slottime = 20;
1922                 if (vif->type == NL80211_IFTYPE_AP) {
1923                         /*
1924                          * Defer update, so that connected stations can adjust
1925                          * their settings at the same time.
1926                          * See beacon.c for more details
1927                          */
1928                         sc->beacon.slottime = slottime;
1929                         sc->beacon.updateslot = UPDATE;
1930                 } else {
1931                         ah->slottime = slottime;
1932                         ath9k_hw_init_global_settings(ah);
1933                 }
1934         }
1935
1936         /* Disable transmission of beacons */
1937         if ((changed & BSS_CHANGED_BEACON_ENABLED) && !bss_conf->enable_beacon)
1938                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1939
1940         if (changed & BSS_CHANGED_BEACON_INT) {
1941                 sc->beacon_interval = bss_conf->beacon_int;
1942                 /*
1943                  * In case of AP mode, the HW TSF has to be reset
1944                  * when the beacon interval changes.
1945                  */
1946                 if (vif->type == NL80211_IFTYPE_AP) {
1947                         sc->sc_flags |= SC_OP_TSF_RESET;
1948                         ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1949                         error = ath_beacon_alloc(aphy, vif);
1950                         if (!error)
1951                                 ath_beacon_config(sc, vif);
1952                 } else {
1953                         ath_beacon_config(sc, vif);
1954                 }
1955         }
1956
1957         if (changed & BSS_CHANGED_ERP_PREAMBLE) {
1958                 ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
1959                         bss_conf->use_short_preamble);
1960                 if (bss_conf->use_short_preamble)
1961                         sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
1962                 else
1963                         sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
1964         }
1965
1966         if (changed & BSS_CHANGED_ERP_CTS_PROT) {
1967                 ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
1968                         bss_conf->use_cts_prot);
1969                 if (bss_conf->use_cts_prot &&
1970                     hw->conf.channel->band != IEEE80211_BAND_5GHZ)
1971                         sc->sc_flags |= SC_OP_PROTECT_ENABLE;
1972                 else
1973                         sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
1974         }
1975
1976         if (changed & BSS_CHANGED_ASSOC) {
1977                 ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed ASSOC %d\n",
1978                         bss_conf->assoc);
1979                 ath9k_bss_assoc_info(sc, hw, vif, bss_conf);
1980         }
1981
1982         mutex_unlock(&sc->mutex);
1983 }
1984
1985 static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
1986 {
1987         u64 tsf;
1988         struct ath_wiphy *aphy = hw->priv;
1989         struct ath_softc *sc = aphy->sc;
1990
1991         mutex_lock(&sc->mutex);
1992         ath9k_ps_wakeup(sc);
1993         tsf = ath9k_hw_gettsf64(sc->sc_ah);
1994         ath9k_ps_restore(sc);
1995         mutex_unlock(&sc->mutex);
1996
1997         return tsf;
1998 }
1999
2000 static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
2001 {
2002         struct ath_wiphy *aphy = hw->priv;
2003         struct ath_softc *sc = aphy->sc;
2004
2005         mutex_lock(&sc->mutex);
2006         ath9k_ps_wakeup(sc);
2007         ath9k_hw_settsf64(sc->sc_ah, tsf);
2008         ath9k_ps_restore(sc);
2009         mutex_unlock(&sc->mutex);
2010 }
2011
2012 static void ath9k_reset_tsf(struct ieee80211_hw *hw)
2013 {
2014         struct ath_wiphy *aphy = hw->priv;
2015         struct ath_softc *sc = aphy->sc;
2016
2017         mutex_lock(&sc->mutex);
2018
2019         ath9k_ps_wakeup(sc);
2020         ath9k_hw_reset_tsf(sc->sc_ah);
2021         ath9k_ps_restore(sc);
2022
2023         mutex_unlock(&sc->mutex);
2024 }
2025
2026 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
2027                               struct ieee80211_vif *vif,
2028                               enum ieee80211_ampdu_mlme_action action,
2029                               struct ieee80211_sta *sta,
2030                               u16 tid, u16 *ssn)
2031 {
2032         struct ath_wiphy *aphy = hw->priv;
2033         struct ath_softc *sc = aphy->sc;
2034         int ret = 0;
2035
2036         local_bh_disable();
2037
2038         switch (action) {
2039         case IEEE80211_AMPDU_RX_START:
2040                 if (!(sc->sc_flags & SC_OP_RXAGGR))
2041                         ret = -ENOTSUPP;
2042                 break;
2043         case IEEE80211_AMPDU_RX_STOP:
2044                 break;
2045         case IEEE80211_AMPDU_TX_START:
2046                 if (!(sc->sc_flags & SC_OP_TXAGGR))
2047                         return -EOPNOTSUPP;
2048
2049                 ath9k_ps_wakeup(sc);
2050                 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
2051                 if (!ret)
2052                         ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2053                 ath9k_ps_restore(sc);
2054                 break;
2055         case IEEE80211_AMPDU_TX_STOP:
2056                 ath9k_ps_wakeup(sc);
2057                 ath_tx_aggr_stop(sc, sta, tid);
2058                 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2059                 ath9k_ps_restore(sc);
2060                 break;
2061         case IEEE80211_AMPDU_TX_OPERATIONAL:
2062                 ath9k_ps_wakeup(sc);
2063                 ath_tx_aggr_resume(sc, sta, tid);
2064                 ath9k_ps_restore(sc);
2065                 break;
2066         default:
2067                 ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n");
2068         }
2069
2070         local_bh_enable();
2071
2072         return ret;
2073 }
2074
2075 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
2076                              struct survey_info *survey)
2077 {
2078         struct ath_wiphy *aphy = hw->priv;
2079         struct ath_softc *sc = aphy->sc;
2080         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2081         struct ieee80211_supported_band *sband;
2082         struct ieee80211_channel *chan;
2083         unsigned long flags;
2084         int pos;
2085
2086         spin_lock_irqsave(&common->cc_lock, flags);
2087         if (idx == 0)
2088                 ath_update_survey_stats(sc);
2089
2090         sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
2091         if (sband && idx >= sband->n_channels) {
2092                 idx -= sband->n_channels;
2093                 sband = NULL;
2094         }
2095
2096         if (!sband)
2097                 sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
2098
2099         if (!sband || idx >= sband->n_channels) {
2100                 spin_unlock_irqrestore(&common->cc_lock, flags);
2101                 return -ENOENT;
2102         }
2103
2104         chan = &sband->channels[idx];
2105         pos = chan->hw_value;
2106         memcpy(survey, &sc->survey[pos], sizeof(*survey));
2107         survey->channel = chan;
2108         spin_unlock_irqrestore(&common->cc_lock, flags);
2109
2110         return 0;
2111 }
2112
2113 static void ath9k_sw_scan_start(struct ieee80211_hw *hw)
2114 {
2115         struct ath_wiphy *aphy = hw->priv;
2116         struct ath_softc *sc = aphy->sc;
2117
2118         mutex_lock(&sc->mutex);
2119         if (ath9k_wiphy_scanning(sc)) {
2120                 /*
2121                  * There is a race here in mac80211 but fixing it requires
2122                  * we revisit how we handle the scan complete callback.
2123                  * After mac80211 fixes we will not have configured hardware
2124                  * to the home channel nor would we have configured the RX
2125                  * filter yet.
2126                  */
2127                 mutex_unlock(&sc->mutex);
2128                 return;
2129         }
2130
2131         aphy->state = ATH_WIPHY_SCAN;
2132         ath9k_wiphy_pause_all_forced(sc, aphy);
2133         mutex_unlock(&sc->mutex);
2134 }
2135
2136 /*
2137  * XXX: this requires a revisit after the driver
2138  * scan_complete gets moved to another place/removed in mac80211.
2139  */
2140 static void ath9k_sw_scan_complete(struct ieee80211_hw *hw)
2141 {
2142         struct ath_wiphy *aphy = hw->priv;
2143         struct ath_softc *sc = aphy->sc;
2144
2145         mutex_lock(&sc->mutex);
2146         aphy->state = ATH_WIPHY_ACTIVE;
2147         mutex_unlock(&sc->mutex);
2148 }
2149
2150 static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
2151 {
2152         struct ath_wiphy *aphy = hw->priv;
2153         struct ath_softc *sc = aphy->sc;
2154         struct ath_hw *ah = sc->sc_ah;
2155
2156         mutex_lock(&sc->mutex);
2157         ah->coverage_class = coverage_class;
2158         ath9k_hw_init_global_settings(ah);
2159         mutex_unlock(&sc->mutex);
2160 }
2161
2162 struct ieee80211_ops ath9k_ops = {
2163         .tx                 = ath9k_tx,
2164         .start              = ath9k_start,
2165         .stop               = ath9k_stop,
2166         .add_interface      = ath9k_add_interface,
2167         .change_interface   = ath9k_change_interface,
2168         .remove_interface   = ath9k_remove_interface,
2169         .config             = ath9k_config,
2170         .configure_filter   = ath9k_configure_filter,
2171         .sta_add            = ath9k_sta_add,
2172         .sta_remove         = ath9k_sta_remove,
2173         .conf_tx            = ath9k_conf_tx,
2174         .bss_info_changed   = ath9k_bss_info_changed,
2175         .set_key            = ath9k_set_key,
2176         .get_tsf            = ath9k_get_tsf,
2177         .set_tsf            = ath9k_set_tsf,
2178         .reset_tsf          = ath9k_reset_tsf,
2179         .ampdu_action       = ath9k_ampdu_action,
2180         .get_survey         = ath9k_get_survey,
2181         .sw_scan_start      = ath9k_sw_scan_start,
2182         .sw_scan_complete   = ath9k_sw_scan_complete,
2183         .rfkill_poll        = ath9k_rfkill_poll_state,
2184         .set_coverage_class = ath9k_set_coverage_class,
2185 };