1 /*******************************************************************************
3 Intel(R) Gigabit Ethernet Linux driver
4 Copyright(c) 2007 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26 *******************************************************************************/
28 #include <linux/module.h>
29 #include <linux/types.h>
30 #include <linux/init.h>
31 #include <linux/vmalloc.h>
32 #include <linux/pagemap.h>
33 #include <linux/netdevice.h>
34 #include <linux/ipv6.h>
35 #include <net/checksum.h>
36 #include <net/ip6_checksum.h>
37 #include <linux/mii.h>
38 #include <linux/ethtool.h>
39 #include <linux/if_vlan.h>
40 #include <linux/pci.h>
41 #include <linux/delay.h>
42 #include <linux/interrupt.h>
43 #include <linux/if_ether.h>
45 #include <linux/dca.h>
49 #define DRV_VERSION "1.2.45-k2"
50 char igb_driver_name[] = "igb";
51 char igb_driver_version[] = DRV_VERSION;
52 static const char igb_driver_string[] =
53 "Intel(R) Gigabit Ethernet Network Driver";
54 static const char igb_copyright[] = "Copyright (c) 2008 Intel Corporation.";
56 static const struct e1000_info *igb_info_tbl[] = {
57 [board_82575] = &e1000_82575_info,
60 static struct pci_device_id igb_pci_tbl[] = {
61 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576), board_82575 },
62 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_FIBER), board_82575 },
63 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES), board_82575 },
64 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_QUAD_COPPER), board_82575 },
65 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_COPPER), board_82575 },
66 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_FIBER_SERDES), board_82575 },
67 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575GB_QUAD_COPPER), board_82575 },
68 /* required last entry */
72 MODULE_DEVICE_TABLE(pci, igb_pci_tbl);
74 void igb_reset(struct igb_adapter *);
75 static int igb_setup_all_tx_resources(struct igb_adapter *);
76 static int igb_setup_all_rx_resources(struct igb_adapter *);
77 static void igb_free_all_tx_resources(struct igb_adapter *);
78 static void igb_free_all_rx_resources(struct igb_adapter *);
79 static void igb_free_tx_resources(struct igb_ring *);
80 static void igb_free_rx_resources(struct igb_ring *);
81 void igb_update_stats(struct igb_adapter *);
82 static int igb_probe(struct pci_dev *, const struct pci_device_id *);
83 static void __devexit igb_remove(struct pci_dev *pdev);
84 static int igb_sw_init(struct igb_adapter *);
85 static int igb_open(struct net_device *);
86 static int igb_close(struct net_device *);
87 static void igb_configure_tx(struct igb_adapter *);
88 static void igb_configure_rx(struct igb_adapter *);
89 static void igb_setup_rctl(struct igb_adapter *);
90 static void igb_clean_all_tx_rings(struct igb_adapter *);
91 static void igb_clean_all_rx_rings(struct igb_adapter *);
92 static void igb_clean_tx_ring(struct igb_ring *);
93 static void igb_clean_rx_ring(struct igb_ring *);
94 static void igb_set_multi(struct net_device *);
95 static void igb_update_phy_info(unsigned long);
96 static void igb_watchdog(unsigned long);
97 static void igb_watchdog_task(struct work_struct *);
98 static int igb_xmit_frame_ring_adv(struct sk_buff *, struct net_device *,
100 static int igb_xmit_frame_adv(struct sk_buff *skb, struct net_device *);
101 static struct net_device_stats *igb_get_stats(struct net_device *);
102 static int igb_change_mtu(struct net_device *, int);
103 static int igb_set_mac(struct net_device *, void *);
104 static irqreturn_t igb_intr(int irq, void *);
105 static irqreturn_t igb_intr_msi(int irq, void *);
106 static irqreturn_t igb_msix_other(int irq, void *);
107 static irqreturn_t igb_msix_rx(int irq, void *);
108 static irqreturn_t igb_msix_tx(int irq, void *);
109 static int igb_clean_rx_ring_msix(struct napi_struct *, int);
111 static void igb_update_rx_dca(struct igb_ring *);
112 static void igb_update_tx_dca(struct igb_ring *);
113 static void igb_setup_dca(struct igb_adapter *);
114 #endif /* CONFIG_DCA */
115 static bool igb_clean_tx_irq(struct igb_ring *);
116 static int igb_poll(struct napi_struct *, int);
117 static bool igb_clean_rx_irq_adv(struct igb_ring *, int *, int);
118 static void igb_alloc_rx_buffers_adv(struct igb_ring *, int);
119 #ifdef CONFIG_IGB_LRO
120 static int igb_get_skb_hdr(struct sk_buff *skb, void **, void **, u64 *, void *);
122 static int igb_ioctl(struct net_device *, struct ifreq *, int cmd);
123 static void igb_tx_timeout(struct net_device *);
124 static void igb_reset_task(struct work_struct *);
125 static void igb_vlan_rx_register(struct net_device *, struct vlan_group *);
126 static void igb_vlan_rx_add_vid(struct net_device *, u16);
127 static void igb_vlan_rx_kill_vid(struct net_device *, u16);
128 static void igb_restore_vlan(struct igb_adapter *);
130 static int igb_suspend(struct pci_dev *, pm_message_t);
132 static int igb_resume(struct pci_dev *);
134 static void igb_shutdown(struct pci_dev *);
136 static int igb_notify_dca(struct notifier_block *, unsigned long, void *);
137 static struct notifier_block dca_notifier = {
138 .notifier_call = igb_notify_dca,
144 #ifdef CONFIG_NET_POLL_CONTROLLER
145 /* for netdump / net console */
146 static void igb_netpoll(struct net_device *);
149 static pci_ers_result_t igb_io_error_detected(struct pci_dev *,
150 pci_channel_state_t);
151 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *);
152 static void igb_io_resume(struct pci_dev *);
154 static struct pci_error_handlers igb_err_handler = {
155 .error_detected = igb_io_error_detected,
156 .slot_reset = igb_io_slot_reset,
157 .resume = igb_io_resume,
161 static struct pci_driver igb_driver = {
162 .name = igb_driver_name,
163 .id_table = igb_pci_tbl,
165 .remove = __devexit_p(igb_remove),
167 /* Power Managment Hooks */
168 .suspend = igb_suspend,
169 .resume = igb_resume,
171 .shutdown = igb_shutdown,
172 .err_handler = &igb_err_handler
175 static int global_quad_port_a; /* global quad port a indication */
177 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
178 MODULE_DESCRIPTION("Intel(R) Gigabit Ethernet Network Driver");
179 MODULE_LICENSE("GPL");
180 MODULE_VERSION(DRV_VERSION);
184 * igb_get_hw_dev_name - return device name string
185 * used by hardware layer to print debugging information
187 char *igb_get_hw_dev_name(struct e1000_hw *hw)
189 struct igb_adapter *adapter = hw->back;
190 return adapter->netdev->name;
195 * igb_init_module - Driver Registration Routine
197 * igb_init_module is the first routine called when the driver is
198 * loaded. All it does is register with the PCI subsystem.
200 static int __init igb_init_module(void)
203 printk(KERN_INFO "%s - version %s\n",
204 igb_driver_string, igb_driver_version);
206 printk(KERN_INFO "%s\n", igb_copyright);
208 global_quad_port_a = 0;
210 ret = pci_register_driver(&igb_driver);
212 dca_register_notify(&dca_notifier);
217 module_init(igb_init_module);
220 * igb_exit_module - Driver Exit Cleanup Routine
222 * igb_exit_module is called just before the driver is removed
225 static void __exit igb_exit_module(void)
228 dca_unregister_notify(&dca_notifier);
230 pci_unregister_driver(&igb_driver);
233 module_exit(igb_exit_module);
236 * igb_alloc_queues - Allocate memory for all rings
237 * @adapter: board private structure to initialize
239 * We allocate one ring per queue at run-time since we don't know the
240 * number of queues at compile-time.
242 static int igb_alloc_queues(struct igb_adapter *adapter)
246 adapter->tx_ring = kcalloc(adapter->num_tx_queues,
247 sizeof(struct igb_ring), GFP_KERNEL);
248 if (!adapter->tx_ring)
251 adapter->rx_ring = kcalloc(adapter->num_rx_queues,
252 sizeof(struct igb_ring), GFP_KERNEL);
253 if (!adapter->rx_ring) {
254 kfree(adapter->tx_ring);
258 adapter->rx_ring->buddy = adapter->tx_ring;
260 for (i = 0; i < adapter->num_tx_queues; i++) {
261 struct igb_ring *ring = &(adapter->tx_ring[i]);
262 ring->adapter = adapter;
263 ring->queue_index = i;
265 for (i = 0; i < adapter->num_rx_queues; i++) {
266 struct igb_ring *ring = &(adapter->rx_ring[i]);
267 ring->adapter = adapter;
268 ring->queue_index = i;
269 ring->itr_register = E1000_ITR;
271 /* set a default napi handler for each rx_ring */
272 netif_napi_add(adapter->netdev, &ring->napi, igb_poll, 64);
277 static void igb_free_queues(struct igb_adapter *adapter)
281 for (i = 0; i < adapter->num_rx_queues; i++)
282 netif_napi_del(&adapter->rx_ring[i].napi);
284 kfree(adapter->tx_ring);
285 kfree(adapter->rx_ring);
288 #define IGB_N0_QUEUE -1
289 static void igb_assign_vector(struct igb_adapter *adapter, int rx_queue,
290 int tx_queue, int msix_vector)
293 struct e1000_hw *hw = &adapter->hw;
296 switch (hw->mac.type) {
298 /* The 82575 assigns vectors using a bitmask, which matches the
299 bitmask for the EICR/EIMS/EIMC registers. To assign one
300 or more queues to a vector, we write the appropriate bits
301 into the MSIXBM register for that vector. */
302 if (rx_queue > IGB_N0_QUEUE) {
303 msixbm = E1000_EICR_RX_QUEUE0 << rx_queue;
304 adapter->rx_ring[rx_queue].eims_value = msixbm;
306 if (tx_queue > IGB_N0_QUEUE) {
307 msixbm |= E1000_EICR_TX_QUEUE0 << tx_queue;
308 adapter->tx_ring[tx_queue].eims_value =
309 E1000_EICR_TX_QUEUE0 << tx_queue;
311 array_wr32(E1000_MSIXBM(0), msix_vector, msixbm);
314 /* Kawela uses a table-based method for assigning vectors.
315 Each queue has a single entry in the table to which we write
316 a vector number along with a "valid" bit. Sadly, the layout
317 of the table is somewhat counterintuitive. */
318 if (rx_queue > IGB_N0_QUEUE) {
319 index = (rx_queue & 0x7);
320 ivar = array_rd32(E1000_IVAR0, index);
322 /* vector goes into low byte of register */
323 ivar = ivar & 0xFFFFFF00;
324 ivar |= msix_vector | E1000_IVAR_VALID;
326 /* vector goes into third byte of register */
327 ivar = ivar & 0xFF00FFFF;
328 ivar |= (msix_vector | E1000_IVAR_VALID) << 16;
330 adapter->rx_ring[rx_queue].eims_value= 1 << msix_vector;
331 array_wr32(E1000_IVAR0, index, ivar);
333 if (tx_queue > IGB_N0_QUEUE) {
334 index = (tx_queue & 0x7);
335 ivar = array_rd32(E1000_IVAR0, index);
337 /* vector goes into second byte of register */
338 ivar = ivar & 0xFFFF00FF;
339 ivar |= (msix_vector | E1000_IVAR_VALID) << 8;
341 /* vector goes into high byte of register */
342 ivar = ivar & 0x00FFFFFF;
343 ivar |= (msix_vector | E1000_IVAR_VALID) << 24;
345 adapter->tx_ring[tx_queue].eims_value= 1 << msix_vector;
346 array_wr32(E1000_IVAR0, index, ivar);
356 * igb_configure_msix - Configure MSI-X hardware
358 * igb_configure_msix sets up the hardware to properly
359 * generate MSI-X interrupts.
361 static void igb_configure_msix(struct igb_adapter *adapter)
365 struct e1000_hw *hw = &adapter->hw;
367 adapter->eims_enable_mask = 0;
368 if (hw->mac.type == e1000_82576)
369 /* Turn on MSI-X capability first, or our settings
370 * won't stick. And it will take days to debug. */
371 wr32(E1000_GPIE, E1000_GPIE_MSIX_MODE |
372 E1000_GPIE_PBA | E1000_GPIE_EIAME |
375 for (i = 0; i < adapter->num_tx_queues; i++) {
376 struct igb_ring *tx_ring = &adapter->tx_ring[i];
377 igb_assign_vector(adapter, IGB_N0_QUEUE, i, vector++);
378 adapter->eims_enable_mask |= tx_ring->eims_value;
379 if (tx_ring->itr_val)
380 writel(tx_ring->itr_val,
381 hw->hw_addr + tx_ring->itr_register);
383 writel(1, hw->hw_addr + tx_ring->itr_register);
386 for (i = 0; i < adapter->num_rx_queues; i++) {
387 struct igb_ring *rx_ring = &adapter->rx_ring[i];
389 igb_assign_vector(adapter, i, IGB_N0_QUEUE, vector++);
390 adapter->eims_enable_mask |= rx_ring->eims_value;
391 if (rx_ring->itr_val)
392 writel(rx_ring->itr_val,
393 hw->hw_addr + rx_ring->itr_register);
395 writel(1, hw->hw_addr + rx_ring->itr_register);
399 /* set vector for other causes, i.e. link changes */
400 switch (hw->mac.type) {
402 array_wr32(E1000_MSIXBM(0), vector++,
405 tmp = rd32(E1000_CTRL_EXT);
406 /* enable MSI-X PBA support*/
407 tmp |= E1000_CTRL_EXT_PBA_CLR;
409 /* Auto-Mask interrupts upon ICR read. */
410 tmp |= E1000_CTRL_EXT_EIAME;
411 tmp |= E1000_CTRL_EXT_IRCA;
413 wr32(E1000_CTRL_EXT, tmp);
414 adapter->eims_enable_mask |= E1000_EIMS_OTHER;
415 adapter->eims_other = E1000_EIMS_OTHER;
420 tmp = (vector++ | E1000_IVAR_VALID) << 8;
421 wr32(E1000_IVAR_MISC, tmp);
423 adapter->eims_enable_mask = (1 << (vector)) - 1;
424 adapter->eims_other = 1 << (vector - 1);
427 /* do nothing, since nothing else supports MSI-X */
429 } /* switch (hw->mac.type) */
434 * igb_request_msix - Initialize MSI-X interrupts
436 * igb_request_msix allocates MSI-X vectors and requests interrupts from the
439 static int igb_request_msix(struct igb_adapter *adapter)
441 struct net_device *netdev = adapter->netdev;
442 int i, err = 0, vector = 0;
446 for (i = 0; i < adapter->num_tx_queues; i++) {
447 struct igb_ring *ring = &(adapter->tx_ring[i]);
448 sprintf(ring->name, "%s-tx%d", netdev->name, i);
449 err = request_irq(adapter->msix_entries[vector].vector,
450 &igb_msix_tx, 0, ring->name,
451 &(adapter->tx_ring[i]));
454 ring->itr_register = E1000_EITR(0) + (vector << 2);
455 ring->itr_val = 976; /* ~4000 ints/sec */
458 for (i = 0; i < adapter->num_rx_queues; i++) {
459 struct igb_ring *ring = &(adapter->rx_ring[i]);
460 if (strlen(netdev->name) < (IFNAMSIZ - 5))
461 sprintf(ring->name, "%s-rx%d", netdev->name, i);
463 memcpy(ring->name, netdev->name, IFNAMSIZ);
464 err = request_irq(adapter->msix_entries[vector].vector,
465 &igb_msix_rx, 0, ring->name,
466 &(adapter->rx_ring[i]));
469 ring->itr_register = E1000_EITR(0) + (vector << 2);
470 ring->itr_val = adapter->itr;
471 /* overwrite the poll routine for MSIX, we've already done
473 ring->napi.poll = &igb_clean_rx_ring_msix;
477 err = request_irq(adapter->msix_entries[vector].vector,
478 &igb_msix_other, 0, netdev->name, netdev);
482 igb_configure_msix(adapter);
488 static void igb_reset_interrupt_capability(struct igb_adapter *adapter)
490 if (adapter->msix_entries) {
491 pci_disable_msix(adapter->pdev);
492 kfree(adapter->msix_entries);
493 adapter->msix_entries = NULL;
494 } else if (adapter->flags & IGB_FLAG_HAS_MSI)
495 pci_disable_msi(adapter->pdev);
501 * igb_set_interrupt_capability - set MSI or MSI-X if supported
503 * Attempt to configure interrupts using the best available
504 * capabilities of the hardware and kernel.
506 static void igb_set_interrupt_capability(struct igb_adapter *adapter)
511 numvecs = adapter->num_tx_queues + adapter->num_rx_queues + 1;
512 adapter->msix_entries = kcalloc(numvecs, sizeof(struct msix_entry),
514 if (!adapter->msix_entries)
517 for (i = 0; i < numvecs; i++)
518 adapter->msix_entries[i].entry = i;
520 err = pci_enable_msix(adapter->pdev,
521 adapter->msix_entries,
526 igb_reset_interrupt_capability(adapter);
528 /* If we can't do MSI-X, try MSI */
530 adapter->num_rx_queues = 1;
531 adapter->num_tx_queues = 1;
532 if (!pci_enable_msi(adapter->pdev))
533 adapter->flags |= IGB_FLAG_HAS_MSI;
535 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
536 /* Notify the stack of the (possibly) reduced Tx Queue count. */
537 adapter->netdev->egress_subqueue_count = adapter->num_tx_queues;
543 * igb_request_irq - initialize interrupts
545 * Attempts to configure interrupts using the best available
546 * capabilities of the hardware and kernel.
548 static int igb_request_irq(struct igb_adapter *adapter)
550 struct net_device *netdev = adapter->netdev;
551 struct e1000_hw *hw = &adapter->hw;
554 if (adapter->msix_entries) {
555 err = igb_request_msix(adapter);
558 /* fall back to MSI */
559 igb_reset_interrupt_capability(adapter);
560 if (!pci_enable_msi(adapter->pdev))
561 adapter->flags |= IGB_FLAG_HAS_MSI;
562 igb_free_all_tx_resources(adapter);
563 igb_free_all_rx_resources(adapter);
564 adapter->num_rx_queues = 1;
565 igb_alloc_queues(adapter);
567 switch (hw->mac.type) {
569 wr32(E1000_MSIXBM(0),
570 (E1000_EICR_RX_QUEUE0 | E1000_EIMS_OTHER));
573 wr32(E1000_IVAR0, E1000_IVAR_VALID);
580 if (adapter->flags & IGB_FLAG_HAS_MSI) {
581 err = request_irq(adapter->pdev->irq, &igb_intr_msi, 0,
582 netdev->name, netdev);
585 /* fall back to legacy interrupts */
586 igb_reset_interrupt_capability(adapter);
587 adapter->flags &= ~IGB_FLAG_HAS_MSI;
590 err = request_irq(adapter->pdev->irq, &igb_intr, IRQF_SHARED,
591 netdev->name, netdev);
594 dev_err(&adapter->pdev->dev, "Error %d getting interrupt\n",
601 static void igb_free_irq(struct igb_adapter *adapter)
603 struct net_device *netdev = adapter->netdev;
605 if (adapter->msix_entries) {
608 for (i = 0; i < adapter->num_tx_queues; i++)
609 free_irq(adapter->msix_entries[vector++].vector,
610 &(adapter->tx_ring[i]));
611 for (i = 0; i < adapter->num_rx_queues; i++)
612 free_irq(adapter->msix_entries[vector++].vector,
613 &(adapter->rx_ring[i]));
615 free_irq(adapter->msix_entries[vector++].vector, netdev);
619 free_irq(adapter->pdev->irq, netdev);
623 * igb_irq_disable - Mask off interrupt generation on the NIC
624 * @adapter: board private structure
626 static void igb_irq_disable(struct igb_adapter *adapter)
628 struct e1000_hw *hw = &adapter->hw;
630 if (adapter->msix_entries) {
632 wr32(E1000_EIMC, ~0);
639 synchronize_irq(adapter->pdev->irq);
643 * igb_irq_enable - Enable default interrupt generation settings
644 * @adapter: board private structure
646 static void igb_irq_enable(struct igb_adapter *adapter)
648 struct e1000_hw *hw = &adapter->hw;
650 if (adapter->msix_entries) {
651 wr32(E1000_EIAC, adapter->eims_enable_mask);
652 wr32(E1000_EIAM, adapter->eims_enable_mask);
653 wr32(E1000_EIMS, adapter->eims_enable_mask);
654 wr32(E1000_IMS, E1000_IMS_LSC);
656 wr32(E1000_IMS, IMS_ENABLE_MASK);
657 wr32(E1000_IAM, IMS_ENABLE_MASK);
661 static void igb_update_mng_vlan(struct igb_adapter *adapter)
663 struct net_device *netdev = adapter->netdev;
664 u16 vid = adapter->hw.mng_cookie.vlan_id;
665 u16 old_vid = adapter->mng_vlan_id;
666 if (adapter->vlgrp) {
667 if (!vlan_group_get_device(adapter->vlgrp, vid)) {
668 if (adapter->hw.mng_cookie.status &
669 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
670 igb_vlan_rx_add_vid(netdev, vid);
671 adapter->mng_vlan_id = vid;
673 adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
675 if ((old_vid != (u16)IGB_MNG_VLAN_NONE) &&
677 !vlan_group_get_device(adapter->vlgrp, old_vid))
678 igb_vlan_rx_kill_vid(netdev, old_vid);
680 adapter->mng_vlan_id = vid;
685 * igb_release_hw_control - release control of the h/w to f/w
686 * @adapter: address of board private structure
688 * igb_release_hw_control resets CTRL_EXT:DRV_LOAD bit.
689 * For ASF and Pass Through versions of f/w this means that the
690 * driver is no longer loaded.
693 static void igb_release_hw_control(struct igb_adapter *adapter)
695 struct e1000_hw *hw = &adapter->hw;
698 /* Let firmware take over control of h/w */
699 ctrl_ext = rd32(E1000_CTRL_EXT);
701 ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
706 * igb_get_hw_control - get control of the h/w from f/w
707 * @adapter: address of board private structure
709 * igb_get_hw_control sets CTRL_EXT:DRV_LOAD bit.
710 * For ASF and Pass Through versions of f/w this means that
711 * the driver is loaded.
714 static void igb_get_hw_control(struct igb_adapter *adapter)
716 struct e1000_hw *hw = &adapter->hw;
719 /* Let firmware know the driver has taken over */
720 ctrl_ext = rd32(E1000_CTRL_EXT);
722 ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
725 static void igb_init_manageability(struct igb_adapter *adapter)
727 struct e1000_hw *hw = &adapter->hw;
729 if (adapter->en_mng_pt) {
730 u32 manc2h = rd32(E1000_MANC2H);
731 u32 manc = rd32(E1000_MANC);
733 /* enable receiving management packets to the host */
734 /* this will probably generate destination unreachable messages
735 * from the host OS, but the packets will be handled on SMBUS */
736 manc |= E1000_MANC_EN_MNG2HOST;
737 #define E1000_MNG2HOST_PORT_623 (1 << 5)
738 #define E1000_MNG2HOST_PORT_664 (1 << 6)
739 manc2h |= E1000_MNG2HOST_PORT_623;
740 manc2h |= E1000_MNG2HOST_PORT_664;
741 wr32(E1000_MANC2H, manc2h);
743 wr32(E1000_MANC, manc);
748 * igb_configure - configure the hardware for RX and TX
749 * @adapter: private board structure
751 static void igb_configure(struct igb_adapter *adapter)
753 struct net_device *netdev = adapter->netdev;
756 igb_get_hw_control(adapter);
757 igb_set_multi(netdev);
759 igb_restore_vlan(adapter);
760 igb_init_manageability(adapter);
762 igb_configure_tx(adapter);
763 igb_setup_rctl(adapter);
764 igb_configure_rx(adapter);
766 igb_rx_fifo_flush_82575(&adapter->hw);
768 /* call IGB_DESC_UNUSED which always leaves
769 * at least 1 descriptor unused to make sure
770 * next_to_use != next_to_clean */
771 for (i = 0; i < adapter->num_rx_queues; i++) {
772 struct igb_ring *ring = &adapter->rx_ring[i];
773 igb_alloc_rx_buffers_adv(ring, IGB_DESC_UNUSED(ring));
777 adapter->tx_queue_len = netdev->tx_queue_len;
782 * igb_up - Open the interface and prepare it to handle traffic
783 * @adapter: board private structure
786 int igb_up(struct igb_adapter *adapter)
788 struct e1000_hw *hw = &adapter->hw;
791 /* hardware has been reset, we need to reload some things */
792 igb_configure(adapter);
794 clear_bit(__IGB_DOWN, &adapter->state);
796 for (i = 0; i < adapter->num_rx_queues; i++)
797 napi_enable(&adapter->rx_ring[i].napi);
798 if (adapter->msix_entries)
799 igb_configure_msix(adapter);
801 /* Clear any pending interrupts. */
803 igb_irq_enable(adapter);
805 /* Fire a link change interrupt to start the watchdog. */
806 wr32(E1000_ICS, E1000_ICS_LSC);
810 void igb_down(struct igb_adapter *adapter)
812 struct e1000_hw *hw = &adapter->hw;
813 struct net_device *netdev = adapter->netdev;
817 /* signal that we're down so the interrupt handler does not
818 * reschedule our watchdog timer */
819 set_bit(__IGB_DOWN, &adapter->state);
821 /* disable receives in the hardware */
822 rctl = rd32(E1000_RCTL);
823 wr32(E1000_RCTL, rctl & ~E1000_RCTL_EN);
824 /* flush and sleep below */
826 netif_stop_queue(netdev);
827 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
828 for (i = 0; i < adapter->num_tx_queues; i++)
829 netif_stop_subqueue(netdev, i);
832 /* disable transmits in the hardware */
833 tctl = rd32(E1000_TCTL);
834 tctl &= ~E1000_TCTL_EN;
835 wr32(E1000_TCTL, tctl);
836 /* flush both disables and wait for them to finish */
840 for (i = 0; i < adapter->num_rx_queues; i++)
841 napi_disable(&adapter->rx_ring[i].napi);
843 igb_irq_disable(adapter);
845 del_timer_sync(&adapter->watchdog_timer);
846 del_timer_sync(&adapter->phy_info_timer);
848 netdev->tx_queue_len = adapter->tx_queue_len;
849 netif_carrier_off(netdev);
850 adapter->link_speed = 0;
851 adapter->link_duplex = 0;
853 if (!pci_channel_offline(adapter->pdev))
855 igb_clean_all_tx_rings(adapter);
856 igb_clean_all_rx_rings(adapter);
859 void igb_reinit_locked(struct igb_adapter *adapter)
861 WARN_ON(in_interrupt());
862 while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
866 clear_bit(__IGB_RESETTING, &adapter->state);
869 void igb_reset(struct igb_adapter *adapter)
871 struct e1000_hw *hw = &adapter->hw;
872 struct e1000_mac_info *mac = &hw->mac;
873 struct e1000_fc_info *fc = &hw->fc;
874 u32 pba = 0, tx_space, min_tx_space, min_rx_space;
877 /* Repartition Pba for greater than 9k mtu
878 * To take effect CTRL.RST is required.
880 if (mac->type != e1000_82576) {
887 if ((adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) &&
888 (mac->type < e1000_82576)) {
889 /* adjust PBA for jumbo frames */
890 wr32(E1000_PBA, pba);
892 /* To maintain wire speed transmits, the Tx FIFO should be
893 * large enough to accommodate two full transmit packets,
894 * rounded up to the next 1KB and expressed in KB. Likewise,
895 * the Rx FIFO should be large enough to accommodate at least
896 * one full receive packet and is similarly rounded up and
897 * expressed in KB. */
898 pba = rd32(E1000_PBA);
899 /* upper 16 bits has Tx packet buffer allocation size in KB */
900 tx_space = pba >> 16;
901 /* lower 16 bits has Rx packet buffer allocation size in KB */
903 /* the tx fifo also stores 16 bytes of information about the tx
904 * but don't include ethernet FCS because hardware appends it */
905 min_tx_space = (adapter->max_frame_size +
906 sizeof(struct e1000_tx_desc) -
908 min_tx_space = ALIGN(min_tx_space, 1024);
910 /* software strips receive CRC, so leave room for it */
911 min_rx_space = adapter->max_frame_size;
912 min_rx_space = ALIGN(min_rx_space, 1024);
915 /* If current Tx allocation is less than the min Tx FIFO size,
916 * and the min Tx FIFO size is less than the current Rx FIFO
917 * allocation, take space away from current Rx allocation */
918 if (tx_space < min_tx_space &&
919 ((min_tx_space - tx_space) < pba)) {
920 pba = pba - (min_tx_space - tx_space);
922 /* if short on rx space, rx wins and must trump tx
924 if (pba < min_rx_space)
927 wr32(E1000_PBA, pba);
930 /* flow control settings */
931 /* The high water mark must be low enough to fit one full frame
932 * (or the size used for early receive) above it in the Rx FIFO.
933 * Set it to the lower of:
934 * - 90% of the Rx FIFO size, or
935 * - the full Rx FIFO size minus one full frame */
936 hwm = min(((pba << 10) * 9 / 10),
937 ((pba << 10) - 2 * adapter->max_frame_size));
939 if (mac->type < e1000_82576) {
940 fc->high_water = hwm & 0xFFF8; /* 8-byte granularity */
941 fc->low_water = fc->high_water - 8;
943 fc->high_water = hwm & 0xFFF0; /* 16-byte granularity */
944 fc->low_water = fc->high_water - 16;
946 fc->pause_time = 0xFFFF;
948 fc->type = fc->original_type;
950 /* Allow time for pending master requests to run */
951 adapter->hw.mac.ops.reset_hw(&adapter->hw);
954 if (adapter->hw.mac.ops.init_hw(&adapter->hw))
955 dev_err(&adapter->pdev->dev, "Hardware Error\n");
957 igb_update_mng_vlan(adapter);
959 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
960 wr32(E1000_VET, ETHERNET_IEEE_VLAN_TYPE);
962 igb_reset_adaptive(&adapter->hw);
963 if (adapter->hw.phy.ops.get_phy_info)
964 adapter->hw.phy.ops.get_phy_info(&adapter->hw);
968 * igb_is_need_ioport - determine if an adapter needs ioport resources or not
969 * @pdev: PCI device information struct
971 * Returns true if an adapter needs ioport resources
973 static int igb_is_need_ioport(struct pci_dev *pdev)
975 switch (pdev->device) {
976 /* Currently there are no adapters that need ioport resources */
983 * igb_probe - Device Initialization Routine
984 * @pdev: PCI device information struct
985 * @ent: entry in igb_pci_tbl
987 * Returns 0 on success, negative on failure
989 * igb_probe initializes an adapter identified by a pci_dev structure.
990 * The OS initialization, configuring of the adapter private structure,
991 * and a hardware reset occur.
993 static int __devinit igb_probe(struct pci_dev *pdev,
994 const struct pci_device_id *ent)
996 struct net_device *netdev;
997 struct igb_adapter *adapter;
999 const struct e1000_info *ei = igb_info_tbl[ent->driver_data];
1000 unsigned long mmio_start, mmio_len;
1001 int i, err, pci_using_dac;
1002 u16 eeprom_data = 0;
1003 u16 eeprom_apme_mask = IGB_EEPROM_APME;
1005 int bars, need_ioport;
1007 /* do not allocate ioport bars when not needed */
1008 need_ioport = igb_is_need_ioport(pdev);
1010 bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
1011 err = pci_enable_device(pdev);
1013 bars = pci_select_bars(pdev, IORESOURCE_MEM);
1014 err = pci_enable_device_mem(pdev);
1020 err = pci_set_dma_mask(pdev, DMA_64BIT_MASK);
1022 err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK);
1026 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
1028 err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
1030 dev_err(&pdev->dev, "No usable DMA "
1031 "configuration, aborting\n");
1037 err = pci_request_selected_regions(pdev, bars, igb_driver_name);
1041 pci_set_master(pdev);
1042 pci_save_state(pdev);
1045 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
1046 netdev = alloc_etherdev_mq(sizeof(struct igb_adapter), IGB_MAX_TX_QUEUES);
1048 netdev = alloc_etherdev(sizeof(struct igb_adapter));
1049 #endif /* CONFIG_NETDEVICES_MULTIQUEUE */
1051 goto err_alloc_etherdev;
1053 SET_NETDEV_DEV(netdev, &pdev->dev);
1055 pci_set_drvdata(pdev, netdev);
1056 adapter = netdev_priv(netdev);
1057 adapter->netdev = netdev;
1058 adapter->pdev = pdev;
1061 adapter->msg_enable = NETIF_MSG_DRV | NETIF_MSG_PROBE;
1062 adapter->bars = bars;
1063 adapter->need_ioport = need_ioport;
1065 mmio_start = pci_resource_start(pdev, 0);
1066 mmio_len = pci_resource_len(pdev, 0);
1069 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
1070 if (!adapter->hw.hw_addr)
1073 netdev->open = &igb_open;
1074 netdev->stop = &igb_close;
1075 netdev->get_stats = &igb_get_stats;
1076 netdev->set_multicast_list = &igb_set_multi;
1077 netdev->set_mac_address = &igb_set_mac;
1078 netdev->change_mtu = &igb_change_mtu;
1079 netdev->do_ioctl = &igb_ioctl;
1080 igb_set_ethtool_ops(netdev);
1081 netdev->tx_timeout = &igb_tx_timeout;
1082 netdev->watchdog_timeo = 5 * HZ;
1083 netdev->vlan_rx_register = igb_vlan_rx_register;
1084 netdev->vlan_rx_add_vid = igb_vlan_rx_add_vid;
1085 netdev->vlan_rx_kill_vid = igb_vlan_rx_kill_vid;
1086 #ifdef CONFIG_NET_POLL_CONTROLLER
1087 netdev->poll_controller = igb_netpoll;
1089 netdev->hard_start_xmit = &igb_xmit_frame_adv;
1091 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
1093 netdev->mem_start = mmio_start;
1094 netdev->mem_end = mmio_start + mmio_len;
1096 /* PCI config space info */
1097 hw->vendor_id = pdev->vendor;
1098 hw->device_id = pdev->device;
1099 hw->revision_id = pdev->revision;
1100 hw->subsystem_vendor_id = pdev->subsystem_vendor;
1101 hw->subsystem_device_id = pdev->subsystem_device;
1103 /* setup the private structure */
1105 /* Copy the default MAC, PHY and NVM function pointers */
1106 memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
1107 memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
1108 memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
1109 /* Initialize skew-specific constants */
1110 err = ei->get_invariants(hw);
1114 err = igb_sw_init(adapter);
1118 igb_get_bus_info_pcie(hw);
1121 switch (hw->mac.type) {
1124 adapter->flags |= IGB_FLAG_HAS_DCA;
1125 adapter->flags |= IGB_FLAG_NEED_CTX_IDX;
1131 hw->phy.autoneg_wait_to_complete = false;
1132 hw->mac.adaptive_ifs = true;
1134 /* Copper options */
1135 if (hw->phy.media_type == e1000_media_type_copper) {
1136 hw->phy.mdix = AUTO_ALL_MODES;
1137 hw->phy.disable_polarity_correction = false;
1138 hw->phy.ms_type = e1000_ms_hw_default;
1141 if (igb_check_reset_block(hw))
1142 dev_info(&pdev->dev,
1143 "PHY reset is blocked due to SOL/IDER session.\n");
1145 netdev->features = NETIF_F_SG |
1147 NETIF_F_HW_VLAN_TX |
1148 NETIF_F_HW_VLAN_RX |
1149 NETIF_F_HW_VLAN_FILTER;
1151 netdev->features |= NETIF_F_TSO;
1152 netdev->features |= NETIF_F_TSO6;
1154 #ifdef CONFIG_IGB_LRO
1155 netdev->features |= NETIF_F_LRO;
1158 netdev->vlan_features |= NETIF_F_TSO;
1159 netdev->vlan_features |= NETIF_F_TSO6;
1160 netdev->vlan_features |= NETIF_F_HW_CSUM;
1161 netdev->vlan_features |= NETIF_F_SG;
1164 netdev->features |= NETIF_F_HIGHDMA;
1166 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
1167 netdev->features |= NETIF_F_MULTI_QUEUE;
1170 netdev->features |= NETIF_F_LLTX;
1171 adapter->en_mng_pt = igb_enable_mng_pass_thru(&adapter->hw);
1173 /* before reading the NVM, reset the controller to put the device in a
1174 * known good starting state */
1175 hw->mac.ops.reset_hw(hw);
1177 /* make sure the NVM is good */
1178 if (igb_validate_nvm_checksum(hw) < 0) {
1179 dev_err(&pdev->dev, "The NVM Checksum Is Not Valid\n");
1184 /* copy the MAC address out of the NVM */
1185 if (hw->mac.ops.read_mac_addr(hw))
1186 dev_err(&pdev->dev, "NVM Read Error\n");
1188 memcpy(netdev->dev_addr, hw->mac.addr, netdev->addr_len);
1189 memcpy(netdev->perm_addr, hw->mac.addr, netdev->addr_len);
1191 if (!is_valid_ether_addr(netdev->perm_addr)) {
1192 dev_err(&pdev->dev, "Invalid MAC Address\n");
1197 init_timer(&adapter->watchdog_timer);
1198 adapter->watchdog_timer.function = &igb_watchdog;
1199 adapter->watchdog_timer.data = (unsigned long) adapter;
1201 init_timer(&adapter->phy_info_timer);
1202 adapter->phy_info_timer.function = &igb_update_phy_info;
1203 adapter->phy_info_timer.data = (unsigned long) adapter;
1205 INIT_WORK(&adapter->reset_task, igb_reset_task);
1206 INIT_WORK(&adapter->watchdog_task, igb_watchdog_task);
1208 /* Initialize link & ring properties that are user-changeable */
1209 adapter->tx_ring->count = 256;
1210 for (i = 0; i < adapter->num_tx_queues; i++)
1211 adapter->tx_ring[i].count = adapter->tx_ring->count;
1212 adapter->rx_ring->count = 256;
1213 for (i = 0; i < adapter->num_rx_queues; i++)
1214 adapter->rx_ring[i].count = adapter->rx_ring->count;
1216 adapter->fc_autoneg = true;
1217 hw->mac.autoneg = true;
1218 hw->phy.autoneg_advertised = 0x2f;
1220 hw->fc.original_type = e1000_fc_default;
1221 hw->fc.type = e1000_fc_default;
1223 adapter->itr_setting = 3;
1224 adapter->itr = IGB_START_ITR;
1226 igb_validate_mdi_setting(hw);
1228 adapter->rx_csum = 1;
1230 /* Initial Wake on LAN setting If APM wake is enabled in the EEPROM,
1231 * enable the ACPI Magic Packet filter
1234 if (hw->bus.func == 0 ||
1235 hw->device_id == E1000_DEV_ID_82575EB_COPPER)
1236 hw->nvm.ops.read_nvm(hw, NVM_INIT_CONTROL3_PORT_A, 1,
1239 if (eeprom_data & eeprom_apme_mask)
1240 adapter->eeprom_wol |= E1000_WUFC_MAG;
1242 /* now that we have the eeprom settings, apply the special cases where
1243 * the eeprom may be wrong or the board simply won't support wake on
1244 * lan on a particular port */
1245 switch (pdev->device) {
1246 case E1000_DEV_ID_82575GB_QUAD_COPPER:
1247 adapter->eeprom_wol = 0;
1249 case E1000_DEV_ID_82575EB_FIBER_SERDES:
1250 case E1000_DEV_ID_82576_FIBER:
1251 case E1000_DEV_ID_82576_SERDES:
1252 /* Wake events only supported on port A for dual fiber
1253 * regardless of eeprom setting */
1254 if (rd32(E1000_STATUS) & E1000_STATUS_FUNC_1)
1255 adapter->eeprom_wol = 0;
1257 case E1000_DEV_ID_82576_QUAD_COPPER:
1258 /* if quad port adapter, disable WoL on all but port A */
1259 if (global_quad_port_a != 0)
1260 adapter->eeprom_wol = 0;
1262 adapter->flags |= IGB_FLAG_QUAD_PORT_A;
1263 /* Reset for multiple quad port adapters */
1264 if (++global_quad_port_a == 4)
1265 global_quad_port_a = 0;
1269 /* initialize the wol settings based on the eeprom settings */
1270 adapter->wol = adapter->eeprom_wol;
1272 /* reset the hardware with the new settings */
1275 /* let the f/w know that the h/w is now under the control of the
1277 igb_get_hw_control(adapter);
1279 /* tell the stack to leave us alone until igb_open() is called */
1280 netif_carrier_off(netdev);
1281 netif_stop_queue(netdev);
1282 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
1283 for (i = 0; i < adapter->num_tx_queues; i++)
1284 netif_stop_subqueue(netdev, i);
1287 strcpy(netdev->name, "eth%d");
1288 err = register_netdev(netdev);
1293 if ((adapter->flags & IGB_FLAG_HAS_DCA) &&
1294 (dca_add_requester(&pdev->dev) == 0)) {
1295 adapter->flags |= IGB_FLAG_DCA_ENABLED;
1296 dev_info(&pdev->dev, "DCA enabled\n");
1297 /* Always use CB2 mode, difference is masked
1298 * in the CB driver. */
1299 wr32(E1000_DCA_CTRL, 2);
1300 igb_setup_dca(adapter);
1304 dev_info(&pdev->dev, "Intel(R) Gigabit Ethernet Network Connection\n");
1305 /* print bus type/speed/width info */
1306 dev_info(&pdev->dev,
1307 "%s: (PCIe:%s:%s) %02x:%02x:%02x:%02x:%02x:%02x\n",
1309 ((hw->bus.speed == e1000_bus_speed_2500)
1310 ? "2.5Gb/s" : "unknown"),
1311 ((hw->bus.width == e1000_bus_width_pcie_x4)
1312 ? "Width x4" : (hw->bus.width == e1000_bus_width_pcie_x1)
1313 ? "Width x1" : "unknown"),
1314 netdev->dev_addr[0], netdev->dev_addr[1], netdev->dev_addr[2],
1315 netdev->dev_addr[3], netdev->dev_addr[4], netdev->dev_addr[5]);
1317 igb_read_part_num(hw, &part_num);
1318 dev_info(&pdev->dev, "%s: PBA No: %06x-%03x\n", netdev->name,
1319 (part_num >> 8), (part_num & 0xff));
1321 dev_info(&pdev->dev,
1322 "Using %s interrupts. %d rx queue(s), %d tx queue(s)\n",
1323 adapter->msix_entries ? "MSI-X" :
1324 (adapter->flags & IGB_FLAG_HAS_MSI) ? "MSI" : "legacy",
1325 adapter->num_rx_queues, adapter->num_tx_queues);
1330 igb_release_hw_control(adapter);
1332 if (!igb_check_reset_block(hw))
1333 hw->phy.ops.reset_phy(hw);
1335 if (hw->flash_address)
1336 iounmap(hw->flash_address);
1338 igb_remove_device(hw);
1339 igb_free_queues(adapter);
1342 iounmap(hw->hw_addr);
1344 free_netdev(netdev);
1346 pci_release_selected_regions(pdev, bars);
1349 pci_disable_device(pdev);
1354 * igb_remove - Device Removal Routine
1355 * @pdev: PCI device information struct
1357 * igb_remove is called by the PCI subsystem to alert the driver
1358 * that it should release a PCI device. The could be caused by a
1359 * Hot-Plug event, or because the driver is going to be removed from
1362 static void __devexit igb_remove(struct pci_dev *pdev)
1364 struct net_device *netdev = pci_get_drvdata(pdev);
1365 struct igb_adapter *adapter = netdev_priv(netdev);
1367 struct e1000_hw *hw = &adapter->hw;
1370 /* flush_scheduled work may reschedule our watchdog task, so
1371 * explicitly disable watchdog tasks from being rescheduled */
1372 set_bit(__IGB_DOWN, &adapter->state);
1373 del_timer_sync(&adapter->watchdog_timer);
1374 del_timer_sync(&adapter->phy_info_timer);
1376 flush_scheduled_work();
1379 if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
1380 dev_info(&pdev->dev, "DCA disabled\n");
1381 dca_remove_requester(&pdev->dev);
1382 adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
1383 wr32(E1000_DCA_CTRL, 1);
1387 /* Release control of h/w to f/w. If f/w is AMT enabled, this
1388 * would have already happened in close and is redundant. */
1389 igb_release_hw_control(adapter);
1391 unregister_netdev(netdev);
1393 if (!igb_check_reset_block(&adapter->hw))
1394 adapter->hw.phy.ops.reset_phy(&adapter->hw);
1396 igb_remove_device(&adapter->hw);
1397 igb_reset_interrupt_capability(adapter);
1399 igb_free_queues(adapter);
1401 iounmap(adapter->hw.hw_addr);
1402 if (adapter->hw.flash_address)
1403 iounmap(adapter->hw.flash_address);
1404 pci_release_selected_regions(pdev, adapter->bars);
1406 free_netdev(netdev);
1408 pci_disable_device(pdev);
1412 * igb_sw_init - Initialize general software structures (struct igb_adapter)
1413 * @adapter: board private structure to initialize
1415 * igb_sw_init initializes the Adapter private data structure.
1416 * Fields are initialized based on PCI device information and
1417 * OS network device settings (MTU size).
1419 static int __devinit igb_sw_init(struct igb_adapter *adapter)
1421 struct e1000_hw *hw = &adapter->hw;
1422 struct net_device *netdev = adapter->netdev;
1423 struct pci_dev *pdev = adapter->pdev;
1425 pci_read_config_word(pdev, PCI_COMMAND, &hw->bus.pci_cmd_word);
1427 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1428 adapter->rx_ps_hdr_size = 0; /* disable packet split */
1429 adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
1430 adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
1432 /* Number of supported queues. */
1433 /* Having more queues than CPUs doesn't make sense. */
1434 adapter->num_rx_queues = min((u32)IGB_MAX_RX_QUEUES, (u32)num_online_cpus());
1435 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
1436 adapter->num_tx_queues = min(IGB_MAX_TX_QUEUES, num_online_cpus());
1438 adapter->num_tx_queues = 1;
1439 #endif /* CONFIG_NET_MULTI_QUEUE_DEVICE */
1441 /* This call may decrease the number of queues depending on
1442 * interrupt mode. */
1443 igb_set_interrupt_capability(adapter);
1445 if (igb_alloc_queues(adapter)) {
1446 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
1450 /* Explicitly disable IRQ since the NIC can be in any state. */
1451 igb_irq_disable(adapter);
1453 set_bit(__IGB_DOWN, &adapter->state);
1458 * igb_open - Called when a network interface is made active
1459 * @netdev: network interface device structure
1461 * Returns 0 on success, negative value on failure
1463 * The open entry point is called when a network interface is made
1464 * active by the system (IFF_UP). At this point all resources needed
1465 * for transmit and receive operations are allocated, the interrupt
1466 * handler is registered with the OS, the watchdog timer is started,
1467 * and the stack is notified that the interface is ready.
1469 static int igb_open(struct net_device *netdev)
1471 struct igb_adapter *adapter = netdev_priv(netdev);
1472 struct e1000_hw *hw = &adapter->hw;
1476 /* disallow open during test */
1477 if (test_bit(__IGB_TESTING, &adapter->state))
1480 /* allocate transmit descriptors */
1481 err = igb_setup_all_tx_resources(adapter);
1485 /* allocate receive descriptors */
1486 err = igb_setup_all_rx_resources(adapter);
1490 /* e1000_power_up_phy(adapter); */
1492 adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
1493 if ((adapter->hw.mng_cookie.status &
1494 E1000_MNG_DHCP_COOKIE_STATUS_VLAN))
1495 igb_update_mng_vlan(adapter);
1497 /* before we allocate an interrupt, we must be ready to handle it.
1498 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
1499 * as soon as we call pci_request_irq, so we have to setup our
1500 * clean_rx handler before we do so. */
1501 igb_configure(adapter);
1503 err = igb_request_irq(adapter);
1507 /* From here on the code is the same as igb_up() */
1508 clear_bit(__IGB_DOWN, &adapter->state);
1510 for (i = 0; i < adapter->num_rx_queues; i++)
1511 napi_enable(&adapter->rx_ring[i].napi);
1513 /* Clear any pending interrupts. */
1516 igb_irq_enable(adapter);
1518 /* Fire a link status change interrupt to start the watchdog. */
1519 wr32(E1000_ICS, E1000_ICS_LSC);
1524 igb_release_hw_control(adapter);
1525 /* e1000_power_down_phy(adapter); */
1526 igb_free_all_rx_resources(adapter);
1528 igb_free_all_tx_resources(adapter);
1536 * igb_close - Disables a network interface
1537 * @netdev: network interface device structure
1539 * Returns 0, this is not allowed to fail
1541 * The close entry point is called when an interface is de-activated
1542 * by the OS. The hardware is still under the driver's control, but
1543 * needs to be disabled. A global MAC reset is issued to stop the
1544 * hardware, and all transmit and receive resources are freed.
1546 static int igb_close(struct net_device *netdev)
1548 struct igb_adapter *adapter = netdev_priv(netdev);
1550 WARN_ON(test_bit(__IGB_RESETTING, &adapter->state));
1553 igb_free_irq(adapter);
1555 igb_free_all_tx_resources(adapter);
1556 igb_free_all_rx_resources(adapter);
1558 /* kill manageability vlan ID if supported, but not if a vlan with
1559 * the same ID is registered on the host OS (let 8021q kill it) */
1560 if ((adapter->hw.mng_cookie.status &
1561 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
1563 vlan_group_get_device(adapter->vlgrp, adapter->mng_vlan_id)))
1564 igb_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1570 * igb_setup_tx_resources - allocate Tx resources (Descriptors)
1571 * @adapter: board private structure
1572 * @tx_ring: tx descriptor ring (for a specific queue) to setup
1574 * Return 0 on success, negative on failure
1577 int igb_setup_tx_resources(struct igb_adapter *adapter,
1578 struct igb_ring *tx_ring)
1580 struct pci_dev *pdev = adapter->pdev;
1583 size = sizeof(struct igb_buffer) * tx_ring->count;
1584 tx_ring->buffer_info = vmalloc(size);
1585 if (!tx_ring->buffer_info)
1587 memset(tx_ring->buffer_info, 0, size);
1589 /* round up to nearest 4K */
1590 tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc)
1592 tx_ring->size = ALIGN(tx_ring->size, 4096);
1594 tx_ring->desc = pci_alloc_consistent(pdev, tx_ring->size,
1600 tx_ring->adapter = adapter;
1601 tx_ring->next_to_use = 0;
1602 tx_ring->next_to_clean = 0;
1606 vfree(tx_ring->buffer_info);
1607 dev_err(&adapter->pdev->dev,
1608 "Unable to allocate memory for the transmit descriptor ring\n");
1613 * igb_setup_all_tx_resources - wrapper to allocate Tx resources
1614 * (Descriptors) for all queues
1615 * @adapter: board private structure
1617 * Return 0 on success, negative on failure
1619 static int igb_setup_all_tx_resources(struct igb_adapter *adapter)
1622 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
1626 for (i = 0; i < adapter->num_tx_queues; i++) {
1627 err = igb_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1629 dev_err(&adapter->pdev->dev,
1630 "Allocation for Tx Queue %u failed\n", i);
1631 for (i--; i >= 0; i--)
1632 igb_free_tx_resources(&adapter->tx_ring[i]);
1637 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
1638 for (i = 0; i < IGB_MAX_TX_QUEUES; i++) {
1639 r_idx = i % adapter->num_tx_queues;
1640 adapter->multi_tx_table[i] = &adapter->tx_ring[r_idx];
1647 * igb_configure_tx - Configure transmit Unit after Reset
1648 * @adapter: board private structure
1650 * Configure the Tx unit of the MAC after a reset.
1652 static void igb_configure_tx(struct igb_adapter *adapter)
1655 struct e1000_hw *hw = &adapter->hw;
1660 for (i = 0; i < adapter->num_tx_queues; i++) {
1661 struct igb_ring *ring = &(adapter->tx_ring[i]);
1663 wr32(E1000_TDLEN(i),
1664 ring->count * sizeof(struct e1000_tx_desc));
1666 wr32(E1000_TDBAL(i),
1667 tdba & 0x00000000ffffffffULL);
1668 wr32(E1000_TDBAH(i), tdba >> 32);
1670 tdwba = ring->dma + ring->count * sizeof(struct e1000_tx_desc);
1671 tdwba |= 1; /* enable head wb */
1672 wr32(E1000_TDWBAL(i),
1673 tdwba & 0x00000000ffffffffULL);
1674 wr32(E1000_TDWBAH(i), tdwba >> 32);
1676 ring->head = E1000_TDH(i);
1677 ring->tail = E1000_TDT(i);
1678 writel(0, hw->hw_addr + ring->tail);
1679 writel(0, hw->hw_addr + ring->head);
1680 txdctl = rd32(E1000_TXDCTL(i));
1681 txdctl |= E1000_TXDCTL_QUEUE_ENABLE;
1682 wr32(E1000_TXDCTL(i), txdctl);
1684 /* Turn off Relaxed Ordering on head write-backs. The
1685 * writebacks MUST be delivered in order or it will
1686 * completely screw up our bookeeping.
1688 txctrl = rd32(E1000_DCA_TXCTRL(i));
1689 txctrl &= ~E1000_DCA_TXCTRL_TX_WB_RO_EN;
1690 wr32(E1000_DCA_TXCTRL(i), txctrl);
1695 /* Use the default values for the Tx Inter Packet Gap (IPG) timer */
1697 /* Program the Transmit Control Register */
1699 tctl = rd32(E1000_TCTL);
1700 tctl &= ~E1000_TCTL_CT;
1701 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
1702 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1704 igb_config_collision_dist(hw);
1706 /* Setup Transmit Descriptor Settings for eop descriptor */
1707 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_RS;
1709 /* Enable transmits */
1710 tctl |= E1000_TCTL_EN;
1712 wr32(E1000_TCTL, tctl);
1716 * igb_setup_rx_resources - allocate Rx resources (Descriptors)
1717 * @adapter: board private structure
1718 * @rx_ring: rx descriptor ring (for a specific queue) to setup
1720 * Returns 0 on success, negative on failure
1723 int igb_setup_rx_resources(struct igb_adapter *adapter,
1724 struct igb_ring *rx_ring)
1726 struct pci_dev *pdev = adapter->pdev;
1729 #ifdef CONFIG_IGB_LRO
1730 size = sizeof(struct net_lro_desc) * MAX_LRO_DESCRIPTORS;
1731 rx_ring->lro_mgr.lro_arr = vmalloc(size);
1732 if (!rx_ring->lro_mgr.lro_arr)
1734 memset(rx_ring->lro_mgr.lro_arr, 0, size);
1737 size = sizeof(struct igb_buffer) * rx_ring->count;
1738 rx_ring->buffer_info = vmalloc(size);
1739 if (!rx_ring->buffer_info)
1741 memset(rx_ring->buffer_info, 0, size);
1743 desc_len = sizeof(union e1000_adv_rx_desc);
1745 /* Round up to nearest 4K */
1746 rx_ring->size = rx_ring->count * desc_len;
1747 rx_ring->size = ALIGN(rx_ring->size, 4096);
1749 rx_ring->desc = pci_alloc_consistent(pdev, rx_ring->size,
1755 rx_ring->next_to_clean = 0;
1756 rx_ring->next_to_use = 0;
1758 rx_ring->adapter = adapter;
1763 #ifdef CONFIG_IGB_LRO
1764 vfree(rx_ring->lro_mgr.lro_arr);
1765 rx_ring->lro_mgr.lro_arr = NULL;
1767 vfree(rx_ring->buffer_info);
1768 dev_err(&adapter->pdev->dev, "Unable to allocate memory for "
1769 "the receive descriptor ring\n");
1774 * igb_setup_all_rx_resources - wrapper to allocate Rx resources
1775 * (Descriptors) for all queues
1776 * @adapter: board private structure
1778 * Return 0 on success, negative on failure
1780 static int igb_setup_all_rx_resources(struct igb_adapter *adapter)
1784 for (i = 0; i < adapter->num_rx_queues; i++) {
1785 err = igb_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1787 dev_err(&adapter->pdev->dev,
1788 "Allocation for Rx Queue %u failed\n", i);
1789 for (i--; i >= 0; i--)
1790 igb_free_rx_resources(&adapter->rx_ring[i]);
1799 * igb_setup_rctl - configure the receive control registers
1800 * @adapter: Board private structure
1802 static void igb_setup_rctl(struct igb_adapter *adapter)
1804 struct e1000_hw *hw = &adapter->hw;
1809 rctl = rd32(E1000_RCTL);
1811 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1813 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
1814 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1815 (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
1818 * enable stripping of CRC. It's unlikely this will break BMC
1819 * redirection as it did with e1000. Newer features require
1820 * that the HW strips the CRC.
1822 rctl |= E1000_RCTL_SECRC;
1824 rctl &= ~E1000_RCTL_SBP;
1826 if (adapter->netdev->mtu <= ETH_DATA_LEN)
1827 rctl &= ~E1000_RCTL_LPE;
1829 rctl |= E1000_RCTL_LPE;
1830 if (adapter->rx_buffer_len <= IGB_RXBUFFER_2048) {
1831 /* Setup buffer sizes */
1832 rctl &= ~E1000_RCTL_SZ_4096;
1833 rctl |= E1000_RCTL_BSEX;
1834 switch (adapter->rx_buffer_len) {
1835 case IGB_RXBUFFER_256:
1836 rctl |= E1000_RCTL_SZ_256;
1837 rctl &= ~E1000_RCTL_BSEX;
1839 case IGB_RXBUFFER_512:
1840 rctl |= E1000_RCTL_SZ_512;
1841 rctl &= ~E1000_RCTL_BSEX;
1843 case IGB_RXBUFFER_1024:
1844 rctl |= E1000_RCTL_SZ_1024;
1845 rctl &= ~E1000_RCTL_BSEX;
1847 case IGB_RXBUFFER_2048:
1849 rctl |= E1000_RCTL_SZ_2048;
1850 rctl &= ~E1000_RCTL_BSEX;
1854 rctl &= ~E1000_RCTL_BSEX;
1855 srrctl = adapter->rx_buffer_len >> E1000_SRRCTL_BSIZEPKT_SHIFT;
1858 /* 82575 and greater support packet-split where the protocol
1859 * header is placed in skb->data and the packet data is
1860 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
1861 * In the case of a non-split, skb->data is linearly filled,
1862 * followed by the page buffers. Therefore, skb->data is
1863 * sized to hold the largest protocol header.
1865 /* allocations using alloc_page take too long for regular MTU
1866 * so only enable packet split for jumbo frames */
1867 if (rctl & E1000_RCTL_LPE) {
1868 adapter->rx_ps_hdr_size = IGB_RXBUFFER_128;
1869 srrctl |= adapter->rx_ps_hdr_size <<
1870 E1000_SRRCTL_BSIZEHDRSIZE_SHIFT;
1871 srrctl |= E1000_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS;
1873 adapter->rx_ps_hdr_size = 0;
1874 srrctl |= E1000_SRRCTL_DESCTYPE_ADV_ONEBUF;
1877 for (i = 0; i < adapter->num_rx_queues; i++)
1878 wr32(E1000_SRRCTL(i), srrctl);
1880 wr32(E1000_RCTL, rctl);
1884 * igb_configure_rx - Configure receive Unit after Reset
1885 * @adapter: board private structure
1887 * Configure the Rx unit of the MAC after a reset.
1889 static void igb_configure_rx(struct igb_adapter *adapter)
1892 struct e1000_hw *hw = &adapter->hw;
1897 /* disable receives while setting up the descriptors */
1898 rctl = rd32(E1000_RCTL);
1899 wr32(E1000_RCTL, rctl & ~E1000_RCTL_EN);
1903 if (adapter->itr_setting > 3)
1904 wr32(E1000_ITR, adapter->itr);
1906 /* Setup the HW Rx Head and Tail Descriptor Pointers and
1907 * the Base and Length of the Rx Descriptor Ring */
1908 for (i = 0; i < adapter->num_rx_queues; i++) {
1909 struct igb_ring *ring = &(adapter->rx_ring[i]);
1911 wr32(E1000_RDBAL(i),
1912 rdba & 0x00000000ffffffffULL);
1913 wr32(E1000_RDBAH(i), rdba >> 32);
1914 wr32(E1000_RDLEN(i),
1915 ring->count * sizeof(union e1000_adv_rx_desc));
1917 ring->head = E1000_RDH(i);
1918 ring->tail = E1000_RDT(i);
1919 writel(0, hw->hw_addr + ring->tail);
1920 writel(0, hw->hw_addr + ring->head);
1922 rxdctl = rd32(E1000_RXDCTL(i));
1923 rxdctl |= E1000_RXDCTL_QUEUE_ENABLE;
1924 rxdctl &= 0xFFF00000;
1925 rxdctl |= IGB_RX_PTHRESH;
1926 rxdctl |= IGB_RX_HTHRESH << 8;
1927 rxdctl |= IGB_RX_WTHRESH << 16;
1928 wr32(E1000_RXDCTL(i), rxdctl);
1929 #ifdef CONFIG_IGB_LRO
1930 /* Intitial LRO Settings */
1931 ring->lro_mgr.max_aggr = MAX_LRO_AGGR;
1932 ring->lro_mgr.max_desc = MAX_LRO_DESCRIPTORS;
1933 ring->lro_mgr.get_skb_header = igb_get_skb_hdr;
1934 ring->lro_mgr.features = LRO_F_NAPI | LRO_F_EXTRACT_VLAN_ID;
1935 ring->lro_mgr.dev = adapter->netdev;
1936 ring->lro_mgr.ip_summed = CHECKSUM_UNNECESSARY;
1937 ring->lro_mgr.ip_summed_aggr = CHECKSUM_UNNECESSARY;
1941 if (adapter->num_rx_queues > 1) {
1950 get_random_bytes(&random[0], 40);
1952 if (hw->mac.type >= e1000_82576)
1956 for (j = 0; j < (32 * 4); j++) {
1958 (j % adapter->num_rx_queues) << shift;
1961 hw->hw_addr + E1000_RETA(0) + (j & ~3));
1963 mrqc = E1000_MRQC_ENABLE_RSS_4Q;
1965 /* Fill out hash function seeds */
1966 for (j = 0; j < 10; j++)
1967 array_wr32(E1000_RSSRK(0), j, random[j]);
1969 mrqc |= (E1000_MRQC_RSS_FIELD_IPV4 |
1970 E1000_MRQC_RSS_FIELD_IPV4_TCP);
1971 mrqc |= (E1000_MRQC_RSS_FIELD_IPV6 |
1972 E1000_MRQC_RSS_FIELD_IPV6_TCP);
1973 mrqc |= (E1000_MRQC_RSS_FIELD_IPV4_UDP |
1974 E1000_MRQC_RSS_FIELD_IPV6_UDP);
1975 mrqc |= (E1000_MRQC_RSS_FIELD_IPV6_UDP_EX |
1976 E1000_MRQC_RSS_FIELD_IPV6_TCP_EX);
1979 wr32(E1000_MRQC, mrqc);
1981 /* Multiqueue and raw packet checksumming are mutually
1982 * exclusive. Note that this not the same as TCP/IP
1983 * checksumming, which works fine. */
1984 rxcsum = rd32(E1000_RXCSUM);
1985 rxcsum |= E1000_RXCSUM_PCSD;
1986 wr32(E1000_RXCSUM, rxcsum);
1988 /* Enable Receive Checksum Offload for TCP and UDP */
1989 rxcsum = rd32(E1000_RXCSUM);
1990 if (adapter->rx_csum) {
1991 rxcsum |= E1000_RXCSUM_TUOFL;
1993 /* Enable IPv4 payload checksum for UDP fragments
1994 * Must be used in conjunction with packet-split. */
1995 if (adapter->rx_ps_hdr_size)
1996 rxcsum |= E1000_RXCSUM_IPPCSE;
1998 rxcsum &= ~E1000_RXCSUM_TUOFL;
1999 /* don't need to clear IPPCSE as it defaults to 0 */
2001 wr32(E1000_RXCSUM, rxcsum);
2006 adapter->max_frame_size + VLAN_TAG_SIZE);
2008 wr32(E1000_RLPML, adapter->max_frame_size);
2010 /* Enable Receives */
2011 wr32(E1000_RCTL, rctl);
2015 * igb_free_tx_resources - Free Tx Resources per Queue
2016 * @adapter: board private structure
2017 * @tx_ring: Tx descriptor ring for a specific queue
2019 * Free all transmit software resources
2021 static void igb_free_tx_resources(struct igb_ring *tx_ring)
2023 struct pci_dev *pdev = tx_ring->adapter->pdev;
2025 igb_clean_tx_ring(tx_ring);
2027 vfree(tx_ring->buffer_info);
2028 tx_ring->buffer_info = NULL;
2030 pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
2032 tx_ring->desc = NULL;
2036 * igb_free_all_tx_resources - Free Tx Resources for All Queues
2037 * @adapter: board private structure
2039 * Free all transmit software resources
2041 static void igb_free_all_tx_resources(struct igb_adapter *adapter)
2045 for (i = 0; i < adapter->num_tx_queues; i++)
2046 igb_free_tx_resources(&adapter->tx_ring[i]);
2049 static void igb_unmap_and_free_tx_resource(struct igb_adapter *adapter,
2050 struct igb_buffer *buffer_info)
2052 if (buffer_info->dma) {
2053 pci_unmap_page(adapter->pdev,
2055 buffer_info->length,
2057 buffer_info->dma = 0;
2059 if (buffer_info->skb) {
2060 dev_kfree_skb_any(buffer_info->skb);
2061 buffer_info->skb = NULL;
2063 buffer_info->time_stamp = 0;
2064 /* buffer_info must be completely set up in the transmit path */
2068 * igb_clean_tx_ring - Free Tx Buffers
2069 * @adapter: board private structure
2070 * @tx_ring: ring to be cleaned
2072 static void igb_clean_tx_ring(struct igb_ring *tx_ring)
2074 struct igb_adapter *adapter = tx_ring->adapter;
2075 struct igb_buffer *buffer_info;
2079 if (!tx_ring->buffer_info)
2081 /* Free all the Tx ring sk_buffs */
2083 for (i = 0; i < tx_ring->count; i++) {
2084 buffer_info = &tx_ring->buffer_info[i];
2085 igb_unmap_and_free_tx_resource(adapter, buffer_info);
2088 size = sizeof(struct igb_buffer) * tx_ring->count;
2089 memset(tx_ring->buffer_info, 0, size);
2091 /* Zero out the descriptor ring */
2093 memset(tx_ring->desc, 0, tx_ring->size);
2095 tx_ring->next_to_use = 0;
2096 tx_ring->next_to_clean = 0;
2098 writel(0, adapter->hw.hw_addr + tx_ring->head);
2099 writel(0, adapter->hw.hw_addr + tx_ring->tail);
2103 * igb_clean_all_tx_rings - Free Tx Buffers for all queues
2104 * @adapter: board private structure
2106 static void igb_clean_all_tx_rings(struct igb_adapter *adapter)
2110 for (i = 0; i < adapter->num_tx_queues; i++)
2111 igb_clean_tx_ring(&adapter->tx_ring[i]);
2115 * igb_free_rx_resources - Free Rx Resources
2116 * @adapter: board private structure
2117 * @rx_ring: ring to clean the resources from
2119 * Free all receive software resources
2121 static void igb_free_rx_resources(struct igb_ring *rx_ring)
2123 struct pci_dev *pdev = rx_ring->adapter->pdev;
2125 igb_clean_rx_ring(rx_ring);
2127 vfree(rx_ring->buffer_info);
2128 rx_ring->buffer_info = NULL;
2130 #ifdef CONFIG_IGB_LRO
2131 vfree(rx_ring->lro_mgr.lro_arr);
2132 rx_ring->lro_mgr.lro_arr = NULL;
2135 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
2137 rx_ring->desc = NULL;
2141 * igb_free_all_rx_resources - Free Rx Resources for All Queues
2142 * @adapter: board private structure
2144 * Free all receive software resources
2146 static void igb_free_all_rx_resources(struct igb_adapter *adapter)
2150 for (i = 0; i < adapter->num_rx_queues; i++)
2151 igb_free_rx_resources(&adapter->rx_ring[i]);
2155 * igb_clean_rx_ring - Free Rx Buffers per Queue
2156 * @adapter: board private structure
2157 * @rx_ring: ring to free buffers from
2159 static void igb_clean_rx_ring(struct igb_ring *rx_ring)
2161 struct igb_adapter *adapter = rx_ring->adapter;
2162 struct igb_buffer *buffer_info;
2163 struct pci_dev *pdev = adapter->pdev;
2167 if (!rx_ring->buffer_info)
2169 /* Free all the Rx ring sk_buffs */
2170 for (i = 0; i < rx_ring->count; i++) {
2171 buffer_info = &rx_ring->buffer_info[i];
2172 if (buffer_info->dma) {
2173 if (adapter->rx_ps_hdr_size)
2174 pci_unmap_single(pdev, buffer_info->dma,
2175 adapter->rx_ps_hdr_size,
2176 PCI_DMA_FROMDEVICE);
2178 pci_unmap_single(pdev, buffer_info->dma,
2179 adapter->rx_buffer_len,
2180 PCI_DMA_FROMDEVICE);
2181 buffer_info->dma = 0;
2184 if (buffer_info->skb) {
2185 dev_kfree_skb(buffer_info->skb);
2186 buffer_info->skb = NULL;
2188 if (buffer_info->page) {
2189 if (buffer_info->page_dma)
2190 pci_unmap_page(pdev, buffer_info->page_dma,
2192 PCI_DMA_FROMDEVICE);
2193 put_page(buffer_info->page);
2194 buffer_info->page = NULL;
2195 buffer_info->page_dma = 0;
2196 buffer_info->page_offset = 0;
2200 size = sizeof(struct igb_buffer) * rx_ring->count;
2201 memset(rx_ring->buffer_info, 0, size);
2203 /* Zero out the descriptor ring */
2204 memset(rx_ring->desc, 0, rx_ring->size);
2206 rx_ring->next_to_clean = 0;
2207 rx_ring->next_to_use = 0;
2209 writel(0, adapter->hw.hw_addr + rx_ring->head);
2210 writel(0, adapter->hw.hw_addr + rx_ring->tail);
2214 * igb_clean_all_rx_rings - Free Rx Buffers for all queues
2215 * @adapter: board private structure
2217 static void igb_clean_all_rx_rings(struct igb_adapter *adapter)
2221 for (i = 0; i < adapter->num_rx_queues; i++)
2222 igb_clean_rx_ring(&adapter->rx_ring[i]);
2226 * igb_set_mac - Change the Ethernet Address of the NIC
2227 * @netdev: network interface device structure
2228 * @p: pointer to an address structure
2230 * Returns 0 on success, negative on failure
2232 static int igb_set_mac(struct net_device *netdev, void *p)
2234 struct igb_adapter *adapter = netdev_priv(netdev);
2235 struct sockaddr *addr = p;
2237 if (!is_valid_ether_addr(addr->sa_data))
2238 return -EADDRNOTAVAIL;
2240 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2241 memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len);
2243 adapter->hw.mac.ops.rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
2249 * igb_set_multi - Multicast and Promiscuous mode set
2250 * @netdev: network interface device structure
2252 * The set_multi entry point is called whenever the multicast address
2253 * list or the network interface flags are updated. This routine is
2254 * responsible for configuring the hardware for proper multicast,
2255 * promiscuous mode, and all-multi behavior.
2257 static void igb_set_multi(struct net_device *netdev)
2259 struct igb_adapter *adapter = netdev_priv(netdev);
2260 struct e1000_hw *hw = &adapter->hw;
2261 struct e1000_mac_info *mac = &hw->mac;
2262 struct dev_mc_list *mc_ptr;
2267 /* Check for Promiscuous and All Multicast modes */
2269 rctl = rd32(E1000_RCTL);
2271 if (netdev->flags & IFF_PROMISC) {
2272 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
2273 rctl &= ~E1000_RCTL_VFE;
2275 if (netdev->flags & IFF_ALLMULTI) {
2276 rctl |= E1000_RCTL_MPE;
2277 rctl &= ~E1000_RCTL_UPE;
2279 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
2281 rctl |= E1000_RCTL_VFE;
2283 wr32(E1000_RCTL, rctl);
2285 if (!netdev->mc_count) {
2286 /* nothing to program, so clear mc list */
2287 igb_update_mc_addr_list_82575(hw, NULL, 0, 1,
2288 mac->rar_entry_count);
2292 mta_list = kzalloc(netdev->mc_count * 6, GFP_ATOMIC);
2296 /* The shared function expects a packed array of only addresses. */
2297 mc_ptr = netdev->mc_list;
2299 for (i = 0; i < netdev->mc_count; i++) {
2302 memcpy(mta_list + (i*ETH_ALEN), mc_ptr->dmi_addr, ETH_ALEN);
2303 mc_ptr = mc_ptr->next;
2305 igb_update_mc_addr_list_82575(hw, mta_list, i, 1,
2306 mac->rar_entry_count);
2310 /* Need to wait a few seconds after link up to get diagnostic information from
2312 static void igb_update_phy_info(unsigned long data)
2314 struct igb_adapter *adapter = (struct igb_adapter *) data;
2315 if (adapter->hw.phy.ops.get_phy_info)
2316 adapter->hw.phy.ops.get_phy_info(&adapter->hw);
2320 * igb_watchdog - Timer Call-back
2321 * @data: pointer to adapter cast into an unsigned long
2323 static void igb_watchdog(unsigned long data)
2325 struct igb_adapter *adapter = (struct igb_adapter *)data;
2326 /* Do the rest outside of interrupt context */
2327 schedule_work(&adapter->watchdog_task);
2330 static void igb_watchdog_task(struct work_struct *work)
2332 struct igb_adapter *adapter = container_of(work,
2333 struct igb_adapter, watchdog_task);
2334 struct e1000_hw *hw = &adapter->hw;
2336 struct net_device *netdev = adapter->netdev;
2337 struct igb_ring *tx_ring = adapter->tx_ring;
2338 struct e1000_mac_info *mac = &adapter->hw.mac;
2341 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
2345 if ((netif_carrier_ok(netdev)) &&
2346 (rd32(E1000_STATUS) & E1000_STATUS_LU))
2349 ret_val = hw->mac.ops.check_for_link(&adapter->hw);
2350 if ((ret_val == E1000_ERR_PHY) &&
2351 (hw->phy.type == e1000_phy_igp_3) &&
2353 E1000_PHY_CTRL_GBE_DISABLE))
2354 dev_info(&adapter->pdev->dev,
2355 "Gigabit has been disabled, downgrading speed\n");
2357 if ((hw->phy.media_type == e1000_media_type_internal_serdes) &&
2358 !(rd32(E1000_TXCW) & E1000_TXCW_ANE))
2359 link = mac->serdes_has_link;
2361 link = rd32(E1000_STATUS) &
2365 if (!netif_carrier_ok(netdev)) {
2367 hw->mac.ops.get_speed_and_duplex(&adapter->hw,
2368 &adapter->link_speed,
2369 &adapter->link_duplex);
2371 ctrl = rd32(E1000_CTRL);
2372 dev_info(&adapter->pdev->dev,
2373 "NIC Link is Up %d Mbps %s, "
2374 "Flow Control: %s\n",
2375 adapter->link_speed,
2376 adapter->link_duplex == FULL_DUPLEX ?
2377 "Full Duplex" : "Half Duplex",
2378 ((ctrl & E1000_CTRL_TFCE) && (ctrl &
2379 E1000_CTRL_RFCE)) ? "RX/TX" : ((ctrl &
2380 E1000_CTRL_RFCE) ? "RX" : ((ctrl &
2381 E1000_CTRL_TFCE) ? "TX" : "None")));
2383 /* tweak tx_queue_len according to speed/duplex and
2384 * adjust the timeout factor */
2385 netdev->tx_queue_len = adapter->tx_queue_len;
2386 adapter->tx_timeout_factor = 1;
2387 switch (adapter->link_speed) {
2389 netdev->tx_queue_len = 10;
2390 adapter->tx_timeout_factor = 14;
2393 netdev->tx_queue_len = 100;
2394 /* maybe add some timeout factor ? */
2398 netif_carrier_on(netdev);
2399 netif_wake_queue(netdev);
2400 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
2401 for (i = 0; i < adapter->num_tx_queues; i++)
2402 netif_wake_subqueue(netdev, i);
2405 if (!test_bit(__IGB_DOWN, &adapter->state))
2406 mod_timer(&adapter->phy_info_timer,
2407 round_jiffies(jiffies + 2 * HZ));
2410 if (netif_carrier_ok(netdev)) {
2411 adapter->link_speed = 0;
2412 adapter->link_duplex = 0;
2413 dev_info(&adapter->pdev->dev, "NIC Link is Down\n");
2414 netif_carrier_off(netdev);
2415 netif_stop_queue(netdev);
2416 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
2417 for (i = 0; i < adapter->num_tx_queues; i++)
2418 netif_stop_subqueue(netdev, i);
2420 if (!test_bit(__IGB_DOWN, &adapter->state))
2421 mod_timer(&adapter->phy_info_timer,
2422 round_jiffies(jiffies + 2 * HZ));
2427 igb_update_stats(adapter);
2429 mac->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
2430 adapter->tpt_old = adapter->stats.tpt;
2431 mac->collision_delta = adapter->stats.colc - adapter->colc_old;
2432 adapter->colc_old = adapter->stats.colc;
2434 adapter->gorc = adapter->stats.gorc - adapter->gorc_old;
2435 adapter->gorc_old = adapter->stats.gorc;
2436 adapter->gotc = adapter->stats.gotc - adapter->gotc_old;
2437 adapter->gotc_old = adapter->stats.gotc;
2439 igb_update_adaptive(&adapter->hw);
2441 if (!netif_carrier_ok(netdev)) {
2442 if (IGB_DESC_UNUSED(tx_ring) + 1 < tx_ring->count) {
2443 /* We've lost link, so the controller stops DMA,
2444 * but we've got queued Tx work that's never going
2445 * to get done, so reset controller to flush Tx.
2446 * (Do the reset outside of interrupt context). */
2447 adapter->tx_timeout_count++;
2448 schedule_work(&adapter->reset_task);
2452 /* Cause software interrupt to ensure rx ring is cleaned */
2453 wr32(E1000_ICS, E1000_ICS_RXDMT0);
2455 /* Force detection of hung controller every watchdog period */
2456 tx_ring->detect_tx_hung = true;
2458 /* Reset the timer */
2459 if (!test_bit(__IGB_DOWN, &adapter->state))
2460 mod_timer(&adapter->watchdog_timer,
2461 round_jiffies(jiffies + 2 * HZ));
2464 enum latency_range {
2468 latency_invalid = 255
2473 * igb_update_ring_itr - update the dynamic ITR value based on packet size
2475 * Stores a new ITR value based on strictly on packet size. This
2476 * algorithm is less sophisticated than that used in igb_update_itr,
2477 * due to the difficulty of synchronizing statistics across multiple
2478 * receive rings. The divisors and thresholds used by this fuction
2479 * were determined based on theoretical maximum wire speed and testing
2480 * data, in order to minimize response time while increasing bulk
2482 * This functionality is controlled by the InterruptThrottleRate module
2483 * parameter (see igb_param.c)
2484 * NOTE: This function is called only when operating in a multiqueue
2485 * receive environment.
2486 * @rx_ring: pointer to ring
2488 static void igb_update_ring_itr(struct igb_ring *rx_ring)
2490 int new_val = rx_ring->itr_val;
2491 int avg_wire_size = 0;
2492 struct igb_adapter *adapter = rx_ring->adapter;
2494 if (!rx_ring->total_packets)
2495 goto clear_counts; /* no packets, so don't do anything */
2497 /* For non-gigabit speeds, just fix the interrupt rate at 4000
2498 * ints/sec - ITR timer value of 120 ticks.
2500 if (adapter->link_speed != SPEED_1000) {
2504 avg_wire_size = rx_ring->total_bytes / rx_ring->total_packets;
2506 /* Add 24 bytes to size to account for CRC, preamble, and gap */
2507 avg_wire_size += 24;
2509 /* Don't starve jumbo frames */
2510 avg_wire_size = min(avg_wire_size, 3000);
2512 /* Give a little boost to mid-size frames */
2513 if ((avg_wire_size > 300) && (avg_wire_size < 1200))
2514 new_val = avg_wire_size / 3;
2516 new_val = avg_wire_size / 2;
2519 if (new_val != rx_ring->itr_val) {
2520 rx_ring->itr_val = new_val;
2521 rx_ring->set_itr = 1;
2524 rx_ring->total_bytes = 0;
2525 rx_ring->total_packets = 0;
2529 * igb_update_itr - update the dynamic ITR value based on statistics
2530 * Stores a new ITR value based on packets and byte
2531 * counts during the last interrupt. The advantage of per interrupt
2532 * computation is faster updates and more accurate ITR for the current
2533 * traffic pattern. Constants in this function were computed
2534 * based on theoretical maximum wire speed and thresholds were set based
2535 * on testing data as well as attempting to minimize response time
2536 * while increasing bulk throughput.
2537 * this functionality is controlled by the InterruptThrottleRate module
2538 * parameter (see igb_param.c)
2539 * NOTE: These calculations are only valid when operating in a single-
2540 * queue environment.
2541 * @adapter: pointer to adapter
2542 * @itr_setting: current adapter->itr
2543 * @packets: the number of packets during this measurement interval
2544 * @bytes: the number of bytes during this measurement interval
2546 static unsigned int igb_update_itr(struct igb_adapter *adapter, u16 itr_setting,
2547 int packets, int bytes)
2549 unsigned int retval = itr_setting;
2552 goto update_itr_done;
2554 switch (itr_setting) {
2555 case lowest_latency:
2556 /* handle TSO and jumbo frames */
2557 if (bytes/packets > 8000)
2558 retval = bulk_latency;
2559 else if ((packets < 5) && (bytes > 512))
2560 retval = low_latency;
2562 case low_latency: /* 50 usec aka 20000 ints/s */
2563 if (bytes > 10000) {
2564 /* this if handles the TSO accounting */
2565 if (bytes/packets > 8000) {
2566 retval = bulk_latency;
2567 } else if ((packets < 10) || ((bytes/packets) > 1200)) {
2568 retval = bulk_latency;
2569 } else if ((packets > 35)) {
2570 retval = lowest_latency;
2572 } else if (bytes/packets > 2000) {
2573 retval = bulk_latency;
2574 } else if (packets <= 2 && bytes < 512) {
2575 retval = lowest_latency;
2578 case bulk_latency: /* 250 usec aka 4000 ints/s */
2579 if (bytes > 25000) {
2581 retval = low_latency;
2582 } else if (bytes < 6000) {
2583 retval = low_latency;
2592 static void igb_set_itr(struct igb_adapter *adapter)
2595 u32 new_itr = adapter->itr;
2597 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2598 if (adapter->link_speed != SPEED_1000) {
2604 adapter->rx_itr = igb_update_itr(adapter,
2606 adapter->rx_ring->total_packets,
2607 adapter->rx_ring->total_bytes);
2609 if (adapter->rx_ring->buddy) {
2610 adapter->tx_itr = igb_update_itr(adapter,
2612 adapter->tx_ring->total_packets,
2613 adapter->tx_ring->total_bytes);
2615 current_itr = max(adapter->rx_itr, adapter->tx_itr);
2617 current_itr = adapter->rx_itr;
2620 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2621 if (adapter->itr_setting == 3 &&
2622 current_itr == lowest_latency)
2623 current_itr = low_latency;
2625 switch (current_itr) {
2626 /* counts and packets in update_itr are dependent on these numbers */
2627 case lowest_latency:
2631 new_itr = 20000; /* aka hwitr = ~200 */
2641 adapter->rx_ring->total_bytes = 0;
2642 adapter->rx_ring->total_packets = 0;
2643 if (adapter->rx_ring->buddy) {
2644 adapter->rx_ring->buddy->total_bytes = 0;
2645 adapter->rx_ring->buddy->total_packets = 0;
2648 if (new_itr != adapter->itr) {
2649 /* this attempts to bias the interrupt rate towards Bulk
2650 * by adding intermediate steps when interrupt rate is
2652 new_itr = new_itr > adapter->itr ?
2653 min(adapter->itr + (new_itr >> 2), new_itr) :
2655 /* Don't write the value here; it resets the adapter's
2656 * internal timer, and causes us to delay far longer than
2657 * we should between interrupts. Instead, we write the ITR
2658 * value at the beginning of the next interrupt so the timing
2659 * ends up being correct.
2661 adapter->itr = new_itr;
2662 adapter->rx_ring->itr_val = 1000000000 / (new_itr * 256);
2663 adapter->rx_ring->set_itr = 1;
2670 #define IGB_TX_FLAGS_CSUM 0x00000001
2671 #define IGB_TX_FLAGS_VLAN 0x00000002
2672 #define IGB_TX_FLAGS_TSO 0x00000004
2673 #define IGB_TX_FLAGS_IPV4 0x00000008
2674 #define IGB_TX_FLAGS_VLAN_MASK 0xffff0000
2675 #define IGB_TX_FLAGS_VLAN_SHIFT 16
2677 static inline int igb_tso_adv(struct igb_adapter *adapter,
2678 struct igb_ring *tx_ring,
2679 struct sk_buff *skb, u32 tx_flags, u8 *hdr_len)
2681 struct e1000_adv_tx_context_desc *context_desc;
2684 struct igb_buffer *buffer_info;
2685 u32 info = 0, tu_cmd = 0;
2686 u32 mss_l4len_idx, l4len;
2689 if (skb_header_cloned(skb)) {
2690 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2695 l4len = tcp_hdrlen(skb);
2698 if (skb->protocol == htons(ETH_P_IP)) {
2699 struct iphdr *iph = ip_hdr(skb);
2702 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2706 } else if (skb_shinfo(skb)->gso_type == SKB_GSO_TCPV6) {
2707 ipv6_hdr(skb)->payload_len = 0;
2708 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
2709 &ipv6_hdr(skb)->daddr,
2713 i = tx_ring->next_to_use;
2715 buffer_info = &tx_ring->buffer_info[i];
2716 context_desc = E1000_TX_CTXTDESC_ADV(*tx_ring, i);
2717 /* VLAN MACLEN IPLEN */
2718 if (tx_flags & IGB_TX_FLAGS_VLAN)
2719 info |= (tx_flags & IGB_TX_FLAGS_VLAN_MASK);
2720 info |= (skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT);
2721 *hdr_len += skb_network_offset(skb);
2722 info |= skb_network_header_len(skb);
2723 *hdr_len += skb_network_header_len(skb);
2724 context_desc->vlan_macip_lens = cpu_to_le32(info);
2726 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
2727 tu_cmd |= (E1000_TXD_CMD_DEXT | E1000_ADVTXD_DTYP_CTXT);
2729 if (skb->protocol == htons(ETH_P_IP))
2730 tu_cmd |= E1000_ADVTXD_TUCMD_IPV4;
2731 tu_cmd |= E1000_ADVTXD_TUCMD_L4T_TCP;
2733 context_desc->type_tucmd_mlhl = cpu_to_le32(tu_cmd);
2736 mss_l4len_idx = (skb_shinfo(skb)->gso_size << E1000_ADVTXD_MSS_SHIFT);
2737 mss_l4len_idx |= (l4len << E1000_ADVTXD_L4LEN_SHIFT);
2739 /* Context index must be unique per ring. */
2740 if (adapter->flags & IGB_FLAG_NEED_CTX_IDX)
2741 mss_l4len_idx |= tx_ring->queue_index << 4;
2743 context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx);
2744 context_desc->seqnum_seed = 0;
2746 buffer_info->time_stamp = jiffies;
2747 buffer_info->dma = 0;
2749 if (i == tx_ring->count)
2752 tx_ring->next_to_use = i;
2757 static inline bool igb_tx_csum_adv(struct igb_adapter *adapter,
2758 struct igb_ring *tx_ring,
2759 struct sk_buff *skb, u32 tx_flags)
2761 struct e1000_adv_tx_context_desc *context_desc;
2763 struct igb_buffer *buffer_info;
2764 u32 info = 0, tu_cmd = 0;
2766 if ((skb->ip_summed == CHECKSUM_PARTIAL) ||
2767 (tx_flags & IGB_TX_FLAGS_VLAN)) {
2768 i = tx_ring->next_to_use;
2769 buffer_info = &tx_ring->buffer_info[i];
2770 context_desc = E1000_TX_CTXTDESC_ADV(*tx_ring, i);
2772 if (tx_flags & IGB_TX_FLAGS_VLAN)
2773 info |= (tx_flags & IGB_TX_FLAGS_VLAN_MASK);
2774 info |= (skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT);
2775 if (skb->ip_summed == CHECKSUM_PARTIAL)
2776 info |= skb_network_header_len(skb);
2778 context_desc->vlan_macip_lens = cpu_to_le32(info);
2780 tu_cmd |= (E1000_TXD_CMD_DEXT | E1000_ADVTXD_DTYP_CTXT);
2782 if (skb->ip_summed == CHECKSUM_PARTIAL) {
2783 switch (skb->protocol) {
2784 case __constant_htons(ETH_P_IP):
2785 tu_cmd |= E1000_ADVTXD_TUCMD_IPV4;
2786 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
2787 tu_cmd |= E1000_ADVTXD_TUCMD_L4T_TCP;
2789 case __constant_htons(ETH_P_IPV6):
2790 /* XXX what about other V6 headers?? */
2791 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
2792 tu_cmd |= E1000_ADVTXD_TUCMD_L4T_TCP;
2795 if (unlikely(net_ratelimit()))
2796 dev_warn(&adapter->pdev->dev,
2797 "partial checksum but proto=%x!\n",
2803 context_desc->type_tucmd_mlhl = cpu_to_le32(tu_cmd);
2804 context_desc->seqnum_seed = 0;
2805 if (adapter->flags & IGB_FLAG_NEED_CTX_IDX)
2806 context_desc->mss_l4len_idx =
2807 cpu_to_le32(tx_ring->queue_index << 4);
2809 buffer_info->time_stamp = jiffies;
2810 buffer_info->dma = 0;
2813 if (i == tx_ring->count)
2815 tx_ring->next_to_use = i;
2824 #define IGB_MAX_TXD_PWR 16
2825 #define IGB_MAX_DATA_PER_TXD (1<<IGB_MAX_TXD_PWR)
2827 static inline int igb_tx_map_adv(struct igb_adapter *adapter,
2828 struct igb_ring *tx_ring,
2829 struct sk_buff *skb)
2831 struct igb_buffer *buffer_info;
2832 unsigned int len = skb_headlen(skb);
2833 unsigned int count = 0, i;
2836 i = tx_ring->next_to_use;
2838 buffer_info = &tx_ring->buffer_info[i];
2839 BUG_ON(len >= IGB_MAX_DATA_PER_TXD);
2840 buffer_info->length = len;
2841 /* set time_stamp *before* dma to help avoid a possible race */
2842 buffer_info->time_stamp = jiffies;
2843 buffer_info->dma = pci_map_single(adapter->pdev, skb->data, len,
2847 if (i == tx_ring->count)
2850 for (f = 0; f < skb_shinfo(skb)->nr_frags; f++) {
2851 struct skb_frag_struct *frag;
2853 frag = &skb_shinfo(skb)->frags[f];
2856 buffer_info = &tx_ring->buffer_info[i];
2857 BUG_ON(len >= IGB_MAX_DATA_PER_TXD);
2858 buffer_info->length = len;
2859 buffer_info->time_stamp = jiffies;
2860 buffer_info->dma = pci_map_page(adapter->pdev,
2868 if (i == tx_ring->count)
2872 i = (i == 0) ? tx_ring->count - 1 : i - 1;
2873 tx_ring->buffer_info[i].skb = skb;
2878 static inline void igb_tx_queue_adv(struct igb_adapter *adapter,
2879 struct igb_ring *tx_ring,
2880 int tx_flags, int count, u32 paylen,
2883 union e1000_adv_tx_desc *tx_desc = NULL;
2884 struct igb_buffer *buffer_info;
2885 u32 olinfo_status = 0, cmd_type_len;
2888 cmd_type_len = (E1000_ADVTXD_DTYP_DATA | E1000_ADVTXD_DCMD_IFCS |
2889 E1000_ADVTXD_DCMD_DEXT);
2891 if (tx_flags & IGB_TX_FLAGS_VLAN)
2892 cmd_type_len |= E1000_ADVTXD_DCMD_VLE;
2894 if (tx_flags & IGB_TX_FLAGS_TSO) {
2895 cmd_type_len |= E1000_ADVTXD_DCMD_TSE;
2897 /* insert tcp checksum */
2898 olinfo_status |= E1000_TXD_POPTS_TXSM << 8;
2900 /* insert ip checksum */
2901 if (tx_flags & IGB_TX_FLAGS_IPV4)
2902 olinfo_status |= E1000_TXD_POPTS_IXSM << 8;
2904 } else if (tx_flags & IGB_TX_FLAGS_CSUM) {
2905 olinfo_status |= E1000_TXD_POPTS_TXSM << 8;
2908 if ((adapter->flags & IGB_FLAG_NEED_CTX_IDX) &&
2909 (tx_flags & (IGB_TX_FLAGS_CSUM | IGB_TX_FLAGS_TSO |
2910 IGB_TX_FLAGS_VLAN)))
2911 olinfo_status |= tx_ring->queue_index << 4;
2913 olinfo_status |= ((paylen - hdr_len) << E1000_ADVTXD_PAYLEN_SHIFT);
2915 i = tx_ring->next_to_use;
2917 buffer_info = &tx_ring->buffer_info[i];
2918 tx_desc = E1000_TX_DESC_ADV(*tx_ring, i);
2919 tx_desc->read.buffer_addr = cpu_to_le64(buffer_info->dma);
2920 tx_desc->read.cmd_type_len =
2921 cpu_to_le32(cmd_type_len | buffer_info->length);
2922 tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
2924 if (i == tx_ring->count)
2928 tx_desc->read.cmd_type_len |= cpu_to_le32(adapter->txd_cmd);
2929 /* Force memory writes to complete before letting h/w
2930 * know there are new descriptors to fetch. (Only
2931 * applicable for weak-ordered memory model archs,
2932 * such as IA-64). */
2935 tx_ring->next_to_use = i;
2936 writel(i, adapter->hw.hw_addr + tx_ring->tail);
2937 /* we need this if more than one processor can write to our tail
2938 * at a time, it syncronizes IO on IA64/Altix systems */
2942 static int __igb_maybe_stop_tx(struct net_device *netdev,
2943 struct igb_ring *tx_ring, int size)
2945 struct igb_adapter *adapter = netdev_priv(netdev);
2947 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
2948 netif_stop_subqueue(netdev, tx_ring->queue_index);
2950 netif_stop_queue(netdev);
2953 /* Herbert's original patch had:
2954 * smp_mb__after_netif_stop_queue();
2955 * but since that doesn't exist yet, just open code it. */
2958 /* We need to check again in a case another CPU has just
2959 * made room available. */
2960 if (IGB_DESC_UNUSED(tx_ring) < size)
2964 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
2965 netif_wake_subqueue(netdev, tx_ring->queue_index);
2967 netif_wake_queue(netdev);
2969 ++adapter->restart_queue;
2973 static int igb_maybe_stop_tx(struct net_device *netdev,
2974 struct igb_ring *tx_ring, int size)
2976 if (IGB_DESC_UNUSED(tx_ring) >= size)
2978 return __igb_maybe_stop_tx(netdev, tx_ring, size);
2981 #define TXD_USE_COUNT(S) (((S) >> (IGB_MAX_TXD_PWR)) + 1)
2983 static int igb_xmit_frame_ring_adv(struct sk_buff *skb,
2984 struct net_device *netdev,
2985 struct igb_ring *tx_ring)
2987 struct igb_adapter *adapter = netdev_priv(netdev);
2988 unsigned int tx_flags = 0;
2993 len = skb_headlen(skb);
2995 if (test_bit(__IGB_DOWN, &adapter->state)) {
2996 dev_kfree_skb_any(skb);
2997 return NETDEV_TX_OK;
3000 if (skb->len <= 0) {
3001 dev_kfree_skb_any(skb);
3002 return NETDEV_TX_OK;
3005 /* need: 1 descriptor per page,
3006 * + 2 desc gap to keep tail from touching head,
3007 * + 1 desc for skb->data,
3008 * + 1 desc for context descriptor,
3009 * otherwise try next time */
3010 if (igb_maybe_stop_tx(netdev, tx_ring, skb_shinfo(skb)->nr_frags + 4)) {
3011 /* this is a hard error */
3012 return NETDEV_TX_BUSY;
3016 if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
3017 tx_flags |= IGB_TX_FLAGS_VLAN;
3018 tx_flags |= (vlan_tx_tag_get(skb) << IGB_TX_FLAGS_VLAN_SHIFT);
3021 if (skb->protocol == htons(ETH_P_IP))
3022 tx_flags |= IGB_TX_FLAGS_IPV4;
3024 tso = skb_is_gso(skb) ? igb_tso_adv(adapter, tx_ring, skb, tx_flags,
3028 dev_kfree_skb_any(skb);
3029 return NETDEV_TX_OK;
3033 tx_flags |= IGB_TX_FLAGS_TSO;
3034 else if (igb_tx_csum_adv(adapter, tx_ring, skb, tx_flags))
3035 if (skb->ip_summed == CHECKSUM_PARTIAL)
3036 tx_flags |= IGB_TX_FLAGS_CSUM;
3038 igb_tx_queue_adv(adapter, tx_ring, tx_flags,
3039 igb_tx_map_adv(adapter, tx_ring, skb),
3042 netdev->trans_start = jiffies;
3044 /* Make sure there is space in the ring for the next send. */
3045 igb_maybe_stop_tx(netdev, tx_ring, MAX_SKB_FRAGS + 4);
3047 return NETDEV_TX_OK;
3050 static int igb_xmit_frame_adv(struct sk_buff *skb, struct net_device *netdev)
3052 struct igb_adapter *adapter = netdev_priv(netdev);
3053 struct igb_ring *tx_ring;
3055 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
3057 r_idx = skb->queue_mapping & (IGB_MAX_TX_QUEUES - 1);
3058 tx_ring = adapter->multi_tx_table[r_idx];
3060 tx_ring = &adapter->tx_ring[0];
3064 /* This goes back to the question of how to logically map a tx queue
3065 * to a flow. Right now, performance is impacted slightly negatively
3066 * if using multiple tx queues. If the stack breaks away from a
3067 * single qdisc implementation, we can look at this again. */
3068 return (igb_xmit_frame_ring_adv(skb, netdev, tx_ring));
3072 * igb_tx_timeout - Respond to a Tx Hang
3073 * @netdev: network interface device structure
3075 static void igb_tx_timeout(struct net_device *netdev)
3077 struct igb_adapter *adapter = netdev_priv(netdev);
3078 struct e1000_hw *hw = &adapter->hw;
3080 /* Do the reset outside of interrupt context */
3081 adapter->tx_timeout_count++;
3082 schedule_work(&adapter->reset_task);
3083 wr32(E1000_EICS, adapter->eims_enable_mask &
3084 ~(E1000_EIMS_TCP_TIMER | E1000_EIMS_OTHER));
3087 static void igb_reset_task(struct work_struct *work)
3089 struct igb_adapter *adapter;
3090 adapter = container_of(work, struct igb_adapter, reset_task);
3092 igb_reinit_locked(adapter);
3096 * igb_get_stats - Get System Network Statistics
3097 * @netdev: network interface device structure
3099 * Returns the address of the device statistics structure.
3100 * The statistics are actually updated from the timer callback.
3102 static struct net_device_stats *
3103 igb_get_stats(struct net_device *netdev)
3105 struct igb_adapter *adapter = netdev_priv(netdev);
3107 /* only return the current stats */
3108 return &adapter->net_stats;
3112 * igb_change_mtu - Change the Maximum Transfer Unit
3113 * @netdev: network interface device structure
3114 * @new_mtu: new value for maximum frame size
3116 * Returns 0 on success, negative on failure
3118 static int igb_change_mtu(struct net_device *netdev, int new_mtu)
3120 struct igb_adapter *adapter = netdev_priv(netdev);
3121 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
3123 if ((max_frame < ETH_ZLEN + ETH_FCS_LEN) ||
3124 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
3125 dev_err(&adapter->pdev->dev, "Invalid MTU setting\n");
3129 #define MAX_STD_JUMBO_FRAME_SIZE 9234
3130 if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
3131 dev_err(&adapter->pdev->dev, "MTU > 9216 not supported.\n");
3135 while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
3137 /* igb_down has a dependency on max_frame_size */
3138 adapter->max_frame_size = max_frame;
3139 if (netif_running(netdev))
3142 /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
3143 * means we reserve 2 more, this pushes us to allocate from the next
3145 * i.e. RXBUFFER_2048 --> size-4096 slab
3148 if (max_frame <= IGB_RXBUFFER_256)
3149 adapter->rx_buffer_len = IGB_RXBUFFER_256;
3150 else if (max_frame <= IGB_RXBUFFER_512)
3151 adapter->rx_buffer_len = IGB_RXBUFFER_512;
3152 else if (max_frame <= IGB_RXBUFFER_1024)
3153 adapter->rx_buffer_len = IGB_RXBUFFER_1024;
3154 else if (max_frame <= IGB_RXBUFFER_2048)
3155 adapter->rx_buffer_len = IGB_RXBUFFER_2048;
3157 #if (PAGE_SIZE / 2) > IGB_RXBUFFER_16384
3158 adapter->rx_buffer_len = IGB_RXBUFFER_16384;
3160 adapter->rx_buffer_len = PAGE_SIZE / 2;
3162 /* adjust allocation if LPE protects us, and we aren't using SBP */
3163 if ((max_frame == ETH_FRAME_LEN + ETH_FCS_LEN) ||
3164 (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE))
3165 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
3167 dev_info(&adapter->pdev->dev, "changing MTU from %d to %d\n",
3168 netdev->mtu, new_mtu);
3169 netdev->mtu = new_mtu;
3171 if (netif_running(netdev))
3176 clear_bit(__IGB_RESETTING, &adapter->state);
3182 * igb_update_stats - Update the board statistics counters
3183 * @adapter: board private structure
3186 void igb_update_stats(struct igb_adapter *adapter)
3188 struct e1000_hw *hw = &adapter->hw;
3189 struct pci_dev *pdev = adapter->pdev;
3192 #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3195 * Prevent stats update while adapter is being reset, or if the pci
3196 * connection is down.
3198 if (adapter->link_speed == 0)
3200 if (pci_channel_offline(pdev))
3203 adapter->stats.crcerrs += rd32(E1000_CRCERRS);
3204 adapter->stats.gprc += rd32(E1000_GPRC);
3205 adapter->stats.gorc += rd32(E1000_GORCL);
3206 rd32(E1000_GORCH); /* clear GORCL */
3207 adapter->stats.bprc += rd32(E1000_BPRC);
3208 adapter->stats.mprc += rd32(E1000_MPRC);
3209 adapter->stats.roc += rd32(E1000_ROC);
3211 adapter->stats.prc64 += rd32(E1000_PRC64);
3212 adapter->stats.prc127 += rd32(E1000_PRC127);
3213 adapter->stats.prc255 += rd32(E1000_PRC255);
3214 adapter->stats.prc511 += rd32(E1000_PRC511);
3215 adapter->stats.prc1023 += rd32(E1000_PRC1023);
3216 adapter->stats.prc1522 += rd32(E1000_PRC1522);
3217 adapter->stats.symerrs += rd32(E1000_SYMERRS);
3218 adapter->stats.sec += rd32(E1000_SEC);
3220 adapter->stats.mpc += rd32(E1000_MPC);
3221 adapter->stats.scc += rd32(E1000_SCC);
3222 adapter->stats.ecol += rd32(E1000_ECOL);
3223 adapter->stats.mcc += rd32(E1000_MCC);
3224 adapter->stats.latecol += rd32(E1000_LATECOL);
3225 adapter->stats.dc += rd32(E1000_DC);
3226 adapter->stats.rlec += rd32(E1000_RLEC);
3227 adapter->stats.xonrxc += rd32(E1000_XONRXC);
3228 adapter->stats.xontxc += rd32(E1000_XONTXC);
3229 adapter->stats.xoffrxc += rd32(E1000_XOFFRXC);
3230 adapter->stats.xofftxc += rd32(E1000_XOFFTXC);
3231 adapter->stats.fcruc += rd32(E1000_FCRUC);
3232 adapter->stats.gptc += rd32(E1000_GPTC);
3233 adapter->stats.gotc += rd32(E1000_GOTCL);
3234 rd32(E1000_GOTCH); /* clear GOTCL */
3235 adapter->stats.rnbc += rd32(E1000_RNBC);
3236 adapter->stats.ruc += rd32(E1000_RUC);
3237 adapter->stats.rfc += rd32(E1000_RFC);
3238 adapter->stats.rjc += rd32(E1000_RJC);
3239 adapter->stats.tor += rd32(E1000_TORH);
3240 adapter->stats.tot += rd32(E1000_TOTH);
3241 adapter->stats.tpr += rd32(E1000_TPR);
3243 adapter->stats.ptc64 += rd32(E1000_PTC64);
3244 adapter->stats.ptc127 += rd32(E1000_PTC127);
3245 adapter->stats.ptc255 += rd32(E1000_PTC255);
3246 adapter->stats.ptc511 += rd32(E1000_PTC511);
3247 adapter->stats.ptc1023 += rd32(E1000_PTC1023);
3248 adapter->stats.ptc1522 += rd32(E1000_PTC1522);
3250 adapter->stats.mptc += rd32(E1000_MPTC);
3251 adapter->stats.bptc += rd32(E1000_BPTC);
3253 /* used for adaptive IFS */
3255 hw->mac.tx_packet_delta = rd32(E1000_TPT);
3256 adapter->stats.tpt += hw->mac.tx_packet_delta;
3257 hw->mac.collision_delta = rd32(E1000_COLC);
3258 adapter->stats.colc += hw->mac.collision_delta;
3260 adapter->stats.algnerrc += rd32(E1000_ALGNERRC);
3261 adapter->stats.rxerrc += rd32(E1000_RXERRC);
3262 adapter->stats.tncrs += rd32(E1000_TNCRS);
3263 adapter->stats.tsctc += rd32(E1000_TSCTC);
3264 adapter->stats.tsctfc += rd32(E1000_TSCTFC);
3266 adapter->stats.iac += rd32(E1000_IAC);
3267 adapter->stats.icrxoc += rd32(E1000_ICRXOC);
3268 adapter->stats.icrxptc += rd32(E1000_ICRXPTC);
3269 adapter->stats.icrxatc += rd32(E1000_ICRXATC);
3270 adapter->stats.ictxptc += rd32(E1000_ICTXPTC);
3271 adapter->stats.ictxatc += rd32(E1000_ICTXATC);
3272 adapter->stats.ictxqec += rd32(E1000_ICTXQEC);
3273 adapter->stats.ictxqmtc += rd32(E1000_ICTXQMTC);
3274 adapter->stats.icrxdmtc += rd32(E1000_ICRXDMTC);
3276 /* Fill out the OS statistics structure */
3277 adapter->net_stats.multicast = adapter->stats.mprc;
3278 adapter->net_stats.collisions = adapter->stats.colc;
3282 /* RLEC on some newer hardware can be incorrect so build
3283 * our own version based on RUC and ROC */
3284 adapter->net_stats.rx_errors = adapter->stats.rxerrc +
3285 adapter->stats.crcerrs + adapter->stats.algnerrc +
3286 adapter->stats.ruc + adapter->stats.roc +
3287 adapter->stats.cexterr;
3288 adapter->net_stats.rx_length_errors = adapter->stats.ruc +
3290 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3291 adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
3292 adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
3295 adapter->net_stats.tx_errors = adapter->stats.ecol +
3296 adapter->stats.latecol;
3297 adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
3298 adapter->net_stats.tx_window_errors = adapter->stats.latecol;
3299 adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
3301 /* Tx Dropped needs to be maintained elsewhere */
3304 if (hw->phy.media_type == e1000_media_type_copper) {
3305 if ((adapter->link_speed == SPEED_1000) &&
3306 (!hw->phy.ops.read_phy_reg(hw, PHY_1000T_STATUS,
3308 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3309 adapter->phy_stats.idle_errors += phy_tmp;
3313 /* Management Stats */
3314 adapter->stats.mgptc += rd32(E1000_MGTPTC);
3315 adapter->stats.mgprc += rd32(E1000_MGTPRC);
3316 adapter->stats.mgpdc += rd32(E1000_MGTPDC);
3320 static irqreturn_t igb_msix_other(int irq, void *data)
3322 struct net_device *netdev = data;
3323 struct igb_adapter *adapter = netdev_priv(netdev);
3324 struct e1000_hw *hw = &adapter->hw;
3325 u32 icr = rd32(E1000_ICR);
3327 /* reading ICR causes bit 31 of EICR to be cleared */
3328 if (!(icr & E1000_ICR_LSC))
3329 goto no_link_interrupt;
3330 hw->mac.get_link_status = 1;
3331 /* guard against interrupt when we're going down */
3332 if (!test_bit(__IGB_DOWN, &adapter->state))
3333 mod_timer(&adapter->watchdog_timer, jiffies + 1);
3336 wr32(E1000_IMS, E1000_IMS_LSC);
3337 wr32(E1000_EIMS, adapter->eims_other);
3342 static irqreturn_t igb_msix_tx(int irq, void *data)
3344 struct igb_ring *tx_ring = data;
3345 struct igb_adapter *adapter = tx_ring->adapter;
3346 struct e1000_hw *hw = &adapter->hw;
3349 if (adapter->flags & IGB_FLAG_DCA_ENABLED)
3350 igb_update_tx_dca(tx_ring);
3352 tx_ring->total_bytes = 0;
3353 tx_ring->total_packets = 0;
3355 /* auto mask will automatically reenable the interrupt when we write
3357 if (!igb_clean_tx_irq(tx_ring))
3358 /* Ring was not completely cleaned, so fire another interrupt */
3359 wr32(E1000_EICS, tx_ring->eims_value);
3361 wr32(E1000_EIMS, tx_ring->eims_value);
3366 static void igb_write_itr(struct igb_ring *ring)
3368 struct e1000_hw *hw = &ring->adapter->hw;
3369 if ((ring->adapter->itr_setting & 3) && ring->set_itr) {
3370 switch (hw->mac.type) {
3372 wr32(ring->itr_register,
3377 wr32(ring->itr_register,
3379 (ring->itr_val << 16));
3386 static irqreturn_t igb_msix_rx(int irq, void *data)
3388 struct igb_ring *rx_ring = data;
3389 struct igb_adapter *adapter = rx_ring->adapter;
3391 /* Write the ITR value calculated at the end of the
3392 * previous interrupt.
3395 igb_write_itr(rx_ring);
3397 if (netif_rx_schedule_prep(adapter->netdev, &rx_ring->napi))
3398 __netif_rx_schedule(adapter->netdev, &rx_ring->napi);
3401 if (adapter->flags & IGB_FLAG_DCA_ENABLED)
3402 igb_update_rx_dca(rx_ring);
3408 static void igb_update_rx_dca(struct igb_ring *rx_ring)
3411 struct igb_adapter *adapter = rx_ring->adapter;
3412 struct e1000_hw *hw = &adapter->hw;
3413 int cpu = get_cpu();
3414 int q = rx_ring - adapter->rx_ring;
3416 if (rx_ring->cpu != cpu) {
3417 dca_rxctrl = rd32(E1000_DCA_RXCTRL(q));
3418 if (hw->mac.type == e1000_82576) {
3419 dca_rxctrl &= ~E1000_DCA_RXCTRL_CPUID_MASK_82576;
3420 dca_rxctrl |= dca_get_tag(cpu) <<
3421 E1000_DCA_RXCTRL_CPUID_SHIFT;
3423 dca_rxctrl &= ~E1000_DCA_RXCTRL_CPUID_MASK;
3424 dca_rxctrl |= dca_get_tag(cpu);
3426 dca_rxctrl |= E1000_DCA_RXCTRL_DESC_DCA_EN;
3427 dca_rxctrl |= E1000_DCA_RXCTRL_HEAD_DCA_EN;
3428 dca_rxctrl |= E1000_DCA_RXCTRL_DATA_DCA_EN;
3429 wr32(E1000_DCA_RXCTRL(q), dca_rxctrl);
3435 static void igb_update_tx_dca(struct igb_ring *tx_ring)
3438 struct igb_adapter *adapter = tx_ring->adapter;
3439 struct e1000_hw *hw = &adapter->hw;
3440 int cpu = get_cpu();
3441 int q = tx_ring - adapter->tx_ring;
3443 if (tx_ring->cpu != cpu) {
3444 dca_txctrl = rd32(E1000_DCA_TXCTRL(q));
3445 if (hw->mac.type == e1000_82576) {
3446 dca_txctrl &= ~E1000_DCA_TXCTRL_CPUID_MASK_82576;
3447 dca_txctrl |= dca_get_tag(cpu) <<
3448 E1000_DCA_TXCTRL_CPUID_SHIFT;
3450 dca_txctrl &= ~E1000_DCA_TXCTRL_CPUID_MASK;
3451 dca_txctrl |= dca_get_tag(cpu);
3453 dca_txctrl |= E1000_DCA_TXCTRL_DESC_DCA_EN;
3454 wr32(E1000_DCA_TXCTRL(q), dca_txctrl);
3460 static void igb_setup_dca(struct igb_adapter *adapter)
3464 if (!(adapter->flags & IGB_FLAG_DCA_ENABLED))
3467 for (i = 0; i < adapter->num_tx_queues; i++) {
3468 adapter->tx_ring[i].cpu = -1;
3469 igb_update_tx_dca(&adapter->tx_ring[i]);
3471 for (i = 0; i < adapter->num_rx_queues; i++) {
3472 adapter->rx_ring[i].cpu = -1;
3473 igb_update_rx_dca(&adapter->rx_ring[i]);
3477 static int __igb_notify_dca(struct device *dev, void *data)
3479 struct net_device *netdev = dev_get_drvdata(dev);
3480 struct igb_adapter *adapter = netdev_priv(netdev);
3481 struct e1000_hw *hw = &adapter->hw;
3482 unsigned long event = *(unsigned long *)data;
3484 if (!(adapter->flags & IGB_FLAG_HAS_DCA))
3488 case DCA_PROVIDER_ADD:
3489 /* if already enabled, don't do it again */
3490 if (adapter->flags & IGB_FLAG_DCA_ENABLED)
3492 adapter->flags |= IGB_FLAG_DCA_ENABLED;
3493 /* Always use CB2 mode, difference is masked
3494 * in the CB driver. */
3495 wr32(E1000_DCA_CTRL, 2);
3496 if (dca_add_requester(dev) == 0) {
3497 dev_info(&adapter->pdev->dev, "DCA enabled\n");
3498 igb_setup_dca(adapter);
3501 /* Fall Through since DCA is disabled. */
3502 case DCA_PROVIDER_REMOVE:
3503 if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
3504 /* without this a class_device is left
3505 * hanging around in the sysfs model */
3506 dca_remove_requester(dev);
3507 dev_info(&adapter->pdev->dev, "DCA disabled\n");
3508 adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
3509 wr32(E1000_DCA_CTRL, 1);
3517 static int igb_notify_dca(struct notifier_block *nb, unsigned long event,
3522 ret_val = driver_for_each_device(&igb_driver.driver, NULL, &event,
3525 return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
3527 #endif /* CONFIG_DCA */
3530 * igb_intr_msi - Interrupt Handler
3531 * @irq: interrupt number
3532 * @data: pointer to a network interface device structure
3534 static irqreturn_t igb_intr_msi(int irq, void *data)
3536 struct net_device *netdev = data;
3537 struct igb_adapter *adapter = netdev_priv(netdev);
3538 struct e1000_hw *hw = &adapter->hw;
3539 /* read ICR disables interrupts using IAM */
3540 u32 icr = rd32(E1000_ICR);
3542 igb_write_itr(adapter->rx_ring);
3544 if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
3545 hw->mac.get_link_status = 1;
3546 if (!test_bit(__IGB_DOWN, &adapter->state))
3547 mod_timer(&adapter->watchdog_timer, jiffies + 1);
3550 netif_rx_schedule(netdev, &adapter->rx_ring[0].napi);
3556 * igb_intr - Interrupt Handler
3557 * @irq: interrupt number
3558 * @data: pointer to a network interface device structure
3560 static irqreturn_t igb_intr(int irq, void *data)
3562 struct net_device *netdev = data;
3563 struct igb_adapter *adapter = netdev_priv(netdev);
3564 struct e1000_hw *hw = &adapter->hw;
3565 /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked. No
3566 * need for the IMC write */
3567 u32 icr = rd32(E1000_ICR);
3570 return IRQ_NONE; /* Not our interrupt */
3572 igb_write_itr(adapter->rx_ring);
3574 /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
3575 * not set, then the adapter didn't send an interrupt */
3576 if (!(icr & E1000_ICR_INT_ASSERTED))
3579 eicr = rd32(E1000_EICR);
3581 if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
3582 hw->mac.get_link_status = 1;
3583 /* guard against interrupt when we're going down */
3584 if (!test_bit(__IGB_DOWN, &adapter->state))
3585 mod_timer(&adapter->watchdog_timer, jiffies + 1);
3588 netif_rx_schedule(netdev, &adapter->rx_ring[0].napi);
3594 * igb_poll - NAPI Rx polling callback
3595 * @napi: napi polling structure
3596 * @budget: count of how many packets we should handle
3598 static int igb_poll(struct napi_struct *napi, int budget)
3600 struct igb_ring *rx_ring = container_of(napi, struct igb_ring, napi);
3601 struct igb_adapter *adapter = rx_ring->adapter;
3602 struct net_device *netdev = adapter->netdev;
3603 int tx_clean_complete, work_done = 0;
3605 /* this poll routine only supports one tx and one rx queue */
3607 if (adapter->flags & IGB_FLAG_DCA_ENABLED)
3608 igb_update_tx_dca(&adapter->tx_ring[0]);
3610 tx_clean_complete = igb_clean_tx_irq(&adapter->tx_ring[0]);
3613 if (adapter->flags & IGB_FLAG_DCA_ENABLED)
3614 igb_update_rx_dca(&adapter->rx_ring[0]);
3616 igb_clean_rx_irq_adv(&adapter->rx_ring[0], &work_done, budget);
3618 /* If no Tx and not enough Rx work done, exit the polling mode */
3619 if ((tx_clean_complete && (work_done < budget)) ||
3620 !netif_running(netdev)) {
3621 if (adapter->itr_setting & 3)
3622 igb_set_itr(adapter);
3623 netif_rx_complete(netdev, napi);
3624 if (!test_bit(__IGB_DOWN, &adapter->state))
3625 igb_irq_enable(adapter);
3632 static int igb_clean_rx_ring_msix(struct napi_struct *napi, int budget)
3634 struct igb_ring *rx_ring = container_of(napi, struct igb_ring, napi);
3635 struct igb_adapter *adapter = rx_ring->adapter;
3636 struct e1000_hw *hw = &adapter->hw;
3637 struct net_device *netdev = adapter->netdev;
3640 /* Keep link state information with original netdev */
3641 if (!netif_carrier_ok(netdev))
3645 if (adapter->flags & IGB_FLAG_DCA_ENABLED)
3646 igb_update_rx_dca(rx_ring);
3648 igb_clean_rx_irq_adv(rx_ring, &work_done, budget);
3651 /* If not enough Rx work done, exit the polling mode */
3652 if ((work_done == 0) || !netif_running(netdev)) {
3654 netif_rx_complete(netdev, napi);
3656 if (adapter->itr_setting & 3) {
3657 if (adapter->num_rx_queues == 1)
3658 igb_set_itr(adapter);
3660 igb_update_ring_itr(rx_ring);
3663 if (!test_bit(__IGB_DOWN, &adapter->state))
3664 wr32(E1000_EIMS, rx_ring->eims_value);
3672 static inline u32 get_head(struct igb_ring *tx_ring)
3674 void *end = (struct e1000_tx_desc *)tx_ring->desc + tx_ring->count;
3675 return le32_to_cpu(*(volatile __le32 *)end);
3679 * igb_clean_tx_irq - Reclaim resources after transmit completes
3680 * @adapter: board private structure
3681 * returns true if ring is completely cleaned
3683 static bool igb_clean_tx_irq(struct igb_ring *tx_ring)
3685 struct igb_adapter *adapter = tx_ring->adapter;
3686 struct e1000_hw *hw = &adapter->hw;
3687 struct net_device *netdev = adapter->netdev;
3688 struct e1000_tx_desc *tx_desc;
3689 struct igb_buffer *buffer_info;
3690 struct sk_buff *skb;
3693 unsigned int count = 0;
3694 bool cleaned = false;
3696 unsigned int total_bytes = 0, total_packets = 0;
3699 head = get_head(tx_ring);
3700 i = tx_ring->next_to_clean;
3704 tx_desc = E1000_TX_DESC(*tx_ring, i);
3705 buffer_info = &tx_ring->buffer_info[i];
3706 skb = buffer_info->skb;
3709 unsigned int segs, bytecount;
3710 /* gso_segs is currently only valid for tcp */
3711 segs = skb_shinfo(skb)->gso_segs ?: 1;
3712 /* multiply data chunks by size of headers */
3713 bytecount = ((segs - 1) * skb_headlen(skb)) +
3715 total_packets += segs;
3716 total_bytes += bytecount;
3719 igb_unmap_and_free_tx_resource(adapter, buffer_info);
3720 tx_desc->upper.data = 0;
3723 if (i == tx_ring->count)
3727 if (count == IGB_MAX_TX_CLEAN) {
3734 head = get_head(tx_ring);
3735 if (head == oldhead)
3740 tx_ring->next_to_clean = i;
3742 if (unlikely(cleaned &&
3743 netif_carrier_ok(netdev) &&
3744 IGB_DESC_UNUSED(tx_ring) >= IGB_TX_QUEUE_WAKE)) {
3745 /* Make sure that anybody stopping the queue after this
3746 * sees the new next_to_clean.
3749 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
3750 if (__netif_subqueue_stopped(netdev, tx_ring->queue_index) &&
3751 !(test_bit(__IGB_DOWN, &adapter->state))) {
3752 netif_wake_subqueue(netdev, tx_ring->queue_index);
3753 ++adapter->restart_queue;
3756 if (netif_queue_stopped(netdev) &&
3757 !(test_bit(__IGB_DOWN, &adapter->state))) {
3758 netif_wake_queue(netdev);
3759 ++adapter->restart_queue;
3764 if (tx_ring->detect_tx_hung) {
3765 /* Detect a transmit hang in hardware, this serializes the
3766 * check with the clearing of time_stamp and movement of i */
3767 tx_ring->detect_tx_hung = false;
3768 if (tx_ring->buffer_info[i].time_stamp &&
3769 time_after(jiffies, tx_ring->buffer_info[i].time_stamp +
3770 (adapter->tx_timeout_factor * HZ))
3771 && !(rd32(E1000_STATUS) &
3772 E1000_STATUS_TXOFF)) {
3774 tx_desc = E1000_TX_DESC(*tx_ring, i);
3775 /* detected Tx unit hang */
3776 dev_err(&adapter->pdev->dev,
3777 "Detected Tx Unit Hang\n"
3781 " next_to_use <%x>\n"
3782 " next_to_clean <%x>\n"
3784 "buffer_info[next_to_clean]\n"
3785 " time_stamp <%lx>\n"
3787 " desc.status <%x>\n",
3788 tx_ring->queue_index,
3789 readl(adapter->hw.hw_addr + tx_ring->head),
3790 readl(adapter->hw.hw_addr + tx_ring->tail),
3791 tx_ring->next_to_use,
3792 tx_ring->next_to_clean,
3794 tx_ring->buffer_info[i].time_stamp,
3796 tx_desc->upper.fields.status);
3797 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
3798 netif_stop_subqueue(netdev, tx_ring->queue_index);
3800 netif_stop_queue(netdev);
3804 tx_ring->total_bytes += total_bytes;
3805 tx_ring->total_packets += total_packets;
3806 tx_ring->tx_stats.bytes += total_bytes;
3807 tx_ring->tx_stats.packets += total_packets;
3808 adapter->net_stats.tx_bytes += total_bytes;
3809 adapter->net_stats.tx_packets += total_packets;
3813 #ifdef CONFIG_IGB_LRO
3815 * igb_get_skb_hdr - helper function for LRO header processing
3816 * @skb: pointer to sk_buff to be added to LRO packet
3817 * @iphdr: pointer to ip header structure
3818 * @tcph: pointer to tcp header structure
3819 * @hdr_flags: pointer to header flags
3820 * @priv: pointer to the receive descriptor for the current sk_buff
3822 static int igb_get_skb_hdr(struct sk_buff *skb, void **iphdr, void **tcph,
3823 u64 *hdr_flags, void *priv)
3825 union e1000_adv_rx_desc *rx_desc = priv;
3826 u16 pkt_type = rx_desc->wb.lower.lo_dword.pkt_info &
3827 (E1000_RXDADV_PKTTYPE_IPV4 | E1000_RXDADV_PKTTYPE_TCP);
3829 /* Verify that this is a valid IPv4 TCP packet */
3830 if (pkt_type != (E1000_RXDADV_PKTTYPE_IPV4 |
3831 E1000_RXDADV_PKTTYPE_TCP))
3834 /* Set network headers */
3835 skb_reset_network_header(skb);
3836 skb_set_transport_header(skb, ip_hdrlen(skb));
3837 *iphdr = ip_hdr(skb);
3838 *tcph = tcp_hdr(skb);
3839 *hdr_flags = LRO_IPV4 | LRO_TCP;
3844 #endif /* CONFIG_IGB_LRO */
3847 * igb_receive_skb - helper function to handle rx indications
3848 * @ring: pointer to receive ring receving this packet
3849 * @status: descriptor status field as written by hardware
3850 * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
3851 * @skb: pointer to sk_buff to be indicated to stack
3853 static void igb_receive_skb(struct igb_ring *ring, u8 status,
3854 union e1000_adv_rx_desc * rx_desc,
3855 struct sk_buff *skb)
3857 struct igb_adapter * adapter = ring->adapter;
3858 bool vlan_extracted = (adapter->vlgrp && (status & E1000_RXD_STAT_VP));
3860 #ifdef CONFIG_IGB_LRO
3861 if (adapter->netdev->features & NETIF_F_LRO &&
3862 skb->ip_summed == CHECKSUM_UNNECESSARY) {
3864 lro_vlan_hwaccel_receive_skb(&ring->lro_mgr, skb,
3866 le16_to_cpu(rx_desc->wb.upper.vlan),
3869 lro_receive_skb(&ring->lro_mgr,skb, rx_desc);
3874 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
3875 le16_to_cpu(rx_desc->wb.upper.vlan));
3878 netif_receive_skb(skb);
3879 #ifdef CONFIG_IGB_LRO
3885 static inline void igb_rx_checksum_adv(struct igb_adapter *adapter,
3886 u32 status_err, struct sk_buff *skb)
3888 skb->ip_summed = CHECKSUM_NONE;
3890 /* Ignore Checksum bit is set or checksum is disabled through ethtool */
3891 if ((status_err & E1000_RXD_STAT_IXSM) || !adapter->rx_csum)
3893 /* TCP/UDP checksum error bit is set */
3895 (E1000_RXDEXT_STATERR_TCPE | E1000_RXDEXT_STATERR_IPE)) {
3896 /* let the stack verify checksum errors */
3897 adapter->hw_csum_err++;
3900 /* It must be a TCP or UDP packet with a valid checksum */
3901 if (status_err & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS))
3902 skb->ip_summed = CHECKSUM_UNNECESSARY;
3904 adapter->hw_csum_good++;
3907 static bool igb_clean_rx_irq_adv(struct igb_ring *rx_ring,
3908 int *work_done, int budget)
3910 struct igb_adapter *adapter = rx_ring->adapter;
3911 struct net_device *netdev = adapter->netdev;
3912 struct pci_dev *pdev = adapter->pdev;
3913 union e1000_adv_rx_desc *rx_desc , *next_rxd;
3914 struct igb_buffer *buffer_info , *next_buffer;
3915 struct sk_buff *skb;
3917 u32 length, hlen, staterr;
3918 bool cleaned = false;
3919 int cleaned_count = 0;
3920 unsigned int total_bytes = 0, total_packets = 0;
3922 i = rx_ring->next_to_clean;
3923 rx_desc = E1000_RX_DESC_ADV(*rx_ring, i);
3924 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
3926 while (staterr & E1000_RXD_STAT_DD) {
3927 if (*work_done >= budget)
3930 buffer_info = &rx_ring->buffer_info[i];
3932 /* HW will not DMA in data larger than the given buffer, even
3933 * if it parses the (NFS, of course) header to be larger. In
3934 * that case, it fills the header buffer and spills the rest
3937 hlen = (le16_to_cpu(rx_desc->wb.lower.lo_dword.hdr_info) &
3938 E1000_RXDADV_HDRBUFLEN_MASK) >> E1000_RXDADV_HDRBUFLEN_SHIFT;
3939 if (hlen > adapter->rx_ps_hdr_size)
3940 hlen = adapter->rx_ps_hdr_size;
3942 length = le16_to_cpu(rx_desc->wb.upper.length);
3946 skb = buffer_info->skb;
3947 prefetch(skb->data - NET_IP_ALIGN);
3948 buffer_info->skb = NULL;
3949 if (!adapter->rx_ps_hdr_size) {
3950 pci_unmap_single(pdev, buffer_info->dma,
3951 adapter->rx_buffer_len +
3953 PCI_DMA_FROMDEVICE);
3954 skb_put(skb, length);
3958 if (!skb_shinfo(skb)->nr_frags) {
3959 pci_unmap_single(pdev, buffer_info->dma,
3960 adapter->rx_ps_hdr_size +
3962 PCI_DMA_FROMDEVICE);
3967 pci_unmap_page(pdev, buffer_info->page_dma,
3968 PAGE_SIZE / 2, PCI_DMA_FROMDEVICE);
3969 buffer_info->page_dma = 0;
3971 skb_fill_page_desc(skb, skb_shinfo(skb)->nr_frags++,
3973 buffer_info->page_offset,
3976 if ((adapter->rx_buffer_len > (PAGE_SIZE / 2)) ||
3977 (page_count(buffer_info->page) != 1))
3978 buffer_info->page = NULL;
3980 get_page(buffer_info->page);
3983 skb->data_len += length;
3985 skb->truesize += length;
3989 if (i == rx_ring->count)
3991 next_rxd = E1000_RX_DESC_ADV(*rx_ring, i);
3993 next_buffer = &rx_ring->buffer_info[i];
3995 if (!(staterr & E1000_RXD_STAT_EOP)) {
3996 buffer_info->skb = xchg(&next_buffer->skb, skb);
3997 buffer_info->dma = xchg(&next_buffer->dma, 0);
4001 if (staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) {
4002 dev_kfree_skb_irq(skb);
4006 total_bytes += skb->len;
4009 igb_rx_checksum_adv(adapter, staterr, skb);
4011 skb->protocol = eth_type_trans(skb, netdev);
4013 igb_receive_skb(rx_ring, staterr, rx_desc, skb);
4015 netdev->last_rx = jiffies;
4018 rx_desc->wb.upper.status_error = 0;
4020 /* return some buffers to hardware, one at a time is too slow */
4021 if (cleaned_count >= IGB_RX_BUFFER_WRITE) {
4022 igb_alloc_rx_buffers_adv(rx_ring, cleaned_count);
4026 /* use prefetched values */
4028 buffer_info = next_buffer;
4030 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
4033 rx_ring->next_to_clean = i;
4034 cleaned_count = IGB_DESC_UNUSED(rx_ring);
4036 #ifdef CONFIG_IGB_LRO
4037 if (rx_ring->lro_used) {
4038 lro_flush_all(&rx_ring->lro_mgr);
4039 rx_ring->lro_used = 0;
4044 igb_alloc_rx_buffers_adv(rx_ring, cleaned_count);
4046 rx_ring->total_packets += total_packets;
4047 rx_ring->total_bytes += total_bytes;
4048 rx_ring->rx_stats.packets += total_packets;
4049 rx_ring->rx_stats.bytes += total_bytes;
4050 adapter->net_stats.rx_bytes += total_bytes;
4051 adapter->net_stats.rx_packets += total_packets;
4057 * igb_alloc_rx_buffers_adv - Replace used receive buffers; packet split
4058 * @adapter: address of board private structure
4060 static void igb_alloc_rx_buffers_adv(struct igb_ring *rx_ring,
4063 struct igb_adapter *adapter = rx_ring->adapter;
4064 struct net_device *netdev = adapter->netdev;
4065 struct pci_dev *pdev = adapter->pdev;
4066 union e1000_adv_rx_desc *rx_desc;
4067 struct igb_buffer *buffer_info;
4068 struct sk_buff *skb;
4071 i = rx_ring->next_to_use;
4072 buffer_info = &rx_ring->buffer_info[i];
4074 while (cleaned_count--) {
4075 rx_desc = E1000_RX_DESC_ADV(*rx_ring, i);
4077 if (adapter->rx_ps_hdr_size && !buffer_info->page_dma) {
4078 if (!buffer_info->page) {
4079 buffer_info->page = alloc_page(GFP_ATOMIC);
4080 if (!buffer_info->page) {
4081 adapter->alloc_rx_buff_failed++;
4084 buffer_info->page_offset = 0;
4086 buffer_info->page_offset ^= PAGE_SIZE / 2;
4088 buffer_info->page_dma =
4091 buffer_info->page_offset,
4093 PCI_DMA_FROMDEVICE);
4096 if (!buffer_info->skb) {
4099 if (adapter->rx_ps_hdr_size)
4100 bufsz = adapter->rx_ps_hdr_size;
4102 bufsz = adapter->rx_buffer_len;
4103 bufsz += NET_IP_ALIGN;
4104 skb = netdev_alloc_skb(netdev, bufsz);
4107 adapter->alloc_rx_buff_failed++;
4111 /* Make buffer alignment 2 beyond a 16 byte boundary
4112 * this will result in a 16 byte aligned IP header after
4113 * the 14 byte MAC header is removed
4115 skb_reserve(skb, NET_IP_ALIGN);
4117 buffer_info->skb = skb;
4118 buffer_info->dma = pci_map_single(pdev, skb->data,
4120 PCI_DMA_FROMDEVICE);
4123 /* Refresh the desc even if buffer_addrs didn't change because
4124 * each write-back erases this info. */
4125 if (adapter->rx_ps_hdr_size) {
4126 rx_desc->read.pkt_addr =
4127 cpu_to_le64(buffer_info->page_dma);
4128 rx_desc->read.hdr_addr = cpu_to_le64(buffer_info->dma);
4130 rx_desc->read.pkt_addr =
4131 cpu_to_le64(buffer_info->dma);
4132 rx_desc->read.hdr_addr = 0;
4136 if (i == rx_ring->count)
4138 buffer_info = &rx_ring->buffer_info[i];
4142 if (rx_ring->next_to_use != i) {
4143 rx_ring->next_to_use = i;
4145 i = (rx_ring->count - 1);
4149 /* Force memory writes to complete before letting h/w
4150 * know there are new descriptors to fetch. (Only
4151 * applicable for weak-ordered memory model archs,
4152 * such as IA-64). */
4154 writel(i, adapter->hw.hw_addr + rx_ring->tail);
4164 static int igb_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4166 struct igb_adapter *adapter = netdev_priv(netdev);
4167 struct mii_ioctl_data *data = if_mii(ifr);
4169 if (adapter->hw.phy.media_type != e1000_media_type_copper)
4174 data->phy_id = adapter->hw.phy.addr;
4177 if (!capable(CAP_NET_ADMIN))
4179 if (adapter->hw.phy.ops.read_phy_reg(&adapter->hw,
4181 & 0x1F, &data->val_out))
4197 static int igb_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4203 return igb_mii_ioctl(netdev, ifr, cmd);
4209 static void igb_vlan_rx_register(struct net_device *netdev,
4210 struct vlan_group *grp)
4212 struct igb_adapter *adapter = netdev_priv(netdev);
4213 struct e1000_hw *hw = &adapter->hw;
4216 igb_irq_disable(adapter);
4217 adapter->vlgrp = grp;
4220 /* enable VLAN tag insert/strip */
4221 ctrl = rd32(E1000_CTRL);
4222 ctrl |= E1000_CTRL_VME;
4223 wr32(E1000_CTRL, ctrl);
4225 /* enable VLAN receive filtering */
4226 rctl = rd32(E1000_RCTL);
4227 if (!(netdev->flags & IFF_PROMISC))
4228 rctl |= E1000_RCTL_VFE;
4229 rctl &= ~E1000_RCTL_CFIEN;
4230 wr32(E1000_RCTL, rctl);
4231 igb_update_mng_vlan(adapter);
4233 adapter->max_frame_size + VLAN_TAG_SIZE);
4235 /* disable VLAN tag insert/strip */
4236 ctrl = rd32(E1000_CTRL);
4237 ctrl &= ~E1000_CTRL_VME;
4238 wr32(E1000_CTRL, ctrl);
4240 /* disable VLAN filtering */
4241 rctl = rd32(E1000_RCTL);
4242 rctl &= ~E1000_RCTL_VFE;
4243 wr32(E1000_RCTL, rctl);
4244 if (adapter->mng_vlan_id != (u16)IGB_MNG_VLAN_NONE) {
4245 igb_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
4246 adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
4249 adapter->max_frame_size);
4252 if (!test_bit(__IGB_DOWN, &adapter->state))
4253 igb_irq_enable(adapter);
4256 static void igb_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
4258 struct igb_adapter *adapter = netdev_priv(netdev);
4259 struct e1000_hw *hw = &adapter->hw;
4262 if ((adapter->hw.mng_cookie.status &
4263 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
4264 (vid == adapter->mng_vlan_id))
4266 /* add VID to filter table */
4267 index = (vid >> 5) & 0x7F;
4268 vfta = array_rd32(E1000_VFTA, index);
4269 vfta |= (1 << (vid & 0x1F));
4270 igb_write_vfta(&adapter->hw, index, vfta);
4273 static void igb_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
4275 struct igb_adapter *adapter = netdev_priv(netdev);
4276 struct e1000_hw *hw = &adapter->hw;
4279 igb_irq_disable(adapter);
4280 vlan_group_set_device(adapter->vlgrp, vid, NULL);
4282 if (!test_bit(__IGB_DOWN, &adapter->state))
4283 igb_irq_enable(adapter);
4285 if ((adapter->hw.mng_cookie.status &
4286 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
4287 (vid == adapter->mng_vlan_id)) {
4288 /* release control to f/w */
4289 igb_release_hw_control(adapter);
4293 /* remove VID from filter table */
4294 index = (vid >> 5) & 0x7F;
4295 vfta = array_rd32(E1000_VFTA, index);
4296 vfta &= ~(1 << (vid & 0x1F));
4297 igb_write_vfta(&adapter->hw, index, vfta);
4300 static void igb_restore_vlan(struct igb_adapter *adapter)
4302 igb_vlan_rx_register(adapter->netdev, adapter->vlgrp);
4304 if (adapter->vlgrp) {
4306 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
4307 if (!vlan_group_get_device(adapter->vlgrp, vid))
4309 igb_vlan_rx_add_vid(adapter->netdev, vid);
4314 int igb_set_spd_dplx(struct igb_adapter *adapter, u16 spddplx)
4316 struct e1000_mac_info *mac = &adapter->hw.mac;
4320 /* Fiber NICs only allow 1000 gbps Full duplex */
4321 if ((adapter->hw.phy.media_type == e1000_media_type_fiber) &&
4322 spddplx != (SPEED_1000 + DUPLEX_FULL)) {
4323 dev_err(&adapter->pdev->dev,
4324 "Unsupported Speed/Duplex configuration\n");
4329 case SPEED_10 + DUPLEX_HALF:
4330 mac->forced_speed_duplex = ADVERTISE_10_HALF;
4332 case SPEED_10 + DUPLEX_FULL:
4333 mac->forced_speed_duplex = ADVERTISE_10_FULL;
4335 case SPEED_100 + DUPLEX_HALF:
4336 mac->forced_speed_duplex = ADVERTISE_100_HALF;
4338 case SPEED_100 + DUPLEX_FULL:
4339 mac->forced_speed_duplex = ADVERTISE_100_FULL;
4341 case SPEED_1000 + DUPLEX_FULL:
4343 adapter->hw.phy.autoneg_advertised = ADVERTISE_1000_FULL;
4345 case SPEED_1000 + DUPLEX_HALF: /* not supported */
4347 dev_err(&adapter->pdev->dev,
4348 "Unsupported Speed/Duplex configuration\n");
4355 static int igb_suspend(struct pci_dev *pdev, pm_message_t state)
4357 struct net_device *netdev = pci_get_drvdata(pdev);
4358 struct igb_adapter *adapter = netdev_priv(netdev);
4359 struct e1000_hw *hw = &adapter->hw;
4360 u32 ctrl, rctl, status;
4361 u32 wufc = adapter->wol;
4366 netif_device_detach(netdev);
4368 if (netif_running(netdev))
4371 igb_reset_interrupt_capability(adapter);
4373 igb_free_queues(adapter);
4376 retval = pci_save_state(pdev);
4381 status = rd32(E1000_STATUS);
4382 if (status & E1000_STATUS_LU)
4383 wufc &= ~E1000_WUFC_LNKC;
4386 igb_setup_rctl(adapter);
4387 igb_set_multi(netdev);
4389 /* turn on all-multi mode if wake on multicast is enabled */
4390 if (wufc & E1000_WUFC_MC) {
4391 rctl = rd32(E1000_RCTL);
4392 rctl |= E1000_RCTL_MPE;
4393 wr32(E1000_RCTL, rctl);
4396 ctrl = rd32(E1000_CTRL);
4397 /* advertise wake from D3Cold */
4398 #define E1000_CTRL_ADVD3WUC 0x00100000
4399 /* phy power management enable */
4400 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
4401 ctrl |= E1000_CTRL_ADVD3WUC;
4402 wr32(E1000_CTRL, ctrl);
4404 /* Allow time for pending master requests to run */
4405 igb_disable_pcie_master(&adapter->hw);
4407 wr32(E1000_WUC, E1000_WUC_PME_EN);
4408 wr32(E1000_WUFC, wufc);
4411 wr32(E1000_WUFC, 0);
4414 /* make sure adapter isn't asleep if manageability/wol is enabled */
4415 if (wufc || adapter->en_mng_pt) {
4416 pci_enable_wake(pdev, PCI_D3hot, 1);
4417 pci_enable_wake(pdev, PCI_D3cold, 1);
4419 igb_shutdown_fiber_serdes_link_82575(hw);
4420 pci_enable_wake(pdev, PCI_D3hot, 0);
4421 pci_enable_wake(pdev, PCI_D3cold, 0);
4424 /* Release control of h/w to f/w. If f/w is AMT enabled, this
4425 * would have already happened in close and is redundant. */
4426 igb_release_hw_control(adapter);
4428 pci_disable_device(pdev);
4430 pci_set_power_state(pdev, pci_choose_state(pdev, state));
4436 static int igb_resume(struct pci_dev *pdev)
4438 struct net_device *netdev = pci_get_drvdata(pdev);
4439 struct igb_adapter *adapter = netdev_priv(netdev);
4440 struct e1000_hw *hw = &adapter->hw;
4443 pci_set_power_state(pdev, PCI_D0);
4444 pci_restore_state(pdev);
4446 if (adapter->need_ioport)
4447 err = pci_enable_device(pdev);
4449 err = pci_enable_device_mem(pdev);
4452 "igb: Cannot enable PCI device from suspend\n");
4455 pci_set_master(pdev);
4457 pci_enable_wake(pdev, PCI_D3hot, 0);
4458 pci_enable_wake(pdev, PCI_D3cold, 0);
4460 igb_set_interrupt_capability(adapter);
4462 if (igb_alloc_queues(adapter)) {
4463 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
4467 /* e1000_power_up_phy(adapter); */
4470 wr32(E1000_WUS, ~0);
4472 if (netif_running(netdev)) {
4473 err = igb_open(netdev);
4478 netif_device_attach(netdev);
4480 /* let the f/w know that the h/w is now under the control of the
4482 igb_get_hw_control(adapter);
4488 static void igb_shutdown(struct pci_dev *pdev)
4490 igb_suspend(pdev, PMSG_SUSPEND);
4493 #ifdef CONFIG_NET_POLL_CONTROLLER
4495 * Polling 'interrupt' - used by things like netconsole to send skbs
4496 * without having to re-enable interrupts. It's not called while
4497 * the interrupt routine is executing.
4499 static void igb_netpoll(struct net_device *netdev)
4501 struct igb_adapter *adapter = netdev_priv(netdev);
4505 igb_irq_disable(adapter);
4506 adapter->flags |= IGB_FLAG_IN_NETPOLL;
4508 for (i = 0; i < adapter->num_tx_queues; i++)
4509 igb_clean_tx_irq(&adapter->tx_ring[i]);
4511 for (i = 0; i < adapter->num_rx_queues; i++)
4512 igb_clean_rx_irq_adv(&adapter->rx_ring[i],
4514 adapter->rx_ring[i].napi.weight);
4516 adapter->flags &= ~IGB_FLAG_IN_NETPOLL;
4517 igb_irq_enable(adapter);
4519 #endif /* CONFIG_NET_POLL_CONTROLLER */
4522 * igb_io_error_detected - called when PCI error is detected
4523 * @pdev: Pointer to PCI device
4524 * @state: The current pci connection state
4526 * This function is called after a PCI bus error affecting
4527 * this device has been detected.
4529 static pci_ers_result_t igb_io_error_detected(struct pci_dev *pdev,
4530 pci_channel_state_t state)
4532 struct net_device *netdev = pci_get_drvdata(pdev);
4533 struct igb_adapter *adapter = netdev_priv(netdev);
4535 netif_device_detach(netdev);
4537 if (netif_running(netdev))
4539 pci_disable_device(pdev);
4541 /* Request a slot slot reset. */
4542 return PCI_ERS_RESULT_NEED_RESET;
4546 * igb_io_slot_reset - called after the pci bus has been reset.
4547 * @pdev: Pointer to PCI device
4549 * Restart the card from scratch, as if from a cold-boot. Implementation
4550 * resembles the first-half of the igb_resume routine.
4552 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *pdev)
4554 struct net_device *netdev = pci_get_drvdata(pdev);
4555 struct igb_adapter *adapter = netdev_priv(netdev);
4556 struct e1000_hw *hw = &adapter->hw;
4559 if (adapter->need_ioport)
4560 err = pci_enable_device(pdev);
4562 err = pci_enable_device_mem(pdev);
4565 "Cannot re-enable PCI device after reset.\n");
4566 return PCI_ERS_RESULT_DISCONNECT;
4568 pci_set_master(pdev);
4569 pci_restore_state(pdev);
4571 pci_enable_wake(pdev, PCI_D3hot, 0);
4572 pci_enable_wake(pdev, PCI_D3cold, 0);
4575 wr32(E1000_WUS, ~0);
4577 return PCI_ERS_RESULT_RECOVERED;
4581 * igb_io_resume - called when traffic can start flowing again.
4582 * @pdev: Pointer to PCI device
4584 * This callback is called when the error recovery driver tells us that
4585 * its OK to resume normal operation. Implementation resembles the
4586 * second-half of the igb_resume routine.
4588 static void igb_io_resume(struct pci_dev *pdev)
4590 struct net_device *netdev = pci_get_drvdata(pdev);
4591 struct igb_adapter *adapter = netdev_priv(netdev);
4593 igb_init_manageability(adapter);
4595 if (netif_running(netdev)) {
4596 if (igb_up(adapter)) {
4597 dev_err(&pdev->dev, "igb_up failed after reset\n");
4602 netif_device_attach(netdev);
4604 /* let the f/w know that the h/w is now under the control of the
4606 igb_get_hw_control(adapter);