2 * This file is part of the Chelsio T4 Ethernet driver for Linux.
4 * Copyright (c) 2003-2014 Chelsio Communications, Inc. All rights reserved.
6 * This software is available to you under a choice of one of two
7 * licenses. You may choose to be licensed under the terms of the GNU
8 * General Public License (GPL) Version 2, available from the file
9 * COPYING in the main directory of this source tree, or the
10 * OpenIB.org BSD license below:
12 * Redistribution and use in source and binary forms, with or
13 * without modification, are permitted provided that the following
16 * - Redistributions of source code must retain the above
17 * copyright notice, this list of conditions and the following
20 * - Redistributions in binary form must reproduce the above
21 * copyright notice, this list of conditions and the following
22 * disclaimer in the documentation and/or other materials
23 * provided with the distribution.
25 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
26 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
27 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
28 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
29 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
30 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
31 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
35 #include <linux/seq_file.h>
36 #include <linux/debugfs.h>
37 #include <linux/string_helpers.h>
38 #include <linux/sort.h>
39 #include <linux/ctype.h>
44 #include "cxgb4_debugfs.h"
48 /* generic seq_file support for showing a table of size rows x width. */
49 static void *seq_tab_get_idx(struct seq_tab *tb, loff_t pos)
51 pos -= tb->skip_first;
52 return pos >= tb->rows ? NULL : &tb->data[pos * tb->width];
55 static void *seq_tab_start(struct seq_file *seq, loff_t *pos)
57 struct seq_tab *tb = seq->private;
59 if (tb->skip_first && *pos == 0)
60 return SEQ_START_TOKEN;
62 return seq_tab_get_idx(tb, *pos);
65 static void *seq_tab_next(struct seq_file *seq, void *v, loff_t *pos)
67 v = seq_tab_get_idx(seq->private, *pos + 1);
73 static void seq_tab_stop(struct seq_file *seq, void *v)
77 static int seq_tab_show(struct seq_file *seq, void *v)
79 const struct seq_tab *tb = seq->private;
81 return tb->show(seq, v, ((char *)v - tb->data) / tb->width);
84 static const struct seq_operations seq_tab_ops = {
85 .start = seq_tab_start,
91 struct seq_tab *seq_open_tab(struct file *f, unsigned int rows,
92 unsigned int width, unsigned int have_header,
93 int (*show)(struct seq_file *seq, void *v, int i))
97 p = __seq_open_private(f, &seq_tab_ops, sizeof(*p) + rows * width);
102 p->skip_first = have_header != 0;
107 /* Trim the size of a seq_tab to the supplied number of rows. The operation is
110 static int seq_tab_trim(struct seq_tab *p, unsigned int new_rows)
112 if (new_rows > p->rows)
118 static int cim_la_show(struct seq_file *seq, void *v, int idx)
120 if (v == SEQ_START_TOKEN)
121 seq_puts(seq, "Status Data PC LS0Stat LS0Addr "
127 " %02x %x%07x %x%07x %08x %08x %08x%08x%08x%08x\n",
128 (p[0] >> 4) & 0xff, p[0] & 0xf, p[1] >> 4,
129 p[1] & 0xf, p[2] >> 4, p[2] & 0xf, p[3], p[4], p[5],
135 static int cim_la_show_3in1(struct seq_file *seq, void *v, int idx)
137 if (v == SEQ_START_TOKEN) {
138 seq_puts(seq, "Status Data PC\n");
142 seq_printf(seq, " %02x %08x %08x\n", p[5] & 0xff, p[6],
144 seq_printf(seq, " %02x %02x%06x %02x%06x\n",
145 (p[3] >> 8) & 0xff, p[3] & 0xff, p[4] >> 8,
146 p[4] & 0xff, p[5] >> 8);
147 seq_printf(seq, " %02x %x%07x %x%07x\n", (p[0] >> 4) & 0xff,
148 p[0] & 0xf, p[1] >> 4, p[1] & 0xf, p[2] >> 4);
153 static int cim_la_open(struct inode *inode, struct file *file)
158 struct adapter *adap = inode->i_private;
160 ret = t4_cim_read(adap, UP_UP_DBG_LA_CFG_A, 1, &cfg);
164 p = seq_open_tab(file, adap->params.cim_la_size / 8, 8 * sizeof(u32), 1,
165 cfg & UPDBGLACAPTPCONLY_F ?
166 cim_la_show_3in1 : cim_la_show);
170 ret = t4_cim_read_la(adap, (u32 *)p->data, NULL);
172 seq_release_private(inode, file);
176 static const struct file_operations cim_la_fops = {
177 .owner = THIS_MODULE,
181 .release = seq_release_private
184 static int cim_qcfg_show(struct seq_file *seq, void *v)
186 static const char * const qname[] = {
187 "TP0", "TP1", "ULP", "SGE0", "SGE1", "NC-SI",
188 "ULP0", "ULP1", "ULP2", "ULP3", "SGE", "NC-SI",
193 struct adapter *adap = seq->private;
194 u16 base[CIM_NUM_IBQ + CIM_NUM_OBQ_T5];
195 u16 size[CIM_NUM_IBQ + CIM_NUM_OBQ_T5];
196 u32 stat[(4 * (CIM_NUM_IBQ + CIM_NUM_OBQ_T5))];
197 u16 thres[CIM_NUM_IBQ];
198 u32 obq_wr_t4[2 * CIM_NUM_OBQ], *wr;
199 u32 obq_wr_t5[2 * CIM_NUM_OBQ_T5];
201 int cim_num_obq = is_t4(adap->params.chip) ?
202 CIM_NUM_OBQ : CIM_NUM_OBQ_T5;
204 i = t4_cim_read(adap, is_t4(adap->params.chip) ? UP_IBQ_0_RDADDR_A :
205 UP_IBQ_0_SHADOW_RDADDR_A,
206 ARRAY_SIZE(stat), stat);
208 if (is_t4(adap->params.chip)) {
209 i = t4_cim_read(adap, UP_OBQ_0_REALADDR_A,
210 ARRAY_SIZE(obq_wr_t4), obq_wr_t4);
213 i = t4_cim_read(adap, UP_OBQ_0_SHADOW_REALADDR_A,
214 ARRAY_SIZE(obq_wr_t5), obq_wr_t5);
221 t4_read_cimq_cfg(adap, base, size, thres);
224 " Queue Base Size Thres RdPtr WrPtr SOP EOP Avail\n");
225 for (i = 0; i < CIM_NUM_IBQ; i++, p += 4)
226 seq_printf(seq, "%7s %5x %5u %5u %6x %4x %4u %4u %5u\n",
227 qname[i], base[i], size[i], thres[i],
228 IBQRDADDR_G(p[0]), IBQWRADDR_G(p[1]),
229 QUESOPCNT_G(p[3]), QUEEOPCNT_G(p[3]),
230 QUEREMFLITS_G(p[2]) * 16);
231 for ( ; i < CIM_NUM_IBQ + cim_num_obq; i++, p += 4, wr += 2)
232 seq_printf(seq, "%7s %5x %5u %12x %4x %4u %4u %5u\n",
233 qname[i], base[i], size[i],
234 QUERDADDR_G(p[0]) & 0x3fff, wr[0] - base[i],
235 QUESOPCNT_G(p[3]), QUEEOPCNT_G(p[3]),
236 QUEREMFLITS_G(p[2]) * 16);
240 static int cim_qcfg_open(struct inode *inode, struct file *file)
242 return single_open(file, cim_qcfg_show, inode->i_private);
245 static const struct file_operations cim_qcfg_fops = {
246 .owner = THIS_MODULE,
247 .open = cim_qcfg_open,
250 .release = single_release,
253 static int cimq_show(struct seq_file *seq, void *v, int idx)
257 seq_printf(seq, "%#06x: %08x %08x %08x %08x\n", idx * 16, p[0], p[1],
262 static int cim_ibq_open(struct inode *inode, struct file *file)
266 unsigned int qid = (uintptr_t)inode->i_private & 7;
267 struct adapter *adap = inode->i_private - qid;
269 p = seq_open_tab(file, CIM_IBQ_SIZE, 4 * sizeof(u32), 0, cimq_show);
273 ret = t4_read_cim_ibq(adap, qid, (u32 *)p->data, CIM_IBQ_SIZE * 4);
275 seq_release_private(inode, file);
281 static const struct file_operations cim_ibq_fops = {
282 .owner = THIS_MODULE,
283 .open = cim_ibq_open,
286 .release = seq_release_private
289 static int cim_obq_open(struct inode *inode, struct file *file)
293 unsigned int qid = (uintptr_t)inode->i_private & 7;
294 struct adapter *adap = inode->i_private - qid;
296 p = seq_open_tab(file, 6 * CIM_OBQ_SIZE, 4 * sizeof(u32), 0, cimq_show);
300 ret = t4_read_cim_obq(adap, qid, (u32 *)p->data, 6 * CIM_OBQ_SIZE * 4);
302 seq_release_private(inode, file);
304 seq_tab_trim(p, ret / 4);
310 static const struct file_operations cim_obq_fops = {
311 .owner = THIS_MODULE,
312 .open = cim_obq_open,
315 .release = seq_release_private
324 static void field_desc_show(struct seq_file *seq, u64 v,
325 const struct field_desc *p)
331 u64 mask = (1ULL << p->width) - 1;
332 int len = scnprintf(buf, sizeof(buf), "%s: %llu", p->name,
333 ((unsigned long long)v >> p->start) & mask);
335 if (line_size + len >= 79) {
337 seq_puts(seq, "\n ");
339 seq_printf(seq, "%s ", buf);
340 line_size += len + 1;
346 static struct field_desc tp_la0[] = {
347 { "RcfOpCodeOut", 60, 4 },
349 { "WcfState", 52, 4 },
350 { "RcfOpcSrcOut", 50, 2 },
351 { "CRxError", 49, 1 },
352 { "ERxError", 48, 1 },
353 { "SanityFailed", 47, 1 },
354 { "SpuriousMsg", 46, 1 },
355 { "FlushInputMsg", 45, 1 },
356 { "FlushInputCpl", 44, 1 },
357 { "RssUpBit", 43, 1 },
358 { "RssFilterHit", 42, 1 },
360 { "InitTcb", 31, 1 },
361 { "LineNumber", 24, 7 },
363 { "EdataOut", 22, 1 },
365 { "CdataOut", 20, 1 },
366 { "EreadPdu", 19, 1 },
367 { "CreadPdu", 18, 1 },
368 { "TunnelPkt", 17, 1 },
369 { "RcfPeerFin", 16, 1 },
370 { "RcfReasonOut", 12, 4 },
371 { "TxCchannel", 10, 2 },
372 { "RcfTxChannel", 8, 2 },
373 { "RxEchannel", 6, 2 },
374 { "RcfRxChannel", 5, 1 },
375 { "RcfDataOutSrdy", 4, 1 },
377 { "RxOoDvld", 2, 1 },
378 { "RxCongestion", 1, 1 },
379 { "TxCongestion", 0, 1 },
383 static int tp_la_show(struct seq_file *seq, void *v, int idx)
387 field_desc_show(seq, *p, tp_la0);
391 static int tp_la_show2(struct seq_file *seq, void *v, int idx)
397 field_desc_show(seq, p[0], tp_la0);
398 if (idx < (TPLA_SIZE / 2 - 1) || p[1] != ~0ULL)
399 field_desc_show(seq, p[1], tp_la0);
403 static int tp_la_show3(struct seq_file *seq, void *v, int idx)
405 static struct field_desc tp_la1[] = {
406 { "CplCmdIn", 56, 8 },
407 { "CplCmdOut", 48, 8 },
408 { "ESynOut", 47, 1 },
409 { "EAckOut", 46, 1 },
410 { "EFinOut", 45, 1 },
411 { "ERstOut", 44, 1 },
417 { "DataInVld", 38, 1 },
419 { "RxBufEmpty", 36, 1 },
421 { "RxFbCongestion", 34, 1 },
422 { "TxFbCongestion", 33, 1 },
423 { "TxPktSumSrdy", 32, 1 },
424 { "RcfUlpType", 28, 4 },
426 { "Ebypass", 26, 1 },
428 { "Static0", 24, 1 },
430 { "Cbypass", 22, 1 },
432 { "CPktOut", 20, 1 },
433 { "RxPagePoolFull", 18, 2 },
434 { "RxLpbkPkt", 17, 1 },
435 { "TxLpbkPkt", 16, 1 },
436 { "RxVfValid", 15, 1 },
437 { "SynLearned", 14, 1 },
438 { "SetDelEntry", 13, 1 },
439 { "SetInvEntry", 12, 1 },
440 { "CpcmdDvld", 11, 1 },
441 { "CpcmdSave", 10, 1 },
442 { "RxPstructsFull", 8, 2 },
443 { "EpcmdDvld", 7, 1 },
444 { "EpcmdFlush", 6, 1 },
445 { "EpcmdTrimPrefix", 5, 1 },
446 { "EpcmdTrimPostfix", 4, 1 },
447 { "ERssIp4Pkt", 3, 1 },
448 { "ERssIp6Pkt", 2, 1 },
449 { "ERssTcpUdpPkt", 1, 1 },
450 { "ERssFceFipPkt", 0, 1 },
453 static struct field_desc tp_la2[] = {
454 { "CplCmdIn", 56, 8 },
455 { "MpsVfVld", 55, 1 },
463 { "DataInVld", 38, 1 },
465 { "RxBufEmpty", 36, 1 },
467 { "RxFbCongestion", 34, 1 },
468 { "TxFbCongestion", 33, 1 },
469 { "TxPktSumSrdy", 32, 1 },
470 { "RcfUlpType", 28, 4 },
472 { "Ebypass", 26, 1 },
474 { "Static0", 24, 1 },
476 { "Cbypass", 22, 1 },
478 { "CPktOut", 20, 1 },
479 { "RxPagePoolFull", 18, 2 },
480 { "RxLpbkPkt", 17, 1 },
481 { "TxLpbkPkt", 16, 1 },
482 { "RxVfValid", 15, 1 },
483 { "SynLearned", 14, 1 },
484 { "SetDelEntry", 13, 1 },
485 { "SetInvEntry", 12, 1 },
486 { "CpcmdDvld", 11, 1 },
487 { "CpcmdSave", 10, 1 },
488 { "RxPstructsFull", 8, 2 },
489 { "EpcmdDvld", 7, 1 },
490 { "EpcmdFlush", 6, 1 },
491 { "EpcmdTrimPrefix", 5, 1 },
492 { "EpcmdTrimPostfix", 4, 1 },
493 { "ERssIp4Pkt", 3, 1 },
494 { "ERssIp6Pkt", 2, 1 },
495 { "ERssTcpUdpPkt", 1, 1 },
496 { "ERssFceFipPkt", 0, 1 },
503 field_desc_show(seq, p[0], tp_la0);
504 if (idx < (TPLA_SIZE / 2 - 1) || p[1] != ~0ULL)
505 field_desc_show(seq, p[1], (p[0] & BIT(17)) ? tp_la2 : tp_la1);
509 static int tp_la_open(struct inode *inode, struct file *file)
512 struct adapter *adap = inode->i_private;
514 switch (DBGLAMODE_G(t4_read_reg(adap, TP_DBG_LA_CONFIG_A))) {
516 p = seq_open_tab(file, TPLA_SIZE / 2, 2 * sizeof(u64), 0,
520 p = seq_open_tab(file, TPLA_SIZE / 2, 2 * sizeof(u64), 0,
524 p = seq_open_tab(file, TPLA_SIZE, sizeof(u64), 0, tp_la_show);
529 t4_tp_read_la(adap, (u64 *)p->data, NULL);
533 static ssize_t tp_la_write(struct file *file, const char __user *buf,
534 size_t count, loff_t *pos)
539 size_t size = min(sizeof(s) - 1, count);
540 struct adapter *adap = FILE_DATA(file)->i_private;
542 if (copy_from_user(s, buf, size))
545 err = kstrtoul(s, 0, &val);
550 adap->params.tp.la_mask = val << 16;
551 t4_set_reg_field(adap, TP_DBG_LA_CONFIG_A, 0xffff0000U,
552 adap->params.tp.la_mask);
556 static const struct file_operations tp_la_fops = {
557 .owner = THIS_MODULE,
561 .release = seq_release_private,
565 /* Show the PM memory stats. These stats include:
568 * Read: memory read operation
569 * Write Bypass: cut-through
570 * Bypass + mem: cut-through and save copy
574 * Write Bypass: cut-through
575 * Flush: payload trim or drop
577 static int pm_stats_show(struct seq_file *seq, void *v)
579 static const char * const tx_pm_stats[] = {
580 "Read:", "Write bypass:", "Write mem:", "Bypass + mem:"
582 static const char * const rx_pm_stats[] = {
583 "Read:", "Write bypass:", "Write mem:", "Flush:"
587 u32 tx_cnt[PM_NSTATS], rx_cnt[PM_NSTATS];
588 u64 tx_cyc[PM_NSTATS], rx_cyc[PM_NSTATS];
589 struct adapter *adap = seq->private;
591 t4_pmtx_get_stats(adap, tx_cnt, tx_cyc);
592 t4_pmrx_get_stats(adap, rx_cnt, rx_cyc);
594 seq_printf(seq, "%13s %10s %20s\n", " ", "Tx pcmds", "Tx bytes");
595 for (i = 0; i < PM_NSTATS - 1; i++)
596 seq_printf(seq, "%-13s %10u %20llu\n",
597 tx_pm_stats[i], tx_cnt[i], tx_cyc[i]);
599 seq_printf(seq, "%13s %10s %20s\n", " ", "Rx pcmds", "Rx bytes");
600 for (i = 0; i < PM_NSTATS - 1; i++)
601 seq_printf(seq, "%-13s %10u %20llu\n",
602 rx_pm_stats[i], rx_cnt[i], rx_cyc[i]);
606 static int pm_stats_open(struct inode *inode, struct file *file)
608 return single_open(file, pm_stats_show, inode->i_private);
611 static ssize_t pm_stats_clear(struct file *file, const char __user *buf,
612 size_t count, loff_t *pos)
614 struct adapter *adap = FILE_DATA(file)->i_private;
616 t4_write_reg(adap, PM_RX_STAT_CONFIG_A, 0);
617 t4_write_reg(adap, PM_TX_STAT_CONFIG_A, 0);
621 static const struct file_operations pm_stats_debugfs_fops = {
622 .owner = THIS_MODULE,
623 .open = pm_stats_open,
626 .release = single_release,
627 .write = pm_stats_clear
630 /* Format a value in a unit that differs from the value's native unit by the
633 static char *unit_conv(char *buf, size_t len, unsigned int val,
636 unsigned int rem = val % factor;
639 snprintf(buf, len, "%u", val / factor);
641 while (rem % 10 == 0)
643 snprintf(buf, len, "%u.%u", val / factor, rem);
648 static int clk_show(struct seq_file *seq, void *v)
651 struct adapter *adap = seq->private;
652 unsigned int cclk_ps = 1000000000 / adap->params.vpd.cclk; /* in ps */
653 u32 res = t4_read_reg(adap, TP_TIMER_RESOLUTION_A);
654 unsigned int tre = TIMERRESOLUTION_G(res);
655 unsigned int dack_re = DELAYEDACKRESOLUTION_G(res);
656 unsigned long long tp_tick_us = (cclk_ps << tre) / 1000000; /* in us */
658 seq_printf(seq, "Core clock period: %s ns\n",
659 unit_conv(buf, sizeof(buf), cclk_ps, 1000));
660 seq_printf(seq, "TP timer tick: %s us\n",
661 unit_conv(buf, sizeof(buf), (cclk_ps << tre), 1000000));
662 seq_printf(seq, "TCP timestamp tick: %s us\n",
663 unit_conv(buf, sizeof(buf),
664 (cclk_ps << TIMESTAMPRESOLUTION_G(res)), 1000000));
665 seq_printf(seq, "DACK tick: %s us\n",
666 unit_conv(buf, sizeof(buf), (cclk_ps << dack_re), 1000000));
667 seq_printf(seq, "DACK timer: %u us\n",
668 ((cclk_ps << dack_re) / 1000000) *
669 t4_read_reg(adap, TP_DACK_TIMER_A));
670 seq_printf(seq, "Retransmit min: %llu us\n",
671 tp_tick_us * t4_read_reg(adap, TP_RXT_MIN_A));
672 seq_printf(seq, "Retransmit max: %llu us\n",
673 tp_tick_us * t4_read_reg(adap, TP_RXT_MAX_A));
674 seq_printf(seq, "Persist timer min: %llu us\n",
675 tp_tick_us * t4_read_reg(adap, TP_PERS_MIN_A));
676 seq_printf(seq, "Persist timer max: %llu us\n",
677 tp_tick_us * t4_read_reg(adap, TP_PERS_MAX_A));
678 seq_printf(seq, "Keepalive idle timer: %llu us\n",
679 tp_tick_us * t4_read_reg(adap, TP_KEEP_IDLE_A));
680 seq_printf(seq, "Keepalive interval: %llu us\n",
681 tp_tick_us * t4_read_reg(adap, TP_KEEP_INTVL_A));
682 seq_printf(seq, "Initial SRTT: %llu us\n",
683 tp_tick_us * INITSRTT_G(t4_read_reg(adap, TP_INIT_SRTT_A)));
684 seq_printf(seq, "FINWAIT2 timer: %llu us\n",
685 tp_tick_us * t4_read_reg(adap, TP_FINWAIT2_TIMER_A));
690 DEFINE_SIMPLE_DEBUGFS_FILE(clk);
692 /* Firmware Device Log dump. */
693 static const char * const devlog_level_strings[] = {
694 [FW_DEVLOG_LEVEL_EMERG] = "EMERG",
695 [FW_DEVLOG_LEVEL_CRIT] = "CRIT",
696 [FW_DEVLOG_LEVEL_ERR] = "ERR",
697 [FW_DEVLOG_LEVEL_NOTICE] = "NOTICE",
698 [FW_DEVLOG_LEVEL_INFO] = "INFO",
699 [FW_DEVLOG_LEVEL_DEBUG] = "DEBUG"
702 static const char * const devlog_facility_strings[] = {
703 [FW_DEVLOG_FACILITY_CORE] = "CORE",
704 [FW_DEVLOG_FACILITY_SCHED] = "SCHED",
705 [FW_DEVLOG_FACILITY_TIMER] = "TIMER",
706 [FW_DEVLOG_FACILITY_RES] = "RES",
707 [FW_DEVLOG_FACILITY_HW] = "HW",
708 [FW_DEVLOG_FACILITY_FLR] = "FLR",
709 [FW_DEVLOG_FACILITY_DMAQ] = "DMAQ",
710 [FW_DEVLOG_FACILITY_PHY] = "PHY",
711 [FW_DEVLOG_FACILITY_MAC] = "MAC",
712 [FW_DEVLOG_FACILITY_PORT] = "PORT",
713 [FW_DEVLOG_FACILITY_VI] = "VI",
714 [FW_DEVLOG_FACILITY_FILTER] = "FILTER",
715 [FW_DEVLOG_FACILITY_ACL] = "ACL",
716 [FW_DEVLOG_FACILITY_TM] = "TM",
717 [FW_DEVLOG_FACILITY_QFC] = "QFC",
718 [FW_DEVLOG_FACILITY_DCB] = "DCB",
719 [FW_DEVLOG_FACILITY_ETH] = "ETH",
720 [FW_DEVLOG_FACILITY_OFLD] = "OFLD",
721 [FW_DEVLOG_FACILITY_RI] = "RI",
722 [FW_DEVLOG_FACILITY_ISCSI] = "ISCSI",
723 [FW_DEVLOG_FACILITY_FCOE] = "FCOE",
724 [FW_DEVLOG_FACILITY_FOISCSI] = "FOISCSI",
725 [FW_DEVLOG_FACILITY_FOFCOE] = "FOFCOE"
728 /* Information gathered by Device Log Open routine for the display routine.
731 unsigned int nentries; /* number of entries in log[] */
732 unsigned int first; /* first [temporal] entry in log[] */
733 struct fw_devlog_e log[0]; /* Firmware Device Log */
736 /* Dump a Firmaware Device Log entry.
738 static int devlog_show(struct seq_file *seq, void *v)
740 if (v == SEQ_START_TOKEN)
741 seq_printf(seq, "%10s %15s %8s %8s %s\n",
742 "Seq#", "Tstamp", "Level", "Facility", "Message");
744 struct devlog_info *dinfo = seq->private;
745 int fidx = (uintptr_t)v - 2;
747 struct fw_devlog_e *e;
749 /* Get a pointer to the log entry to display. Skip unused log
752 index = dinfo->first + fidx;
753 if (index >= dinfo->nentries)
754 index -= dinfo->nentries;
755 e = &dinfo->log[index];
756 if (e->timestamp == 0)
759 /* Print the message. This depends on the firmware using
760 * exactly the same formating strings as the kernel so we may
761 * eventually have to put a format interpreter in here ...
763 seq_printf(seq, "%10d %15llu %8s %8s ",
764 e->seqno, e->timestamp,
765 (e->level < ARRAY_SIZE(devlog_level_strings)
766 ? devlog_level_strings[e->level]
768 (e->facility < ARRAY_SIZE(devlog_facility_strings)
769 ? devlog_facility_strings[e->facility]
771 seq_printf(seq, e->fmt, e->params[0], e->params[1],
772 e->params[2], e->params[3], e->params[4],
773 e->params[5], e->params[6], e->params[7]);
778 /* Sequential File Operations for Device Log.
780 static inline void *devlog_get_idx(struct devlog_info *dinfo, loff_t pos)
782 if (pos > dinfo->nentries)
785 return (void *)(uintptr_t)(pos + 1);
788 static void *devlog_start(struct seq_file *seq, loff_t *pos)
790 struct devlog_info *dinfo = seq->private;
793 ? devlog_get_idx(dinfo, *pos)
797 static void *devlog_next(struct seq_file *seq, void *v, loff_t *pos)
799 struct devlog_info *dinfo = seq->private;
802 return devlog_get_idx(dinfo, *pos);
805 static void devlog_stop(struct seq_file *seq, void *v)
809 static const struct seq_operations devlog_seq_ops = {
810 .start = devlog_start,
816 /* Set up for reading the firmware's device log. We read the entire log here
817 * and then display it incrementally in devlog_show().
819 static int devlog_open(struct inode *inode, struct file *file)
821 struct adapter *adap = inode->i_private;
822 struct devlog_params *dparams = &adap->params.devlog;
823 struct devlog_info *dinfo;
828 /* If we don't know where the log is we can't do anything.
830 if (dparams->start == 0)
833 /* Allocate the space to read in the firmware's device log and set up
834 * for the iterated call to our display function.
836 dinfo = __seq_open_private(file, &devlog_seq_ops,
837 sizeof(*dinfo) + dparams->size);
841 /* Record the basic log buffer information and read in the raw log.
843 dinfo->nentries = (dparams->size / sizeof(struct fw_devlog_e));
845 spin_lock(&adap->win0_lock);
846 ret = t4_memory_rw(adap, adap->params.drv_memwin, dparams->memtype,
847 dparams->start, dparams->size, (__be32 *)dinfo->log,
849 spin_unlock(&adap->win0_lock);
851 seq_release_private(inode, file);
855 /* Translate log multi-byte integral elements into host native format
856 * and determine where the first entry in the log is.
858 for (fseqno = ~((u32)0), index = 0; index < dinfo->nentries; index++) {
859 struct fw_devlog_e *e = &dinfo->log[index];
863 if (e->timestamp == 0)
866 e->timestamp = (__force __be64)be64_to_cpu(e->timestamp);
867 seqno = be32_to_cpu(e->seqno);
868 for (i = 0; i < 8; i++)
870 (__force __be32)be32_to_cpu(e->params[i]);
872 if (seqno < fseqno) {
874 dinfo->first = index;
880 static const struct file_operations devlog_fops = {
881 .owner = THIS_MODULE,
885 .release = seq_release_private
888 static ssize_t flash_read(struct file *file, char __user *buf, size_t count,
892 loff_t avail = FILE_DATA(file)->i_size;
893 struct adapter *adap = file->private_data;
899 if (count > avail - pos)
908 len = min(count + ofst, sizeof(data));
909 ret = t4_read_flash(adap, pos - ofst, (len + 3) / 4,
915 if (copy_to_user(buf, data + ofst, len))
927 static const struct file_operations flash_debugfs_fops = {
928 .owner = THIS_MODULE,
933 static inline void tcamxy2valmask(u64 x, u64 y, u8 *addr, u64 *mask)
936 y = (__force u64)cpu_to_be64(y);
937 memcpy(addr, (char *)&y + 2, ETH_ALEN);
940 static int mps_tcam_show(struct seq_file *seq, void *v)
942 if (v == SEQ_START_TOKEN)
943 seq_puts(seq, "Idx Ethernet address Mask Vld Ports PF"
949 struct adapter *adap = seq->private;
950 unsigned int idx = (uintptr_t)v - 2;
951 u64 tcamy = t4_read_reg64(adap, MPS_CLS_TCAM_Y_L(idx));
952 u64 tcamx = t4_read_reg64(adap, MPS_CLS_TCAM_X_L(idx));
953 u32 cls_lo = t4_read_reg(adap, MPS_CLS_SRAM_L(idx));
954 u32 cls_hi = t4_read_reg(adap, MPS_CLS_SRAM_H(idx));
955 u32 rplc[4] = {0, 0, 0, 0};
958 seq_printf(seq, "%3u -\n", idx);
962 if (cls_lo & REPLICATE_F) {
963 struct fw_ldst_cmd ldst_cmd;
966 memset(&ldst_cmd, 0, sizeof(ldst_cmd));
967 ldst_cmd.op_to_addrspace =
968 htonl(FW_CMD_OP_V(FW_LDST_CMD) |
971 FW_LDST_CMD_ADDRSPACE_V(
972 FW_LDST_ADDRSPC_MPS));
973 ldst_cmd.cycles_to_len16 = htonl(FW_LEN16(ldst_cmd));
974 ldst_cmd.u.mps.fid_ctl =
975 htons(FW_LDST_CMD_FID_V(FW_LDST_MPS_RPLC) |
976 FW_LDST_CMD_CTL_V(idx));
977 ret = t4_wr_mbox(adap, adap->mbox, &ldst_cmd,
978 sizeof(ldst_cmd), &ldst_cmd);
980 dev_warn(adap->pdev_dev, "Can't read MPS "
981 "replication map for idx %d: %d\n",
984 rplc[0] = ntohl(ldst_cmd.u.mps.rplc31_0);
985 rplc[1] = ntohl(ldst_cmd.u.mps.rplc63_32);
986 rplc[2] = ntohl(ldst_cmd.u.mps.rplc95_64);
987 rplc[3] = ntohl(ldst_cmd.u.mps.rplc127_96);
991 tcamxy2valmask(tcamx, tcamy, addr, &mask);
992 seq_printf(seq, "%3u %02x:%02x:%02x:%02x:%02x:%02x %012llx"
994 idx, addr[0], addr[1], addr[2], addr[3], addr[4],
995 addr[5], (unsigned long long)mask,
996 (cls_lo & SRAM_VLD_F) ? 'Y' : 'N', PORTMAP_G(cls_hi),
998 (cls_lo & VF_VALID_F) ? VF_G(cls_lo) : -1);
999 if (cls_lo & REPLICATE_F)
1000 seq_printf(seq, " %08x %08x %08x %08x",
1001 rplc[3], rplc[2], rplc[1], rplc[0]);
1003 seq_printf(seq, "%36c", ' ');
1004 seq_printf(seq, "%4u%3u%3u%3u %#x\n",
1005 SRAM_PRIO0_G(cls_lo), SRAM_PRIO1_G(cls_lo),
1006 SRAM_PRIO2_G(cls_lo), SRAM_PRIO3_G(cls_lo),
1007 (cls_lo >> MULTILISTEN0_S) & 0xf);
1012 static inline void *mps_tcam_get_idx(struct seq_file *seq, loff_t pos)
1014 struct adapter *adap = seq->private;
1015 int max_mac_addr = is_t4(adap->params.chip) ?
1016 NUM_MPS_CLS_SRAM_L_INSTANCES :
1017 NUM_MPS_T5_CLS_SRAM_L_INSTANCES;
1018 return ((pos <= max_mac_addr) ? (void *)(uintptr_t)(pos + 1) : NULL);
1021 static void *mps_tcam_start(struct seq_file *seq, loff_t *pos)
1023 return *pos ? mps_tcam_get_idx(seq, *pos) : SEQ_START_TOKEN;
1026 static void *mps_tcam_next(struct seq_file *seq, void *v, loff_t *pos)
1029 return mps_tcam_get_idx(seq, *pos);
1032 static void mps_tcam_stop(struct seq_file *seq, void *v)
1036 static const struct seq_operations mps_tcam_seq_ops = {
1037 .start = mps_tcam_start,
1038 .next = mps_tcam_next,
1039 .stop = mps_tcam_stop,
1040 .show = mps_tcam_show
1043 static int mps_tcam_open(struct inode *inode, struct file *file)
1045 int res = seq_open(file, &mps_tcam_seq_ops);
1048 struct seq_file *seq = file->private_data;
1050 seq->private = inode->i_private;
1055 static const struct file_operations mps_tcam_debugfs_fops = {
1056 .owner = THIS_MODULE,
1057 .open = mps_tcam_open,
1059 .llseek = seq_lseek,
1060 .release = seq_release,
1063 /* Display various sensor information.
1065 static int sensors_show(struct seq_file *seq, void *v)
1067 struct adapter *adap = seq->private;
1068 u32 param[7], val[7];
1071 /* Note that if the sensors haven't been initialized and turned on
1072 * we'll get values of 0, so treat those as "<unknown>" ...
1074 param[0] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_DEV) |
1075 FW_PARAMS_PARAM_X_V(FW_PARAMS_PARAM_DEV_DIAG) |
1076 FW_PARAMS_PARAM_Y_V(FW_PARAM_DEV_DIAG_TMP));
1077 param[1] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_DEV) |
1078 FW_PARAMS_PARAM_X_V(FW_PARAMS_PARAM_DEV_DIAG) |
1079 FW_PARAMS_PARAM_Y_V(FW_PARAM_DEV_DIAG_VDD));
1080 ret = t4_query_params(adap, adap->mbox, adap->fn, 0, 2,
1083 if (ret < 0 || val[0] == 0)
1084 seq_puts(seq, "Temperature: <unknown>\n");
1086 seq_printf(seq, "Temperature: %dC\n", val[0]);
1088 if (ret < 0 || val[1] == 0)
1089 seq_puts(seq, "Core VDD: <unknown>\n");
1091 seq_printf(seq, "Core VDD: %dmV\n", val[1]);
1096 DEFINE_SIMPLE_DEBUGFS_FILE(sensors);
1098 #if IS_ENABLED(CONFIG_IPV6)
1099 static int clip_tbl_open(struct inode *inode, struct file *file)
1101 return single_open(file, clip_tbl_show, PDE_DATA(inode));
1104 static const struct file_operations clip_tbl_debugfs_fops = {
1105 .owner = THIS_MODULE,
1106 .open = clip_tbl_open,
1108 .llseek = seq_lseek,
1109 .release = single_release
1116 static int rss_show(struct seq_file *seq, void *v, int idx)
1120 seq_printf(seq, "%4d: %4u %4u %4u %4u %4u %4u %4u %4u\n",
1121 idx * 8, entry[0], entry[1], entry[2], entry[3], entry[4],
1122 entry[5], entry[6], entry[7]);
1126 static int rss_open(struct inode *inode, struct file *file)
1130 struct adapter *adap = inode->i_private;
1132 p = seq_open_tab(file, RSS_NENTRIES / 8, 8 * sizeof(u16), 0, rss_show);
1136 ret = t4_read_rss(adap, (u16 *)p->data);
1138 seq_release_private(inode, file);
1143 static const struct file_operations rss_debugfs_fops = {
1144 .owner = THIS_MODULE,
1147 .llseek = seq_lseek,
1148 .release = seq_release_private
1151 /* RSS Configuration.
1154 /* Small utility function to return the strings "yes" or "no" if the supplied
1155 * argument is non-zero.
1157 static const char *yesno(int x)
1159 static const char *yes = "yes";
1160 static const char *no = "no";
1162 return x ? yes : no;
1165 static int rss_config_show(struct seq_file *seq, void *v)
1167 struct adapter *adapter = seq->private;
1168 static const char * const keymode[] = {
1170 "global and per-VF scramble",
1171 "per-PF and per-VF scramble",
1172 "per-VF and per-VF scramble",
1176 rssconf = t4_read_reg(adapter, TP_RSS_CONFIG_A);
1177 seq_printf(seq, "TP_RSS_CONFIG: %#x\n", rssconf);
1178 seq_printf(seq, " Tnl4TupEnIpv6: %3s\n", yesno(rssconf &
1180 seq_printf(seq, " Tnl2TupEnIpv6: %3s\n", yesno(rssconf &
1182 seq_printf(seq, " Tnl4TupEnIpv4: %3s\n", yesno(rssconf &
1184 seq_printf(seq, " Tnl2TupEnIpv4: %3s\n", yesno(rssconf &
1186 seq_printf(seq, " TnlTcpSel: %3s\n", yesno(rssconf & TNLTCPSEL_F));
1187 seq_printf(seq, " TnlIp6Sel: %3s\n", yesno(rssconf & TNLIP6SEL_F));
1188 seq_printf(seq, " TnlVrtSel: %3s\n", yesno(rssconf & TNLVRTSEL_F));
1189 seq_printf(seq, " TnlMapEn: %3s\n", yesno(rssconf & TNLMAPEN_F));
1190 seq_printf(seq, " OfdHashSave: %3s\n", yesno(rssconf &
1192 seq_printf(seq, " OfdVrtSel: %3s\n", yesno(rssconf & OFDVRTSEL_F));
1193 seq_printf(seq, " OfdMapEn: %3s\n", yesno(rssconf & OFDMAPEN_F));
1194 seq_printf(seq, " OfdLkpEn: %3s\n", yesno(rssconf & OFDLKPEN_F));
1195 seq_printf(seq, " Syn4TupEnIpv6: %3s\n", yesno(rssconf &
1197 seq_printf(seq, " Syn2TupEnIpv6: %3s\n", yesno(rssconf &
1199 seq_printf(seq, " Syn4TupEnIpv4: %3s\n", yesno(rssconf &
1201 seq_printf(seq, " Syn2TupEnIpv4: %3s\n", yesno(rssconf &
1203 seq_printf(seq, " Syn4TupEnIpv6: %3s\n", yesno(rssconf &
1205 seq_printf(seq, " SynIp6Sel: %3s\n", yesno(rssconf & SYNIP6SEL_F));
1206 seq_printf(seq, " SynVrt6Sel: %3s\n", yesno(rssconf & SYNVRTSEL_F));
1207 seq_printf(seq, " SynMapEn: %3s\n", yesno(rssconf & SYNMAPEN_F));
1208 seq_printf(seq, " SynLkpEn: %3s\n", yesno(rssconf & SYNLKPEN_F));
1209 seq_printf(seq, " ChnEn: %3s\n", yesno(rssconf &
1211 seq_printf(seq, " PrtEn: %3s\n", yesno(rssconf &
1213 seq_printf(seq, " TnlAllLkp: %3s\n", yesno(rssconf &
1215 seq_printf(seq, " VrtEn: %3s\n", yesno(rssconf &
1217 seq_printf(seq, " CngEn: %3s\n", yesno(rssconf &
1218 CONGESTIONENABLE_F));
1219 seq_printf(seq, " HashToeplitz: %3s\n", yesno(rssconf &
1221 seq_printf(seq, " Udp4En: %3s\n", yesno(rssconf & UDPENABLE_F));
1222 seq_printf(seq, " Disable: %3s\n", yesno(rssconf & DISABLE_F));
1224 seq_puts(seq, "\n");
1226 rssconf = t4_read_reg(adapter, TP_RSS_CONFIG_TNL_A);
1227 seq_printf(seq, "TP_RSS_CONFIG_TNL: %#x\n", rssconf);
1228 seq_printf(seq, " MaskSize: %3d\n", MASKSIZE_G(rssconf));
1229 seq_printf(seq, " MaskFilter: %3d\n", MASKFILTER_G(rssconf));
1230 if (CHELSIO_CHIP_VERSION(adapter->params.chip) > CHELSIO_T5) {
1231 seq_printf(seq, " HashAll: %3s\n",
1232 yesno(rssconf & HASHALL_F));
1233 seq_printf(seq, " HashEth: %3s\n",
1234 yesno(rssconf & HASHETH_F));
1236 seq_printf(seq, " UseWireCh: %3s\n", yesno(rssconf & USEWIRECH_F));
1238 seq_puts(seq, "\n");
1240 rssconf = t4_read_reg(adapter, TP_RSS_CONFIG_OFD_A);
1241 seq_printf(seq, "TP_RSS_CONFIG_OFD: %#x\n", rssconf);
1242 seq_printf(seq, " MaskSize: %3d\n", MASKSIZE_G(rssconf));
1243 seq_printf(seq, " RRCplMapEn: %3s\n", yesno(rssconf &
1245 seq_printf(seq, " RRCplQueWidth: %3d\n", RRCPLQUEWIDTH_G(rssconf));
1247 seq_puts(seq, "\n");
1249 rssconf = t4_read_reg(adapter, TP_RSS_CONFIG_SYN_A);
1250 seq_printf(seq, "TP_RSS_CONFIG_SYN: %#x\n", rssconf);
1251 seq_printf(seq, " MaskSize: %3d\n", MASKSIZE_G(rssconf));
1252 seq_printf(seq, " UseWireCh: %3s\n", yesno(rssconf & USEWIRECH_F));
1254 seq_puts(seq, "\n");
1256 rssconf = t4_read_reg(adapter, TP_RSS_CONFIG_VRT_A);
1257 seq_printf(seq, "TP_RSS_CONFIG_VRT: %#x\n", rssconf);
1258 if (CHELSIO_CHIP_VERSION(adapter->params.chip) > CHELSIO_T5) {
1259 seq_printf(seq, " KeyWrAddrX: %3d\n",
1260 KEYWRADDRX_G(rssconf));
1261 seq_printf(seq, " KeyExtend: %3s\n",
1262 yesno(rssconf & KEYEXTEND_F));
1264 seq_printf(seq, " VfRdRg: %3s\n", yesno(rssconf & VFRDRG_F));
1265 seq_printf(seq, " VfRdEn: %3s\n", yesno(rssconf & VFRDEN_F));
1266 seq_printf(seq, " VfPerrEn: %3s\n", yesno(rssconf & VFPERREN_F));
1267 seq_printf(seq, " KeyPerrEn: %3s\n", yesno(rssconf & KEYPERREN_F));
1268 seq_printf(seq, " DisVfVlan: %3s\n", yesno(rssconf &
1270 seq_printf(seq, " EnUpSwt: %3s\n", yesno(rssconf & ENABLEUP0_F));
1271 seq_printf(seq, " HashDelay: %3d\n", HASHDELAY_G(rssconf));
1272 if (CHELSIO_CHIP_VERSION(adapter->params.chip) <= CHELSIO_T5)
1273 seq_printf(seq, " VfWrAddr: %3d\n", VFWRADDR_G(rssconf));
1274 seq_printf(seq, " KeyMode: %s\n", keymode[KEYMODE_G(rssconf)]);
1275 seq_printf(seq, " VfWrEn: %3s\n", yesno(rssconf & VFWREN_F));
1276 seq_printf(seq, " KeyWrEn: %3s\n", yesno(rssconf & KEYWREN_F));
1277 seq_printf(seq, " KeyWrAddr: %3d\n", KEYWRADDR_G(rssconf));
1279 seq_puts(seq, "\n");
1281 rssconf = t4_read_reg(adapter, TP_RSS_CONFIG_CNG_A);
1282 seq_printf(seq, "TP_RSS_CONFIG_CNG: %#x\n", rssconf);
1283 seq_printf(seq, " ChnCount3: %3s\n", yesno(rssconf & CHNCOUNT3_F));
1284 seq_printf(seq, " ChnCount2: %3s\n", yesno(rssconf & CHNCOUNT2_F));
1285 seq_printf(seq, " ChnCount1: %3s\n", yesno(rssconf & CHNCOUNT1_F));
1286 seq_printf(seq, " ChnCount0: %3s\n", yesno(rssconf & CHNCOUNT0_F));
1287 seq_printf(seq, " ChnUndFlow3: %3s\n", yesno(rssconf &
1289 seq_printf(seq, " ChnUndFlow2: %3s\n", yesno(rssconf &
1291 seq_printf(seq, " ChnUndFlow1: %3s\n", yesno(rssconf &
1293 seq_printf(seq, " ChnUndFlow0: %3s\n", yesno(rssconf &
1295 seq_printf(seq, " RstChn3: %3s\n", yesno(rssconf & RSTCHN3_F));
1296 seq_printf(seq, " RstChn2: %3s\n", yesno(rssconf & RSTCHN2_F));
1297 seq_printf(seq, " RstChn1: %3s\n", yesno(rssconf & RSTCHN1_F));
1298 seq_printf(seq, " RstChn0: %3s\n", yesno(rssconf & RSTCHN0_F));
1299 seq_printf(seq, " UpdVld: %3s\n", yesno(rssconf & UPDVLD_F));
1300 seq_printf(seq, " Xoff: %3s\n", yesno(rssconf & XOFF_F));
1301 seq_printf(seq, " UpdChn3: %3s\n", yesno(rssconf & UPDCHN3_F));
1302 seq_printf(seq, " UpdChn2: %3s\n", yesno(rssconf & UPDCHN2_F));
1303 seq_printf(seq, " UpdChn1: %3s\n", yesno(rssconf & UPDCHN1_F));
1304 seq_printf(seq, " UpdChn0: %3s\n", yesno(rssconf & UPDCHN0_F));
1305 seq_printf(seq, " Queue: %3d\n", QUEUE_G(rssconf));
1310 DEFINE_SIMPLE_DEBUGFS_FILE(rss_config);
1315 static int rss_key_show(struct seq_file *seq, void *v)
1319 t4_read_rss_key(seq->private, key);
1320 seq_printf(seq, "%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x\n",
1321 key[9], key[8], key[7], key[6], key[5], key[4], key[3],
1322 key[2], key[1], key[0]);
1326 static int rss_key_open(struct inode *inode, struct file *file)
1328 return single_open(file, rss_key_show, inode->i_private);
1331 static ssize_t rss_key_write(struct file *file, const char __user *buf,
1332 size_t count, loff_t *pos)
1337 struct adapter *adap = FILE_DATA(file)->i_private;
1339 if (count > sizeof(s) - 1)
1341 if (copy_from_user(s, buf, count))
1343 for (i = count; i > 0 && isspace(s[i - 1]); i--)
1347 for (p = s, i = 9; i >= 0; i--) {
1349 for (j = 0; j < 8; j++, p++) {
1352 key[i] = (key[i] << 4) | hex2val(*p);
1356 t4_write_rss_key(adap, key, -1);
1360 static const struct file_operations rss_key_debugfs_fops = {
1361 .owner = THIS_MODULE,
1362 .open = rss_key_open,
1364 .llseek = seq_lseek,
1365 .release = single_release,
1366 .write = rss_key_write
1369 /* PF RSS Configuration.
1372 struct rss_pf_conf {
1378 static int rss_pf_config_show(struct seq_file *seq, void *v, int idx)
1380 struct rss_pf_conf *pfconf;
1382 if (v == SEQ_START_TOKEN) {
1383 /* use the 0th entry to dump the PF Map Index Size */
1384 pfconf = seq->private + offsetof(struct seq_tab, data);
1385 seq_printf(seq, "PF Map Index Size = %d\n\n",
1386 LKPIDXSIZE_G(pfconf->rss_pf_map));
1388 seq_puts(seq, " RSS PF VF Hash Tuple Enable Default\n");
1389 seq_puts(seq, " Enable IPF Mask Mask IPv6 IPv4 UDP Queue\n");
1390 seq_puts(seq, " PF Map Chn Prt Map Size Size Four Two Four Two Four Ch1 Ch0\n");
1392 #define G_PFnLKPIDX(map, n) \
1393 (((map) >> PF1LKPIDX_S*(n)) & PF0LKPIDX_M)
1394 #define G_PFnMSKSIZE(mask, n) \
1395 (((mask) >> PF1MSKSIZE_S*(n)) & PF1MSKSIZE_M)
1398 seq_printf(seq, "%3d %3s %3s %3s %3d %3d %3d %3s %3s %3s %3s %3s %3d %3d\n",
1400 yesno(pfconf->rss_pf_config & MAPENABLE_F),
1401 yesno(pfconf->rss_pf_config & CHNENABLE_F),
1402 yesno(pfconf->rss_pf_config & PRTENABLE_F),
1403 G_PFnLKPIDX(pfconf->rss_pf_map, idx),
1404 G_PFnMSKSIZE(pfconf->rss_pf_mask, idx),
1405 IVFWIDTH_G(pfconf->rss_pf_config),
1406 yesno(pfconf->rss_pf_config & IP6FOURTUPEN_F),
1407 yesno(pfconf->rss_pf_config & IP6TWOTUPEN_F),
1408 yesno(pfconf->rss_pf_config & IP4FOURTUPEN_F),
1409 yesno(pfconf->rss_pf_config & IP4TWOTUPEN_F),
1410 yesno(pfconf->rss_pf_config & UDPFOURTUPEN_F),
1411 CH1DEFAULTQUEUE_G(pfconf->rss_pf_config),
1412 CH0DEFAULTQUEUE_G(pfconf->rss_pf_config));
1420 static int rss_pf_config_open(struct inode *inode, struct file *file)
1422 struct adapter *adapter = inode->i_private;
1424 u32 rss_pf_map, rss_pf_mask;
1425 struct rss_pf_conf *pfconf;
1428 p = seq_open_tab(file, 8, sizeof(*pfconf), 1, rss_pf_config_show);
1432 pfconf = (struct rss_pf_conf *)p->data;
1433 rss_pf_map = t4_read_rss_pf_map(adapter);
1434 rss_pf_mask = t4_read_rss_pf_mask(adapter);
1435 for (pf = 0; pf < 8; pf++) {
1436 pfconf[pf].rss_pf_map = rss_pf_map;
1437 pfconf[pf].rss_pf_mask = rss_pf_mask;
1438 t4_read_rss_pf_config(adapter, pf, &pfconf[pf].rss_pf_config);
1443 static const struct file_operations rss_pf_config_debugfs_fops = {
1444 .owner = THIS_MODULE,
1445 .open = rss_pf_config_open,
1447 .llseek = seq_lseek,
1448 .release = seq_release_private
1451 /* VF RSS Configuration.
1454 struct rss_vf_conf {
1459 static int rss_vf_config_show(struct seq_file *seq, void *v, int idx)
1461 if (v == SEQ_START_TOKEN) {
1462 seq_puts(seq, " RSS Hash Tuple Enable\n");
1463 seq_puts(seq, " Enable IVF Dis Enb IPv6 IPv4 UDP Def Secret Key\n");
1464 seq_puts(seq, " VF Chn Prt Map VLAN uP Four Two Four Two Four Que Idx Hash\n");
1466 struct rss_vf_conf *vfconf = v;
1468 seq_printf(seq, "%3d %3s %3s %3d %3s %3s %3s %3s %3s %3s %3s %4d %3d %#10x\n",
1470 yesno(vfconf->rss_vf_vfh & VFCHNEN_F),
1471 yesno(vfconf->rss_vf_vfh & VFPRTEN_F),
1472 VFLKPIDX_G(vfconf->rss_vf_vfh),
1473 yesno(vfconf->rss_vf_vfh & VFVLNEX_F),
1474 yesno(vfconf->rss_vf_vfh & VFUPEN_F),
1475 yesno(vfconf->rss_vf_vfh & VFIP4FOURTUPEN_F),
1476 yesno(vfconf->rss_vf_vfh & VFIP6TWOTUPEN_F),
1477 yesno(vfconf->rss_vf_vfh & VFIP4FOURTUPEN_F),
1478 yesno(vfconf->rss_vf_vfh & VFIP4TWOTUPEN_F),
1479 yesno(vfconf->rss_vf_vfh & ENABLEUDPHASH_F),
1480 DEFAULTQUEUE_G(vfconf->rss_vf_vfh),
1481 KEYINDEX_G(vfconf->rss_vf_vfh),
1482 vfconf->rss_vf_vfl);
1487 static int rss_vf_config_open(struct inode *inode, struct file *file)
1489 struct adapter *adapter = inode->i_private;
1491 struct rss_vf_conf *vfconf;
1494 p = seq_open_tab(file, 128, sizeof(*vfconf), 1, rss_vf_config_show);
1498 vfconf = (struct rss_vf_conf *)p->data;
1499 for (vf = 0; vf < 128; vf++) {
1500 t4_read_rss_vf_config(adapter, vf, &vfconf[vf].rss_vf_vfl,
1501 &vfconf[vf].rss_vf_vfh);
1506 static const struct file_operations rss_vf_config_debugfs_fops = {
1507 .owner = THIS_MODULE,
1508 .open = rss_vf_config_open,
1510 .llseek = seq_lseek,
1511 .release = seq_release_private
1515 * ethqset2pinfo - return port_info of an Ethernet Queue Set
1516 * @adap: the adapter
1517 * @qset: Ethernet Queue Set
1519 static inline struct port_info *ethqset2pinfo(struct adapter *adap, int qset)
1523 for_each_port(adap, pidx) {
1524 struct port_info *pi = adap2pinfo(adap, pidx);
1526 if (qset >= pi->first_qset &&
1527 qset < pi->first_qset + pi->nqsets)
1531 /* should never happen! */
1536 static int sge_qinfo_show(struct seq_file *seq, void *v)
1538 struct adapter *adap = seq->private;
1539 int eth_entries = DIV_ROUND_UP(adap->sge.ethqsets, 4);
1540 int toe_entries = DIV_ROUND_UP(adap->sge.ofldqsets, 4);
1541 int rdma_entries = DIV_ROUND_UP(adap->sge.rdmaqs, 4);
1542 int ciq_entries = DIV_ROUND_UP(adap->sge.rdmaciqs, 4);
1543 int ctrl_entries = DIV_ROUND_UP(MAX_CTRL_QUEUES, 4);
1544 int i, r = (uintptr_t)v - 1;
1545 int toe_idx = r - eth_entries;
1546 int rdma_idx = toe_idx - toe_entries;
1547 int ciq_idx = rdma_idx - rdma_entries;
1548 int ctrl_idx = ciq_idx - ciq_entries;
1549 int fq_idx = ctrl_idx - ctrl_entries;
1552 seq_putc(seq, '\n');
1554 #define S3(fmt_spec, s, v) \
1556 seq_printf(seq, "%-12s", s); \
1557 for (i = 0; i < n; ++i) \
1558 seq_printf(seq, " %16" fmt_spec, v); \
1559 seq_putc(seq, '\n'); \
1561 #define S(s, v) S3("s", s, v)
1562 #define T(s, v) S3("u", s, tx[i].v)
1563 #define R(s, v) S3("u", s, rx[i].v)
1565 if (r < eth_entries) {
1566 int base_qset = r * 4;
1567 const struct sge_eth_rxq *rx = &adap->sge.ethrxq[base_qset];
1568 const struct sge_eth_txq *tx = &adap->sge.ethtxq[base_qset];
1569 int n = min(4, adap->sge.ethqsets - 4 * r);
1571 S("QType:", "Ethernet");
1573 rx[i].rspq.netdev ? rx[i].rspq.netdev->name : "N/A");
1574 T("TxQ ID:", q.cntxt_id);
1575 T("TxQ size:", q.size);
1576 T("TxQ inuse:", q.in_use);
1577 T("TxQ CIDX:", q.cidx);
1578 T("TxQ PIDX:", q.pidx);
1579 #ifdef CONFIG_CHELSIO_T4_DCB
1580 T("DCB Prio:", dcb_prio);
1581 S3("u", "DCB PGID:",
1582 (ethqset2pinfo(adap, base_qset + i)->dcb.pgid >>
1583 4*(7-tx[i].dcb_prio)) & 0xf);
1585 (ethqset2pinfo(adap, base_qset + i)->dcb.pfcen >>
1586 1*(7-tx[i].dcb_prio)) & 0x1);
1588 R("RspQ ID:", rspq.abs_id);
1589 R("RspQ size:", rspq.size);
1590 R("RspQE size:", rspq.iqe_len);
1591 R("RspQ CIDX:", rspq.cidx);
1592 R("RspQ Gen:", rspq.gen);
1593 S3("u", "Intr delay:", qtimer_val(adap, &rx[i].rspq));
1594 S3("u", "Intr pktcnt:",
1595 adap->sge.counter_val[rx[i].rspq.pktcnt_idx]);
1596 R("FL ID:", fl.cntxt_id);
1597 R("FL size:", fl.size - 8);
1598 R("FL pend:", fl.pend_cred);
1599 R("FL avail:", fl.avail);
1600 R("FL PIDX:", fl.pidx);
1601 R("FL CIDX:", fl.cidx);
1602 } else if (toe_idx < toe_entries) {
1603 const struct sge_ofld_rxq *rx = &adap->sge.ofldrxq[toe_idx * 4];
1604 const struct sge_ofld_txq *tx = &adap->sge.ofldtxq[toe_idx * 4];
1605 int n = min(4, adap->sge.ofldqsets - 4 * toe_idx);
1608 T("TxQ ID:", q.cntxt_id);
1609 T("TxQ size:", q.size);
1610 T("TxQ inuse:", q.in_use);
1611 T("TxQ CIDX:", q.cidx);
1612 T("TxQ PIDX:", q.pidx);
1613 R("RspQ ID:", rspq.abs_id);
1614 R("RspQ size:", rspq.size);
1615 R("RspQE size:", rspq.iqe_len);
1616 R("RspQ CIDX:", rspq.cidx);
1617 R("RspQ Gen:", rspq.gen);
1618 S3("u", "Intr delay:", qtimer_val(adap, &rx[i].rspq));
1619 S3("u", "Intr pktcnt:",
1620 adap->sge.counter_val[rx[i].rspq.pktcnt_idx]);
1621 R("FL ID:", fl.cntxt_id);
1622 R("FL size:", fl.size - 8);
1623 R("FL pend:", fl.pend_cred);
1624 R("FL avail:", fl.avail);
1625 R("FL PIDX:", fl.pidx);
1626 R("FL CIDX:", fl.cidx);
1627 } else if (rdma_idx < rdma_entries) {
1628 const struct sge_ofld_rxq *rx =
1629 &adap->sge.rdmarxq[rdma_idx * 4];
1630 int n = min(4, adap->sge.rdmaqs - 4 * rdma_idx);
1632 S("QType:", "RDMA-CPL");
1633 R("RspQ ID:", rspq.abs_id);
1634 R("RspQ size:", rspq.size);
1635 R("RspQE size:", rspq.iqe_len);
1636 R("RspQ CIDX:", rspq.cidx);
1637 R("RspQ Gen:", rspq.gen);
1638 S3("u", "Intr delay:", qtimer_val(adap, &rx[i].rspq));
1639 S3("u", "Intr pktcnt:",
1640 adap->sge.counter_val[rx[i].rspq.pktcnt_idx]);
1641 R("FL ID:", fl.cntxt_id);
1642 R("FL size:", fl.size - 8);
1643 R("FL pend:", fl.pend_cred);
1644 R("FL avail:", fl.avail);
1645 R("FL PIDX:", fl.pidx);
1646 R("FL CIDX:", fl.cidx);
1647 } else if (ciq_idx < ciq_entries) {
1648 const struct sge_ofld_rxq *rx = &adap->sge.rdmaciq[ciq_idx * 4];
1649 int n = min(4, adap->sge.rdmaciqs - 4 * ciq_idx);
1651 S("QType:", "RDMA-CIQ");
1652 R("RspQ ID:", rspq.abs_id);
1653 R("RspQ size:", rspq.size);
1654 R("RspQE size:", rspq.iqe_len);
1655 R("RspQ CIDX:", rspq.cidx);
1656 R("RspQ Gen:", rspq.gen);
1657 S3("u", "Intr delay:", qtimer_val(adap, &rx[i].rspq));
1658 S3("u", "Intr pktcnt:",
1659 adap->sge.counter_val[rx[i].rspq.pktcnt_idx]);
1660 } else if (ctrl_idx < ctrl_entries) {
1661 const struct sge_ctrl_txq *tx = &adap->sge.ctrlq[ctrl_idx * 4];
1662 int n = min(4, adap->params.nports - 4 * ctrl_idx);
1664 S("QType:", "Control");
1665 T("TxQ ID:", q.cntxt_id);
1666 T("TxQ size:", q.size);
1667 T("TxQ inuse:", q.in_use);
1668 T("TxQ CIDX:", q.cidx);
1669 T("TxQ PIDX:", q.pidx);
1670 } else if (fq_idx == 0) {
1671 const struct sge_rspq *evtq = &adap->sge.fw_evtq;
1673 seq_printf(seq, "%-12s %16s\n", "QType:", "FW event queue");
1674 seq_printf(seq, "%-12s %16u\n", "RspQ ID:", evtq->abs_id);
1675 seq_printf(seq, "%-12s %16u\n", "RspQ size:", evtq->size);
1676 seq_printf(seq, "%-12s %16u\n", "RspQE size:", evtq->iqe_len);
1677 seq_printf(seq, "%-12s %16u\n", "RspQ CIDX:", evtq->cidx);
1678 seq_printf(seq, "%-12s %16u\n", "RspQ Gen:", evtq->gen);
1679 seq_printf(seq, "%-12s %16u\n", "Intr delay:",
1680 qtimer_val(adap, evtq));
1681 seq_printf(seq, "%-12s %16u\n", "Intr pktcnt:",
1682 adap->sge.counter_val[evtq->pktcnt_idx]);
1691 static int sge_queue_entries(const struct adapter *adap)
1693 return DIV_ROUND_UP(adap->sge.ethqsets, 4) +
1694 DIV_ROUND_UP(adap->sge.ofldqsets, 4) +
1695 DIV_ROUND_UP(adap->sge.rdmaqs, 4) +
1696 DIV_ROUND_UP(adap->sge.rdmaciqs, 4) +
1697 DIV_ROUND_UP(MAX_CTRL_QUEUES, 4) + 1;
1700 static void *sge_queue_start(struct seq_file *seq, loff_t *pos)
1702 int entries = sge_queue_entries(seq->private);
1704 return *pos < entries ? (void *)((uintptr_t)*pos + 1) : NULL;
1707 static void sge_queue_stop(struct seq_file *seq, void *v)
1711 static void *sge_queue_next(struct seq_file *seq, void *v, loff_t *pos)
1713 int entries = sge_queue_entries(seq->private);
1716 return *pos < entries ? (void *)((uintptr_t)*pos + 1) : NULL;
1719 static const struct seq_operations sge_qinfo_seq_ops = {
1720 .start = sge_queue_start,
1721 .next = sge_queue_next,
1722 .stop = sge_queue_stop,
1723 .show = sge_qinfo_show
1726 static int sge_qinfo_open(struct inode *inode, struct file *file)
1728 int res = seq_open(file, &sge_qinfo_seq_ops);
1731 struct seq_file *seq = file->private_data;
1733 seq->private = inode->i_private;
1738 static const struct file_operations sge_qinfo_debugfs_fops = {
1739 .owner = THIS_MODULE,
1740 .open = sge_qinfo_open,
1742 .llseek = seq_lseek,
1743 .release = seq_release,
1746 int mem_open(struct inode *inode, struct file *file)
1749 struct adapter *adap;
1751 file->private_data = inode->i_private;
1753 mem = (uintptr_t)file->private_data & 0x3;
1754 adap = file->private_data - mem;
1756 (void)t4_fwcache(adap, FW_PARAM_DEV_FWCACHE_FLUSH);
1761 static ssize_t mem_read(struct file *file, char __user *buf, size_t count,
1765 loff_t avail = file_inode(file)->i_size;
1766 unsigned int mem = (uintptr_t)file->private_data & 3;
1767 struct adapter *adap = file->private_data - mem;
1775 if (count > avail - pos)
1776 count = avail - pos;
1778 data = t4_alloc_mem(count);
1782 spin_lock(&adap->win0_lock);
1783 ret = t4_memory_rw(adap, 0, mem, pos, count, data, T4_MEMORY_READ);
1784 spin_unlock(&adap->win0_lock);
1789 ret = copy_to_user(buf, data, count);
1795 *ppos = pos + count;
1798 static const struct file_operations mem_debugfs_fops = {
1799 .owner = THIS_MODULE,
1800 .open = simple_open,
1802 .llseek = default_llseek,
1805 static void set_debugfs_file_size(struct dentry *de, loff_t size)
1807 if (!IS_ERR(de) && de->d_inode)
1808 de->d_inode->i_size = size;
1811 static void add_debugfs_mem(struct adapter *adap, const char *name,
1812 unsigned int idx, unsigned int size_mb)
1816 de = debugfs_create_file(name, S_IRUSR, adap->debugfs_root,
1817 (void *)adap + idx, &mem_debugfs_fops);
1818 if (de && de->d_inode)
1819 de->d_inode->i_size = size_mb << 20;
1822 /* Add an array of Debug FS files.
1824 void add_debugfs_files(struct adapter *adap,
1825 struct t4_debugfs_entry *files,
1826 unsigned int nfiles)
1830 /* debugfs support is best effort */
1831 for (i = 0; i < nfiles; i++)
1832 debugfs_create_file(files[i].name, files[i].mode,
1834 (void *)adap + files[i].data,
1838 int t4_setup_debugfs(struct adapter *adap)
1844 static struct t4_debugfs_entry t4_debugfs_files[] = {
1845 { "cim_la", &cim_la_fops, S_IRUSR, 0 },
1846 { "cim_qcfg", &cim_qcfg_fops, S_IRUSR, 0 },
1847 { "clk", &clk_debugfs_fops, S_IRUSR, 0 },
1848 { "devlog", &devlog_fops, S_IRUSR, 0 },
1849 { "l2t", &t4_l2t_fops, S_IRUSR, 0},
1850 { "mps_tcam", &mps_tcam_debugfs_fops, S_IRUSR, 0 },
1851 { "rss", &rss_debugfs_fops, S_IRUSR, 0 },
1852 { "rss_config", &rss_config_debugfs_fops, S_IRUSR, 0 },
1853 { "rss_key", &rss_key_debugfs_fops, S_IRUSR, 0 },
1854 { "rss_pf_config", &rss_pf_config_debugfs_fops, S_IRUSR, 0 },
1855 { "rss_vf_config", &rss_vf_config_debugfs_fops, S_IRUSR, 0 },
1856 { "sge_qinfo", &sge_qinfo_debugfs_fops, S_IRUSR, 0 },
1857 { "ibq_tp0", &cim_ibq_fops, S_IRUSR, 0 },
1858 { "ibq_tp1", &cim_ibq_fops, S_IRUSR, 1 },
1859 { "ibq_ulp", &cim_ibq_fops, S_IRUSR, 2 },
1860 { "ibq_sge0", &cim_ibq_fops, S_IRUSR, 3 },
1861 { "ibq_sge1", &cim_ibq_fops, S_IRUSR, 4 },
1862 { "ibq_ncsi", &cim_ibq_fops, S_IRUSR, 5 },
1863 { "obq_ulp0", &cim_obq_fops, S_IRUSR, 0 },
1864 { "obq_ulp1", &cim_obq_fops, S_IRUSR, 1 },
1865 { "obq_ulp2", &cim_obq_fops, S_IRUSR, 2 },
1866 { "obq_ulp3", &cim_obq_fops, S_IRUSR, 3 },
1867 { "obq_sge", &cim_obq_fops, S_IRUSR, 4 },
1868 { "obq_ncsi", &cim_obq_fops, S_IRUSR, 5 },
1869 { "tp_la", &tp_la_fops, S_IRUSR, 0 },
1870 { "sensors", &sensors_debugfs_fops, S_IRUSR, 0 },
1871 { "pm_stats", &pm_stats_debugfs_fops, S_IRUSR, 0 },
1872 #if IS_ENABLED(CONFIG_IPV6)
1873 { "clip_tbl", &clip_tbl_debugfs_fops, S_IRUSR, 0 },
1877 /* Debug FS nodes common to all T5 and later adapters.
1879 static struct t4_debugfs_entry t5_debugfs_files[] = {
1880 { "obq_sge_rx_q0", &cim_obq_fops, S_IRUSR, 6 },
1881 { "obq_sge_rx_q1", &cim_obq_fops, S_IRUSR, 7 },
1884 add_debugfs_files(adap,
1886 ARRAY_SIZE(t4_debugfs_files));
1887 if (!is_t4(adap->params.chip))
1888 add_debugfs_files(adap,
1890 ARRAY_SIZE(t5_debugfs_files));
1892 i = t4_read_reg(adap, MA_TARGET_MEM_ENABLE_A);
1893 if (i & EDRAM0_ENABLE_F) {
1894 size = t4_read_reg(adap, MA_EDRAM0_BAR_A);
1895 add_debugfs_mem(adap, "edc0", MEM_EDC0, EDRAM0_SIZE_G(size));
1897 if (i & EDRAM1_ENABLE_F) {
1898 size = t4_read_reg(adap, MA_EDRAM1_BAR_A);
1899 add_debugfs_mem(adap, "edc1", MEM_EDC1, EDRAM1_SIZE_G(size));
1901 if (is_t4(adap->params.chip)) {
1902 size = t4_read_reg(adap, MA_EXT_MEMORY_BAR_A);
1903 if (i & EXT_MEM_ENABLE_F)
1904 add_debugfs_mem(adap, "mc", MEM_MC,
1905 EXT_MEM_SIZE_G(size));
1907 if (i & EXT_MEM0_ENABLE_F) {
1908 size = t4_read_reg(adap, MA_EXT_MEMORY0_BAR_A);
1909 add_debugfs_mem(adap, "mc0", MEM_MC0,
1910 EXT_MEM0_SIZE_G(size));
1912 if (i & EXT_MEM1_ENABLE_F) {
1913 size = t4_read_reg(adap, MA_EXT_MEMORY1_BAR_A);
1914 add_debugfs_mem(adap, "mc1", MEM_MC1,
1915 EXT_MEM1_SIZE_G(size));
1919 de = debugfs_create_file("flash", S_IRUSR, adap->debugfs_root, adap,
1920 &flash_debugfs_fops);
1921 set_debugfs_file_size(de, adap->params.sf_size);