1 /* linux/drivers/mmc/host/sdhci-pci.c - SDHCI on PCI bus interface
3 * Copyright (C) 2005-2008 Pierre Ossman, All Rights Reserved.
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or (at
8 * your option) any later version.
10 * Thanks to the following companies for their support:
12 * - JMicron (hardware and technical support)
15 #include <linux/delay.h>
16 #include <linux/highmem.h>
17 #include <linux/pci.h>
18 #include <linux/dma-mapping.h>
19 #include <linux/slab.h>
20 #include <linux/device.h>
21 #include <linux/mmc/host.h>
22 #include <linux/scatterlist.h>
24 #include <linux/gpio.h>
25 #include <linux/sfi.h>
33 #define PCI_SDHCI_IFPIO 0x00
34 #define PCI_SDHCI_IFDMA 0x01
35 #define PCI_SDHCI_IFVENDOR 0x02
37 #define PCI_SLOT_INFO 0x40 /* 8 bits */
38 #define PCI_SLOT_INFO_SLOTS(x) ((x >> 4) & 7)
39 #define PCI_SLOT_INFO_FIRST_BAR_MASK 0x07
43 struct sdhci_pci_chip;
44 struct sdhci_pci_slot;
46 struct sdhci_pci_fixes {
49 int (*probe) (struct sdhci_pci_chip *);
51 int (*probe_slot) (struct sdhci_pci_slot *);
52 void (*remove_slot) (struct sdhci_pci_slot *, int);
54 int (*suspend) (struct sdhci_pci_chip *,
56 int (*resume) (struct sdhci_pci_chip *);
59 struct sdhci_pci_slot {
60 struct sdhci_pci_chip *chip;
61 struct sdhci_host *host;
67 struct sdhci_pci_chip {
71 const struct sdhci_pci_fixes *fixes;
73 int num_slots; /* Slots on controller */
74 struct sdhci_pci_slot *slots[MAX_SLOTS]; /* Pointers to host slots */
78 /*****************************************************************************\
80 * Hardware specific quirk handling *
82 \*****************************************************************************/
84 static int ricoh_probe(struct sdhci_pci_chip *chip)
86 if (chip->pdev->subsystem_vendor == PCI_VENDOR_ID_SAMSUNG ||
87 chip->pdev->subsystem_vendor == PCI_VENDOR_ID_SONY)
88 chip->quirks |= SDHCI_QUIRK_NO_CARD_NO_RESET;
92 static int ricoh_mmc_probe_slot(struct sdhci_pci_slot *slot)
95 ((0x21 << SDHCI_TIMEOUT_CLK_SHIFT)
96 & SDHCI_TIMEOUT_CLK_MASK) |
98 ((0x21 << SDHCI_CLOCK_BASE_SHIFT)
99 & SDHCI_CLOCK_BASE_MASK) |
101 SDHCI_TIMEOUT_CLK_UNIT |
107 static int ricoh_mmc_resume(struct sdhci_pci_chip *chip)
109 /* Apply a delay to allow controller to settle */
110 /* Otherwise it becomes confused if card state changed
116 static const struct sdhci_pci_fixes sdhci_ricoh = {
117 .probe = ricoh_probe,
118 .quirks = SDHCI_QUIRK_32BIT_DMA_ADDR |
119 SDHCI_QUIRK_FORCE_DMA |
120 SDHCI_QUIRK_CLOCK_BEFORE_RESET,
123 static const struct sdhci_pci_fixes sdhci_ricoh_mmc = {
124 .probe_slot = ricoh_mmc_probe_slot,
125 .resume = ricoh_mmc_resume,
126 .quirks = SDHCI_QUIRK_32BIT_DMA_ADDR |
127 SDHCI_QUIRK_CLOCK_BEFORE_RESET |
128 SDHCI_QUIRK_NO_CARD_NO_RESET |
129 SDHCI_QUIRK_MISSING_CAPS
132 static const struct sdhci_pci_fixes sdhci_ene_712 = {
133 .quirks = SDHCI_QUIRK_SINGLE_POWER_WRITE |
134 SDHCI_QUIRK_BROKEN_DMA,
137 static const struct sdhci_pci_fixes sdhci_ene_714 = {
138 .quirks = SDHCI_QUIRK_SINGLE_POWER_WRITE |
139 SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS |
140 SDHCI_QUIRK_BROKEN_DMA,
143 static const struct sdhci_pci_fixes sdhci_cafe = {
144 .quirks = SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER |
145 SDHCI_QUIRK_NO_BUSY_IRQ |
146 SDHCI_QUIRK_BROKEN_TIMEOUT_VAL,
149 static int mrst_hc_probe_slot(struct sdhci_pci_slot *slot)
151 slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA;
156 * ADMA operation is disabled for Moorestown platform due to
159 static int mrst_hc_probe(struct sdhci_pci_chip *chip)
162 * slots number is fixed here for MRST as SDIO3/5 are never used and
163 * have hardware bugs.
169 /* Medfield eMMC hardware reset GPIOs */
170 static int mfd_emmc0_rst_gpio = -EINVAL;
171 static int mfd_emmc1_rst_gpio = -EINVAL;
173 static int mfd_emmc_gpio_parse(struct sfi_table_header *table)
175 struct sfi_table_simple *sb = (struct sfi_table_simple *)table;
176 struct sfi_gpio_table_entry *entry;
179 num = SFI_GET_NUM_ENTRIES(sb, struct sfi_gpio_table_entry);
180 entry = (struct sfi_gpio_table_entry *)sb->pentry;
182 for (i = 0; i < num; i++, entry++) {
183 if (!strncmp(entry->pin_name, "emmc0_rst", SFI_NAME_LEN))
184 mfd_emmc0_rst_gpio = entry->pin_no;
185 else if (!strncmp(entry->pin_name, "emmc1_rst", SFI_NAME_LEN))
186 mfd_emmc1_rst_gpio = entry->pin_no;
192 static int mfd_emmc_probe_slot(struct sdhci_pci_slot *slot)
194 const char *name = NULL;
197 sfi_table_parse(SFI_SIG_GPIO, NULL, NULL, mfd_emmc_gpio_parse);
199 switch (slot->chip->pdev->device) {
200 case PCI_DEVICE_ID_INTEL_MFD_EMMC0:
201 gpio = mfd_emmc0_rst_gpio;
202 name = "eMMC0_reset";
204 case PCI_DEVICE_ID_INTEL_MFD_EMMC1:
205 gpio = mfd_emmc1_rst_gpio;
206 name = "eMMC1_reset";
210 if (!gpio_request(gpio, name)) {
211 gpio_direction_output(gpio, 1);
212 slot->rst_n_gpio = gpio;
213 slot->host->mmc->caps |= MMC_CAP_HW_RESET;
216 slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA;
218 slot->host->mmc->caps2 = MMC_CAP2_BOOTPART_NOACC;
223 static void mfd_emmc_remove_slot(struct sdhci_pci_slot *slot, int dead)
225 gpio_free(slot->rst_n_gpio);
228 static const struct sdhci_pci_fixes sdhci_intel_mrst_hc0 = {
229 .quirks = SDHCI_QUIRK_BROKEN_ADMA | SDHCI_QUIRK_NO_HISPD_BIT,
230 .probe_slot = mrst_hc_probe_slot,
233 static const struct sdhci_pci_fixes sdhci_intel_mrst_hc1_hc2 = {
234 .quirks = SDHCI_QUIRK_BROKEN_ADMA | SDHCI_QUIRK_NO_HISPD_BIT,
235 .probe = mrst_hc_probe,
238 static const struct sdhci_pci_fixes sdhci_intel_mfd_sd = {
239 .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
242 static const struct sdhci_pci_fixes sdhci_intel_mfd_sdio = {
243 .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
246 static const struct sdhci_pci_fixes sdhci_intel_mfd_emmc = {
247 .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
248 .probe_slot = mfd_emmc_probe_slot,
249 .remove_slot = mfd_emmc_remove_slot,
252 /* O2Micro extra registers */
253 #define O2_SD_LOCK_WP 0xD3
254 #define O2_SD_MULTI_VCC3V 0xEE
255 #define O2_SD_CLKREQ 0xEC
256 #define O2_SD_CAPS 0xE0
257 #define O2_SD_ADMA1 0xE2
258 #define O2_SD_ADMA2 0xE7
259 #define O2_SD_INF_MOD 0xF1
261 static int o2_probe(struct sdhci_pci_chip *chip)
266 switch (chip->pdev->device) {
267 case PCI_DEVICE_ID_O2_8220:
268 case PCI_DEVICE_ID_O2_8221:
269 case PCI_DEVICE_ID_O2_8320:
270 case PCI_DEVICE_ID_O2_8321:
271 /* This extra setup is required due to broken ADMA. */
272 ret = pci_read_config_byte(chip->pdev, O2_SD_LOCK_WP, &scratch);
276 pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch);
278 /* Set Multi 3 to VCC3V# */
279 pci_write_config_byte(chip->pdev, O2_SD_MULTI_VCC3V, 0x08);
281 /* Disable CLK_REQ# support after media DET */
282 ret = pci_read_config_byte(chip->pdev, O2_SD_CLKREQ, &scratch);
286 pci_write_config_byte(chip->pdev, O2_SD_CLKREQ, scratch);
288 /* Choose capabilities, enable SDMA. We have to write 0x01
289 * to the capabilities register first to unlock it.
291 ret = pci_read_config_byte(chip->pdev, O2_SD_CAPS, &scratch);
295 pci_write_config_byte(chip->pdev, O2_SD_CAPS, scratch);
296 pci_write_config_byte(chip->pdev, O2_SD_CAPS, 0x73);
298 /* Disable ADMA1/2 */
299 pci_write_config_byte(chip->pdev, O2_SD_ADMA1, 0x39);
300 pci_write_config_byte(chip->pdev, O2_SD_ADMA2, 0x08);
302 /* Disable the infinite transfer mode */
303 ret = pci_read_config_byte(chip->pdev, O2_SD_INF_MOD, &scratch);
307 pci_write_config_byte(chip->pdev, O2_SD_INF_MOD, scratch);
310 ret = pci_read_config_byte(chip->pdev, O2_SD_LOCK_WP, &scratch);
314 pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch);
320 static int jmicron_pmos(struct sdhci_pci_chip *chip, int on)
325 ret = pci_read_config_byte(chip->pdev, 0xAE, &scratch);
330 * Turn PMOS on [bit 0], set over current detection to 2.4 V
331 * [bit 1:2] and enable over current debouncing [bit 6].
338 ret = pci_write_config_byte(chip->pdev, 0xAE, scratch);
345 static int jmicron_probe(struct sdhci_pci_chip *chip)
350 if (chip->pdev->revision == 0) {
351 chip->quirks |= SDHCI_QUIRK_32BIT_DMA_ADDR |
352 SDHCI_QUIRK_32BIT_DMA_SIZE |
353 SDHCI_QUIRK_32BIT_ADMA_SIZE |
354 SDHCI_QUIRK_RESET_AFTER_REQUEST |
355 SDHCI_QUIRK_BROKEN_SMALL_PIO;
359 * JMicron chips can have two interfaces to the same hardware
360 * in order to work around limitations in Microsoft's driver.
361 * We need to make sure we only bind to one of them.
363 * This code assumes two things:
365 * 1. The PCI code adds subfunctions in order.
367 * 2. The MMC interface has a lower subfunction number
368 * than the SD interface.
370 if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_SD)
371 mmcdev = PCI_DEVICE_ID_JMICRON_JMB38X_MMC;
372 else if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_SD)
373 mmcdev = PCI_DEVICE_ID_JMICRON_JMB388_ESD;
376 struct pci_dev *sd_dev;
379 while ((sd_dev = pci_get_device(PCI_VENDOR_ID_JMICRON,
380 mmcdev, sd_dev)) != NULL) {
381 if ((PCI_SLOT(chip->pdev->devfn) ==
382 PCI_SLOT(sd_dev->devfn)) &&
383 (chip->pdev->bus == sd_dev->bus))
389 dev_info(&chip->pdev->dev, "Refusing to bind to "
390 "secondary interface.\n");
396 * JMicron chips need a bit of a nudge to enable the power
399 ret = jmicron_pmos(chip, 1);
401 dev_err(&chip->pdev->dev, "Failure enabling card power\n");
405 /* quirk for unsable RO-detection on JM388 chips */
406 if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_SD ||
407 chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD)
408 chip->quirks |= SDHCI_QUIRK_UNSTABLE_RO_DETECT;
413 static void jmicron_enable_mmc(struct sdhci_host *host, int on)
417 scratch = readb(host->ioaddr + 0xC0);
424 writeb(scratch, host->ioaddr + 0xC0);
427 static int jmicron_probe_slot(struct sdhci_pci_slot *slot)
429 if (slot->chip->pdev->revision == 0) {
432 version = readl(slot->host->ioaddr + SDHCI_HOST_VERSION);
433 version = (version & SDHCI_VENDOR_VER_MASK) >>
434 SDHCI_VENDOR_VER_SHIFT;
437 * Older versions of the chip have lots of nasty glitches
438 * in the ADMA engine. It's best just to avoid it
442 slot->host->quirks |= SDHCI_QUIRK_BROKEN_ADMA;
445 /* JM388 MMC doesn't support 1.8V while SD supports it */
446 if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD) {
447 slot->host->ocr_avail_sd = MMC_VDD_32_33 | MMC_VDD_33_34 |
448 MMC_VDD_29_30 | MMC_VDD_30_31 |
449 MMC_VDD_165_195; /* allow 1.8V */
450 slot->host->ocr_avail_mmc = MMC_VDD_32_33 | MMC_VDD_33_34 |
451 MMC_VDD_29_30 | MMC_VDD_30_31; /* no 1.8V for MMC */
455 * The secondary interface requires a bit set to get the
458 if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC ||
459 slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD)
460 jmicron_enable_mmc(slot->host, 1);
462 slot->host->mmc->caps |= MMC_CAP_BUS_WIDTH_TEST;
467 static void jmicron_remove_slot(struct sdhci_pci_slot *slot, int dead)
472 if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC ||
473 slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD)
474 jmicron_enable_mmc(slot->host, 0);
477 static int jmicron_suspend(struct sdhci_pci_chip *chip, pm_message_t state)
481 if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC ||
482 chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD) {
483 for (i = 0; i < chip->num_slots; i++)
484 jmicron_enable_mmc(chip->slots[i]->host, 0);
490 static int jmicron_resume(struct sdhci_pci_chip *chip)
494 if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC ||
495 chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD) {
496 for (i = 0; i < chip->num_slots; i++)
497 jmicron_enable_mmc(chip->slots[i]->host, 1);
500 ret = jmicron_pmos(chip, 1);
502 dev_err(&chip->pdev->dev, "Failure enabling card power\n");
509 static const struct sdhci_pci_fixes sdhci_o2 = {
513 static const struct sdhci_pci_fixes sdhci_jmicron = {
514 .probe = jmicron_probe,
516 .probe_slot = jmicron_probe_slot,
517 .remove_slot = jmicron_remove_slot,
519 .suspend = jmicron_suspend,
520 .resume = jmicron_resume,
523 /* SysKonnect CardBus2SDIO extra registers */
524 #define SYSKT_CTRL 0x200
525 #define SYSKT_RDFIFO_STAT 0x204
526 #define SYSKT_WRFIFO_STAT 0x208
527 #define SYSKT_POWER_DATA 0x20c
528 #define SYSKT_POWER_330 0xef
529 #define SYSKT_POWER_300 0xf8
530 #define SYSKT_POWER_184 0xcc
531 #define SYSKT_POWER_CMD 0x20d
532 #define SYSKT_POWER_START (1 << 7)
533 #define SYSKT_POWER_STATUS 0x20e
534 #define SYSKT_POWER_STATUS_OK (1 << 0)
535 #define SYSKT_BOARD_REV 0x210
536 #define SYSKT_CHIP_REV 0x211
537 #define SYSKT_CONF_DATA 0x212
538 #define SYSKT_CONF_DATA_1V8 (1 << 2)
539 #define SYSKT_CONF_DATA_2V5 (1 << 1)
540 #define SYSKT_CONF_DATA_3V3 (1 << 0)
542 static int syskt_probe(struct sdhci_pci_chip *chip)
544 if ((chip->pdev->class & 0x0000FF) == PCI_SDHCI_IFVENDOR) {
545 chip->pdev->class &= ~0x0000FF;
546 chip->pdev->class |= PCI_SDHCI_IFDMA;
551 static int syskt_probe_slot(struct sdhci_pci_slot *slot)
555 u8 board_rev = readb(slot->host->ioaddr + SYSKT_BOARD_REV);
556 u8 chip_rev = readb(slot->host->ioaddr + SYSKT_CHIP_REV);
557 dev_info(&slot->chip->pdev->dev, "SysKonnect CardBus2SDIO, "
558 "board rev %d.%d, chip rev %d.%d\n",
559 board_rev >> 4, board_rev & 0xf,
560 chip_rev >> 4, chip_rev & 0xf);
561 if (chip_rev >= 0x20)
562 slot->host->quirks |= SDHCI_QUIRK_FORCE_DMA;
564 writeb(SYSKT_POWER_330, slot->host->ioaddr + SYSKT_POWER_DATA);
565 writeb(SYSKT_POWER_START, slot->host->ioaddr + SYSKT_POWER_CMD);
567 tm = 10; /* Wait max 1 ms */
569 ps = readw(slot->host->ioaddr + SYSKT_POWER_STATUS);
570 if (ps & SYSKT_POWER_STATUS_OK)
575 dev_err(&slot->chip->pdev->dev,
576 "power regulator never stabilized");
577 writeb(0, slot->host->ioaddr + SYSKT_POWER_CMD);
584 static const struct sdhci_pci_fixes sdhci_syskt = {
585 .quirks = SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER,
586 .probe = syskt_probe,
587 .probe_slot = syskt_probe_slot,
590 static int via_probe(struct sdhci_pci_chip *chip)
592 if (chip->pdev->revision == 0x10)
593 chip->quirks |= SDHCI_QUIRK_DELAY_AFTER_POWER;
598 static const struct sdhci_pci_fixes sdhci_via = {
602 static const struct pci_device_id pci_ids[] __devinitdata = {
604 .vendor = PCI_VENDOR_ID_RICOH,
605 .device = PCI_DEVICE_ID_RICOH_R5C822,
606 .subvendor = PCI_ANY_ID,
607 .subdevice = PCI_ANY_ID,
608 .driver_data = (kernel_ulong_t)&sdhci_ricoh,
612 .vendor = PCI_VENDOR_ID_RICOH,
614 .subvendor = PCI_ANY_ID,
615 .subdevice = PCI_ANY_ID,
616 .driver_data = (kernel_ulong_t)&sdhci_ricoh_mmc,
620 .vendor = PCI_VENDOR_ID_RICOH,
622 .subvendor = PCI_ANY_ID,
623 .subdevice = PCI_ANY_ID,
624 .driver_data = (kernel_ulong_t)&sdhci_ricoh_mmc,
628 .vendor = PCI_VENDOR_ID_RICOH,
630 .subvendor = PCI_ANY_ID,
631 .subdevice = PCI_ANY_ID,
632 .driver_data = (kernel_ulong_t)&sdhci_ricoh_mmc,
636 .vendor = PCI_VENDOR_ID_ENE,
637 .device = PCI_DEVICE_ID_ENE_CB712_SD,
638 .subvendor = PCI_ANY_ID,
639 .subdevice = PCI_ANY_ID,
640 .driver_data = (kernel_ulong_t)&sdhci_ene_712,
644 .vendor = PCI_VENDOR_ID_ENE,
645 .device = PCI_DEVICE_ID_ENE_CB712_SD_2,
646 .subvendor = PCI_ANY_ID,
647 .subdevice = PCI_ANY_ID,
648 .driver_data = (kernel_ulong_t)&sdhci_ene_712,
652 .vendor = PCI_VENDOR_ID_ENE,
653 .device = PCI_DEVICE_ID_ENE_CB714_SD,
654 .subvendor = PCI_ANY_ID,
655 .subdevice = PCI_ANY_ID,
656 .driver_data = (kernel_ulong_t)&sdhci_ene_714,
660 .vendor = PCI_VENDOR_ID_ENE,
661 .device = PCI_DEVICE_ID_ENE_CB714_SD_2,
662 .subvendor = PCI_ANY_ID,
663 .subdevice = PCI_ANY_ID,
664 .driver_data = (kernel_ulong_t)&sdhci_ene_714,
668 .vendor = PCI_VENDOR_ID_MARVELL,
669 .device = PCI_DEVICE_ID_MARVELL_88ALP01_SD,
670 .subvendor = PCI_ANY_ID,
671 .subdevice = PCI_ANY_ID,
672 .driver_data = (kernel_ulong_t)&sdhci_cafe,
676 .vendor = PCI_VENDOR_ID_JMICRON,
677 .device = PCI_DEVICE_ID_JMICRON_JMB38X_SD,
678 .subvendor = PCI_ANY_ID,
679 .subdevice = PCI_ANY_ID,
680 .driver_data = (kernel_ulong_t)&sdhci_jmicron,
684 .vendor = PCI_VENDOR_ID_JMICRON,
685 .device = PCI_DEVICE_ID_JMICRON_JMB38X_MMC,
686 .subvendor = PCI_ANY_ID,
687 .subdevice = PCI_ANY_ID,
688 .driver_data = (kernel_ulong_t)&sdhci_jmicron,
692 .vendor = PCI_VENDOR_ID_JMICRON,
693 .device = PCI_DEVICE_ID_JMICRON_JMB388_SD,
694 .subvendor = PCI_ANY_ID,
695 .subdevice = PCI_ANY_ID,
696 .driver_data = (kernel_ulong_t)&sdhci_jmicron,
700 .vendor = PCI_VENDOR_ID_JMICRON,
701 .device = PCI_DEVICE_ID_JMICRON_JMB388_ESD,
702 .subvendor = PCI_ANY_ID,
703 .subdevice = PCI_ANY_ID,
704 .driver_data = (kernel_ulong_t)&sdhci_jmicron,
708 .vendor = PCI_VENDOR_ID_SYSKONNECT,
710 .subvendor = PCI_ANY_ID,
711 .subdevice = PCI_ANY_ID,
712 .driver_data = (kernel_ulong_t)&sdhci_syskt,
716 .vendor = PCI_VENDOR_ID_VIA,
718 .subvendor = PCI_ANY_ID,
719 .subdevice = PCI_ANY_ID,
720 .driver_data = (kernel_ulong_t)&sdhci_via,
724 .vendor = PCI_VENDOR_ID_INTEL,
725 .device = PCI_DEVICE_ID_INTEL_MRST_SD0,
726 .subvendor = PCI_ANY_ID,
727 .subdevice = PCI_ANY_ID,
728 .driver_data = (kernel_ulong_t)&sdhci_intel_mrst_hc0,
732 .vendor = PCI_VENDOR_ID_INTEL,
733 .device = PCI_DEVICE_ID_INTEL_MRST_SD1,
734 .subvendor = PCI_ANY_ID,
735 .subdevice = PCI_ANY_ID,
736 .driver_data = (kernel_ulong_t)&sdhci_intel_mrst_hc1_hc2,
740 .vendor = PCI_VENDOR_ID_INTEL,
741 .device = PCI_DEVICE_ID_INTEL_MRST_SD2,
742 .subvendor = PCI_ANY_ID,
743 .subdevice = PCI_ANY_ID,
744 .driver_data = (kernel_ulong_t)&sdhci_intel_mrst_hc1_hc2,
748 .vendor = PCI_VENDOR_ID_INTEL,
749 .device = PCI_DEVICE_ID_INTEL_MFD_SD,
750 .subvendor = PCI_ANY_ID,
751 .subdevice = PCI_ANY_ID,
752 .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_sd,
756 .vendor = PCI_VENDOR_ID_INTEL,
757 .device = PCI_DEVICE_ID_INTEL_MFD_SDIO1,
758 .subvendor = PCI_ANY_ID,
759 .subdevice = PCI_ANY_ID,
760 .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_sdio,
764 .vendor = PCI_VENDOR_ID_INTEL,
765 .device = PCI_DEVICE_ID_INTEL_MFD_SDIO2,
766 .subvendor = PCI_ANY_ID,
767 .subdevice = PCI_ANY_ID,
768 .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_sdio,
772 .vendor = PCI_VENDOR_ID_INTEL,
773 .device = PCI_DEVICE_ID_INTEL_MFD_EMMC0,
774 .subvendor = PCI_ANY_ID,
775 .subdevice = PCI_ANY_ID,
776 .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_emmc,
780 .vendor = PCI_VENDOR_ID_INTEL,
781 .device = PCI_DEVICE_ID_INTEL_MFD_EMMC1,
782 .subvendor = PCI_ANY_ID,
783 .subdevice = PCI_ANY_ID,
784 .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_emmc,
788 .vendor = PCI_VENDOR_ID_O2,
789 .device = PCI_DEVICE_ID_O2_8120,
790 .subvendor = PCI_ANY_ID,
791 .subdevice = PCI_ANY_ID,
792 .driver_data = (kernel_ulong_t)&sdhci_o2,
796 .vendor = PCI_VENDOR_ID_O2,
797 .device = PCI_DEVICE_ID_O2_8220,
798 .subvendor = PCI_ANY_ID,
799 .subdevice = PCI_ANY_ID,
800 .driver_data = (kernel_ulong_t)&sdhci_o2,
804 .vendor = PCI_VENDOR_ID_O2,
805 .device = PCI_DEVICE_ID_O2_8221,
806 .subvendor = PCI_ANY_ID,
807 .subdevice = PCI_ANY_ID,
808 .driver_data = (kernel_ulong_t)&sdhci_o2,
812 .vendor = PCI_VENDOR_ID_O2,
813 .device = PCI_DEVICE_ID_O2_8320,
814 .subvendor = PCI_ANY_ID,
815 .subdevice = PCI_ANY_ID,
816 .driver_data = (kernel_ulong_t)&sdhci_o2,
820 .vendor = PCI_VENDOR_ID_O2,
821 .device = PCI_DEVICE_ID_O2_8321,
822 .subvendor = PCI_ANY_ID,
823 .subdevice = PCI_ANY_ID,
824 .driver_data = (kernel_ulong_t)&sdhci_o2,
827 { /* Generic SD host controller */
828 PCI_DEVICE_CLASS((PCI_CLASS_SYSTEM_SDHCI << 8), 0xFFFF00)
831 { /* end: all zeroes */ },
834 MODULE_DEVICE_TABLE(pci, pci_ids);
836 /*****************************************************************************\
838 * SDHCI core callbacks *
840 \*****************************************************************************/
842 static int sdhci_pci_enable_dma(struct sdhci_host *host)
844 struct sdhci_pci_slot *slot;
845 struct pci_dev *pdev;
848 slot = sdhci_priv(host);
849 pdev = slot->chip->pdev;
851 if (((pdev->class & 0xFFFF00) == (PCI_CLASS_SYSTEM_SDHCI << 8)) &&
852 ((pdev->class & 0x0000FF) != PCI_SDHCI_IFDMA) &&
853 (host->flags & SDHCI_USE_SDMA)) {
854 dev_warn(&pdev->dev, "Will use DMA mode even though HW "
855 "doesn't fully claim to support it.\n");
858 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
862 pci_set_master(pdev);
867 static int sdhci_pci_8bit_width(struct sdhci_host *host, int width)
871 ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
874 case MMC_BUS_WIDTH_8:
875 ctrl |= SDHCI_CTRL_8BITBUS;
876 ctrl &= ~SDHCI_CTRL_4BITBUS;
878 case MMC_BUS_WIDTH_4:
879 ctrl |= SDHCI_CTRL_4BITBUS;
880 ctrl &= ~SDHCI_CTRL_8BITBUS;
883 ctrl &= ~(SDHCI_CTRL_8BITBUS | SDHCI_CTRL_4BITBUS);
887 sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
892 static void sdhci_pci_hw_reset(struct sdhci_host *host)
894 struct sdhci_pci_slot *slot = sdhci_priv(host);
895 int rst_n_gpio = slot->rst_n_gpio;
897 if (!gpio_is_valid(rst_n_gpio))
899 gpio_set_value_cansleep(rst_n_gpio, 0);
900 /* For eMMC, minimum is 1us but give it 10us for good measure */
902 gpio_set_value_cansleep(rst_n_gpio, 1);
903 /* For eMMC, minimum is 200us but give it 300us for good measure */
904 usleep_range(300, 1000);
907 static struct sdhci_ops sdhci_pci_ops = {
908 .enable_dma = sdhci_pci_enable_dma,
909 .platform_8bit_width = sdhci_pci_8bit_width,
910 .hw_reset = sdhci_pci_hw_reset,
913 /*****************************************************************************\
917 \*****************************************************************************/
921 static int sdhci_pci_suspend(struct pci_dev *pdev, pm_message_t state)
923 struct sdhci_pci_chip *chip;
924 struct sdhci_pci_slot *slot;
925 mmc_pm_flag_t slot_pm_flags;
926 mmc_pm_flag_t pm_flags = 0;
929 chip = pci_get_drvdata(pdev);
933 for (i = 0; i < chip->num_slots; i++) {
934 slot = chip->slots[i];
938 ret = sdhci_suspend_host(slot->host, state);
941 for (i--; i >= 0; i--)
942 sdhci_resume_host(chip->slots[i]->host);
946 slot_pm_flags = slot->host->mmc->pm_flags;
947 if (slot_pm_flags & MMC_PM_WAKE_SDIO_IRQ)
948 sdhci_enable_irq_wakeups(slot->host);
950 pm_flags |= slot_pm_flags;
953 if (chip->fixes && chip->fixes->suspend) {
954 ret = chip->fixes->suspend(chip, state);
956 for (i = chip->num_slots - 1; i >= 0; i--)
957 sdhci_resume_host(chip->slots[i]->host);
962 pci_save_state(pdev);
963 if (pm_flags & MMC_PM_KEEP_POWER) {
964 if (pm_flags & MMC_PM_WAKE_SDIO_IRQ) {
965 pci_pme_active(pdev, true);
966 pci_enable_wake(pdev, PCI_D3hot, 1);
968 pci_set_power_state(pdev, PCI_D3hot);
970 pci_enable_wake(pdev, pci_choose_state(pdev, state), 0);
971 pci_disable_device(pdev);
972 pci_set_power_state(pdev, pci_choose_state(pdev, state));
978 static int sdhci_pci_resume(struct pci_dev *pdev)
980 struct sdhci_pci_chip *chip;
981 struct sdhci_pci_slot *slot;
984 chip = pci_get_drvdata(pdev);
988 pci_set_power_state(pdev, PCI_D0);
989 pci_restore_state(pdev);
990 ret = pci_enable_device(pdev);
994 if (chip->fixes && chip->fixes->resume) {
995 ret = chip->fixes->resume(chip);
1000 for (i = 0; i < chip->num_slots; i++) {
1001 slot = chip->slots[i];
1005 ret = sdhci_resume_host(slot->host);
1013 #else /* CONFIG_PM */
1015 #define sdhci_pci_suspend NULL
1016 #define sdhci_pci_resume NULL
1018 #endif /* CONFIG_PM */
1020 /*****************************************************************************\
1022 * Device probing/removal *
1024 \*****************************************************************************/
1026 static struct sdhci_pci_slot * __devinit sdhci_pci_probe_slot(
1027 struct pci_dev *pdev, struct sdhci_pci_chip *chip, int bar)
1029 struct sdhci_pci_slot *slot;
1030 struct sdhci_host *host;
1033 if (!(pci_resource_flags(pdev, bar) & IORESOURCE_MEM)) {
1034 dev_err(&pdev->dev, "BAR %d is not iomem. Aborting.\n", bar);
1035 return ERR_PTR(-ENODEV);
1038 if (pci_resource_len(pdev, bar) != 0x100) {
1039 dev_err(&pdev->dev, "Invalid iomem size. You may "
1040 "experience problems.\n");
1043 if ((pdev->class & 0x0000FF) == PCI_SDHCI_IFVENDOR) {
1044 dev_err(&pdev->dev, "Vendor specific interface. Aborting.\n");
1045 return ERR_PTR(-ENODEV);
1048 if ((pdev->class & 0x0000FF) > PCI_SDHCI_IFVENDOR) {
1049 dev_err(&pdev->dev, "Unknown interface. Aborting.\n");
1050 return ERR_PTR(-ENODEV);
1053 host = sdhci_alloc_host(&pdev->dev, sizeof(struct sdhci_pci_slot));
1055 dev_err(&pdev->dev, "cannot allocate host\n");
1056 return ERR_CAST(host);
1059 slot = sdhci_priv(host);
1063 slot->pci_bar = bar;
1064 slot->rst_n_gpio = -EINVAL;
1066 host->hw_name = "PCI";
1067 host->ops = &sdhci_pci_ops;
1068 host->quirks = chip->quirks;
1070 host->irq = pdev->irq;
1072 ret = pci_request_region(pdev, bar, mmc_hostname(host->mmc));
1074 dev_err(&pdev->dev, "cannot request region\n");
1078 host->ioaddr = pci_ioremap_bar(pdev, bar);
1079 if (!host->ioaddr) {
1080 dev_err(&pdev->dev, "failed to remap registers\n");
1085 if (chip->fixes && chip->fixes->probe_slot) {
1086 ret = chip->fixes->probe_slot(slot);
1091 host->mmc->pm_caps = MMC_PM_KEEP_POWER | MMC_PM_WAKE_SDIO_IRQ;
1093 ret = sdhci_add_host(host);
1100 if (chip->fixes && chip->fixes->remove_slot)
1101 chip->fixes->remove_slot(slot, 0);
1104 iounmap(host->ioaddr);
1107 pci_release_region(pdev, bar);
1110 sdhci_free_host(host);
1112 return ERR_PTR(ret);
1115 static void sdhci_pci_remove_slot(struct sdhci_pci_slot *slot)
1121 scratch = readl(slot->host->ioaddr + SDHCI_INT_STATUS);
1122 if (scratch == (u32)-1)
1125 sdhci_remove_host(slot->host, dead);
1127 if (slot->chip->fixes && slot->chip->fixes->remove_slot)
1128 slot->chip->fixes->remove_slot(slot, dead);
1130 pci_release_region(slot->chip->pdev, slot->pci_bar);
1132 sdhci_free_host(slot->host);
1135 static int __devinit sdhci_pci_probe(struct pci_dev *pdev,
1136 const struct pci_device_id *ent)
1138 struct sdhci_pci_chip *chip;
1139 struct sdhci_pci_slot *slot;
1141 u8 slots, first_bar;
1144 BUG_ON(pdev == NULL);
1145 BUG_ON(ent == NULL);
1147 dev_info(&pdev->dev, "SDHCI controller found [%04x:%04x] (rev %x)\n",
1148 (int)pdev->vendor, (int)pdev->device, (int)pdev->revision);
1150 ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &slots);
1154 slots = PCI_SLOT_INFO_SLOTS(slots) + 1;
1155 dev_dbg(&pdev->dev, "found %d slot(s)\n", slots);
1159 BUG_ON(slots > MAX_SLOTS);
1161 ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &first_bar);
1165 first_bar &= PCI_SLOT_INFO_FIRST_BAR_MASK;
1167 if (first_bar > 5) {
1168 dev_err(&pdev->dev, "Invalid first BAR. Aborting.\n");
1172 ret = pci_enable_device(pdev);
1176 chip = kzalloc(sizeof(struct sdhci_pci_chip), GFP_KERNEL);
1183 chip->fixes = (const struct sdhci_pci_fixes *)ent->driver_data;
1185 chip->quirks = chip->fixes->quirks;
1186 chip->num_slots = slots;
1188 pci_set_drvdata(pdev, chip);
1190 if (chip->fixes && chip->fixes->probe) {
1191 ret = chip->fixes->probe(chip);
1196 slots = chip->num_slots; /* Quirk may have changed this */
1198 for (i = 0; i < slots; i++) {
1199 slot = sdhci_pci_probe_slot(pdev, chip, first_bar + i);
1201 for (i--; i >= 0; i--)
1202 sdhci_pci_remove_slot(chip->slots[i]);
1203 ret = PTR_ERR(slot);
1207 chip->slots[i] = slot;
1213 pci_set_drvdata(pdev, NULL);
1217 pci_disable_device(pdev);
1221 static void __devexit sdhci_pci_remove(struct pci_dev *pdev)
1224 struct sdhci_pci_chip *chip;
1226 chip = pci_get_drvdata(pdev);
1229 for (i = 0; i < chip->num_slots; i++)
1230 sdhci_pci_remove_slot(chip->slots[i]);
1232 pci_set_drvdata(pdev, NULL);
1236 pci_disable_device(pdev);
1239 static struct pci_driver sdhci_driver = {
1240 .name = "sdhci-pci",
1241 .id_table = pci_ids,
1242 .probe = sdhci_pci_probe,
1243 .remove = __devexit_p(sdhci_pci_remove),
1244 .suspend = sdhci_pci_suspend,
1245 .resume = sdhci_pci_resume,
1248 /*****************************************************************************\
1250 * Driver init/exit *
1252 \*****************************************************************************/
1254 static int __init sdhci_drv_init(void)
1256 return pci_register_driver(&sdhci_driver);
1259 static void __exit sdhci_drv_exit(void)
1261 pci_unregister_driver(&sdhci_driver);
1264 module_init(sdhci_drv_init);
1265 module_exit(sdhci_drv_exit);
1267 MODULE_AUTHOR("Pierre Ossman <pierre@ossman.eu>");
1268 MODULE_DESCRIPTION("Secure Digital Host Controller Interface PCI driver");
1269 MODULE_LICENSE("GPL");