1 /* linux/drivers/mmc/host/sdhci-pci.c - SDHCI on PCI bus interface
3 * Copyright (C) 2005-2008 Pierre Ossman, All Rights Reserved.
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or (at
8 * your option) any later version.
10 * Thanks to the following companies for their support:
12 * - JMicron (hardware and technical support)
15 #include <linux/delay.h>
16 #include <linux/highmem.h>
17 #include <linux/pci.h>
18 #include <linux/dma-mapping.h>
19 #include <linux/slab.h>
20 #include <linux/device.h>
21 #include <linux/mmc/host.h>
22 #include <linux/scatterlist.h>
24 #include <linux/gpio.h>
25 #include <linux/sfi.h>
33 #define PCI_SDHCI_IFPIO 0x00
34 #define PCI_SDHCI_IFDMA 0x01
35 #define PCI_SDHCI_IFVENDOR 0x02
37 #define PCI_SLOT_INFO 0x40 /* 8 bits */
38 #define PCI_SLOT_INFO_SLOTS(x) ((x >> 4) & 7)
39 #define PCI_SLOT_INFO_FIRST_BAR_MASK 0x07
43 struct sdhci_pci_chip;
44 struct sdhci_pci_slot;
46 struct sdhci_pci_fixes {
49 int (*probe) (struct sdhci_pci_chip *);
51 int (*probe_slot) (struct sdhci_pci_slot *);
52 void (*remove_slot) (struct sdhci_pci_slot *, int);
54 int (*suspend) (struct sdhci_pci_chip *,
56 int (*resume) (struct sdhci_pci_chip *);
59 struct sdhci_pci_slot {
60 struct sdhci_pci_chip *chip;
61 struct sdhci_host *host;
67 struct sdhci_pci_chip {
71 const struct sdhci_pci_fixes *fixes;
73 int num_slots; /* Slots on controller */
74 struct sdhci_pci_slot *slots[MAX_SLOTS]; /* Pointers to host slots */
78 /*****************************************************************************\
80 * Hardware specific quirk handling *
82 \*****************************************************************************/
84 static int ricoh_probe(struct sdhci_pci_chip *chip)
86 if (chip->pdev->subsystem_vendor == PCI_VENDOR_ID_SAMSUNG ||
87 chip->pdev->subsystem_vendor == PCI_VENDOR_ID_SONY)
88 chip->quirks |= SDHCI_QUIRK_NO_CARD_NO_RESET;
92 static int ricoh_mmc_probe_slot(struct sdhci_pci_slot *slot)
95 ((0x21 << SDHCI_TIMEOUT_CLK_SHIFT)
96 & SDHCI_TIMEOUT_CLK_MASK) |
98 ((0x21 << SDHCI_CLOCK_BASE_SHIFT)
99 & SDHCI_CLOCK_BASE_MASK) |
101 SDHCI_TIMEOUT_CLK_UNIT |
107 static int ricoh_mmc_resume(struct sdhci_pci_chip *chip)
109 /* Apply a delay to allow controller to settle */
110 /* Otherwise it becomes confused if card state changed
116 static const struct sdhci_pci_fixes sdhci_ricoh = {
117 .probe = ricoh_probe,
118 .quirks = SDHCI_QUIRK_32BIT_DMA_ADDR |
119 SDHCI_QUIRK_FORCE_DMA |
120 SDHCI_QUIRK_CLOCK_BEFORE_RESET,
123 static const struct sdhci_pci_fixes sdhci_ricoh_mmc = {
124 .probe_slot = ricoh_mmc_probe_slot,
125 .resume = ricoh_mmc_resume,
126 .quirks = SDHCI_QUIRK_32BIT_DMA_ADDR |
127 SDHCI_QUIRK_CLOCK_BEFORE_RESET |
128 SDHCI_QUIRK_NO_CARD_NO_RESET |
129 SDHCI_QUIRK_MISSING_CAPS
132 static const struct sdhci_pci_fixes sdhci_ene_712 = {
133 .quirks = SDHCI_QUIRK_SINGLE_POWER_WRITE |
134 SDHCI_QUIRK_BROKEN_DMA,
137 static const struct sdhci_pci_fixes sdhci_ene_714 = {
138 .quirks = SDHCI_QUIRK_SINGLE_POWER_WRITE |
139 SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS |
140 SDHCI_QUIRK_BROKEN_DMA,
143 static const struct sdhci_pci_fixes sdhci_cafe = {
144 .quirks = SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER |
145 SDHCI_QUIRK_NO_BUSY_IRQ |
146 SDHCI_QUIRK_BROKEN_TIMEOUT_VAL,
149 static int mrst_hc_probe_slot(struct sdhci_pci_slot *slot)
151 slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA;
156 * ADMA operation is disabled for Moorestown platform due to
159 static int mrst_hc_probe(struct sdhci_pci_chip *chip)
162 * slots number is fixed here for MRST as SDIO3/5 are never used and
163 * have hardware bugs.
169 /* Medfield eMMC hardware reset GPIOs */
170 static int mfd_emmc0_rst_gpio = -EINVAL;
171 static int mfd_emmc1_rst_gpio = -EINVAL;
173 static int mfd_emmc_gpio_parse(struct sfi_table_header *table)
175 struct sfi_table_simple *sb = (struct sfi_table_simple *)table;
176 struct sfi_gpio_table_entry *entry;
179 num = SFI_GET_NUM_ENTRIES(sb, struct sfi_gpio_table_entry);
180 entry = (struct sfi_gpio_table_entry *)sb->pentry;
182 for (i = 0; i < num; i++, entry++) {
183 if (!strncmp(entry->pin_name, "emmc0_rst", SFI_NAME_LEN))
184 mfd_emmc0_rst_gpio = entry->pin_no;
185 else if (!strncmp(entry->pin_name, "emmc1_rst", SFI_NAME_LEN))
186 mfd_emmc1_rst_gpio = entry->pin_no;
192 static int mfd_emmc_probe_slot(struct sdhci_pci_slot *slot)
194 const char *name = NULL;
197 sfi_table_parse(SFI_SIG_GPIO, NULL, NULL, mfd_emmc_gpio_parse);
199 switch (slot->chip->pdev->device) {
200 case PCI_DEVICE_ID_INTEL_MFD_EMMC0:
201 gpio = mfd_emmc0_rst_gpio;
202 name = "eMMC0_reset";
204 case PCI_DEVICE_ID_INTEL_MFD_EMMC1:
205 gpio = mfd_emmc1_rst_gpio;
206 name = "eMMC1_reset";
210 if (!gpio_request(gpio, name)) {
211 gpio_direction_output(gpio, 1);
212 slot->rst_n_gpio = gpio;
213 slot->host->mmc->caps |= MMC_CAP_HW_RESET;
216 slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA;
221 static void mfd_emmc_remove_slot(struct sdhci_pci_slot *slot, int dead)
223 gpio_free(slot->rst_n_gpio);
226 static const struct sdhci_pci_fixes sdhci_intel_mrst_hc0 = {
227 .quirks = SDHCI_QUIRK_BROKEN_ADMA | SDHCI_QUIRK_NO_HISPD_BIT,
228 .probe_slot = mrst_hc_probe_slot,
231 static const struct sdhci_pci_fixes sdhci_intel_mrst_hc1_hc2 = {
232 .quirks = SDHCI_QUIRK_BROKEN_ADMA | SDHCI_QUIRK_NO_HISPD_BIT,
233 .probe = mrst_hc_probe,
236 static const struct sdhci_pci_fixes sdhci_intel_mfd_sd = {
237 .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
240 static const struct sdhci_pci_fixes sdhci_intel_mfd_sdio = {
241 .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
244 static const struct sdhci_pci_fixes sdhci_intel_mfd_emmc = {
245 .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
246 .probe_slot = mfd_emmc_probe_slot,
247 .remove_slot = mfd_emmc_remove_slot,
250 /* O2Micro extra registers */
251 #define O2_SD_LOCK_WP 0xD3
252 #define O2_SD_MULTI_VCC3V 0xEE
253 #define O2_SD_CLKREQ 0xEC
254 #define O2_SD_CAPS 0xE0
255 #define O2_SD_ADMA1 0xE2
256 #define O2_SD_ADMA2 0xE7
257 #define O2_SD_INF_MOD 0xF1
259 static int o2_probe(struct sdhci_pci_chip *chip)
264 switch (chip->pdev->device) {
265 case PCI_DEVICE_ID_O2_8220:
266 case PCI_DEVICE_ID_O2_8221:
267 case PCI_DEVICE_ID_O2_8320:
268 case PCI_DEVICE_ID_O2_8321:
269 /* This extra setup is required due to broken ADMA. */
270 ret = pci_read_config_byte(chip->pdev, O2_SD_LOCK_WP, &scratch);
274 pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch);
276 /* Set Multi 3 to VCC3V# */
277 pci_write_config_byte(chip->pdev, O2_SD_MULTI_VCC3V, 0x08);
279 /* Disable CLK_REQ# support after media DET */
280 ret = pci_read_config_byte(chip->pdev, O2_SD_CLKREQ, &scratch);
284 pci_write_config_byte(chip->pdev, O2_SD_CLKREQ, scratch);
286 /* Choose capabilities, enable SDMA. We have to write 0x01
287 * to the capabilities register first to unlock it.
289 ret = pci_read_config_byte(chip->pdev, O2_SD_CAPS, &scratch);
293 pci_write_config_byte(chip->pdev, O2_SD_CAPS, scratch);
294 pci_write_config_byte(chip->pdev, O2_SD_CAPS, 0x73);
296 /* Disable ADMA1/2 */
297 pci_write_config_byte(chip->pdev, O2_SD_ADMA1, 0x39);
298 pci_write_config_byte(chip->pdev, O2_SD_ADMA2, 0x08);
300 /* Disable the infinite transfer mode */
301 ret = pci_read_config_byte(chip->pdev, O2_SD_INF_MOD, &scratch);
305 pci_write_config_byte(chip->pdev, O2_SD_INF_MOD, scratch);
308 ret = pci_read_config_byte(chip->pdev, O2_SD_LOCK_WP, &scratch);
312 pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch);
318 static int jmicron_pmos(struct sdhci_pci_chip *chip, int on)
323 ret = pci_read_config_byte(chip->pdev, 0xAE, &scratch);
328 * Turn PMOS on [bit 0], set over current detection to 2.4 V
329 * [bit 1:2] and enable over current debouncing [bit 6].
336 ret = pci_write_config_byte(chip->pdev, 0xAE, scratch);
343 static int jmicron_probe(struct sdhci_pci_chip *chip)
348 if (chip->pdev->revision == 0) {
349 chip->quirks |= SDHCI_QUIRK_32BIT_DMA_ADDR |
350 SDHCI_QUIRK_32BIT_DMA_SIZE |
351 SDHCI_QUIRK_32BIT_ADMA_SIZE |
352 SDHCI_QUIRK_RESET_AFTER_REQUEST |
353 SDHCI_QUIRK_BROKEN_SMALL_PIO;
357 * JMicron chips can have two interfaces to the same hardware
358 * in order to work around limitations in Microsoft's driver.
359 * We need to make sure we only bind to one of them.
361 * This code assumes two things:
363 * 1. The PCI code adds subfunctions in order.
365 * 2. The MMC interface has a lower subfunction number
366 * than the SD interface.
368 if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_SD)
369 mmcdev = PCI_DEVICE_ID_JMICRON_JMB38X_MMC;
370 else if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_SD)
371 mmcdev = PCI_DEVICE_ID_JMICRON_JMB388_ESD;
374 struct pci_dev *sd_dev;
377 while ((sd_dev = pci_get_device(PCI_VENDOR_ID_JMICRON,
378 mmcdev, sd_dev)) != NULL) {
379 if ((PCI_SLOT(chip->pdev->devfn) ==
380 PCI_SLOT(sd_dev->devfn)) &&
381 (chip->pdev->bus == sd_dev->bus))
387 dev_info(&chip->pdev->dev, "Refusing to bind to "
388 "secondary interface.\n");
394 * JMicron chips need a bit of a nudge to enable the power
397 ret = jmicron_pmos(chip, 1);
399 dev_err(&chip->pdev->dev, "Failure enabling card power\n");
403 /* quirk for unsable RO-detection on JM388 chips */
404 if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_SD ||
405 chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD)
406 chip->quirks |= SDHCI_QUIRK_UNSTABLE_RO_DETECT;
411 static void jmicron_enable_mmc(struct sdhci_host *host, int on)
415 scratch = readb(host->ioaddr + 0xC0);
422 writeb(scratch, host->ioaddr + 0xC0);
425 static int jmicron_probe_slot(struct sdhci_pci_slot *slot)
427 if (slot->chip->pdev->revision == 0) {
430 version = readl(slot->host->ioaddr + SDHCI_HOST_VERSION);
431 version = (version & SDHCI_VENDOR_VER_MASK) >>
432 SDHCI_VENDOR_VER_SHIFT;
435 * Older versions of the chip have lots of nasty glitches
436 * in the ADMA engine. It's best just to avoid it
440 slot->host->quirks |= SDHCI_QUIRK_BROKEN_ADMA;
443 /* JM388 MMC doesn't support 1.8V while SD supports it */
444 if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD) {
445 slot->host->ocr_avail_sd = MMC_VDD_32_33 | MMC_VDD_33_34 |
446 MMC_VDD_29_30 | MMC_VDD_30_31 |
447 MMC_VDD_165_195; /* allow 1.8V */
448 slot->host->ocr_avail_mmc = MMC_VDD_32_33 | MMC_VDD_33_34 |
449 MMC_VDD_29_30 | MMC_VDD_30_31; /* no 1.8V for MMC */
453 * The secondary interface requires a bit set to get the
456 if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC ||
457 slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD)
458 jmicron_enable_mmc(slot->host, 1);
460 slot->host->mmc->caps |= MMC_CAP_BUS_WIDTH_TEST;
465 static void jmicron_remove_slot(struct sdhci_pci_slot *slot, int dead)
470 if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC ||
471 slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD)
472 jmicron_enable_mmc(slot->host, 0);
475 static int jmicron_suspend(struct sdhci_pci_chip *chip, pm_message_t state)
479 if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC ||
480 chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD) {
481 for (i = 0; i < chip->num_slots; i++)
482 jmicron_enable_mmc(chip->slots[i]->host, 0);
488 static int jmicron_resume(struct sdhci_pci_chip *chip)
492 if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC ||
493 chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD) {
494 for (i = 0; i < chip->num_slots; i++)
495 jmicron_enable_mmc(chip->slots[i]->host, 1);
498 ret = jmicron_pmos(chip, 1);
500 dev_err(&chip->pdev->dev, "Failure enabling card power\n");
507 static const struct sdhci_pci_fixes sdhci_o2 = {
511 static const struct sdhci_pci_fixes sdhci_jmicron = {
512 .probe = jmicron_probe,
514 .probe_slot = jmicron_probe_slot,
515 .remove_slot = jmicron_remove_slot,
517 .suspend = jmicron_suspend,
518 .resume = jmicron_resume,
521 /* SysKonnect CardBus2SDIO extra registers */
522 #define SYSKT_CTRL 0x200
523 #define SYSKT_RDFIFO_STAT 0x204
524 #define SYSKT_WRFIFO_STAT 0x208
525 #define SYSKT_POWER_DATA 0x20c
526 #define SYSKT_POWER_330 0xef
527 #define SYSKT_POWER_300 0xf8
528 #define SYSKT_POWER_184 0xcc
529 #define SYSKT_POWER_CMD 0x20d
530 #define SYSKT_POWER_START (1 << 7)
531 #define SYSKT_POWER_STATUS 0x20e
532 #define SYSKT_POWER_STATUS_OK (1 << 0)
533 #define SYSKT_BOARD_REV 0x210
534 #define SYSKT_CHIP_REV 0x211
535 #define SYSKT_CONF_DATA 0x212
536 #define SYSKT_CONF_DATA_1V8 (1 << 2)
537 #define SYSKT_CONF_DATA_2V5 (1 << 1)
538 #define SYSKT_CONF_DATA_3V3 (1 << 0)
540 static int syskt_probe(struct sdhci_pci_chip *chip)
542 if ((chip->pdev->class & 0x0000FF) == PCI_SDHCI_IFVENDOR) {
543 chip->pdev->class &= ~0x0000FF;
544 chip->pdev->class |= PCI_SDHCI_IFDMA;
549 static int syskt_probe_slot(struct sdhci_pci_slot *slot)
553 u8 board_rev = readb(slot->host->ioaddr + SYSKT_BOARD_REV);
554 u8 chip_rev = readb(slot->host->ioaddr + SYSKT_CHIP_REV);
555 dev_info(&slot->chip->pdev->dev, "SysKonnect CardBus2SDIO, "
556 "board rev %d.%d, chip rev %d.%d\n",
557 board_rev >> 4, board_rev & 0xf,
558 chip_rev >> 4, chip_rev & 0xf);
559 if (chip_rev >= 0x20)
560 slot->host->quirks |= SDHCI_QUIRK_FORCE_DMA;
562 writeb(SYSKT_POWER_330, slot->host->ioaddr + SYSKT_POWER_DATA);
563 writeb(SYSKT_POWER_START, slot->host->ioaddr + SYSKT_POWER_CMD);
565 tm = 10; /* Wait max 1 ms */
567 ps = readw(slot->host->ioaddr + SYSKT_POWER_STATUS);
568 if (ps & SYSKT_POWER_STATUS_OK)
573 dev_err(&slot->chip->pdev->dev,
574 "power regulator never stabilized");
575 writeb(0, slot->host->ioaddr + SYSKT_POWER_CMD);
582 static const struct sdhci_pci_fixes sdhci_syskt = {
583 .quirks = SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER,
584 .probe = syskt_probe,
585 .probe_slot = syskt_probe_slot,
588 static int via_probe(struct sdhci_pci_chip *chip)
590 if (chip->pdev->revision == 0x10)
591 chip->quirks |= SDHCI_QUIRK_DELAY_AFTER_POWER;
596 static const struct sdhci_pci_fixes sdhci_via = {
600 static const struct pci_device_id pci_ids[] __devinitdata = {
602 .vendor = PCI_VENDOR_ID_RICOH,
603 .device = PCI_DEVICE_ID_RICOH_R5C822,
604 .subvendor = PCI_ANY_ID,
605 .subdevice = PCI_ANY_ID,
606 .driver_data = (kernel_ulong_t)&sdhci_ricoh,
610 .vendor = PCI_VENDOR_ID_RICOH,
612 .subvendor = PCI_ANY_ID,
613 .subdevice = PCI_ANY_ID,
614 .driver_data = (kernel_ulong_t)&sdhci_ricoh_mmc,
618 .vendor = PCI_VENDOR_ID_RICOH,
620 .subvendor = PCI_ANY_ID,
621 .subdevice = PCI_ANY_ID,
622 .driver_data = (kernel_ulong_t)&sdhci_ricoh_mmc,
626 .vendor = PCI_VENDOR_ID_RICOH,
628 .subvendor = PCI_ANY_ID,
629 .subdevice = PCI_ANY_ID,
630 .driver_data = (kernel_ulong_t)&sdhci_ricoh_mmc,
634 .vendor = PCI_VENDOR_ID_ENE,
635 .device = PCI_DEVICE_ID_ENE_CB712_SD,
636 .subvendor = PCI_ANY_ID,
637 .subdevice = PCI_ANY_ID,
638 .driver_data = (kernel_ulong_t)&sdhci_ene_712,
642 .vendor = PCI_VENDOR_ID_ENE,
643 .device = PCI_DEVICE_ID_ENE_CB712_SD_2,
644 .subvendor = PCI_ANY_ID,
645 .subdevice = PCI_ANY_ID,
646 .driver_data = (kernel_ulong_t)&sdhci_ene_712,
650 .vendor = PCI_VENDOR_ID_ENE,
651 .device = PCI_DEVICE_ID_ENE_CB714_SD,
652 .subvendor = PCI_ANY_ID,
653 .subdevice = PCI_ANY_ID,
654 .driver_data = (kernel_ulong_t)&sdhci_ene_714,
658 .vendor = PCI_VENDOR_ID_ENE,
659 .device = PCI_DEVICE_ID_ENE_CB714_SD_2,
660 .subvendor = PCI_ANY_ID,
661 .subdevice = PCI_ANY_ID,
662 .driver_data = (kernel_ulong_t)&sdhci_ene_714,
666 .vendor = PCI_VENDOR_ID_MARVELL,
667 .device = PCI_DEVICE_ID_MARVELL_88ALP01_SD,
668 .subvendor = PCI_ANY_ID,
669 .subdevice = PCI_ANY_ID,
670 .driver_data = (kernel_ulong_t)&sdhci_cafe,
674 .vendor = PCI_VENDOR_ID_JMICRON,
675 .device = PCI_DEVICE_ID_JMICRON_JMB38X_SD,
676 .subvendor = PCI_ANY_ID,
677 .subdevice = PCI_ANY_ID,
678 .driver_data = (kernel_ulong_t)&sdhci_jmicron,
682 .vendor = PCI_VENDOR_ID_JMICRON,
683 .device = PCI_DEVICE_ID_JMICRON_JMB38X_MMC,
684 .subvendor = PCI_ANY_ID,
685 .subdevice = PCI_ANY_ID,
686 .driver_data = (kernel_ulong_t)&sdhci_jmicron,
690 .vendor = PCI_VENDOR_ID_JMICRON,
691 .device = PCI_DEVICE_ID_JMICRON_JMB388_SD,
692 .subvendor = PCI_ANY_ID,
693 .subdevice = PCI_ANY_ID,
694 .driver_data = (kernel_ulong_t)&sdhci_jmicron,
698 .vendor = PCI_VENDOR_ID_JMICRON,
699 .device = PCI_DEVICE_ID_JMICRON_JMB388_ESD,
700 .subvendor = PCI_ANY_ID,
701 .subdevice = PCI_ANY_ID,
702 .driver_data = (kernel_ulong_t)&sdhci_jmicron,
706 .vendor = PCI_VENDOR_ID_SYSKONNECT,
708 .subvendor = PCI_ANY_ID,
709 .subdevice = PCI_ANY_ID,
710 .driver_data = (kernel_ulong_t)&sdhci_syskt,
714 .vendor = PCI_VENDOR_ID_VIA,
716 .subvendor = PCI_ANY_ID,
717 .subdevice = PCI_ANY_ID,
718 .driver_data = (kernel_ulong_t)&sdhci_via,
722 .vendor = PCI_VENDOR_ID_INTEL,
723 .device = PCI_DEVICE_ID_INTEL_MRST_SD0,
724 .subvendor = PCI_ANY_ID,
725 .subdevice = PCI_ANY_ID,
726 .driver_data = (kernel_ulong_t)&sdhci_intel_mrst_hc0,
730 .vendor = PCI_VENDOR_ID_INTEL,
731 .device = PCI_DEVICE_ID_INTEL_MRST_SD1,
732 .subvendor = PCI_ANY_ID,
733 .subdevice = PCI_ANY_ID,
734 .driver_data = (kernel_ulong_t)&sdhci_intel_mrst_hc1_hc2,
738 .vendor = PCI_VENDOR_ID_INTEL,
739 .device = PCI_DEVICE_ID_INTEL_MRST_SD2,
740 .subvendor = PCI_ANY_ID,
741 .subdevice = PCI_ANY_ID,
742 .driver_data = (kernel_ulong_t)&sdhci_intel_mrst_hc1_hc2,
746 .vendor = PCI_VENDOR_ID_INTEL,
747 .device = PCI_DEVICE_ID_INTEL_MFD_SD,
748 .subvendor = PCI_ANY_ID,
749 .subdevice = PCI_ANY_ID,
750 .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_sd,
754 .vendor = PCI_VENDOR_ID_INTEL,
755 .device = PCI_DEVICE_ID_INTEL_MFD_SDIO1,
756 .subvendor = PCI_ANY_ID,
757 .subdevice = PCI_ANY_ID,
758 .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_sdio,
762 .vendor = PCI_VENDOR_ID_INTEL,
763 .device = PCI_DEVICE_ID_INTEL_MFD_SDIO2,
764 .subvendor = PCI_ANY_ID,
765 .subdevice = PCI_ANY_ID,
766 .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_sdio,
770 .vendor = PCI_VENDOR_ID_INTEL,
771 .device = PCI_DEVICE_ID_INTEL_MFD_EMMC0,
772 .subvendor = PCI_ANY_ID,
773 .subdevice = PCI_ANY_ID,
774 .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_emmc,
778 .vendor = PCI_VENDOR_ID_INTEL,
779 .device = PCI_DEVICE_ID_INTEL_MFD_EMMC1,
780 .subvendor = PCI_ANY_ID,
781 .subdevice = PCI_ANY_ID,
782 .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_emmc,
786 .vendor = PCI_VENDOR_ID_O2,
787 .device = PCI_DEVICE_ID_O2_8120,
788 .subvendor = PCI_ANY_ID,
789 .subdevice = PCI_ANY_ID,
790 .driver_data = (kernel_ulong_t)&sdhci_o2,
794 .vendor = PCI_VENDOR_ID_O2,
795 .device = PCI_DEVICE_ID_O2_8220,
796 .subvendor = PCI_ANY_ID,
797 .subdevice = PCI_ANY_ID,
798 .driver_data = (kernel_ulong_t)&sdhci_o2,
802 .vendor = PCI_VENDOR_ID_O2,
803 .device = PCI_DEVICE_ID_O2_8221,
804 .subvendor = PCI_ANY_ID,
805 .subdevice = PCI_ANY_ID,
806 .driver_data = (kernel_ulong_t)&sdhci_o2,
810 .vendor = PCI_VENDOR_ID_O2,
811 .device = PCI_DEVICE_ID_O2_8320,
812 .subvendor = PCI_ANY_ID,
813 .subdevice = PCI_ANY_ID,
814 .driver_data = (kernel_ulong_t)&sdhci_o2,
818 .vendor = PCI_VENDOR_ID_O2,
819 .device = PCI_DEVICE_ID_O2_8321,
820 .subvendor = PCI_ANY_ID,
821 .subdevice = PCI_ANY_ID,
822 .driver_data = (kernel_ulong_t)&sdhci_o2,
825 { /* Generic SD host controller */
826 PCI_DEVICE_CLASS((PCI_CLASS_SYSTEM_SDHCI << 8), 0xFFFF00)
829 { /* end: all zeroes */ },
832 MODULE_DEVICE_TABLE(pci, pci_ids);
834 /*****************************************************************************\
836 * SDHCI core callbacks *
838 \*****************************************************************************/
840 static int sdhci_pci_enable_dma(struct sdhci_host *host)
842 struct sdhci_pci_slot *slot;
843 struct pci_dev *pdev;
846 slot = sdhci_priv(host);
847 pdev = slot->chip->pdev;
849 if (((pdev->class & 0xFFFF00) == (PCI_CLASS_SYSTEM_SDHCI << 8)) &&
850 ((pdev->class & 0x0000FF) != PCI_SDHCI_IFDMA) &&
851 (host->flags & SDHCI_USE_SDMA)) {
852 dev_warn(&pdev->dev, "Will use DMA mode even though HW "
853 "doesn't fully claim to support it.\n");
856 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
860 pci_set_master(pdev);
865 static int sdhci_pci_8bit_width(struct sdhci_host *host, int width)
869 ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
872 case MMC_BUS_WIDTH_8:
873 ctrl |= SDHCI_CTRL_8BITBUS;
874 ctrl &= ~SDHCI_CTRL_4BITBUS;
876 case MMC_BUS_WIDTH_4:
877 ctrl |= SDHCI_CTRL_4BITBUS;
878 ctrl &= ~SDHCI_CTRL_8BITBUS;
881 ctrl &= ~(SDHCI_CTRL_8BITBUS | SDHCI_CTRL_4BITBUS);
885 sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
890 static void sdhci_pci_hw_reset(struct sdhci_host *host)
892 struct sdhci_pci_slot *slot = sdhci_priv(host);
893 int rst_n_gpio = slot->rst_n_gpio;
895 if (!gpio_is_valid(rst_n_gpio))
897 gpio_set_value_cansleep(rst_n_gpio, 0);
898 /* For eMMC, minimum is 1us but give it 10us for good measure */
900 gpio_set_value_cansleep(rst_n_gpio, 1);
901 /* For eMMC, minimum is 200us but give it 300us for good measure */
902 usleep_range(300, 1000);
905 static struct sdhci_ops sdhci_pci_ops = {
906 .enable_dma = sdhci_pci_enable_dma,
907 .platform_8bit_width = sdhci_pci_8bit_width,
908 .hw_reset = sdhci_pci_hw_reset,
911 /*****************************************************************************\
915 \*****************************************************************************/
919 static int sdhci_pci_suspend(struct pci_dev *pdev, pm_message_t state)
921 struct sdhci_pci_chip *chip;
922 struct sdhci_pci_slot *slot;
923 mmc_pm_flag_t slot_pm_flags;
924 mmc_pm_flag_t pm_flags = 0;
927 chip = pci_get_drvdata(pdev);
931 for (i = 0; i < chip->num_slots; i++) {
932 slot = chip->slots[i];
936 ret = sdhci_suspend_host(slot->host, state);
939 for (i--; i >= 0; i--)
940 sdhci_resume_host(chip->slots[i]->host);
944 slot_pm_flags = slot->host->mmc->pm_flags;
945 if (slot_pm_flags & MMC_PM_WAKE_SDIO_IRQ)
946 sdhci_enable_irq_wakeups(slot->host);
948 pm_flags |= slot_pm_flags;
951 if (chip->fixes && chip->fixes->suspend) {
952 ret = chip->fixes->suspend(chip, state);
954 for (i = chip->num_slots - 1; i >= 0; i--)
955 sdhci_resume_host(chip->slots[i]->host);
960 pci_save_state(pdev);
961 if (pm_flags & MMC_PM_KEEP_POWER) {
962 if (pm_flags & MMC_PM_WAKE_SDIO_IRQ) {
963 pci_pme_active(pdev, true);
964 pci_enable_wake(pdev, PCI_D3hot, 1);
966 pci_set_power_state(pdev, PCI_D3hot);
968 pci_enable_wake(pdev, pci_choose_state(pdev, state), 0);
969 pci_disable_device(pdev);
970 pci_set_power_state(pdev, pci_choose_state(pdev, state));
976 static int sdhci_pci_resume(struct pci_dev *pdev)
978 struct sdhci_pci_chip *chip;
979 struct sdhci_pci_slot *slot;
982 chip = pci_get_drvdata(pdev);
986 pci_set_power_state(pdev, PCI_D0);
987 pci_restore_state(pdev);
988 ret = pci_enable_device(pdev);
992 if (chip->fixes && chip->fixes->resume) {
993 ret = chip->fixes->resume(chip);
998 for (i = 0; i < chip->num_slots; i++) {
999 slot = chip->slots[i];
1003 ret = sdhci_resume_host(slot->host);
1011 #else /* CONFIG_PM */
1013 #define sdhci_pci_suspend NULL
1014 #define sdhci_pci_resume NULL
1016 #endif /* CONFIG_PM */
1018 /*****************************************************************************\
1020 * Device probing/removal *
1022 \*****************************************************************************/
1024 static struct sdhci_pci_slot * __devinit sdhci_pci_probe_slot(
1025 struct pci_dev *pdev, struct sdhci_pci_chip *chip, int bar)
1027 struct sdhci_pci_slot *slot;
1028 struct sdhci_host *host;
1031 if (!(pci_resource_flags(pdev, bar) & IORESOURCE_MEM)) {
1032 dev_err(&pdev->dev, "BAR %d is not iomem. Aborting.\n", bar);
1033 return ERR_PTR(-ENODEV);
1036 if (pci_resource_len(pdev, bar) != 0x100) {
1037 dev_err(&pdev->dev, "Invalid iomem size. You may "
1038 "experience problems.\n");
1041 if ((pdev->class & 0x0000FF) == PCI_SDHCI_IFVENDOR) {
1042 dev_err(&pdev->dev, "Vendor specific interface. Aborting.\n");
1043 return ERR_PTR(-ENODEV);
1046 if ((pdev->class & 0x0000FF) > PCI_SDHCI_IFVENDOR) {
1047 dev_err(&pdev->dev, "Unknown interface. Aborting.\n");
1048 return ERR_PTR(-ENODEV);
1051 host = sdhci_alloc_host(&pdev->dev, sizeof(struct sdhci_pci_slot));
1053 dev_err(&pdev->dev, "cannot allocate host\n");
1054 return ERR_CAST(host);
1057 slot = sdhci_priv(host);
1061 slot->pci_bar = bar;
1062 slot->rst_n_gpio = -EINVAL;
1064 host->hw_name = "PCI";
1065 host->ops = &sdhci_pci_ops;
1066 host->quirks = chip->quirks;
1068 host->irq = pdev->irq;
1070 ret = pci_request_region(pdev, bar, mmc_hostname(host->mmc));
1072 dev_err(&pdev->dev, "cannot request region\n");
1076 host->ioaddr = pci_ioremap_bar(pdev, bar);
1077 if (!host->ioaddr) {
1078 dev_err(&pdev->dev, "failed to remap registers\n");
1083 if (chip->fixes && chip->fixes->probe_slot) {
1084 ret = chip->fixes->probe_slot(slot);
1089 host->mmc->pm_caps = MMC_PM_KEEP_POWER | MMC_PM_WAKE_SDIO_IRQ;
1091 ret = sdhci_add_host(host);
1098 if (chip->fixes && chip->fixes->remove_slot)
1099 chip->fixes->remove_slot(slot, 0);
1102 iounmap(host->ioaddr);
1105 pci_release_region(pdev, bar);
1108 sdhci_free_host(host);
1110 return ERR_PTR(ret);
1113 static void sdhci_pci_remove_slot(struct sdhci_pci_slot *slot)
1119 scratch = readl(slot->host->ioaddr + SDHCI_INT_STATUS);
1120 if (scratch == (u32)-1)
1123 sdhci_remove_host(slot->host, dead);
1125 if (slot->chip->fixes && slot->chip->fixes->remove_slot)
1126 slot->chip->fixes->remove_slot(slot, dead);
1128 pci_release_region(slot->chip->pdev, slot->pci_bar);
1130 sdhci_free_host(slot->host);
1133 static int __devinit sdhci_pci_probe(struct pci_dev *pdev,
1134 const struct pci_device_id *ent)
1136 struct sdhci_pci_chip *chip;
1137 struct sdhci_pci_slot *slot;
1139 u8 slots, first_bar;
1142 BUG_ON(pdev == NULL);
1143 BUG_ON(ent == NULL);
1145 dev_info(&pdev->dev, "SDHCI controller found [%04x:%04x] (rev %x)\n",
1146 (int)pdev->vendor, (int)pdev->device, (int)pdev->revision);
1148 ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &slots);
1152 slots = PCI_SLOT_INFO_SLOTS(slots) + 1;
1153 dev_dbg(&pdev->dev, "found %d slot(s)\n", slots);
1157 BUG_ON(slots > MAX_SLOTS);
1159 ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &first_bar);
1163 first_bar &= PCI_SLOT_INFO_FIRST_BAR_MASK;
1165 if (first_bar > 5) {
1166 dev_err(&pdev->dev, "Invalid first BAR. Aborting.\n");
1170 ret = pci_enable_device(pdev);
1174 chip = kzalloc(sizeof(struct sdhci_pci_chip), GFP_KERNEL);
1181 chip->fixes = (const struct sdhci_pci_fixes *)ent->driver_data;
1183 chip->quirks = chip->fixes->quirks;
1184 chip->num_slots = slots;
1186 pci_set_drvdata(pdev, chip);
1188 if (chip->fixes && chip->fixes->probe) {
1189 ret = chip->fixes->probe(chip);
1194 slots = chip->num_slots; /* Quirk may have changed this */
1196 for (i = 0; i < slots; i++) {
1197 slot = sdhci_pci_probe_slot(pdev, chip, first_bar + i);
1199 for (i--; i >= 0; i--)
1200 sdhci_pci_remove_slot(chip->slots[i]);
1201 ret = PTR_ERR(slot);
1205 chip->slots[i] = slot;
1211 pci_set_drvdata(pdev, NULL);
1215 pci_disable_device(pdev);
1219 static void __devexit sdhci_pci_remove(struct pci_dev *pdev)
1222 struct sdhci_pci_chip *chip;
1224 chip = pci_get_drvdata(pdev);
1227 for (i = 0; i < chip->num_slots; i++)
1228 sdhci_pci_remove_slot(chip->slots[i]);
1230 pci_set_drvdata(pdev, NULL);
1234 pci_disable_device(pdev);
1237 static struct pci_driver sdhci_driver = {
1238 .name = "sdhci-pci",
1239 .id_table = pci_ids,
1240 .probe = sdhci_pci_probe,
1241 .remove = __devexit_p(sdhci_pci_remove),
1242 .suspend = sdhci_pci_suspend,
1243 .resume = sdhci_pci_resume,
1246 /*****************************************************************************\
1248 * Driver init/exit *
1250 \*****************************************************************************/
1252 static int __init sdhci_drv_init(void)
1254 return pci_register_driver(&sdhci_driver);
1257 static void __exit sdhci_drv_exit(void)
1259 pci_unregister_driver(&sdhci_driver);
1262 module_init(sdhci_drv_init);
1263 module_exit(sdhci_drv_exit);
1265 MODULE_AUTHOR("Pierre Ossman <pierre@ossman.eu>");
1266 MODULE_DESCRIPTION("Secure Digital Host Controller Interface PCI driver");
1267 MODULE_LICENSE("GPL");