drivers/hwmon/w83627hf.c

   1 /*
   2     w83627hf.c - Part of lm_sensors, Linux kernel modules for hardware
   3                 monitoring
   4     Copyright (c) 1998 - 2003  Frodo Looijaard <frodol@dds.nl>,
   5     Philip Edelbrock <phil@netroedge.com>,
   6     and Mark Studebaker <mdsxyz123@yahoo.com>
   7     Ported to 2.6 by Bernhard C. Schrenk <clemy@clemy.org>
   8     Copyright (c) 2007  Jean Delvare <khali@linux-fr.org>
   9
  10     This program is free software; you can redistribute it and/or modify
  11     it under the terms of the GNU General Public License as published by
  12     the Free Software Foundation; either version 2 of the License, or
  13     (at your option) any later version.
  14
  15     This program is distributed in the hope that it will be useful,
  16     but WITHOUT ANY WARRANTY; without even the implied warranty of
  17     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  18     GNU General Public License for more details.
  19
  20     You should have received a copy of the GNU General Public License
  21     along with this program; if not, write to the Free Software
  22     Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  23 */
  24
  25 /*
  26     Supports following chips:
  27
  28     Chip        #vin    #fanin  #pwm    #temp   wchipid vendid  i2c     ISA
  29     w83627hf    9       3       2       3       0x20    0x5ca3  no      yes(LPC)
  30     w83627thf   7       3       3       3       0x90    0x5ca3  no      yes(LPC)
  31     w83637hf    7       3       3       3       0x80    0x5ca3  no      yes(LPC)
  32     w83687thf   7       3       3       3       0x90    0x5ca3  no      yes(LPC)
  33     w83697hf    8       2       2       2       0x60    0x5ca3  no      yes(LPC)
  34
  35     For other winbond chips, and for i2c support in the above chips,
  36     use w83781d.c.
  37
  38     Note: automatic ("cruise") fan control for 697, 637 & 627thf not
  39     supported yet.
  40 */
  41
  42 #include <linux/module.h>
  43 #include <linux/init.h>
  44 #include <linux/slab.h>
  45 #include <linux/jiffies.h>
  46 #include <linux/platform_device.h>
  47 #include <linux/hwmon.h>
  48 #include <linux/hwmon-sysfs.h>
  49 #include <linux/hwmon-vid.h>
  50 #include <linux/err.h>
  51 #include <linux/mutex.h>
  52 #include <linux/ioport.h>
  53 #include <asm/io.h>
  54 #include "lm75.h"
  55
  56 static struct platform_device *pdev;
  57
  58 #define DRVNAME "w83627hf"
  59 enum chips { w83627hf, w83627thf, w83697hf, w83637hf, w83687thf };
  60
  61 static u16 force_addr;
  62 module_param(force_addr, ushort, 0);
  63 MODULE_PARM_DESC(force_addr,
  64                  "Initialize the base address of the sensors");
  65 static u8 force_i2c = 0x1f;
  66 module_param(force_i2c, byte, 0);
  67 MODULE_PARM_DESC(force_i2c,
  68                  "Initialize the i2c address of the sensors");
  69
  70 static int reset;
  71 module_param(reset, bool, 0);
  72 MODULE_PARM_DESC(reset, "Set to one to reset chip on load");
  73
  74 static int init = 1;
  75 module_param(init, bool, 0);
  76 MODULE_PARM_DESC(init, "Set to zero to bypass chip initialization");
  77
  78 /* modified from kernel/include/traps.c */
  79 static int REG;         /* The register to read/write */
  80 #define DEV     0x07    /* Register: Logical device select */
  81 static int VAL;         /* The value to read/write */
  82
  83 /* logical device numbers for superio_select (below) */
  84 #define W83627HF_LD_FDC         0x00
  85 #define W83627HF_LD_PRT         0x01
  86 #define W83627HF_LD_UART1       0x02
  87 #define W83627HF_LD_UART2       0x03
  88 #define W83627HF_LD_KBC         0x05
  89 #define W83627HF_LD_CIR         0x06 /* w83627hf only */
  90 #define W83627HF_LD_GAME        0x07
  91 #define W83627HF_LD_MIDI        0x07
  92 #define W83627HF_LD_GPIO1       0x07
  93 #define W83627HF_LD_GPIO5       0x07 /* w83627thf only */
  94 #define W83627HF_LD_GPIO2       0x08
  95 #define W83627HF_LD_GPIO3       0x09
  96 #define W83627HF_LD_GPIO4       0x09 /* w83627thf only */
  97 #define W83627HF_LD_ACPI        0x0a
  98 #define W83627HF_LD_HWM         0x0b
  99
 100 #define DEVID   0x20    /* Register: Device ID */
 101
 102 #define W83627THF_GPIO5_EN      0x30 /* w83627thf only */
 103 #define W83627THF_GPIO5_IOSR    0xf3 /* w83627thf only */
 104 #define W83627THF_GPIO5_DR      0xf4 /* w83627thf only */
 105
 106 #define W83687THF_VID_EN        0x29 /* w83687thf only */
 107 #define W83687THF_VID_CFG       0xF0 /* w83687thf only */
 108 #define W83687THF_VID_DATA      0xF1 /* w83687thf only */
 109
 110 static inline void
 111 superio_outb(int reg, int val)
 112 {
 113         outb(reg, REG);
 114         outb(val, VAL);
 115 }
 116
 117 static inline int
 118 superio_inb(int reg)
 119 {
 120         outb(reg, REG);
 121         return inb(VAL);
 122 }
 123
 124 static inline void
 125 superio_select(int ld)
 126 {
 127         outb(DEV, REG);
 128         outb(ld, VAL);
 129 }
 130
 131 static inline void
 132 superio_enter(void)
 133 {
 134         outb(0x87, REG);
 135         outb(0x87, REG);
 136 }
 137
 138 static inline void
 139 superio_exit(void)
 140 {
 141         outb(0xAA, REG);
 142 }
 143
 144 #define W627_DEVID 0x52
 145 #define W627THF_DEVID 0x82
 146 #define W697_DEVID 0x60
 147 #define W637_DEVID 0x70
 148 #define W687THF_DEVID 0x85
 149 #define WINB_ACT_REG 0x30
 150 #define WINB_BASE_REG 0x60
 151 /* Constants specified below */
 152
 153 /* Alignment of the base address */
 154 #define WINB_ALIGNMENT          ~7
 155
 156 /* Offset & size of I/O region we are interested in */
 157 #define WINB_REGION_OFFSET      5
 158 #define WINB_REGION_SIZE        2
 159
 160 /* Where are the sensors address/data registers relative to the region offset */
 161 #define W83781D_ADDR_REG_OFFSET 0
 162 #define W83781D_DATA_REG_OFFSET 1
 163
 164 /* The W83781D registers */
 165 /* The W83782D registers for nr=7,8 are in bank 5 */
 166 #define W83781D_REG_IN_MAX(nr) ((nr < 7) ? (0x2b + (nr) * 2) : \
 167                                            (0x554 + (((nr) - 7) * 2)))
 168 #define W83781D_REG_IN_MIN(nr) ((nr < 7) ? (0x2c + (nr) * 2) : \
 169                                            (0x555 + (((nr) - 7) * 2)))
 170 #define W83781D_REG_IN(nr)     ((nr < 7) ? (0x20 + (nr)) : \
 171                                            (0x550 + (nr) - 7))
 172
 173 /* nr:0-2 for fans:1-3 */
 174 #define W83627HF_REG_FAN_MIN(nr)        (0x3b + (nr))
 175 #define W83627HF_REG_FAN(nr)            (0x28 + (nr))
 176
 177 #define W83627HF_REG_TEMP2_CONFIG 0x152
 178 #define W83627HF_REG_TEMP3_CONFIG 0x252
 179 /* these are zero-based, unlike config constants above */
 180 static const u16 w83627hf_reg_temp[]            = { 0x27, 0x150, 0x250 };
 181 static const u16 w83627hf_reg_temp_hyst[]       = { 0x3A, 0x153, 0x253 };
 182 static const u16 w83627hf_reg_temp_over[]       = { 0x39, 0x155, 0x255 };
 183
 184 #define W83781D_REG_BANK 0x4E
 185
 186 #define W83781D_REG_CONFIG 0x40
 187 #define W83781D_REG_ALARM1 0x459
 188 #define W83781D_REG_ALARM2 0x45A
 189 #define W83781D_REG_ALARM3 0x45B
 190
 191 #define W83781D_REG_BEEP_CONFIG 0x4D
 192 #define W83781D_REG_BEEP_INTS1 0x56
 193 #define W83781D_REG_BEEP_INTS2 0x57
 194 #define W83781D_REG_BEEP_INTS3 0x453
 195
 196 #define W83781D_REG_VID_FANDIV 0x47
 197
 198 #define W83781D_REG_CHIPID 0x49
 199 #define W83781D_REG_WCHIPID 0x58
 200 #define W83781D_REG_CHIPMAN 0x4F
 201 #define W83781D_REG_PIN 0x4B
 202
 203 #define W83781D_REG_VBAT 0x5D
 204
 205 #define W83627HF_REG_PWM1 0x5A
 206 #define W83627HF_REG_PWM2 0x5B
 207
 208 #define W83627THF_REG_PWM1              0x01    /* 697HF/637HF/687THF too */
 209 #define W83627THF_REG_PWM2              0x03    /* 697HF/637HF/687THF too */
 210 #define W83627THF_REG_PWM3              0x11    /* 637HF/687THF too */
 211
 212 #define W83627THF_REG_VRM_OVT_CFG       0x18    /* 637HF/687THF too */
 213
 214 static const u8 regpwm_627hf[] = { W83627HF_REG_PWM1, W83627HF_REG_PWM2 };
 215 static const u8 regpwm[] = { W83627THF_REG_PWM1, W83627THF_REG_PWM2,
 216                              W83627THF_REG_PWM3 };
 217 #define W836X7HF_REG_PWM(type, nr) (((type) == w83627hf) ? \
 218                                     regpwm_627hf[nr] : regpwm[nr])
 219
 220 #define W83627HF_REG_PWM_FREQ           0x5C    /* Only for the 627HF */
 221
 222 #define W83637HF_REG_PWM_FREQ1          0x00    /* 697HF/687THF too */
 223 #define W83637HF_REG_PWM_FREQ2          0x02    /* 697HF/687THF too */
 224 #define W83637HF_REG_PWM_FREQ3          0x10    /* 687THF too */
 225
 226 static const u8 W83637HF_REG_PWM_FREQ[] = { W83637HF_REG_PWM_FREQ1,
 227                                         W83637HF_REG_PWM_FREQ2,
 228                                         W83637HF_REG_PWM_FREQ3 };
 229
 230 #define W83627HF_BASE_PWM_FREQ  46870
 231
 232 #define W83781D_REG_I2C_ADDR 0x48
 233 #define W83781D_REG_I2C_SUBADDR 0x4A
 234
 235 /* Sensor selection */
 236 #define W83781D_REG_SCFG1 0x5D
 237 static const u8 BIT_SCFG1[] = { 0x02, 0x04, 0x08 };
 238 #define W83781D_REG_SCFG2 0x59
 239 static const u8 BIT_SCFG2[] = { 0x10, 0x20, 0x40 };
 240 #define W83781D_DEFAULT_BETA 3435
 241
 242 /* Conversions. Limit checking is only done on the TO_REG
 243    variants. Note that you should be a bit careful with which arguments
 244    these macros are called: arguments may be evaluated more than once.
 245    Fixing this is just not worth it. */
 246 #define IN_TO_REG(val)  (SENSORS_LIMIT((((val) + 8)/16),0,255))
 247 #define IN_FROM_REG(val) ((val) * 16)
 248
 249 static inline u8 FAN_TO_REG(long rpm, int div)
 250 {
 251         if (rpm == 0)
 252                 return 255;
 253         rpm = SENSORS_LIMIT(rpm, 1, 1000000);
 254         return SENSORS_LIMIT((1350000 + rpm * div / 2) / (rpm * div), 1,
 255                              254);
 256 }
 257
 258 #define TEMP_MIN (-128000)
 259 #define TEMP_MAX ( 127000)
 260
 261 /* TEMP: 0.001C/bit (-128C to +127C)
 262    REG: 1C/bit, two's complement */
 263 static u8 TEMP_TO_REG(long temp)
 264 {
 265         int ntemp = SENSORS_LIMIT(temp, TEMP_MIN, TEMP_MAX);
 266         ntemp += (ntemp<0 ? -500 : 500);
 267         return (u8)(ntemp / 1000);
 268 }
 269
 270 static int TEMP_FROM_REG(u8 reg)
 271 {
 272         return (s8)reg * 1000;
 273 }
 274
 275 #define FAN_FROM_REG(val,div) ((val)==0?-1:(val)==255?0:1350000/((val)*(div)))
 276
 277 #define PWM_TO_REG(val) (SENSORS_LIMIT((val),0,255))
 278
 279 static inline unsigned long pwm_freq_from_reg_627hf(u8 reg)
 280 {
 281         unsigned long freq;
 282         freq = W83627HF_BASE_PWM_FREQ >> reg;
 283         return freq;
 284 }
 285 static inline u8 pwm_freq_to_reg_627hf(unsigned long val)
 286 {
 287         u8 i;
 288         /* Only 5 dividers (1 2 4 8 16)
 289            Search for the nearest available frequency */
 290         for (i = 0; i < 4; i++) {
 291                 if (val > (((W83627HF_BASE_PWM_FREQ >> i) +
 292                             (W83627HF_BASE_PWM_FREQ >> (i+1))) / 2))
 293                         break;
 294         }
 295         return i;
 296 }
 297
 298 static inline unsigned long pwm_freq_from_reg(u8 reg)
 299 {
 300         /* Clock bit 8 -> 180 kHz or 24 MHz */
 301         unsigned long clock = (reg & 0x80) ? 180000UL : 24000000UL;
 302
 303         reg &= 0x7f;
 304         /* This should not happen but anyway... */
 305         if (reg == 0)
 306                 reg++;
 307         return (clock / (reg << 8));
 308 }
 309 static inline u8 pwm_freq_to_reg(unsigned long val)
 310 {
 311         /* Minimum divider value is 0x01 and maximum is 0x7F */
 312         if (val >= 93750)       /* The highest we can do */
 313                 return 0x01;
 314         if (val >= 720) /* Use 24 MHz clock */
 315                 return (24000000UL / (val << 8));
 316         if (val < 6)            /* The lowest we can do */
 317                 return 0xFF;
 318         else                    /* Use 180 kHz clock */
 319                 return (0x80 | (180000UL / (val << 8)));
 320 }
 321
 322 #define BEEP_MASK_FROM_REG(val)          (val)
 323 #define BEEP_MASK_TO_REG(val)           ((val) & 0xffffff)
 324 #define BEEP_ENABLE_TO_REG(val)         ((val)?1:0)
 325 #define BEEP_ENABLE_FROM_REG(val)       ((val)?1:0)
 326
 327 #define DIV_FROM_REG(val) (1 << (val))
 328
 329 static inline u8 DIV_TO_REG(long val)
 330 {
 331         int i;
 332         val = SENSORS_LIMIT(val, 1, 128) >> 1;
 333         for (i = 0; i < 7; i++) {
 334                 if (val == 0)
 335                         break;
 336                 val >>= 1;
 337         }
 338         return ((u8) i);
 339 }
 340
 341 /* For each registered chip, we need to keep some data in memory.
 342    The structure is dynamically allocated. */
 343 struct w83627hf_data {
 344         unsigned short addr;
 345         const char *name;
 346         struct device *hwmon_dev;
 347         struct mutex lock;
 348         enum chips type;
 349
 350         struct mutex update_lock;
 351         char valid;             /* !=0 if following fields are valid */
 352         unsigned long last_updated;     /* In jiffies */
 353
 354         u8 in[9];               /* Register value */
 355         u8 in_max[9];           /* Register value */
 356         u8 in_min[9];           /* Register value */
 357         u8 fan[3];              /* Register value */
 358         u8 fan_min[3];          /* Register value */
 359         u16 temp[3];            /* Register value */
 360         u16 temp_max[3];        /* Register value */
 361         u16 temp_max_hyst[3];   /* Register value */
 362         u8 fan_div[3];          /* Register encoding, shifted right */
 363         u8 vid;                 /* Register encoding, combined */
 364         u32 alarms;             /* Register encoding, combined */
 365         u32 beep_mask;          /* Register encoding, combined */
 366         u8 beep_enable;         /* Boolean */
 367         u8 pwm[3];              /* Register value */
 368         u8 pwm_freq[3];         /* Register value */
 369         u16 sens[3];            /* 1 = pentium diode; 2 = 3904 diode;
 370                                    4 = thermistor */
 371         u8 vrm;
 372         u8 vrm_ovt;             /* Register value, 627THF/637HF/687THF only */
 373 };
 374
 375 struct w83627hf_sio_data {
 376         enum chips type;
 377 };
 378
 379
 380 static int w83627hf_probe(struct platform_device *pdev);
 381 static int __devexit w83627hf_remove(struct platform_device *pdev);
 382
 383 static int w83627hf_read_value(struct w83627hf_data *data, u16 reg);
 384 static int w83627hf_write_value(struct w83627hf_data *data, u16 reg, u16 value);
 385 static void w83627hf_update_fan_div(struct w83627hf_data *data);
 386 static struct w83627hf_data *w83627hf_update_device(struct device *dev);
 387 static void w83627hf_init_device(struct platform_device *pdev);
 388
 389 static struct platform_driver w83627hf_driver = {
 390         .driver = {
 391                 .owner  = THIS_MODULE,
 392                 .name   = DRVNAME,
 393         },
 394         .probe          = w83627hf_probe,
 395         .remove         = __devexit_p(w83627hf_remove),
 396 };
 397
 398 static ssize_t
 399 show_in_input(struct device *dev, struct device_attribute *devattr, char *buf)
 400 {
 401         int nr = to_sensor_dev_attr(devattr)->index;
 402         struct w83627hf_data *data = w83627hf_update_device(dev);
 403         return sprintf(buf, "%ld\n", (long)IN_FROM_REG(data->in[nr]));
 404 }
 405 static ssize_t
 406 show_in_min(struct device *dev, struct device_attribute *devattr, char *buf)
 407 {
 408         int nr = to_sensor_dev_attr(devattr)->index;
 409         struct w83627hf_data *data = w83627hf_update_device(dev);
 410         return sprintf(buf, "%ld\n", (long)IN_FROM_REG(data->in_min[nr]));
 411 }
 412 static ssize_t
 413 show_in_max(struct device *dev, struct device_attribute *devattr, char *buf)
 414 {
 415         int nr = to_sensor_dev_attr(devattr)->index;
 416         struct w83627hf_data *data = w83627hf_update_device(dev);
 417         return sprintf(buf, "%ld\n", (long)IN_FROM_REG(data->in_max[nr]));
 418 }
 419 static ssize_t
 420 store_in_min(struct device *dev, struct device_attribute *devattr,
 421              const char *buf, size_t count)
 422 {
 423         int nr = to_sensor_dev_attr(devattr)->index;
 424         struct w83627hf_data *data = dev_get_drvdata(dev);
 425         long val = simple_strtol(buf, NULL, 10);
 426
 427         mutex_lock(&data->update_lock);
 428         data->in_min[nr] = IN_TO_REG(val);
 429         w83627hf_write_value(data, W83781D_REG_IN_MIN(nr), data->in_min[nr]);
 430         mutex_unlock(&data->update_lock);
 431         return count;
 432 }
 433 static ssize_t
 434 store_in_max(struct device *dev, struct device_attribute *devattr,
 435              const char *buf, size_t count)
 436 {
 437         int nr = to_sensor_dev_attr(devattr)->index;
 438         struct w83627hf_data *data = dev_get_drvdata(dev);
 439         long val = simple_strtol(buf, NULL, 10);
 440
 441         mutex_lock(&data->update_lock);
 442         data->in_max[nr] = IN_TO_REG(val);
 443         w83627hf_write_value(data, W83781D_REG_IN_MAX(nr), data->in_max[nr]);
 444         mutex_unlock(&data->update_lock);
 445         return count;
 446 }
 447 #define sysfs_vin_decl(offset) \
 448 static SENSOR_DEVICE_ATTR(in##offset##_input, S_IRUGO,          \
 449                           show_in_input, NULL, offset);         \
 450 static SENSOR_DEVICE_ATTR(in##offset##_min, S_IRUGO|S_IWUSR,    \
 451                           show_in_min, store_in_min, offset);   \
 452 static SENSOR_DEVICE_ATTR(in##offset##_max, S_IRUGO|S_IWUSR,    \
 453                           show_in_max, store_in_max, offset);
 454
 455 sysfs_vin_decl(1);
 456 sysfs_vin_decl(2);
 457 sysfs_vin_decl(3);
 458 sysfs_vin_decl(4);
 459 sysfs_vin_decl(5);
 460 sysfs_vin_decl(6);
 461 sysfs_vin_decl(7);
 462 sysfs_vin_decl(8);
 463
 464 /* use a different set of functions for in0 */
 465 static ssize_t show_in_0(struct w83627hf_data *data, char *buf, u8 reg)
 466 {
 467         long in0;
 468
 469         if ((data->vrm_ovt & 0x01) &&
 470                 (w83627thf == data->type || w83637hf == data->type
 471                  || w83687thf == data->type))
 472
 473                 /* use VRM9 calculation */
 474                 in0 = (long)((reg * 488 + 70000 + 50) / 100);
 475         else
 476                 /* use VRM8 (standard) calculation */
 477                 in0 = (long)IN_FROM_REG(reg);
 478
 479         return sprintf(buf,"%ld\n", in0);
 480 }
 481
 482 static ssize_t show_regs_in_0(struct device *dev, struct device_attribute *attr, char *buf)
 483 {
 484         struct w83627hf_data *data = w83627hf_update_device(dev);
 485         return show_in_0(data, buf, data->in[0]);
 486 }
 487
 488 static ssize_t show_regs_in_min0(struct device *dev, struct device_attribute *attr, char *buf)
 489 {
 490         struct w83627hf_data *data = w83627hf_update_device(dev);
 491         return show_in_0(data, buf, data->in_min[0]);
 492 }
 493
 494 static ssize_t show_regs_in_max0(struct device *dev, struct device_attribute *attr, char *buf)
 495 {
 496         struct w83627hf_data *data = w83627hf_update_device(dev);
 497         return show_in_0(data, buf, data->in_max[0]);
 498 }
 499
 500 static ssize_t store_regs_in_min0(struct device *dev, struct device_attribute *attr,
 501         const char *buf, size_t count)
 502 {
 503         struct w83627hf_data *data = dev_get_drvdata(dev);
 504         u32 val;
 505
 506         val = simple_strtoul(buf, NULL, 10);
 507
 508         mutex_lock(&data->update_lock);
 509
 510         if ((data->vrm_ovt & 0x01) &&
 511                 (w83627thf == data->type || w83637hf == data->type
 512                  || w83687thf == data->type))
 513
 514                 /* use VRM9 calculation */
 515                 data->in_min[0] =
 516                         SENSORS_LIMIT(((val * 100) - 70000 + 244) / 488, 0,
 517                                         255);
 518         else
 519                 /* use VRM8 (standard) calculation */
 520                 data->in_min[0] = IN_TO_REG(val);
 521
 522         w83627hf_write_value(data, W83781D_REG_IN_MIN(0), data->in_min[0]);
 523         mutex_unlock(&data->update_lock);
 524         return count;
 525 }
 526
 527 static ssize_t store_regs_in_max0(struct device *dev, struct device_attribute *attr,
 528         const char *buf, size_t count)
 529 {
 530         struct w83627hf_data *data = dev_get_drvdata(dev);
 531         u32 val;
 532
 533         val = simple_strtoul(buf, NULL, 10);
 534
 535         mutex_lock(&data->update_lock);
 536
 537         if ((data->vrm_ovt & 0x01) &&
 538                 (w83627thf == data->type || w83637hf == data->type
 539                  || w83687thf == data->type))
 540
 541                 /* use VRM9 calculation */
 542                 data->in_max[0] =
 543                         SENSORS_LIMIT(((val * 100) - 70000 + 244) / 488, 0,
 544                                         255);
 545         else
 546                 /* use VRM8 (standard) calculation */
 547                 data->in_max[0] = IN_TO_REG(val);
 548
 549         w83627hf_write_value(data, W83781D_REG_IN_MAX(0), data->in_max[0]);
 550         mutex_unlock(&data->update_lock);
 551         return count;
 552 }
 553
 554 static DEVICE_ATTR(in0_input, S_IRUGO, show_regs_in_0, NULL);
 555 static DEVICE_ATTR(in0_min, S_IRUGO | S_IWUSR,
 556         show_regs_in_min0, store_regs_in_min0);
 557 static DEVICE_ATTR(in0_max, S_IRUGO | S_IWUSR,
 558         show_regs_in_max0, store_regs_in_max0);
 559
 560 static ssize_t
 561 show_fan_input(struct device *dev, struct device_attribute *devattr, char *buf)
 562 {
 563         int nr = to_sensor_dev_attr(devattr)->index;
 564         struct w83627hf_data *data = w83627hf_update_device(dev);
 565         return sprintf(buf, "%ld\n", FAN_FROM_REG(data->fan[nr],
 566                                 (long)DIV_FROM_REG(data->fan_div[nr])));
 567 }
 568 static ssize_t
 569 show_fan_min(struct device *dev, struct device_attribute *devattr, char *buf)
 570 {
 571         int nr = to_sensor_dev_attr(devattr)->index;
 572         struct w83627hf_data *data = w83627hf_update_device(dev);
 573         return sprintf(buf, "%ld\n", FAN_FROM_REG(data->fan_min[nr],
 574                                 (long)DIV_FROM_REG(data->fan_div[nr])));
 575 }
 576 static ssize_t
 577 store_fan_min(struct device *dev, struct device_attribute *devattr,
 578               const char *buf, size_t count)
 579 {
 580         int nr = to_sensor_dev_attr(devattr)->index;
 581         struct w83627hf_data *data = dev_get_drvdata(dev);
 582         u32 val = simple_strtoul(buf, NULL, 10);
 583
 584         mutex_lock(&data->update_lock);
 585         data->fan_min[nr] = FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
 586         w83627hf_write_value(data, W83627HF_REG_FAN_MIN(nr),
 587                              data->fan_min[nr]);
 588
 589         mutex_unlock(&data->update_lock);
 590         return count;
 591 }
 592 #define sysfs_fan_decl(offset)  \
 593 static SENSOR_DEVICE_ATTR(fan##offset##_input, S_IRUGO,                 \
 594                           show_fan_input, NULL, offset - 1);            \
 595 static SENSOR_DEVICE_ATTR(fan##offset##_min, S_IRUGO | S_IWUSR,         \
 596                           show_fan_min, store_fan_min, offset - 1);
 597
 598 sysfs_fan_decl(1);
 599 sysfs_fan_decl(2);
 600 sysfs_fan_decl(3);
 601
 602 static ssize_t
 603 show_temp(struct device *dev, struct device_attribute *devattr, char *buf)
 604 {
 605         int nr = to_sensor_dev_attr(devattr)->index;
 606         struct w83627hf_data *data = w83627hf_update_device(dev);
 607
 608         u16 tmp = data->temp[nr];
 609         return sprintf(buf, "%ld\n", (nr) ? (long) LM75_TEMP_FROM_REG(tmp)
 610                                           : (long) TEMP_FROM_REG(tmp));
 611 }
 612
 613 static ssize_t
 614 show_temp_max(struct device *dev, struct device_attribute *devattr,
 615               char *buf)
 616 {
 617         int nr = to_sensor_dev_attr(devattr)->index;
 618         struct w83627hf_data *data = w83627hf_update_device(dev);
 619
 620         u16 tmp = data->temp_max[nr];
 621         return sprintf(buf, "%ld\n", (nr) ? (long) LM75_TEMP_FROM_REG(tmp)
 622                                           : (long) TEMP_FROM_REG(tmp));
 623 }
 624
 625 static ssize_t
 626 show_temp_max_hyst(struct device *dev, struct device_attribute *devattr,
 627                    char *buf)
 628 {
 629         int nr = to_sensor_dev_attr(devattr)->index;
 630         struct w83627hf_data *data = w83627hf_update_device(dev);
 631
 632         u16 tmp = data->temp_max_hyst[nr];
 633         return sprintf(buf, "%ld\n", (nr) ? (long) LM75_TEMP_FROM_REG(tmp)
 634                                           : (long) TEMP_FROM_REG(tmp));
 635 }
 636
 637 static ssize_t
 638 store_temp_max(struct device *dev, struct device_attribute *devattr,
 639                const char *buf, size_t count)
 640 {
 641         int nr = to_sensor_dev_attr(devattr)->index;
 642         struct w83627hf_data *data = dev_get_drvdata(dev);
 643         long val = simple_strtol(buf, NULL, 10);
 644         u16 tmp = (nr) ? LM75_TEMP_TO_REG(val) : TEMP_TO_REG(val);
 645
 646         mutex_lock(&data->update_lock);
 647         data->temp_max[nr] = tmp;
 648         w83627hf_write_value(data, w83627hf_reg_temp_over[nr], tmp);
 649         mutex_unlock(&data->update_lock);
 650         return count;
 651 }
 652
 653 static ssize_t
 654 store_temp_max_hyst(struct device *dev, struct device_attribute *devattr,
 655                     const char *buf, size_t count)
 656 {
 657         int nr = to_sensor_dev_attr(devattr)->index;
 658         struct w83627hf_data *data = dev_get_drvdata(dev);
 659         long val = simple_strtol(buf, NULL, 10);
 660         u16 tmp = (nr) ? LM75_TEMP_TO_REG(val) : TEMP_TO_REG(val);
 661
 662         mutex_lock(&data->update_lock);
 663         data->temp_max_hyst[nr] = tmp;
 664         w83627hf_write_value(data, w83627hf_reg_temp_hyst[nr], tmp);
 665         mutex_unlock(&data->update_lock);
 666         return count;
 667 }
 668
 669 #define sysfs_temp_decl(offset) \
 670 static SENSOR_DEVICE_ATTR(temp##offset##_input, S_IRUGO,                \
 671                           show_temp, NULL, offset - 1);                 \
 672 static SENSOR_DEVICE_ATTR(temp##offset##_max, S_IRUGO|S_IWUSR,          \
 673                           show_temp_max, store_temp_max, offset - 1);   \
 674 static SENSOR_DEVICE_ATTR(temp##offset##_max_hyst, S_IRUGO|S_IWUSR,     \
 675                           show_temp_max_hyst, store_temp_max_hyst, offset - 1);
 676
 677 sysfs_temp_decl(1);
 678 sysfs_temp_decl(2);
 679 sysfs_temp_decl(3);
 680
 681 static ssize_t
 682 show_vid_reg(struct device *dev, struct device_attribute *attr, char *buf)
 683 {
 684         struct w83627hf_data *data = w83627hf_update_device(dev);
 685         return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm));
 686 }
 687 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
 688
 689 static ssize_t
 690 show_vrm_reg(struct device *dev, struct device_attribute *attr, char *buf)
 691 {
 692         struct w83627hf_data *data = dev_get_drvdata(dev);
 693         return sprintf(buf, "%ld\n", (long) data->vrm);
 694 }
 695 static ssize_t
 696 store_vrm_reg(struct device *dev, struct device_attribute *attr, const char *buf, size_t count)
 697 {
 698         struct w83627hf_data *data = dev_get_drvdata(dev);
 699         u32 val;
 700
 701         val = simple_strtoul(buf, NULL, 10);
 702         data->vrm = val;
 703
 704         return count;
 705 }
 706 static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
 707
 708 static ssize_t
 709 show_alarms_reg(struct device *dev, struct device_attribute *attr, char *buf)
 710 {
 711         struct w83627hf_data *data = w83627hf_update_device(dev);
 712         return sprintf(buf, "%ld\n", (long) data->alarms);
 713 }
 714 static DEVICE_ATTR(alarms, S_IRUGO, show_alarms_reg, NULL);
 715
 716 #define show_beep_reg(REG, reg) \
 717 static ssize_t show_beep_##reg (struct device *dev, struct device_attribute *attr, char *buf) \
 718 { \
 719         struct w83627hf_data *data = w83627hf_update_device(dev); \
 720         return sprintf(buf,"%ld\n", \
 721                       (long)BEEP_##REG##_FROM_REG(data->beep_##reg)); \
 722 }
 723 show_beep_reg(ENABLE, enable)
 724 show_beep_reg(MASK, mask)
 725
 726 #define BEEP_ENABLE                     0       /* Store beep_enable */
 727 #define BEEP_MASK                       1       /* Store beep_mask */
 728
 729 static ssize_t
 730 store_beep_reg(struct device *dev, const char *buf, size_t count,
 731                int update_mask)
 732 {
 733         struct w83627hf_data *data = dev_get_drvdata(dev);
 734         u32 val, val2;
 735
 736         val = simple_strtoul(buf, NULL, 10);
 737
 738         mutex_lock(&data->update_lock);
 739
 740         if (update_mask == BEEP_MASK) { /* We are storing beep_mask */
 741                 data->beep_mask = BEEP_MASK_TO_REG(val);
 742                 w83627hf_write_value(data, W83781D_REG_BEEP_INTS1,
 743                                     data->beep_mask & 0xff);
 744                 w83627hf_write_value(data, W83781D_REG_BEEP_INTS3,
 745                                     ((data->beep_mask) >> 16) & 0xff);
 746                 val2 = (data->beep_mask >> 8) & 0x7f;
 747         } else {                /* We are storing beep_enable */
 748                 val2 =
 749                     w83627hf_read_value(data, W83781D_REG_BEEP_INTS2) & 0x7f;
 750                 data->beep_enable = BEEP_ENABLE_TO_REG(val);
 751         }
 752
 753         w83627hf_write_value(data, W83781D_REG_BEEP_INTS2,
 754                             val2 | data->beep_enable << 7);
 755
 756         mutex_unlock(&data->update_lock);
 757         return count;
 758 }
 759
 760 #define sysfs_beep(REG, reg) \
 761 static ssize_t show_regs_beep_##reg (struct device *dev, struct device_attribute *attr, char *buf) \
 762 { \
 763         return show_beep_##reg(dev, attr, buf); \
 764 } \
 765 static ssize_t \
 766 store_regs_beep_##reg (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
 767 { \
 768         return store_beep_reg(dev, buf, count, BEEP_##REG); \
 769 } \
 770 static DEVICE_ATTR(beep_##reg, S_IRUGO | S_IWUSR, \
 771                   show_regs_beep_##reg, store_regs_beep_##reg);
 772
 773 sysfs_beep(ENABLE, enable);
 774 sysfs_beep(MASK, mask);
 775
 776 static ssize_t
 777 show_fan_div(struct device *dev, struct device_attribute *devattr, char *buf)
 778 {
 779         int nr = to_sensor_dev_attr(devattr)->index;
 780         struct w83627hf_data *data = w83627hf_update_device(dev);
 781         return sprintf(buf, "%ld\n",
 782                        (long) DIV_FROM_REG(data->fan_div[nr]));
 783 }
 784 /* Note: we save and restore the fan minimum here, because its value is
 785    determined in part by the fan divisor.  This follows the principle of
 786    least surprise; the user doesn't expect the fan minimum to change just
 787    because the divisor changed. */
 788 static ssize_t
 789 store_fan_div(struct device *dev, struct device_attribute *devattr,
 790               const char *buf, size_t count)
 791 {
 792         int nr = to_sensor_dev_attr(devattr)->index;
 793         struct w83627hf_data *data = dev_get_drvdata(dev);
 794         unsigned long min;
 795         u8 reg;
 796         unsigned long val = simple_strtoul(buf, NULL, 10);
 797
 798         mutex_lock(&data->update_lock);
 799
 800         /* Save fan_min */
 801         min = FAN_FROM_REG(data->fan_min[nr],
 802                            DIV_FROM_REG(data->fan_div[nr]));
 803
 804         data->fan_div[nr] = DIV_TO_REG(val);
 805
 806         reg = (w83627hf_read_value(data, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV)
 807                & (nr==0 ? 0xcf : 0x3f))
 808             | ((data->fan_div[nr] & 0x03) << (nr==0 ? 4 : 6));
 809         w83627hf_write_value(data, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV, reg);
 810
 811         reg = (w83627hf_read_value(data, W83781D_REG_VBAT)
 812                & ~(1 << (5 + nr)))
 813             | ((data->fan_div[nr] & 0x04) << (3 + nr));
 814         w83627hf_write_value(data, W83781D_REG_VBAT, reg);
 815
 816         /* Restore fan_min */
 817         data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
 818         w83627hf_write_value(data, W83627HF_REG_FAN_MIN(nr), data->fan_min[nr]);
 819
 820         mutex_unlock(&data->update_lock);
 821         return count;
 822 }
 823
 824 static SENSOR_DEVICE_ATTR(fan1_div, S_IRUGO|S_IWUSR,
 825                           show_fan_div, store_fan_div, 0);
 826 static SENSOR_DEVICE_ATTR(fan2_div, S_IRUGO|S_IWUSR,
 827                           show_fan_div, store_fan_div, 1);
 828 static SENSOR_DEVICE_ATTR(fan3_div, S_IRUGO|S_IWUSR,
 829                           show_fan_div, store_fan_div, 2);
 830
 831 static ssize_t
 832 show_pwm(struct device *dev, struct device_attribute *devattr, char *buf)
 833 {
 834         int nr = to_sensor_dev_attr(devattr)->index;
 835         struct w83627hf_data *data = w83627hf_update_device(dev);
 836         return sprintf(buf, "%ld\n", (long) data->pwm[nr]);
 837 }
 838
 839 static ssize_t
 840 store_pwm(struct device *dev, struct device_attribute *devattr,
 841           const char *buf, size_t count)
 842 {
 843         int nr = to_sensor_dev_attr(devattr)->index;
 844         struct w83627hf_data *data = dev_get_drvdata(dev);
 845         u32 val = simple_strtoul(buf, NULL, 10);
 846
 847         mutex_lock(&data->update_lock);
 848
 849         if (data->type == w83627thf) {
 850                 /* bits 0-3 are reserved  in 627THF */
 851                 data->pwm[nr] = PWM_TO_REG(val) & 0xf0;
 852                 w83627hf_write_value(data,
 853                                      W836X7HF_REG_PWM(data->type, nr),
 854                                      data->pwm[nr] |
 855                                      (w83627hf_read_value(data,
 856                                      W836X7HF_REG_PWM(data->type, nr)) & 0x0f));
 857         } else {
 858                 data->pwm[nr] = PWM_TO_REG(val);
 859                 w83627hf_write_value(data,
 860                                      W836X7HF_REG_PWM(data->type, nr),
 861                                      data->pwm[nr]);
 862         }
 863
 864         mutex_unlock(&data->update_lock);
 865         return count;
 866 }
 867
 868 static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 0);
 869 static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 1);
 870 static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 2);
 871
 872 static ssize_t
 873 show_pwm_freq(struct device *dev, struct device_attribute *devattr, char *buf)
 874 {
 875         int nr = to_sensor_dev_attr(devattr)->index;
 876         struct w83627hf_data *data = w83627hf_update_device(dev);
 877         if (data->type == w83627hf)
 878                 return sprintf(buf, "%ld\n",
 879                         pwm_freq_from_reg_627hf(data->pwm_freq[nr]));
 880         else
 881                 return sprintf(buf, "%ld\n",
 882                         pwm_freq_from_reg(data->pwm_freq[nr]));
 883 }
 884
 885 static ssize_t
 886 store_pwm_freq(struct device *dev, struct device_attribute *devattr,
 887                const char *buf, size_t count)
 888 {
 889         int nr = to_sensor_dev_attr(devattr)->index;
 890         struct w83627hf_data *data = dev_get_drvdata(dev);
 891         static const u8 mask[]={0xF8, 0x8F};
 892         u32 val;
 893
 894         val = simple_strtoul(buf, NULL, 10);
 895
 896         mutex_lock(&data->update_lock);
 897
 898         if (data->type == w83627hf) {
 899                 data->pwm_freq[nr] = pwm_freq_to_reg_627hf(val);
 900                 w83627hf_write_value(data, W83627HF_REG_PWM_FREQ,
 901                                 (data->pwm_freq[nr] << (nr*4)) |
 902                                 (w83627hf_read_value(data,
 903                                 W83627HF_REG_PWM_FREQ) & mask[nr]));
 904         } else {
 905                 data->pwm_freq[nr] = pwm_freq_to_reg(val);
 906                 w83627hf_write_value(data, W83637HF_REG_PWM_FREQ[nr],
 907                                 data->pwm_freq[nr]);
 908         }
 909
 910         mutex_unlock(&data->update_lock);
 911         return count;
 912 }
 913
 914 static SENSOR_DEVICE_ATTR(pwm1_freq, S_IRUGO|S_IWUSR,
 915                           show_pwm_freq, store_pwm_freq, 0);
 916 static SENSOR_DEVICE_ATTR(pwm2_freq, S_IRUGO|S_IWUSR,
 917                           show_pwm_freq, store_pwm_freq, 1);
 918 static SENSOR_DEVICE_ATTR(pwm3_freq, S_IRUGO|S_IWUSR,
 919                           show_pwm_freq, store_pwm_freq, 2);
 920
 921 static ssize_t
 922 show_temp_type(struct device *dev, struct device_attribute *devattr,
 923                char *buf)
 924 {
 925         int nr = to_sensor_dev_attr(devattr)->index;
 926         struct w83627hf_data *data = w83627hf_update_device(dev);
 927         return sprintf(buf, "%ld\n", (long) data->sens[nr]);
 928 }
 929
 930 static ssize_t
 931 store_temp_type(struct device *dev, struct device_attribute *devattr,
 932                 const char *buf, size_t count)
 933 {
 934         int nr = to_sensor_dev_attr(devattr)->index;
 935         struct w83627hf_data *data = dev_get_drvdata(dev);
 936         u32 val, tmp;
 937
 938         val = simple_strtoul(buf, NULL, 10);
 939
 940         mutex_lock(&data->update_lock);
 941
 942         switch (val) {
 943         case 1:         /* PII/Celeron diode */
 944                 tmp = w83627hf_read_value(data, W83781D_REG_SCFG1);
 945                 w83627hf_write_value(data, W83781D_REG_SCFG1,
 946                                     tmp | BIT_SCFG1[nr]);
 947                 tmp = w83627hf_read_value(data, W83781D_REG_SCFG2);
 948                 w83627hf_write_value(data, W83781D_REG_SCFG2,
 949                                     tmp | BIT_SCFG2[nr]);
 950                 data->sens[nr] = val;
 951                 break;
 952         case 2:         /* 3904 */
 953                 tmp = w83627hf_read_value(data, W83781D_REG_SCFG1);
 954                 w83627hf_write_value(data, W83781D_REG_SCFG1,
 955                                     tmp | BIT_SCFG1[nr]);
 956                 tmp = w83627hf_read_value(data, W83781D_REG_SCFG2);
 957                 w83627hf_write_value(data, W83781D_REG_SCFG2,
 958                                     tmp & ~BIT_SCFG2[nr]);
 959                 data->sens[nr] = val;
 960                 break;
 961         case W83781D_DEFAULT_BETA:
 962                 dev_warn(dev, "Sensor type %d is deprecated, please use 4 "
 963                          "instead\n", W83781D_DEFAULT_BETA);
 964                 /* fall through */
 965         case 4:         /* thermistor */
 966                 tmp = w83627hf_read_value(data, W83781D_REG_SCFG1);
 967                 w83627hf_write_value(data, W83781D_REG_SCFG1,
 968                                     tmp & ~BIT_SCFG1[nr]);
 969                 data->sens[nr] = val;
 970                 break;
 971         default:
 972                 dev_err(dev,
 973                        "Invalid sensor type %ld; must be 1, 2, or 4\n",
 974                        (long) val);
 975                 break;
 976         }
 977
 978         mutex_unlock(&data->update_lock);
 979         return count;
 980 }
 981
 982 #define sysfs_temp_type(offset) \
 983 static SENSOR_DEVICE_ATTR(temp##offset##_type, S_IRUGO | S_IWUSR, \
 984                           show_temp_type, store_temp_type, offset - 1);
 985
 986 sysfs_temp_type(1);
 987 sysfs_temp_type(2);
 988 sysfs_temp_type(3);
 989
 990 static ssize_t
 991 show_name(struct device *dev, struct device_attribute *devattr, char *buf)
 992 {
 993         struct w83627hf_data *data = dev_get_drvdata(dev);
 994
 995         return sprintf(buf, "%s\n", data->name);
 996 }
 997 static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
 998
 999 static int __init w83627hf_find(int sioaddr, unsigned short *addr,
1000                                 struct w83627hf_sio_data *sio_data)
1001 {
1002         int err = -ENODEV;
1003         u16 val;
1004
1005         static const __initdata char *names[] = {
1006                 "W83627HF",
1007                 "W83627THF",
1008                 "W83697HF",
1009                 "W83637HF",
1010                 "W83687THF",
1011         };
1012
1013         REG = sioaddr;
1014         VAL = sioaddr + 1;
1015
1016         superio_enter();
1017         val= superio_inb(DEVID);
1018         switch (val) {
1019         case W627_DEVID:
1020                 sio_data->type = w83627hf;
1021                 break;
1022         case W627THF_DEVID:
1023                 sio_data->type = w83627thf;
1024                 break;
1025         case W697_DEVID:
1026                 sio_data->type = w83697hf;
1027                 break;
1028         case W637_DEVID:
1029                 sio_data->type = w83637hf;
1030                 break;
1031         case W687THF_DEVID:
1032                 sio_data->type = w83687thf;
1033                 break;
1034         case 0xff:      /* No device at all */
1035                 goto exit;
1036         default:
1037                 pr_debug(DRVNAME ": Unsupported chip (DEVID=0x%02x)\n", val);
1038                 goto exit;
1039         }
1040
1041         superio_select(W83627HF_LD_HWM);
1042         force_addr &= WINB_ALIGNMENT;
1043         if (force_addr) {
1044                 printk(KERN_WARNING DRVNAME ": Forcing address 0x%x\n",
1045                        force_addr);
1046                 superio_outb(WINB_BASE_REG, force_addr >> 8);
1047                 superio_outb(WINB_BASE_REG + 1, force_addr & 0xff);
1048         }
1049         val = (superio_inb(WINB_BASE_REG) << 8) |
1050                superio_inb(WINB_BASE_REG + 1);
1051         *addr = val & WINB_ALIGNMENT;
1052         if (*addr == 0) {
1053                 printk(KERN_WARNING DRVNAME ": Base address not set, "
1054                        "skipping\n");
1055                 goto exit;
1056         }
1057
1058         val = superio_inb(WINB_ACT_REG);
1059         if (!(val & 0x01)) {
1060                 printk(KERN_WARNING DRVNAME ": Enabling HWM logical device\n");
1061                 superio_outb(WINB_ACT_REG, val | 0x01);
1062         }
1063
1064         err = 0;
1065         pr_info(DRVNAME ": Found %s chip at %#x\n",
1066                 names[sio_data->type], *addr);
1067
1068  exit:
1069         superio_exit();
1070         return err;
1071 }
1072
1073 #define VIN_UNIT_ATTRS(_X_)     \
1074         &sensor_dev_attr_in##_X_##_input.dev_attr.attr,         \
1075         &sensor_dev_attr_in##_X_##_min.dev_attr.attr,           \
1076         &sensor_dev_attr_in##_X_##_max.dev_attr.attr
1077
1078 #define FAN_UNIT_ATTRS(_X_)     \
1079         &sensor_dev_attr_fan##_X_##_input.dev_attr.attr,        \
1080         &sensor_dev_attr_fan##_X_##_min.dev_attr.attr,          \
1081         &sensor_dev_attr_fan##_X_##_div.dev_attr.attr
1082
1083 #define TEMP_UNIT_ATTRS(_X_)    \
1084         &sensor_dev_attr_temp##_X_##_input.dev_attr.attr,       \
1085         &sensor_dev_attr_temp##_X_##_max.dev_attr.attr,         \
1086         &sensor_dev_attr_temp##_X_##_max_hyst.dev_attr.attr,    \
1087         &sensor_dev_attr_temp##_X_##_type.dev_attr.attr
1088
1089 static struct attribute *w83627hf_attributes[] = {
1090         &dev_attr_in0_input.attr,
1091         &dev_attr_in0_min.attr,
1092         &dev_attr_in0_max.attr,
1093         VIN_UNIT_ATTRS(2),
1094         VIN_UNIT_ATTRS(3),
1095         VIN_UNIT_ATTRS(4),
1096         VIN_UNIT_ATTRS(7),
1097         VIN_UNIT_ATTRS(8),
1098
1099         FAN_UNIT_ATTRS(1),
1100         FAN_UNIT_ATTRS(2),
1101
1102         TEMP_UNIT_ATTRS(1),
1103         TEMP_UNIT_ATTRS(2),
1104
1105         &dev_attr_alarms.attr,
1106         &dev_attr_beep_enable.attr,
1107         &dev_attr_beep_mask.attr,
1108
1109         &sensor_dev_attr_pwm1.dev_attr.attr,
1110         &sensor_dev_attr_pwm2.dev_attr.attr,
1111         &dev_attr_name.attr,
1112         NULL
1113 };
1114
1115 static const struct attribute_group w83627hf_group = {
1116         .attrs = w83627hf_attributes,
1117 };
1118
1119 static struct attribute *w83627hf_attributes_opt[] = {
1120         VIN_UNIT_ATTRS(1),
1121         VIN_UNIT_ATTRS(5),
1122         VIN_UNIT_ATTRS(6),
1123
1124         FAN_UNIT_ATTRS(3),
1125         TEMP_UNIT_ATTRS(3),
1126         &sensor_dev_attr_pwm3.dev_attr.attr,
1127
1128         &sensor_dev_attr_pwm1_freq.dev_attr.attr,
1129         &sensor_dev_attr_pwm2_freq.dev_attr.attr,
1130         &sensor_dev_attr_pwm3_freq.dev_attr.attr,
1131         NULL
1132 };
1133
1134 static const struct attribute_group w83627hf_group_opt = {
1135         .attrs = w83627hf_attributes_opt,
1136 };
1137
1138 static int __devinit w83627hf_probe(struct platform_device *pdev)
1139 {
1140         struct device *dev = &pdev->dev;
1141         struct w83627hf_sio_data *sio_data = dev->platform_data;
1142         struct w83627hf_data *data;
1143         struct resource *res;
1144         int err, i;
1145
1146         static const char *names[] = {
1147                 "w83627hf",
1148                 "w83627thf",
1149                 "w83697hf",
1150                 "w83637hf",
1151                 "w83687thf",
1152         };
1153
1154         res = platform_get_resource(pdev, IORESOURCE_IO, 0);
1155         if (!request_region(res->start, WINB_REGION_SIZE, DRVNAME)) {
1156                 dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
1157                         (unsigned long)res->start,
1158                         (unsigned long)(res->start + WINB_REGION_SIZE - 1));
1159                 err = -EBUSY;
1160                 goto ERROR0;
1161         }
1162
1163         if (!(data = kzalloc(sizeof(struct w83627hf_data), GFP_KERNEL))) {
1164                 err = -ENOMEM;
1165                 goto ERROR1;
1166         }
1167         data->addr = res->start;
1168         data->type = sio_data->type;
1169         data->name = names[sio_data->type];
1170         mutex_init(&data->lock);
1171         mutex_init(&data->update_lock);
1172         platform_set_drvdata(pdev, data);
1173
1174         /* Initialize the chip */
1175         w83627hf_init_device(pdev);
1176
1177         /* A few vars need to be filled upon startup */
1178         for (i = 0; i <= 2; i++)
1179                 data->fan_min[i] = w83627hf_read_value(
1180                                         data, W83627HF_REG_FAN_MIN(i));
1181         w83627hf_update_fan_div(data);
1182
1183         /* Register common device attributes */
1184         if ((err = sysfs_create_group(&dev->kobj, &w83627hf_group)))
1185                 goto ERROR3;
1186
1187         /* Register chip-specific device attributes */
1188         if (data->type == w83627hf || data->type == w83697hf)
1189                 if ((err = device_create_file(dev,
1190                                 &sensor_dev_attr_in5_input.dev_attr))
1191                  || (err = device_create_file(dev,
1192                                 &sensor_dev_attr_in5_min.dev_attr))
1193                  || (err = device_create_file(dev,
1194                                 &sensor_dev_attr_in5_max.dev_attr))
1195                  || (err = device_create_file(dev,
1196                                 &sensor_dev_attr_in6_input.dev_attr))
1197                  || (err = device_create_file(dev,
1198                                 &sensor_dev_attr_in6_min.dev_attr))
1199                  || (err = device_create_file(dev,
1200                                 &sensor_dev_attr_in6_max.dev_attr))
1201                  || (err = device_create_file(dev,
1202                                 &sensor_dev_attr_pwm1_freq.dev_attr))
1203                  || (err = device_create_file(dev,
1204                                 &sensor_dev_attr_pwm2_freq.dev_attr)))
1205                         goto ERROR4;
1206
1207         if (data->type != w83697hf)
1208                 if ((err = device_create_file(dev,
1209                                 &sensor_dev_attr_in1_input.dev_attr))
1210                  || (err = device_create_file(dev,
1211                                 &sensor_dev_attr_in1_min.dev_attr))
1212                  || (err = device_create_file(dev,
1213                                 &sensor_dev_attr_in1_max.dev_attr))
1214                  || (err = device_create_file(dev,
1215                                 &sensor_dev_attr_fan3_input.dev_attr))
1216                  || (err = device_create_file(dev,
1217                                 &sensor_dev_attr_fan3_min.dev_attr))
1218                  || (err = device_create_file(dev,
1219                                 &sensor_dev_attr_fan3_div.dev_attr))
1220                  || (err = device_create_file(dev,
1221                                 &sensor_dev_attr_temp3_input.dev_attr))
1222                  || (err = device_create_file(dev,
1223                                 &sensor_dev_attr_temp3_max.dev_attr))
1224                  || (err = device_create_file(dev,
1225                                 &sensor_dev_attr_temp3_max_hyst.dev_attr))
1226                  || (err = device_create_file(dev,
1227                                 &sensor_dev_attr_temp3_type.dev_attr)))
1228                         goto ERROR4;
1229
1230         if (data->type != w83697hf && data->vid != 0xff) {
1231                 /* Convert VID to voltage based on VRM */
1232                 data->vrm = vid_which_vrm();
1233
1234                 if ((err = device_create_file(dev, &dev_attr_cpu0_vid))
1235                  || (err = device_create_file(dev, &dev_attr_vrm)))
1236                         goto ERROR4;
1237         }
1238
1239         if (data->type == w83627thf || data->type == w83637hf
1240          || data->type == w83687thf)
1241                 if ((err = device_create_file(dev,
1242                                 &sensor_dev_attr_pwm3.dev_attr)))
1243                         goto ERROR4;
1244
1245         if (data->type == w83637hf || data->type == w83687thf)
1246                 if ((err = device_create_file(dev,
1247                                 &sensor_dev_attr_pwm1_freq.dev_attr))
1248                  || (err = device_create_file(dev,
1249                                 &sensor_dev_attr_pwm2_freq.dev_attr))
1250                  || (err = device_create_file(dev,
1251                                 &sensor_dev_attr_pwm3_freq.dev_attr)))
1252                         goto ERROR4;
1253
1254         data->hwmon_dev = hwmon_device_register(dev);
1255         if (IS_ERR(data->hwmon_dev)) {
1256                 err = PTR_ERR(data->hwmon_dev);
1257                 goto ERROR4;
1258         }
1259
1260         return 0;
1261
1262       ERROR4:
1263         sysfs_remove_group(&dev->kobj, &w83627hf_group);
1264         sysfs_remove_group(&dev->kobj, &w83627hf_group_opt);
1265       ERROR3:
1266         platform_set_drvdata(pdev, NULL);
1267         kfree(data);
1268       ERROR1:
1269         release_region(res->start, WINB_REGION_SIZE);
1270       ERROR0:
1271         return err;
1272 }
1273
1274 static int __devexit w83627hf_remove(struct platform_device *pdev)
1275 {
1276         struct w83627hf_data *data = platform_get_drvdata(pdev);
1277         struct resource *res;
1278
1279         hwmon_device_unregister(data->hwmon_dev);
1280
1281         sysfs_remove_group(&pdev->dev.kobj, &w83627hf_group);
1282         sysfs_remove_group(&pdev->dev.kobj, &w83627hf_group_opt);
1283         platform_set_drvdata(pdev, NULL);
1284         kfree(data);
1285
1286         res = platform_get_resource(pdev, IORESOURCE_IO, 0);
1287         release_region(res->start, WINB_REGION_SIZE);
1288
1289         return 0;
1290 }
1291
1292
1293 /* Registers 0x50-0x5f are banked */
1294 static inline void w83627hf_set_bank(struct w83627hf_data *data, u16 reg)
1295 {
1296         if ((reg & 0x00f0) == 0x50) {
1297                 outb_p(W83781D_REG_BANK, data->addr + W83781D_ADDR_REG_OFFSET);
1298                 outb_p(reg >> 8, data->addr + W83781D_DATA_REG_OFFSET);
1299         }
1300 }
1301
1302 /* Not strictly necessary, but play it safe for now */
1303 static inline void w83627hf_reset_bank(struct w83627hf_data *data, u16 reg)
1304 {
1305         if (reg & 0xff00) {
1306                 outb_p(W83781D_REG_BANK, data->addr + W83781D_ADDR_REG_OFFSET);
1307                 outb_p(0, data->addr + W83781D_DATA_REG_OFFSET);
1308         }
1309 }
1310
1311 static int w83627hf_read_value(struct w83627hf_data *data, u16 reg)
1312 {
1313         int res, word_sized;
1314
1315         mutex_lock(&data->lock);
1316         word_sized = (((reg & 0xff00) == 0x100)
1317                    || ((reg & 0xff00) == 0x200))
1318                   && (((reg & 0x00ff) == 0x50)
1319                    || ((reg & 0x00ff) == 0x53)
1320                    || ((reg & 0x00ff) == 0x55));
1321         w83627hf_set_bank(data, reg);
1322         outb_p(reg & 0xff, data->addr + W83781D_ADDR_REG_OFFSET);
1323         res = inb_p(data->addr + W83781D_DATA_REG_OFFSET);
1324         if (word_sized) {
1325                 outb_p((reg & 0xff) + 1,
1326                        data->addr + W83781D_ADDR_REG_OFFSET);
1327                 res =
1328                     (res << 8) + inb_p(data->addr +
1329                                        W83781D_DATA_REG_OFFSET);
1330         }
1331         w83627hf_reset_bank(data, reg);
1332         mutex_unlock(&data->lock);
1333         return res;
1334 }
1335
1336 static int __devinit w83627thf_read_gpio5(struct platform_device *pdev)
1337 {
1338         int res = 0xff, sel;
1339
1340         superio_enter();
1341         superio_select(W83627HF_LD_GPIO5);
1342
1343         /* Make sure these GPIO pins are enabled */
1344         if (!(superio_inb(W83627THF_GPIO5_EN) & (1<<3))) {
1345                 dev_dbg(&pdev->dev, "GPIO5 disabled, no VID function\n");
1346                 goto exit;
1347         }
1348
1349         /* Make sure the pins are configured for input
1350            There must be at least five (VRM 9), and possibly 6 (VRM 10) */
1351         sel = superio_inb(W83627THF_GPIO5_IOSR) & 0x3f;
1352         if ((sel & 0x1f) != 0x1f) {
1353                 dev_dbg(&pdev->dev, "GPIO5 not configured for VID "
1354                         "function\n");
1355                 goto exit;
1356         }
1357
1358         dev_info(&pdev->dev, "Reading VID from GPIO5\n");
1359         res = superio_inb(W83627THF_GPIO5_DR) & sel;
1360
1361 exit:
1362         superio_exit();
1363         return res;
1364 }
1365
1366 static int __devinit w83687thf_read_vid(struct platform_device *pdev)
1367 {
1368         int res = 0xff;
1369
1370         superio_enter();
1371         superio_select(W83627HF_LD_HWM);
1372
1373         /* Make sure these GPIO pins are enabled */
1374         if (!(superio_inb(W83687THF_VID_EN) & (1 << 2))) {
1375                 dev_dbg(&pdev->dev, "VID disabled, no VID function\n");
1376                 goto exit;
1377         }
1378
1379         /* Make sure the pins are configured for input */
1380         if (!(superio_inb(W83687THF_VID_CFG) & (1 << 4))) {
1381                 dev_dbg(&pdev->dev, "VID configured as output, "
1382                         "no VID function\n");
1383                 goto exit;
1384         }
1385
1386         res = superio_inb(W83687THF_VID_DATA) & 0x3f;
1387
1388 exit:
1389         superio_exit();
1390         return res;
1391 }
1392
1393 static int w83627hf_write_value(struct w83627hf_data *data, u16 reg, u16 value)
1394 {
1395         int word_sized;
1396
1397         mutex_lock(&data->lock);
1398         word_sized = (((reg & 0xff00) == 0x100)
1399                    || ((reg & 0xff00) == 0x200))
1400                   && (((reg & 0x00ff) == 0x53)
1401                    || ((reg & 0x00ff) == 0x55));
1402         w83627hf_set_bank(data, reg);
1403         outb_p(reg & 0xff, data->addr + W83781D_ADDR_REG_OFFSET);
1404         if (word_sized) {
1405                 outb_p(value >> 8,
1406                        data->addr + W83781D_DATA_REG_OFFSET);
1407                 outb_p((reg & 0xff) + 1,
1408                        data->addr + W83781D_ADDR_REG_OFFSET);
1409         }
1410         outb_p(value & 0xff,
1411                data->addr + W83781D_DATA_REG_OFFSET);
1412         w83627hf_reset_bank(data, reg);
1413         mutex_unlock(&data->lock);
1414         return 0;
1415 }
1416
1417 static void __devinit w83627hf_init_device(struct platform_device *pdev)
1418 {
1419         struct w83627hf_data *data = platform_get_drvdata(pdev);
1420         int i;
1421         enum chips type = data->type;
1422         u8 tmp;
1423
1424         if (reset) {
1425                 /* Resetting the chip has been the default for a long time,
1426                    but repeatedly caused problems (fans going to full
1427                    speed...) so it is now optional. It might even go away if
1428                    nobody reports it as being useful, as I see very little
1429                    reason why this would be needed at all. */
1430                 dev_info(&pdev->dev, "If reset=1 solved a problem you were "
1431                          "having, please report!\n");
1432
1433                 /* save this register */
1434                 i = w83627hf_read_value(data, W83781D_REG_BEEP_CONFIG);
1435                 /* Reset all except Watchdog values and last conversion values
1436                    This sets fan-divs to 2, among others */
1437                 w83627hf_write_value(data, W83781D_REG_CONFIG, 0x80);
1438                 /* Restore the register and disable power-on abnormal beep.
1439                    This saves FAN 1/2/3 input/output values set by BIOS. */
1440                 w83627hf_write_value(data, W83781D_REG_BEEP_CONFIG, i | 0x80);
1441                 /* Disable master beep-enable (reset turns it on).
1442                    Individual beeps should be reset to off but for some reason
1443                    disabling this bit helps some people not get beeped */
1444                 w83627hf_write_value(data, W83781D_REG_BEEP_INTS2, 0);
1445         }
1446
1447         /* Minimize conflicts with other winbond i2c-only clients...  */
1448         /* disable i2c subclients... how to disable main i2c client?? */
1449         /* force i2c address to relatively uncommon address */
1450         w83627hf_write_value(data, W83781D_REG_I2C_SUBADDR, 0x89);
1451         w83627hf_write_value(data, W83781D_REG_I2C_ADDR, force_i2c);
1452
1453         /* Read VID only once */
1454         if (type == w83627hf || type == w83637hf) {
1455                 int lo = w83627hf_read_value(data, W83781D_REG_VID_FANDIV);
1456                 int hi = w83627hf_read_value(data, W83781D_REG_CHIPID);
1457                 data->vid = (lo & 0x0f) | ((hi & 0x01) << 4);
1458         } else if (type == w83627thf) {
1459                 data->vid = w83627thf_read_gpio5(pdev);
1460         } else if (type == w83687thf) {
1461                 data->vid = w83687thf_read_vid(pdev);
1462         }
1463
1464         /* Read VRM & OVT Config only once */
1465         if (type == w83627thf || type == w83637hf || type == w83687thf) {
1466                 data->vrm_ovt =
1467                         w83627hf_read_value(data, W83627THF_REG_VRM_OVT_CFG);
1468         }
1469
1470         tmp = w83627hf_read_value(data, W83781D_REG_SCFG1);
1471         for (i = 1; i <= 3; i++) {
1472                 if (!(tmp & BIT_SCFG1[i - 1])) {
1473                         data->sens[i - 1] = 4;
1474                 } else {
1475                         if (w83627hf_read_value
1476                             (data,
1477                              W83781D_REG_SCFG2) & BIT_SCFG2[i - 1])
1478                                 data->sens[i - 1] = 1;
1479                         else
1480                                 data->sens[i - 1] = 2;
1481                 }
1482                 if ((type == w83697hf) && (i == 2))
1483                         break;
1484         }
1485
1486         if(init) {
1487                 /* Enable temp2 */
1488                 tmp = w83627hf_read_value(data, W83627HF_REG_TEMP2_CONFIG);
1489                 if (tmp & 0x01) {
1490                         dev_warn(&pdev->dev, "Enabling temp2, readings "
1491                                  "might not make sense\n");
1492                         w83627hf_write_value(data, W83627HF_REG_TEMP2_CONFIG,
1493                                 tmp & 0xfe);
1494                 }
1495
1496                 /* Enable temp3 */
1497                 if (type != w83697hf) {
1498                         tmp = w83627hf_read_value(data,
1499                                 W83627HF_REG_TEMP3_CONFIG);
1500                         if (tmp & 0x01) {
1501                                 dev_warn(&pdev->dev, "Enabling temp3, "
1502                                          "readings might not make sense\n");
1503                                 w83627hf_write_value(data,
1504                                         W83627HF_REG_TEMP3_CONFIG, tmp & 0xfe);
1505                         }
1506                 }
1507         }
1508
1509         /* Start monitoring */
1510         w83627hf_write_value(data, W83781D_REG_CONFIG,
1511                             (w83627hf_read_value(data,
1512                                                 W83781D_REG_CONFIG) & 0xf7)
1513                             | 0x01);
1514 }
1515
1516 static void w83627hf_update_fan_div(struct w83627hf_data *data)
1517 {
1518         int reg;
1519
1520         reg = w83627hf_read_value(data, W83781D_REG_VID_FANDIV);
1521         data->fan_div[0] = (reg >> 4) & 0x03;
1522         data->fan_div[1] = (reg >> 6) & 0x03;
1523         if (data->type != w83697hf) {
1524                 data->fan_div[2] = (w83627hf_read_value(data,
1525                                        W83781D_REG_PIN) >> 6) & 0x03;
1526         }
1527         reg = w83627hf_read_value(data, W83781D_REG_VBAT);
1528         data->fan_div[0] |= (reg >> 3) & 0x04;
1529         data->fan_div[1] |= (reg >> 4) & 0x04;
1530         if (data->type != w83697hf)
1531                 data->fan_div[2] |= (reg >> 5) & 0x04;
1532 }
1533
1534 static struct w83627hf_data *w83627hf_update_device(struct device *dev)
1535 {
1536         struct w83627hf_data *data = dev_get_drvdata(dev);
1537         int i, num_temps = (data->type == w83697hf) ? 2 : 3;
1538
1539         mutex_lock(&data->update_lock);
1540
1541         if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
1542             || !data->valid) {
1543                 for (i = 0; i <= 8; i++) {
1544                         /* skip missing sensors */
1545                         if (((data->type == w83697hf) && (i == 1)) ||
1546                             ((data->type != w83627hf && data->type != w83697hf)
1547                             && (i == 5 || i == 6)))
1548                                 continue;
1549                         data->in[i] =
1550                             w83627hf_read_value(data, W83781D_REG_IN(i));
1551                         data->in_min[i] =
1552                             w83627hf_read_value(data,
1553                                                W83781D_REG_IN_MIN(i));
1554                         data->in_max[i] =
1555                             w83627hf_read_value(data,
1556                                                W83781D_REG_IN_MAX(i));
1557                 }
1558                 for (i = 0; i <= 2; i++) {
1559                         data->fan[i] =
1560                             w83627hf_read_value(data, W83627HF_REG_FAN(i));
1561                         data->fan_min[i] =
1562                             w83627hf_read_value(data,
1563                                                W83627HF_REG_FAN_MIN(i));
1564                 }
1565                 for (i = 0; i <= 2; i++) {
1566                         u8 tmp = w83627hf_read_value(data,
1567                                 W836X7HF_REG_PWM(data->type, i));
1568                         /* bits 0-3 are reserved  in 627THF */
1569                         if (data->type == w83627thf)
1570                                 tmp &= 0xf0;
1571                         data->pwm[i] = tmp;
1572                         if (i == 1 &&
1573                             (data->type == w83627hf || data->type == w83697hf))
1574                                 break;
1575                 }
1576                 if (data->type == w83627hf) {
1577                                 u8 tmp = w83627hf_read_value(data,
1578                                                 W83627HF_REG_PWM_FREQ);
1579                                 data->pwm_freq[0] = tmp & 0x07;
1580                                 data->pwm_freq[1] = (tmp >> 4) & 0x07;
1581                 } else if (data->type != w83627thf) {
1582                         for (i = 1; i <= 3; i++) {
1583                                 data->pwm_freq[i - 1] =
1584                                         w83627hf_read_value(data,
1585                                                 W83637HF_REG_PWM_FREQ[i - 1]);
1586                                 if (i == 2 && (data->type == w83697hf))
1587                                         break;
1588                         }
1589                 }
1590                 for (i = 0; i < num_temps; i++) {
1591                         data->temp[i] = w83627hf_read_value(
1592                                                 data, w83627hf_reg_temp[i]);
1593                         data->temp_max[i] = w83627hf_read_value(
1594                                                 data, w83627hf_reg_temp_over[i]);
1595                         data->temp_max_hyst[i] = w83627hf_read_value(
1596                                                 data, w83627hf_reg_temp_hyst[i]);
1597                 }
1598
1599                 w83627hf_update_fan_div(data);
1600
1601                 data->alarms =
1602                     w83627hf_read_value(data, W83781D_REG_ALARM1) |
1603                     (w83627hf_read_value(data, W83781D_REG_ALARM2) << 8) |
1604                     (w83627hf_read_value(data, W83781D_REG_ALARM3) << 16);
1605                 i = w83627hf_read_value(data, W83781D_REG_BEEP_INTS2);
1606                 data->beep_enable = i >> 7;
1607                 data->beep_mask = ((i & 0x7f) << 8) |
1608                     w83627hf_read_value(data, W83781D_REG_BEEP_INTS1) |
1609                     w83627hf_read_value(data, W83781D_REG_BEEP_INTS3) << 16;
1610                 data->last_updated = jiffies;
1611                 data->valid = 1;
1612         }
1613
1614         mutex_unlock(&data->update_lock);
1615
1616         return data;
1617 }
1618
1619 static int __init w83627hf_device_add(unsigned short address,
1620                                       const struct w83627hf_sio_data *sio_data)
1621 {
1622         struct resource res = {
1623                 .start  = address + WINB_REGION_OFFSET,
1624                 .end    = address + WINB_REGION_OFFSET + WINB_REGION_SIZE - 1,
1625                 .name   = DRVNAME,
1626                 .flags  = IORESOURCE_IO,
1627         };
1628         int err;
1629
1630         pdev = platform_device_alloc(DRVNAME, address);
1631         if (!pdev) {
1632                 err = -ENOMEM;
1633                 printk(KERN_ERR DRVNAME ": Device allocation failed\n");
1634                 goto exit;
1635         }
1636
1637         err = platform_device_add_resources(pdev, &res, 1);
1638         if (err) {
1639                 printk(KERN_ERR DRVNAME ": Device resource addition failed "
1640                        "(%d)\n", err);
1641                 goto exit_device_put;
1642         }
1643
1644         err = platform_device_add_data(pdev, sio_data,
1645                                        sizeof(struct w83627hf_sio_data));
1646         if (err) {
1647                 printk(KERN_ERR DRVNAME ": Platform data allocation failed\n");
1648                 goto exit_device_put;
1649         }
1650
1651         err = platform_device_add(pdev);
1652         if (err) {
1653                 printk(KERN_ERR DRVNAME ": Device addition failed (%d)\n",
1654                        err);
1655                 goto exit_device_put;
1656         }
1657
1658         return 0;
1659
1660 exit_device_put:
1661         platform_device_put(pdev);
1662 exit:
1663         return err;
1664 }
1665
1666 static int __init sensors_w83627hf_init(void)
1667 {
1668         int err;
1669         unsigned short address;
1670         struct w83627hf_sio_data sio_data;
1671
1672         if (w83627hf_find(0x2e, &address, &sio_data)
1673          && w83627hf_find(0x4e, &address, &sio_data))
1674                 return -ENODEV;
1675
1676         err = platform_driver_register(&w83627hf_driver);
1677         if (err)
1678                 goto exit;
1679
1680         /* Sets global pdev as a side effect */
1681         err = w83627hf_device_add(address, &sio_data);
1682         if (err)
1683                 goto exit_driver;
1684
1685         return 0;
1686
1687 exit_driver:
1688         platform_driver_unregister(&w83627hf_driver);
1689 exit:
1690         return err;
1691 }
1692
1693 static void __exit sensors_w83627hf_exit(void)
1694 {
1695         platform_device_unregister(pdev);
1696         platform_driver_unregister(&w83627hf_driver);
1697 }
1698
1699 MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl>, "
1700               "Philip Edelbrock <phil@netroedge.com>, "
1701               "and Mark Studebaker <mdsxyz123@yahoo.com>");
1702 MODULE_DESCRIPTION("W83627HF driver");
1703 MODULE_LICENSE("GPL");
1704
1705 module_init(sensors_w83627hf_init);
1706 module_exit(sensors_w83627hf_exit);