drivers/gpu/drm/i915/intel_hdmi.c

   1 /*
   2  * Copyright 2006 Dave Airlie <airlied@linux.ie>
   3  * Copyright © 2006-2009 Intel Corporation
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9  * and/or sell copies of the Software, and to permit persons to whom the
  10  * Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22  * DEALINGS IN THE SOFTWARE.
  23  *
  24  * Authors:
  25  *      Eric Anholt <eric@anholt.net>
  26  *      Jesse Barnes <jesse.barnes@intel.com>
  27  */
  28
  29 #include <linux/i2c.h>
  30 #include <linux/slab.h>
  31 #include <linux/delay.h>
  32 #include "drmP.h"
  33 #include "drm.h"
  34 #include "drm_crtc.h"
  35 #include "drm_edid.h"
  36 #include "intel_drv.h"
  37 #include "i915_drm.h"
  38 #include "i915_drv.h"
  39
  40 struct intel_hdmi {
  41         struct intel_encoder base;
  42         u32 sdvox_reg;
  43         int ddc_bus;
  44         uint32_t color_range;
  45         bool has_hdmi_sink;
  46         bool has_audio;
  47         int force_audio;
  48         void (*write_infoframe)(struct drm_encoder *encoder,
  49                                 struct dip_infoframe *frame);
  50 };
  51
  52 static struct intel_hdmi *enc_to_intel_hdmi(struct drm_encoder *encoder)
  53 {
  54         return container_of(encoder, struct intel_hdmi, base.base);
  55 }
  56
  57 static struct intel_hdmi *intel_attached_hdmi(struct drm_connector *connector)
  58 {
  59         return container_of(intel_attached_encoder(connector),
  60                             struct intel_hdmi, base);
  61 }
  62
  63 void intel_dip_infoframe_csum(struct dip_infoframe *frame)
  64 {
  65         uint8_t *data = (uint8_t *)frame;
  66         uint8_t sum = 0;
  67         unsigned i;
  68
  69         frame->checksum = 0;
  70         frame->ecc = 0;
  71
  72         for (i = 0; i < frame->len + DIP_HEADER_SIZE; i++)
  73                 sum += data[i];
  74
  75         frame->checksum = 0x100 - sum;
  76 }
  77
  78 static u32 intel_infoframe_index(struct dip_infoframe *frame)
  79 {
  80         u32 flags = 0;
  81
  82         switch (frame->type) {
  83         case DIP_TYPE_AVI:
  84                 flags |= VIDEO_DIP_SELECT_AVI;
  85                 break;
  86         case DIP_TYPE_SPD:
  87                 flags |= VIDEO_DIP_SELECT_SPD;
  88                 break;
  89         default:
  90                 DRM_DEBUG_DRIVER("unknown info frame type %d\n", frame->type);
  91                 break;
  92         }
  93
  94         return flags;
  95 }
  96
  97 static u32 intel_infoframe_flags(struct dip_infoframe *frame)
  98 {
  99         u32 flags = 0;
 100
 101         switch (frame->type) {
 102         case DIP_TYPE_AVI:
 103                 flags |= VIDEO_DIP_ENABLE_AVI | VIDEO_DIP_FREQ_VSYNC;
 104                 break;
 105         case DIP_TYPE_SPD:
 106                 flags |= VIDEO_DIP_ENABLE_SPD | VIDEO_DIP_FREQ_VSYNC;
 107                 break;
 108         default:
 109                 DRM_DEBUG_DRIVER("unknown info frame type %d\n", frame->type);
 110                 break;
 111         }
 112
 113         return flags;
 114 }
 115
 116 static void i9xx_write_infoframe(struct drm_encoder *encoder,
 117                                  struct dip_infoframe *frame)
 118 {
 119         uint32_t *data = (uint32_t *)frame;
 120         struct drm_device *dev = encoder->dev;
 121         struct drm_i915_private *dev_priv = dev->dev_private;
 122         struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder);
 123         u32 port, flags, val = I915_READ(VIDEO_DIP_CTL);
 124         unsigned i, len = DIP_HEADER_SIZE + frame->len;
 125
 126
 127         /* XXX first guess at handling video port, is this corrent? */
 128         if (intel_hdmi->sdvox_reg == SDVOB)
 129                 port = VIDEO_DIP_PORT_B;
 130         else if (intel_hdmi->sdvox_reg == SDVOC)
 131                 port = VIDEO_DIP_PORT_C;
 132         else
 133                 return;
 134
 135         flags = intel_infoframe_index(frame);
 136
 137         val &= ~VIDEO_DIP_SELECT_MASK;
 138
 139         I915_WRITE(VIDEO_DIP_CTL, VIDEO_DIP_ENABLE | val | port | flags);
 140
 141         mmiowb();
 142         for (i = 0; i < len; i += 4) {
 143                 I915_WRITE(VIDEO_DIP_DATA, *data);
 144                 data++;
 145         }
 146         /* Write every possible data byte to force correct ECC calculation. */
 147         for (; i < VIDEO_DIP_DATA_SIZE; i += 4)
 148                 I915_WRITE(VIDEO_DIP_DATA, 0);
 149         mmiowb();
 150
 151         flags |= intel_infoframe_flags(frame);
 152
 153         I915_WRITE(VIDEO_DIP_CTL, VIDEO_DIP_ENABLE | val | port | flags);
 154         POSTING_READ(VIDEO_DIP_CTL);
 155 }
 156
 157 static void ironlake_write_infoframe(struct drm_encoder *encoder,
 158                                      struct dip_infoframe *frame)
 159 {
 160         uint32_t *data = (uint32_t *)frame;
 161         struct drm_device *dev = encoder->dev;
 162         struct drm_i915_private *dev_priv = dev->dev_private;
 163         struct drm_crtc *crtc = encoder->crtc;
 164         struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
 165         int reg = TVIDEO_DIP_CTL(intel_crtc->pipe);
 166         unsigned i, len = DIP_HEADER_SIZE + frame->len;
 167         u32 flags, val = I915_READ(reg);
 168
 169         intel_wait_for_vblank(dev, intel_crtc->pipe);
 170
 171         flags = intel_infoframe_index(frame);
 172
 173         val &= ~(VIDEO_DIP_SELECT_MASK | 0xf); /* clear DIP data offset */
 174
 175         I915_WRITE(reg, VIDEO_DIP_ENABLE | val | flags);
 176
 177         mmiowb();
 178         for (i = 0; i < len; i += 4) {
 179                 I915_WRITE(TVIDEO_DIP_DATA(intel_crtc->pipe), *data);
 180                 data++;
 181         }
 182         /* Write every possible data byte to force correct ECC calculation. */
 183         for (; i < VIDEO_DIP_DATA_SIZE; i += 4)
 184                 I915_WRITE(TVIDEO_DIP_DATA(intel_crtc->pipe), 0);
 185         mmiowb();
 186
 187         flags |= intel_infoframe_flags(frame);
 188
 189         I915_WRITE(reg, VIDEO_DIP_ENABLE | val | flags);
 190         POSTING_READ(reg);
 191 }
 192 static void intel_set_infoframe(struct drm_encoder *encoder,
 193                                 struct dip_infoframe *frame)
 194 {
 195         struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder);
 196
 197         if (!intel_hdmi->has_hdmi_sink)
 198                 return;
 199
 200         intel_dip_infoframe_csum(frame);
 201         intel_hdmi->write_infoframe(encoder, frame);
 202 }
 203
 204 static void intel_hdmi_set_avi_infoframe(struct drm_encoder *encoder)
 205 {
 206         struct dip_infoframe avi_if = {
 207                 .type = DIP_TYPE_AVI,
 208                 .ver = DIP_VERSION_AVI,
 209                 .len = DIP_LEN_AVI,
 210         };
 211
 212         intel_set_infoframe(encoder, &avi_if);
 213 }
 214
 215 static void intel_hdmi_set_spd_infoframe(struct drm_encoder *encoder)
 216 {
 217         struct dip_infoframe spd_if;
 218
 219         memset(&spd_if, 0, sizeof(spd_if));
 220         spd_if.type = DIP_TYPE_SPD;
 221         spd_if.ver = DIP_VERSION_SPD;
 222         spd_if.len = DIP_LEN_SPD;
 223         strcpy(spd_if.body.spd.vn, "Intel");
 224         strcpy(spd_if.body.spd.pd, "Integrated gfx");
 225         spd_if.body.spd.sdi = DIP_SPD_PC;
 226
 227         intel_set_infoframe(encoder, &spd_if);
 228 }
 229
 230 static void intel_hdmi_mode_set(struct drm_encoder *encoder,
 231                                 struct drm_display_mode *mode,
 232                                 struct drm_display_mode *adjusted_mode)
 233 {
 234         struct drm_device *dev = encoder->dev;
 235         struct drm_i915_private *dev_priv = dev->dev_private;
 236         struct drm_crtc *crtc = encoder->crtc;
 237         struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
 238         struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder);
 239         u32 sdvox;
 240
 241         sdvox = SDVO_ENCODING_HDMI | SDVO_BORDER_ENABLE;
 242         if (!HAS_PCH_SPLIT(dev))
 243                 sdvox |= intel_hdmi->color_range;
 244         if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
 245                 sdvox |= SDVO_VSYNC_ACTIVE_HIGH;
 246         if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
 247                 sdvox |= SDVO_HSYNC_ACTIVE_HIGH;
 248
 249         if (intel_crtc->bpp > 24)
 250                 sdvox |= COLOR_FORMAT_12bpc;
 251         else
 252                 sdvox |= COLOR_FORMAT_8bpc;
 253
 254         /* Required on CPT */
 255         if (intel_hdmi->has_hdmi_sink && HAS_PCH_CPT(dev))
 256                 sdvox |= HDMI_MODE_SELECT;
 257
 258         if (intel_hdmi->has_audio) {
 259                 DRM_DEBUG_DRIVER("Enabling HDMI audio on pipe %c\n",
 260                                  pipe_name(intel_crtc->pipe));
 261                 sdvox |= SDVO_AUDIO_ENABLE;
 262                 sdvox |= SDVO_NULL_PACKETS_DURING_VSYNC;
 263                 intel_write_eld(encoder, adjusted_mode);
 264         }
 265
 266         if (HAS_PCH_CPT(dev))
 267                 sdvox |= PORT_TRANS_SEL_CPT(intel_crtc->pipe);
 268         else if (intel_crtc->pipe == 1)
 269                 sdvox |= SDVO_PIPE_B_SELECT;
 270
 271         I915_WRITE(intel_hdmi->sdvox_reg, sdvox);
 272         POSTING_READ(intel_hdmi->sdvox_reg);
 273
 274         intel_hdmi_set_avi_infoframe(encoder);
 275         intel_hdmi_set_spd_infoframe(encoder);
 276 }
 277
 278 static void intel_hdmi_dpms(struct drm_encoder *encoder, int mode)
 279 {
 280         struct drm_device *dev = encoder->dev;
 281         struct drm_i915_private *dev_priv = dev->dev_private;
 282         struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder);
 283         u32 temp;
 284         u32 enable_bits = SDVO_ENABLE;
 285
 286         if (intel_hdmi->has_audio || mode != DRM_MODE_DPMS_ON)
 287                 enable_bits |= SDVO_AUDIO_ENABLE;
 288
 289         temp = I915_READ(intel_hdmi->sdvox_reg);
 290
 291         /* HW workaround, need to toggle enable bit off and on for 12bpc, but
 292          * we do this anyway which shows more stable in testing.
 293          */
 294         if (HAS_PCH_SPLIT(dev)) {
 295                 I915_WRITE(intel_hdmi->sdvox_reg, temp & ~SDVO_ENABLE);
 296                 POSTING_READ(intel_hdmi->sdvox_reg);
 297         }
 298
 299         if (mode != DRM_MODE_DPMS_ON) {
 300                 temp &= ~enable_bits;
 301         } else {
 302                 temp |= enable_bits;
 303         }
 304
 305         I915_WRITE(intel_hdmi->sdvox_reg, temp);
 306         POSTING_READ(intel_hdmi->sdvox_reg);
 307
 308         /* HW workaround, need to write this twice for issue that may result
 309          * in first write getting masked.
 310          */
 311         if (HAS_PCH_SPLIT(dev)) {
 312                 I915_WRITE(intel_hdmi->sdvox_reg, temp);
 313                 POSTING_READ(intel_hdmi->sdvox_reg);
 314         }
 315 }
 316
 317 static int intel_hdmi_mode_valid(struct drm_connector *connector,
 318                                  struct drm_display_mode *mode)
 319 {
 320         if (mode->clock > 165000)
 321                 return MODE_CLOCK_HIGH;
 322         if (mode->clock < 20000)
 323                 return MODE_CLOCK_LOW;
 324
 325         if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
 326                 return MODE_NO_DBLESCAN;
 327
 328         return MODE_OK;
 329 }
 330
 331 static bool intel_hdmi_mode_fixup(struct drm_encoder *encoder,
 332                                   struct drm_display_mode *mode,
 333                                   struct drm_display_mode *adjusted_mode)
 334 {
 335         return true;
 336 }
 337
 338 static enum drm_connector_status
 339 intel_hdmi_detect(struct drm_connector *connector, bool force)
 340 {
 341         struct intel_hdmi *intel_hdmi = intel_attached_hdmi(connector);
 342         struct drm_i915_private *dev_priv = connector->dev->dev_private;
 343         struct edid *edid;
 344         enum drm_connector_status status = connector_status_disconnected;
 345
 346         intel_hdmi->has_hdmi_sink = false;
 347         intel_hdmi->has_audio = false;
 348         edid = drm_get_edid(connector,
 349                             &dev_priv->gmbus[intel_hdmi->ddc_bus].adapter);
 350
 351         if (edid) {
 352                 if (edid->input & DRM_EDID_INPUT_DIGITAL) {
 353                         status = connector_status_connected;
 354                         intel_hdmi->has_hdmi_sink = drm_detect_hdmi_monitor(edid);
 355                         intel_hdmi->has_audio = drm_detect_monitor_audio(edid);
 356                 }
 357                 connector->display_info.raw_edid = NULL;
 358                 kfree(edid);
 359         }
 360
 361         if (status == connector_status_connected) {
 362                 if (intel_hdmi->force_audio)
 363                         intel_hdmi->has_audio = intel_hdmi->force_audio > 0;
 364         }
 365
 366         return status;
 367 }
 368
 369 static int intel_hdmi_get_modes(struct drm_connector *connector)
 370 {
 371         struct intel_hdmi *intel_hdmi = intel_attached_hdmi(connector);
 372         struct drm_i915_private *dev_priv = connector->dev->dev_private;
 373
 374         /* We should parse the EDID data and find out if it's an HDMI sink so
 375          * we can send audio to it.
 376          */
 377
 378         return intel_ddc_get_modes(connector,
 379                                    &dev_priv->gmbus[intel_hdmi->ddc_bus].adapter);
 380 }
 381
 382 static bool
 383 intel_hdmi_detect_audio(struct drm_connector *connector)
 384 {
 385         struct intel_hdmi *intel_hdmi = intel_attached_hdmi(connector);
 386         struct drm_i915_private *dev_priv = connector->dev->dev_private;
 387         struct edid *edid;
 388         bool has_audio = false;
 389
 390         edid = drm_get_edid(connector,
 391                             &dev_priv->gmbus[intel_hdmi->ddc_bus].adapter);
 392         if (edid) {
 393                 if (edid->input & DRM_EDID_INPUT_DIGITAL)
 394                         has_audio = drm_detect_monitor_audio(edid);
 395
 396                 connector->display_info.raw_edid = NULL;
 397                 kfree(edid);
 398         }
 399
 400         return has_audio;
 401 }
 402
 403 static int
 404 intel_hdmi_set_property(struct drm_connector *connector,
 405                       struct drm_property *property,
 406                       uint64_t val)
 407 {
 408         struct intel_hdmi *intel_hdmi = intel_attached_hdmi(connector);
 409         struct drm_i915_private *dev_priv = connector->dev->dev_private;
 410         int ret;
 411
 412         ret = drm_connector_property_set_value(connector, property, val);
 413         if (ret)
 414                 return ret;
 415
 416         if (property == dev_priv->force_audio_property) {
 417                 int i = val;
 418                 bool has_audio;
 419
 420                 if (i == intel_hdmi->force_audio)
 421                         return 0;
 422
 423                 intel_hdmi->force_audio = i;
 424
 425                 if (i == 0)
 426                         has_audio = intel_hdmi_detect_audio(connector);
 427                 else
 428                         has_audio = i > 0;
 429
 430                 if (has_audio == intel_hdmi->has_audio)
 431                         return 0;
 432
 433                 intel_hdmi->has_audio = has_audio;
 434                 goto done;
 435         }
 436
 437         if (property == dev_priv->broadcast_rgb_property) {
 438                 if (val == !!intel_hdmi->color_range)
 439                         return 0;
 440
 441                 intel_hdmi->color_range = val ? SDVO_COLOR_RANGE_16_235 : 0;
 442                 goto done;
 443         }
 444
 445         return -EINVAL;
 446
 447 done:
 448         if (intel_hdmi->base.base.crtc) {
 449                 struct drm_crtc *crtc = intel_hdmi->base.base.crtc;
 450                 drm_crtc_helper_set_mode(crtc, &crtc->mode,
 451                                          crtc->x, crtc->y,
 452                                          crtc->fb);
 453         }
 454
 455         return 0;
 456 }
 457
 458 static void intel_hdmi_destroy(struct drm_connector *connector)
 459 {
 460         drm_sysfs_connector_remove(connector);
 461         drm_connector_cleanup(connector);
 462         kfree(connector);
 463 }
 464
 465 static const struct drm_encoder_helper_funcs intel_hdmi_helper_funcs = {
 466         .dpms = intel_hdmi_dpms,
 467         .mode_fixup = intel_hdmi_mode_fixup,
 468         .prepare = intel_encoder_prepare,
 469         .mode_set = intel_hdmi_mode_set,
 470         .commit = intel_encoder_commit,
 471 };
 472
 473 static const struct drm_connector_funcs intel_hdmi_connector_funcs = {
 474         .dpms = drm_helper_connector_dpms,
 475         .detect = intel_hdmi_detect,
 476         .fill_modes = drm_helper_probe_single_connector_modes,
 477         .set_property = intel_hdmi_set_property,
 478         .destroy = intel_hdmi_destroy,
 479 };
 480
 481 static const struct drm_connector_helper_funcs intel_hdmi_connector_helper_funcs = {
 482         .get_modes = intel_hdmi_get_modes,
 483         .mode_valid = intel_hdmi_mode_valid,
 484         .best_encoder = intel_best_encoder,
 485 };
 486
 487 static const struct drm_encoder_funcs intel_hdmi_enc_funcs = {
 488         .destroy = intel_encoder_destroy,
 489 };
 490
 491 static void
 492 intel_hdmi_add_properties(struct intel_hdmi *intel_hdmi, struct drm_connector *connector)
 493 {
 494         intel_attach_force_audio_property(connector);
 495         intel_attach_broadcast_rgb_property(connector);
 496 }
 497
 498 void intel_hdmi_init(struct drm_device *dev, int sdvox_reg)
 499 {
 500         struct drm_i915_private *dev_priv = dev->dev_private;
 501         struct drm_connector *connector;
 502         struct intel_encoder *intel_encoder;
 503         struct intel_connector *intel_connector;
 504         struct intel_hdmi *intel_hdmi;
 505         int i;
 506
 507         intel_hdmi = kzalloc(sizeof(struct intel_hdmi), GFP_KERNEL);
 508         if (!intel_hdmi)
 509                 return;
 510
 511         intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
 512         if (!intel_connector) {
 513                 kfree(intel_hdmi);
 514                 return;
 515         }
 516
 517         intel_encoder = &intel_hdmi->base;
 518         drm_encoder_init(dev, &intel_encoder->base, &intel_hdmi_enc_funcs,
 519                          DRM_MODE_ENCODER_TMDS);
 520
 521         connector = &intel_connector->base;
 522         drm_connector_init(dev, connector, &intel_hdmi_connector_funcs,
 523                            DRM_MODE_CONNECTOR_HDMIA);
 524         drm_connector_helper_add(connector, &intel_hdmi_connector_helper_funcs);
 525
 526         intel_encoder->type = INTEL_OUTPUT_HDMI;
 527
 528         connector->polled = DRM_CONNECTOR_POLL_HPD;
 529         connector->interlace_allowed = 0;
 530         connector->doublescan_allowed = 0;
 531         intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
 532
 533         /* Set up the DDC bus. */
 534         if (sdvox_reg == SDVOB) {
 535                 intel_encoder->clone_mask = (1 << INTEL_HDMIB_CLONE_BIT);
 536                 intel_hdmi->ddc_bus = GMBUS_PORT_DPB;
 537                 dev_priv->hotplug_supported_mask |= HDMIB_HOTPLUG_INT_STATUS;
 538         } else if (sdvox_reg == SDVOC) {
 539                 intel_encoder->clone_mask = (1 << INTEL_HDMIC_CLONE_BIT);
 540                 intel_hdmi->ddc_bus = GMBUS_PORT_DPC;
 541                 dev_priv->hotplug_supported_mask |= HDMIC_HOTPLUG_INT_STATUS;
 542         } else if (sdvox_reg == HDMIB) {
 543                 intel_encoder->clone_mask = (1 << INTEL_HDMID_CLONE_BIT);
 544                 intel_hdmi->ddc_bus = GMBUS_PORT_DPB;
 545                 dev_priv->hotplug_supported_mask |= HDMIB_HOTPLUG_INT_STATUS;
 546         } else if (sdvox_reg == HDMIC) {
 547                 intel_encoder->clone_mask = (1 << INTEL_HDMIE_CLONE_BIT);
 548                 intel_hdmi->ddc_bus = GMBUS_PORT_DPC;
 549                 dev_priv->hotplug_supported_mask |= HDMIC_HOTPLUG_INT_STATUS;
 550         } else if (sdvox_reg == HDMID) {
 551                 intel_encoder->clone_mask = (1 << INTEL_HDMIF_CLONE_BIT);
 552                 intel_hdmi->ddc_bus = GMBUS_PORT_DPD;
 553                 dev_priv->hotplug_supported_mask |= HDMID_HOTPLUG_INT_STATUS;
 554         }
 555
 556         intel_hdmi->sdvox_reg = sdvox_reg;
 557
 558         if (!HAS_PCH_SPLIT(dev)) {
 559                 intel_hdmi->write_infoframe = i9xx_write_infoframe;
 560                 I915_WRITE(VIDEO_DIP_CTL, 0);
 561                 POSTING_READ(VIDEO_DIP_CTL);
 562         } else {
 563                 intel_hdmi->write_infoframe = ironlake_write_infoframe;
 564                 for_each_pipe(i) {
 565                         I915_WRITE(TVIDEO_DIP_CTL(i), 0);
 566                         POSTING_READ(TVIDEO_DIP_CTL(i));
 567                 }
 568         }
 569
 570         drm_encoder_helper_add(&intel_encoder->base, &intel_hdmi_helper_funcs);
 571
 572         intel_hdmi_add_properties(intel_hdmi, connector);
 573
 574         intel_connector_attach_encoder(intel_connector, intel_encoder);
 575         drm_sysfs_connector_add(connector);
 576
 577         /* For G4X desktop chip, PEG_BAND_GAP_DATA 3:0 must first be written
 578          * 0xd.  Failure to do so will result in spurious interrupts being
 579          * generated on the port when a cable is not attached.
 580          */
 581         if (IS_G4X(dev) && !IS_GM45(dev)) {
 582                 u32 temp = I915_READ(PEG_BAND_GAP_DATA);
 583                 I915_WRITE(PEG_BAND_GAP_DATA, (temp & ~0xf) | 0xd);
 584         }
 585 }