2 * pata_sis.c - SiS ATA driver
4 * (C) 2005 Red Hat <alan@redhat.com>
6 * Based upon linux/drivers/ide/pci/sis5513.c
7 * Copyright (C) 1999-2000 Andre Hedrick <andre@linux-ide.org>
8 * Copyright (C) 2002 Lionel Bouton <Lionel.Bouton@inet6.fr>, Maintainer
9 * Copyright (C) 2003 Vojtech Pavlik <vojtech@suse.cz>
10 * SiS Taiwan : for direct support and hardware.
11 * Daniela Engert : for initial ATA100 advices and numerous others.
12 * John Fremlin, Manfred Spraul, Dave Morgan, Peter Kjellerstedt :
13 * for checking code correctness, providing patches.
14 * Original tests and design on the SiS620 chipset.
15 * ATA100 tests and design on the SiS735 chipset.
16 * ATA16/33 support from specs
17 * ATA133 support for SiS961/962 by L.C. Chang <lcchang@sis.com.tw>
21 * Check MWDMA on drives that don't support MWDMA speed pio cycles ?
25 #include <linux/kernel.h>
26 #include <linux/module.h>
27 #include <linux/pci.h>
28 #include <linux/init.h>
29 #include <linux/blkdev.h>
30 #include <linux/delay.h>
31 #include <linux/device.h>
32 #include <scsi/scsi_host.h>
33 #include <linux/libata.h>
34 #include <linux/ata.h>
37 #undef DRV_NAME /* already defined in libata.h, for libata-core */
38 #define DRV_NAME "pata_sis"
39 #define DRV_VERSION "0.4.5"
42 u16 device; /* PCI host ID */
43 struct ata_port_info *info; /* Info block */
44 /* Probably add family, cable detect type etc here to clean
54 static const struct sis_laptop sis_laptop[] = {
55 /* devid, subvendor, subdev */
56 { 0x5513, 0x1043, 0x1107 }, /* ASUS A6K */
61 static int sis_short_ata40(struct pci_dev *dev)
63 const struct sis_laptop *lap = &sis_laptop[0];
66 if (lap->device == dev->device &&
67 lap->subvendor == dev->subsystem_vendor &&
68 lap->subdevice == dev->subsystem_device)
77 * sis_port_base - return PCI configuration base for dev
80 * Returns the base of the PCI configuration registers for this port
84 static int sis_port_base(struct ata_device *adev)
86 return 0x40 + (4 * adev->ap->port_no) + (2 * adev->devno);
90 * sis_133_pre_reset - check for 40/80 pin
93 * Perform cable detection for the later UDMA133 capable
97 static int sis_133_pre_reset(struct ata_port *ap)
99 static const struct pci_bits sis_enable_bits[] = {
100 { 0x4aU, 1U, 0x02UL, 0x02UL }, /* port 0 */
101 { 0x4aU, 1U, 0x04UL, 0x04UL }, /* port 1 */
104 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
107 if (!pci_test_config_bits(pdev, &sis_enable_bits[ap->port_no]))
110 /* The top bit of this register is the cable detect bit */
111 pci_read_config_word(pdev, 0x50 + 2 * ap->port_no, &tmp);
112 if ((tmp & 0x8000) && !sis_short_ata40(pdev))
113 ap->cbl = ATA_CBL_PATA40;
115 ap->cbl = ATA_CBL_PATA80;
117 return ata_std_prereset(ap);
121 * sis_error_handler - Probe specified port on PATA host controller
125 * None (inherited from caller).
128 static void sis_133_error_handler(struct ata_port *ap)
130 ata_bmdma_drive_eh(ap, sis_133_pre_reset, ata_std_softreset, NULL, ata_std_postreset);
135 * sis_66_pre_reset - check for 40/80 pin
138 * Perform cable detection on the UDMA66, UDMA100 and early UDMA133
139 * SiS IDE controllers.
142 static int sis_66_pre_reset(struct ata_port *ap)
144 static const struct pci_bits sis_enable_bits[] = {
145 { 0x4aU, 1U, 0x02UL, 0x02UL }, /* port 0 */
146 { 0x4aU, 1U, 0x04UL, 0x04UL }, /* port 1 */
149 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
152 if (!pci_test_config_bits(pdev, &sis_enable_bits[ap->port_no])) {
153 ata_port_disable(ap);
154 printk(KERN_INFO "ata%u: port disabled. ignoring.\n", ap->id);
157 /* Older chips keep cable detect in bits 4/5 of reg 0x48 */
158 pci_read_config_byte(pdev, 0x48, &tmp);
160 if ((tmp & 0x10) && !sis_short_ata40(pdev))
161 ap->cbl = ATA_CBL_PATA40;
163 ap->cbl = ATA_CBL_PATA80;
165 return ata_std_prereset(ap);
169 * sis_66_error_handler - Probe specified port on PATA host controller
174 * None (inherited from caller).
177 static void sis_66_error_handler(struct ata_port *ap)
179 ata_bmdma_drive_eh(ap, sis_66_pre_reset, ata_std_softreset, NULL, ata_std_postreset);
183 * sis_old_pre_reset - probe begin
186 * Set up cable type and use generic probe init
189 static int sis_old_pre_reset(struct ata_port *ap)
191 static const struct pci_bits sis_enable_bits[] = {
192 { 0x4aU, 1U, 0x02UL, 0x02UL }, /* port 0 */
193 { 0x4aU, 1U, 0x04UL, 0x04UL }, /* port 1 */
196 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
198 if (!pci_test_config_bits(pdev, &sis_enable_bits[ap->port_no])) {
199 ata_port_disable(ap);
200 printk(KERN_INFO "ata%u: port disabled. ignoring.\n", ap->id);
203 ap->cbl = ATA_CBL_PATA40;
204 return ata_std_prereset(ap);
209 * sis_old_error_handler - Probe specified port on PATA host controller
213 * None (inherited from caller).
216 static void sis_old_error_handler(struct ata_port *ap)
218 ata_bmdma_drive_eh(ap, sis_old_pre_reset, ata_std_softreset, NULL, ata_std_postreset);
222 * sis_set_fifo - Set RWP fifo bits for this device
226 * SIS chipsets implement prefetch/postwrite bits for each device
227 * on both channels. This functionality is not ATAPI compatible and
228 * must be configured according to the class of device present
231 static void sis_set_fifo(struct ata_port *ap, struct ata_device *adev)
233 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
237 mask <<= (2 * ap->port_no);
238 mask <<= adev->devno;
240 /* This holds various bits including the FIFO control */
241 pci_read_config_byte(pdev, 0x4B, &fifoctrl);
244 /* Enable for ATA (disk) only */
245 if (adev->class == ATA_DEV_ATA)
247 pci_write_config_byte(pdev, 0x4B, fifoctrl);
251 * sis_old_set_piomode - Initialize host controller PATA PIO timings
252 * @ap: Port whose timings we are configuring
253 * @adev: Device we are configuring for.
255 * Set PIO mode for device, in host controller PCI config space. This
256 * function handles PIO set up for all chips that are pre ATA100 and
257 * also early ATA100 devices.
260 * None (inherited from caller).
263 static void sis_old_set_piomode (struct ata_port *ap, struct ata_device *adev)
265 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
266 int port = sis_port_base(adev);
268 int speed = adev->pio_mode - XFER_PIO_0;
270 const u8 active[] = { 0x00, 0x07, 0x04, 0x03, 0x01 };
271 const u8 recovery[] = { 0x00, 0x06, 0x04, 0x03, 0x03 };
273 sis_set_fifo(ap, adev);
275 pci_read_config_byte(pdev, port, &t1);
276 pci_read_config_byte(pdev, port + 1, &t2);
278 t1 &= ~0x0F; /* Clear active/recovery timings */
282 t2 |= recovery[speed];
284 pci_write_config_byte(pdev, port, t1);
285 pci_write_config_byte(pdev, port + 1, t2);
289 * sis_100_set_pioode - Initialize host controller PATA PIO timings
290 * @ap: Port whose timings we are configuring
291 * @adev: Device we are configuring for.
293 * Set PIO mode for device, in host controller PCI config space. This
294 * function handles PIO set up for ATA100 devices and early ATA133.
297 * None (inherited from caller).
300 static void sis_100_set_piomode (struct ata_port *ap, struct ata_device *adev)
302 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
303 int port = sis_port_base(adev);
304 int speed = adev->pio_mode - XFER_PIO_0;
306 const u8 actrec[] = { 0x00, 0x67, 0x44, 0x33, 0x31 };
308 sis_set_fifo(ap, adev);
310 pci_write_config_byte(pdev, port, actrec[speed]);
314 * sis_133_set_pioode - Initialize host controller PATA PIO timings
315 * @ap: Port whose timings we are configuring
316 * @adev: Device we are configuring for.
318 * Set PIO mode for device, in host controller PCI config space. This
319 * function handles PIO set up for the later ATA133 devices.
322 * None (inherited from caller).
325 static void sis_133_set_piomode (struct ata_port *ap, struct ata_device *adev)
327 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
331 int speed = adev->pio_mode - XFER_PIO_0;
333 const u32 timing133[] = {
334 0x28269000, /* Recovery << 24 | Act << 16 | Ini << 12 */
340 const u32 timing100[] = {
341 0x1E1C6000, /* Recovery << 24 | Act << 16 | Ini << 12 */
348 sis_set_fifo(ap, adev);
350 /* If bit 14 is set then the registers are mapped at 0x70 not 0x40 */
351 pci_read_config_dword(pdev, 0x54, ®54);
352 if (reg54 & 0x40000000)
354 port += 8 * ap->port_no + 4 * adev->devno;
356 pci_read_config_dword(pdev, port, &t1);
357 t1 &= 0xC0C00FFF; /* Mask out timing */
359 if (t1 & 0x08) /* 100 or 133 ? */
360 t1 |= timing133[speed];
362 t1 |= timing100[speed];
363 pci_write_config_byte(pdev, port, t1);
367 * sis_old_set_dmamode - Initialize host controller PATA DMA timings
368 * @ap: Port whose timings we are configuring
369 * @adev: Device to program
371 * Set UDMA/MWDMA mode for device, in host controller PCI config space.
372 * Handles pre UDMA and UDMA33 devices. Supports MWDMA as well unlike
373 * the old ide/pci driver.
376 * None (inherited from caller).
379 static void sis_old_set_dmamode (struct ata_port *ap, struct ata_device *adev)
381 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
382 int speed = adev->dma_mode - XFER_MW_DMA_0;
383 int drive_pci = sis_port_base(adev);
386 const u16 mwdma_bits[] = { 0x707, 0x202, 0x202 };
387 const u16 udma_bits[] = { 0xE000, 0xC000, 0xA000 };
389 pci_read_config_word(pdev, drive_pci, &timing);
391 if (adev->dma_mode < XFER_UDMA_0) {
392 /* bits 3-0 hold recovery timing bits 8-10 active timing and
393 the higer bits are dependant on the device */
395 timing |= mwdma_bits[speed];
396 pci_write_config_word(pdev, drive_pci, timing);
398 /* Bit 15 is UDMA on/off, bit 13-14 are cycle time */
399 speed = adev->dma_mode - XFER_UDMA_0;
401 timing |= udma_bits[speed];
406 * sis_66_set_dmamode - Initialize host controller PATA DMA timings
407 * @ap: Port whose timings we are configuring
408 * @adev: Device to program
410 * Set UDMA/MWDMA mode for device, in host controller PCI config space.
411 * Handles UDMA66 and early UDMA100 devices. Supports MWDMA as well unlike
412 * the old ide/pci driver.
415 * None (inherited from caller).
418 static void sis_66_set_dmamode (struct ata_port *ap, struct ata_device *adev)
420 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
421 int speed = adev->dma_mode - XFER_MW_DMA_0;
422 int drive_pci = sis_port_base(adev);
425 const u16 mwdma_bits[] = { 0x707, 0x202, 0x202 };
426 const u16 udma_bits[] = { 0xF000, 0xD000, 0xB000, 0xA000, 0x9000};
428 pci_read_config_word(pdev, drive_pci, &timing);
430 if (adev->dma_mode < XFER_UDMA_0) {
431 /* bits 3-0 hold recovery timing bits 8-10 active timing and
432 the higer bits are dependant on the device, bit 15 udma */
434 timing |= mwdma_bits[speed];
436 /* Bit 15 is UDMA on/off, bit 12-14 are cycle time */
437 speed = adev->dma_mode - XFER_UDMA_0;
439 timing |= udma_bits[speed];
441 pci_write_config_word(pdev, drive_pci, timing);
445 * sis_100_set_dmamode - Initialize host controller PATA DMA timings
446 * @ap: Port whose timings we are configuring
447 * @adev: Device to program
449 * Set UDMA/MWDMA mode for device, in host controller PCI config space.
450 * Handles UDMA66 and early UDMA100 devices.
453 * None (inherited from caller).
456 static void sis_100_set_dmamode (struct ata_port *ap, struct ata_device *adev)
458 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
459 int speed = adev->dma_mode - XFER_MW_DMA_0;
460 int drive_pci = sis_port_base(adev);
463 const u16 udma_bits[] = { 0x8B00, 0x8700, 0x8500, 0x8300, 0x8200, 0x8100};
465 pci_read_config_word(pdev, drive_pci, &timing);
467 if (adev->dma_mode < XFER_UDMA_0) {
468 /* NOT SUPPORTED YET: NEED DATA SHEET. DITTO IN OLD DRIVER */
470 /* Bit 15 is UDMA on/off, bit 12-14 are cycle time */
471 speed = adev->dma_mode - XFER_UDMA_0;
473 timing |= udma_bits[speed];
475 pci_write_config_word(pdev, drive_pci, timing);
479 * sis_133_early_set_dmamode - Initialize host controller PATA DMA timings
480 * @ap: Port whose timings we are configuring
481 * @adev: Device to program
483 * Set UDMA/MWDMA mode for device, in host controller PCI config space.
484 * Handles early SiS 961 bridges. Supports MWDMA as well unlike
485 * the old ide/pci driver.
488 * None (inherited from caller).
491 static void sis_133_early_set_dmamode (struct ata_port *ap, struct ata_device *adev)
493 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
494 int speed = adev->dma_mode - XFER_MW_DMA_0;
495 int drive_pci = sis_port_base(adev);
498 const u16 udma_bits[] = { 0x8F00, 0x8A00, 0x8700, 0x8500, 0x8300, 0x8200, 0x8100};
500 pci_read_config_word(pdev, drive_pci, &timing);
502 if (adev->dma_mode < XFER_UDMA_0) {
503 /* NOT SUPPORTED YET: NEED DATA SHEET. DITTO IN OLD DRIVER */
505 /* Bit 15 is UDMA on/off, bit 12-14 are cycle time */
506 speed = adev->dma_mode - XFER_UDMA_0;
508 timing |= udma_bits[speed];
510 pci_write_config_word(pdev, drive_pci, timing);
514 * sis_133_set_dmamode - Initialize host controller PATA DMA timings
515 * @ap: Port whose timings we are configuring
516 * @adev: Device to program
518 * Set UDMA/MWDMA mode for device, in host controller PCI config space.
519 * Handles early SiS 961 bridges. Supports MWDMA as well unlike
520 * the old ide/pci driver.
523 * None (inherited from caller).
526 static void sis_133_set_dmamode (struct ata_port *ap, struct ata_device *adev)
528 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
529 int speed = adev->dma_mode - XFER_MW_DMA_0;
534 /* bits 4- cycle time 8 - cvs time */
535 const u32 timing_u100[] = { 0x6B0, 0x470, 0x350, 0x140, 0x120, 0x110, 0x000 };
536 const u32 timing_u133[] = { 0x9F0, 0x6A0, 0x470, 0x250, 0x230, 0x220, 0x210 };
538 /* If bit 14 is set then the registers are mapped at 0x70 not 0x40 */
539 pci_read_config_dword(pdev, 0x54, ®54);
540 if (reg54 & 0x40000000)
542 port += (8 * ap->port_no) + (4 * adev->devno);
544 pci_read_config_dword(pdev, port, &t1);
546 if (adev->dma_mode < XFER_UDMA_0) {
548 /* FIXME: need data sheet to add MWDMA here. Also lacking on
551 speed = adev->dma_mode - XFER_UDMA_0;
552 /* if & 8 no UDMA133 - need info for ... */
556 t1 |= timing_u133[speed];
558 t1 |= timing_u100[speed];
560 pci_write_config_dword(pdev, port, t1);
563 static struct scsi_host_template sis_sht = {
564 .module = THIS_MODULE,
566 .ioctl = ata_scsi_ioctl,
567 .queuecommand = ata_scsi_queuecmd,
568 .can_queue = ATA_DEF_QUEUE,
569 .this_id = ATA_SHT_THIS_ID,
570 .sg_tablesize = LIBATA_MAX_PRD,
571 .cmd_per_lun = ATA_SHT_CMD_PER_LUN,
572 .emulated = ATA_SHT_EMULATED,
573 .use_clustering = ATA_SHT_USE_CLUSTERING,
574 .proc_name = DRV_NAME,
575 .dma_boundary = ATA_DMA_BOUNDARY,
576 .slave_configure = ata_scsi_slave_config,
577 .slave_destroy = ata_scsi_slave_destroy,
578 .bios_param = ata_std_bios_param,
579 .resume = ata_scsi_device_resume,
580 .suspend = ata_scsi_device_suspend,
583 static const struct ata_port_operations sis_133_ops = {
584 .port_disable = ata_port_disable,
585 .set_piomode = sis_133_set_piomode,
586 .set_dmamode = sis_133_set_dmamode,
587 .mode_filter = ata_pci_default_filter,
589 .tf_load = ata_tf_load,
590 .tf_read = ata_tf_read,
591 .check_status = ata_check_status,
592 .exec_command = ata_exec_command,
593 .dev_select = ata_std_dev_select,
595 .freeze = ata_bmdma_freeze,
596 .thaw = ata_bmdma_thaw,
597 .error_handler = sis_133_error_handler,
598 .post_internal_cmd = ata_bmdma_post_internal_cmd,
600 .bmdma_setup = ata_bmdma_setup,
601 .bmdma_start = ata_bmdma_start,
602 .bmdma_stop = ata_bmdma_stop,
603 .bmdma_status = ata_bmdma_status,
604 .qc_prep = ata_qc_prep,
605 .qc_issue = ata_qc_issue_prot,
606 .data_xfer = ata_pio_data_xfer,
608 .irq_handler = ata_interrupt,
609 .irq_clear = ata_bmdma_irq_clear,
611 .port_start = ata_port_start,
614 static const struct ata_port_operations sis_133_early_ops = {
615 .port_disable = ata_port_disable,
616 .set_piomode = sis_100_set_piomode,
617 .set_dmamode = sis_133_early_set_dmamode,
618 .mode_filter = ata_pci_default_filter,
620 .tf_load = ata_tf_load,
621 .tf_read = ata_tf_read,
622 .check_status = ata_check_status,
623 .exec_command = ata_exec_command,
624 .dev_select = ata_std_dev_select,
626 .freeze = ata_bmdma_freeze,
627 .thaw = ata_bmdma_thaw,
628 .error_handler = sis_66_error_handler,
629 .post_internal_cmd = ata_bmdma_post_internal_cmd,
631 .bmdma_setup = ata_bmdma_setup,
632 .bmdma_start = ata_bmdma_start,
633 .bmdma_stop = ata_bmdma_stop,
634 .bmdma_status = ata_bmdma_status,
635 .qc_prep = ata_qc_prep,
636 .qc_issue = ata_qc_issue_prot,
637 .data_xfer = ata_pio_data_xfer,
639 .irq_handler = ata_interrupt,
640 .irq_clear = ata_bmdma_irq_clear,
642 .port_start = ata_port_start,
645 static const struct ata_port_operations sis_100_ops = {
646 .port_disable = ata_port_disable,
647 .set_piomode = sis_100_set_piomode,
648 .set_dmamode = sis_100_set_dmamode,
649 .mode_filter = ata_pci_default_filter,
651 .tf_load = ata_tf_load,
652 .tf_read = ata_tf_read,
653 .check_status = ata_check_status,
654 .exec_command = ata_exec_command,
655 .dev_select = ata_std_dev_select,
657 .freeze = ata_bmdma_freeze,
658 .thaw = ata_bmdma_thaw,
659 .error_handler = sis_66_error_handler,
660 .post_internal_cmd = ata_bmdma_post_internal_cmd,
663 .bmdma_setup = ata_bmdma_setup,
664 .bmdma_start = ata_bmdma_start,
665 .bmdma_stop = ata_bmdma_stop,
666 .bmdma_status = ata_bmdma_status,
667 .qc_prep = ata_qc_prep,
668 .qc_issue = ata_qc_issue_prot,
669 .data_xfer = ata_pio_data_xfer,
671 .irq_handler = ata_interrupt,
672 .irq_clear = ata_bmdma_irq_clear,
674 .port_start = ata_port_start,
677 static const struct ata_port_operations sis_66_ops = {
678 .port_disable = ata_port_disable,
679 .set_piomode = sis_old_set_piomode,
680 .set_dmamode = sis_66_set_dmamode,
681 .mode_filter = ata_pci_default_filter,
683 .tf_load = ata_tf_load,
684 .tf_read = ata_tf_read,
685 .check_status = ata_check_status,
686 .exec_command = ata_exec_command,
687 .dev_select = ata_std_dev_select,
689 .freeze = ata_bmdma_freeze,
690 .thaw = ata_bmdma_thaw,
691 .error_handler = sis_66_error_handler,
692 .post_internal_cmd = ata_bmdma_post_internal_cmd,
694 .bmdma_setup = ata_bmdma_setup,
695 .bmdma_start = ata_bmdma_start,
696 .bmdma_stop = ata_bmdma_stop,
697 .bmdma_status = ata_bmdma_status,
698 .qc_prep = ata_qc_prep,
699 .qc_issue = ata_qc_issue_prot,
700 .data_xfer = ata_pio_data_xfer,
702 .irq_handler = ata_interrupt,
703 .irq_clear = ata_bmdma_irq_clear,
705 .port_start = ata_port_start,
708 static const struct ata_port_operations sis_old_ops = {
709 .port_disable = ata_port_disable,
710 .set_piomode = sis_old_set_piomode,
711 .set_dmamode = sis_old_set_dmamode,
712 .mode_filter = ata_pci_default_filter,
714 .tf_load = ata_tf_load,
715 .tf_read = ata_tf_read,
716 .check_status = ata_check_status,
717 .exec_command = ata_exec_command,
718 .dev_select = ata_std_dev_select,
720 .freeze = ata_bmdma_freeze,
721 .thaw = ata_bmdma_thaw,
722 .error_handler = sis_old_error_handler,
723 .post_internal_cmd = ata_bmdma_post_internal_cmd,
725 .bmdma_setup = ata_bmdma_setup,
726 .bmdma_start = ata_bmdma_start,
727 .bmdma_stop = ata_bmdma_stop,
728 .bmdma_status = ata_bmdma_status,
729 .qc_prep = ata_qc_prep,
730 .qc_issue = ata_qc_issue_prot,
731 .data_xfer = ata_pio_data_xfer,
733 .irq_handler = ata_interrupt,
734 .irq_clear = ata_bmdma_irq_clear,
736 .port_start = ata_port_start,
739 static struct ata_port_info sis_info = {
741 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST,
742 .pio_mask = 0x1f, /* pio0-4 */
745 .port_ops = &sis_old_ops,
747 static struct ata_port_info sis_info33 = {
749 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST,
750 .pio_mask = 0x1f, /* pio0-4 */
752 .udma_mask = ATA_UDMA2, /* UDMA 33 */
753 .port_ops = &sis_old_ops,
755 static struct ata_port_info sis_info66 = {
757 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST,
758 .pio_mask = 0x1f, /* pio0-4 */
759 .udma_mask = ATA_UDMA4, /* UDMA 66 */
760 .port_ops = &sis_66_ops,
762 static struct ata_port_info sis_info100 = {
764 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST,
765 .pio_mask = 0x1f, /* pio0-4 */
766 .udma_mask = ATA_UDMA5,
767 .port_ops = &sis_100_ops,
769 static struct ata_port_info sis_info100_early = {
771 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST,
772 .udma_mask = ATA_UDMA5,
773 .pio_mask = 0x1f, /* pio0-4 */
774 .port_ops = &sis_66_ops,
776 struct ata_port_info sis_info133 = {
778 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST,
779 .pio_mask = 0x1f, /* pio0-4 */
780 .udma_mask = ATA_UDMA6,
781 .port_ops = &sis_133_ops,
783 static struct ata_port_info sis_info133_early = {
785 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST,
786 .pio_mask = 0x1f, /* pio0-4 */
787 .udma_mask = ATA_UDMA6,
788 .port_ops = &sis_133_early_ops,
791 /* Privately shared with the SiS180 SATA driver, not for use elsewhere */
792 EXPORT_SYMBOL_GPL(sis_info133);
794 static void sis_fixup(struct pci_dev *pdev, struct sis_chipset *sis)
799 if (sis->info == &sis_info133) {
800 pci_read_config_word(pdev, 0x50, ®w);
802 pci_write_config_word(pdev, 0x50, regw & ~0x08);
803 pci_read_config_word(pdev, 0x52, ®w);
805 pci_write_config_word(pdev, 0x52, regw & ~0x08);
809 if (sis->info == &sis_info133_early || sis->info == &sis_info100) {
811 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0x80);
812 /* Set compatibility bit */
813 pci_read_config_byte(pdev, 0x49, ®);
815 pci_write_config_byte(pdev, 0x49, reg | 0x01);
819 if (sis->info == &sis_info66 || sis->info == &sis_info100_early) {
821 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0x80);
822 /* Set compatibility bit */
823 pci_read_config_byte(pdev, 0x52, ®);
825 pci_write_config_byte(pdev, 0x52, reg | 0x04);
829 if (sis->info == &sis_info33) {
830 pci_read_config_byte(pdev, PCI_CLASS_PROG, ®);
831 if (( reg & 0x0F ) != 0x00)
832 pci_write_config_byte(pdev, PCI_CLASS_PROG, reg & 0xF0);
833 /* Fall through to ATA16 fixup below */
836 if (sis->info == &sis_info || sis->info == &sis_info33) {
837 /* force per drive recovery and active timings
838 needed on ATA_33 and below chips */
839 pci_read_config_byte(pdev, 0x52, ®);
841 pci_write_config_byte(pdev, 0x52, reg|0x08);
849 * sis_init_one - Register SiS ATA PCI device with kernel services
850 * @pdev: PCI device to register
851 * @ent: Entry in sis_pci_tbl matching with @pdev
853 * Called from kernel PCI layer. We probe for combined mode (sigh),
854 * and then hand over control to libata, for it to do the rest.
857 * Inherited from PCI layer (may sleep).
860 * Zero on success, or -ERRNO value.
863 static int sis_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
865 static int printed_version;
866 static struct ata_port_info *port_info[2];
867 struct ata_port_info *port;
868 struct pci_dev *host = NULL;
869 struct sis_chipset *chipset = NULL;
871 static struct sis_chipset sis_chipsets[] = {
873 { 0x0968, &sis_info133 },
874 { 0x0966, &sis_info133 },
875 { 0x0965, &sis_info133 },
876 { 0x0745, &sis_info100 },
877 { 0x0735, &sis_info100 },
878 { 0x0733, &sis_info100 },
879 { 0x0635, &sis_info100 },
880 { 0x0633, &sis_info100 },
882 { 0x0730, &sis_info100_early }, /* 100 with ATA 66 layout */
883 { 0x0550, &sis_info100_early }, /* 100 with ATA 66 layout */
885 { 0x0640, &sis_info66 },
886 { 0x0630, &sis_info66 },
887 { 0x0620, &sis_info66 },
888 { 0x0540, &sis_info66 },
889 { 0x0530, &sis_info66 },
891 { 0x5600, &sis_info33 },
892 { 0x5598, &sis_info33 },
893 { 0x5597, &sis_info33 },
894 { 0x5591, &sis_info33 },
895 { 0x5582, &sis_info33 },
896 { 0x5581, &sis_info33 },
898 { 0x5596, &sis_info },
899 { 0x5571, &sis_info },
900 { 0x5517, &sis_info },
901 { 0x5511, &sis_info },
905 static struct sis_chipset sis133_early = {
906 0x0, &sis_info133_early
908 static struct sis_chipset sis133 = {
911 static struct sis_chipset sis100_early = {
912 0x0, &sis_info100_early
914 static struct sis_chipset sis100 = {
918 if (!printed_version++)
919 dev_printk(KERN_DEBUG, &pdev->dev,
920 "version " DRV_VERSION "\n");
922 /* We have to find the bridge first */
924 for (chipset = &sis_chipsets[0]; chipset->device; chipset++) {
925 host = pci_get_device(PCI_VENDOR_ID_SI, chipset->device, NULL);
927 if (chipset->device == 0x630) { /* SIS630 */
929 pci_read_config_byte(host, PCI_REVISION_ID, &host_rev);
930 if (host_rev >= 0x30) /* 630 ET */
931 chipset = &sis100_early;
937 /* Look for concealed bridges */
943 /* Disable ID masking and register remapping then
944 see what the real ID is */
946 pci_read_config_dword(pdev, 0x54, &idemisc);
947 pci_write_config_dword(pdev, 0x54, idemisc & 0x7fffffff);
948 pci_read_config_word(pdev, PCI_DEVICE_ID, &trueid);
949 pci_write_config_dword(pdev, 0x54, idemisc);
952 case 0x5518: /* SIS 962/963 */
954 if ((idemisc & 0x40000000) == 0) {
955 pci_write_config_dword(pdev, 0x54, idemisc | 0x40000000);
956 printk(KERN_INFO "SIS5513: Switching to 5513 register mapping\n");
959 case 0x0180: /* SIS 965/965L */
962 case 0x1180: /* SIS 966/966L */
969 if (chipset == NULL) {
970 struct pci_dev *lpc_bridge;
976 /* Try the second unmasking technique */
977 pci_read_config_byte(pdev, 0x4a, &idecfg);
978 pci_write_config_byte(pdev, 0x4a, idecfg | 0x10);
979 pci_read_config_word(pdev, PCI_DEVICE_ID, &trueid);
980 pci_write_config_byte(pdev, 0x4a, idecfg);
984 lpc_bridge = pci_get_slot(pdev->bus, 0x10); /* Bus 0 Dev 2 Fn 0 */
985 if (lpc_bridge == NULL)
987 pci_read_config_byte(lpc_bridge, PCI_REVISION_ID, &sbrev);
988 pci_read_config_byte(pdev, 0x49, &prefctl);
989 pci_dev_put(lpc_bridge);
991 if (sbrev == 0x10 && (prefctl & 0x80)) {
992 chipset = &sis133_early;
1001 /* No chipset info, no support */
1002 if (chipset == NULL)
1005 port = chipset->info;
1006 port->private_data = chipset;
1008 sis_fixup(pdev, chipset);
1010 port_info[0] = port_info[1] = port;
1011 return ata_pci_init_one(pdev, port_info, 2);
1014 static const struct pci_device_id sis_pci_tbl[] = {
1015 { PCI_VDEVICE(SI, 0x5513), }, /* SiS 5513 */
1016 { PCI_VDEVICE(SI, 0x5518), }, /* SiS 5518 */
1021 static struct pci_driver sis_pci_driver = {
1023 .id_table = sis_pci_tbl,
1024 .probe = sis_init_one,
1025 .remove = ata_pci_remove_one,
1026 .suspend = ata_pci_device_suspend,
1027 .resume = ata_pci_device_resume,
1030 static int __init sis_init(void)
1032 return pci_register_driver(&sis_pci_driver);
1035 static void __exit sis_exit(void)
1037 pci_unregister_driver(&sis_pci_driver);
1040 module_init(sis_init);
1041 module_exit(sis_exit);
1043 MODULE_AUTHOR("Alan Cox");
1044 MODULE_DESCRIPTION("SCSI low-level driver for SiS ATA");
1045 MODULE_LICENSE("GPL");
1046 MODULE_DEVICE_TABLE(pci, sis_pci_tbl);
1047 MODULE_VERSION(DRV_VERSION);