arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  *
  10  * Authors:
  11  *   Avi Kivity   <avi@qumranet.com>
  12  *   Yaniv Kamay  <yaniv@qumranet.com>
  13  *   Amit Shah    <amit.shah@qumranet.com>
  14  *   Ben-Ami Yassour <benami@il.ibm.com>
  15  *
  16  * This work is licensed under the terms of the GNU GPL, version 2.  See
  17  * the COPYING file in the top-level directory.
  18  *
  19  */
  20
  21 #include <linux/kvm_host.h>
  22 #include "irq.h"
  23 #include "mmu.h"
  24 #include "i8254.h"
  25 #include "tss.h"
  26 #include "kvm_cache_regs.h"
  27 #include "x86.h"
  28
  29 #include <linux/clocksource.h>
  30 #include <linux/interrupt.h>
  31 #include <linux/kvm.h>
  32 #include <linux/fs.h>
  33 #include <linux/vmalloc.h>
  34 #include <linux/module.h>
  35 #include <linux/mman.h>
  36 #include <linux/highmem.h>
  37 #include <linux/iommu.h>
  38 #include <linux/intel-iommu.h>
  39 #include <linux/cpufreq.h>
  40 #include <trace/events/kvm.h>
  41 #undef TRACE_INCLUDE_FILE
  42 #define CREATE_TRACE_POINTS
  43 #include "trace.h"
  44
  45 #include <asm/uaccess.h>
  46 #include <asm/msr.h>
  47 #include <asm/desc.h>
  48 #include <asm/mtrr.h>
  49 #include <asm/mce.h>
  50
  51 #define MAX_IO_MSRS 256
  52 #define CR0_RESERVED_BITS                                               \
  53         (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
  54                           | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
  55                           | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
  56 #define CR4_RESERVED_BITS                                               \
  57         (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
  58                           | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE     \
  59                           | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR  \
  60                           | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
  61
  62 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
  63
  64 #define KVM_MAX_MCE_BANKS 32
  65 #define KVM_MCE_CAP_SUPPORTED MCG_CTL_P
  66
  67 /* EFER defaults:
  68  * - enable syscall per default because its emulated by KVM
  69  * - enable LME and LMA per default on 64 bit KVM
  70  */
  71 #ifdef CONFIG_X86_64
  72 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffafeULL;
  73 #else
  74 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffffeULL;
  75 #endif
  76
  77 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  78 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  79
  80 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
  81                                     struct kvm_cpuid_entry2 __user *entries);
  82
  83 struct kvm_x86_ops *kvm_x86_ops;
  84 EXPORT_SYMBOL_GPL(kvm_x86_ops);
  85
  86 int ignore_msrs = 0;
  87 module_param_named(ignore_msrs, ignore_msrs, bool, S_IRUGO | S_IWUSR);
  88
  89 struct kvm_stats_debugfs_item debugfs_entries[] = {
  90         { "pf_fixed", VCPU_STAT(pf_fixed) },
  91         { "pf_guest", VCPU_STAT(pf_guest) },
  92         { "tlb_flush", VCPU_STAT(tlb_flush) },
  93         { "invlpg", VCPU_STAT(invlpg) },
  94         { "exits", VCPU_STAT(exits) },
  95         { "io_exits", VCPU_STAT(io_exits) },
  96         { "mmio_exits", VCPU_STAT(mmio_exits) },
  97         { "signal_exits", VCPU_STAT(signal_exits) },
  98         { "irq_window", VCPU_STAT(irq_window_exits) },
  99         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 100         { "halt_exits", VCPU_STAT(halt_exits) },
 101         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 102         { "hypercalls", VCPU_STAT(hypercalls) },
 103         { "request_irq", VCPU_STAT(request_irq_exits) },
 104         { "irq_exits", VCPU_STAT(irq_exits) },
 105         { "host_state_reload", VCPU_STAT(host_state_reload) },
 106         { "efer_reload", VCPU_STAT(efer_reload) },
 107         { "fpu_reload", VCPU_STAT(fpu_reload) },
 108         { "insn_emulation", VCPU_STAT(insn_emulation) },
 109         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 110         { "irq_injections", VCPU_STAT(irq_injections) },
 111         { "nmi_injections", VCPU_STAT(nmi_injections) },
 112         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 113         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 114         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 115         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 116         { "mmu_flooded", VM_STAT(mmu_flooded) },
 117         { "mmu_recycled", VM_STAT(mmu_recycled) },
 118         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 119         { "mmu_unsync", VM_STAT(mmu_unsync) },
 120         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 121         { "largepages", VM_STAT(lpages) },
 122         { NULL }
 123 };
 124
 125 unsigned long segment_base(u16 selector)
 126 {
 127         struct descriptor_table gdt;
 128         struct desc_struct *d;
 129         unsigned long table_base;
 130         unsigned long v;
 131
 132         if (selector == 0)
 133                 return 0;
 134
 135         asm("sgdt %0" : "=m"(gdt));
 136         table_base = gdt.base;
 137
 138         if (selector & 4) {           /* from ldt */
 139                 u16 ldt_selector;
 140
 141                 asm("sldt %0" : "=g"(ldt_selector));
 142                 table_base = segment_base(ldt_selector);
 143         }
 144         d = (struct desc_struct *)(table_base + (selector & ~7));
 145         v = d->base0 | ((unsigned long)d->base1 << 16) |
 146                 ((unsigned long)d->base2 << 24);
 147 #ifdef CONFIG_X86_64
 148         if (d->s == 0 && (d->type == 2 || d->type == 9 || d->type == 11))
 149                 v |= ((unsigned long)((struct ldttss_desc64 *)d)->base3) << 32;
 150 #endif
 151         return v;
 152 }
 153 EXPORT_SYMBOL_GPL(segment_base);
 154
 155 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 156 {
 157         if (irqchip_in_kernel(vcpu->kvm))
 158                 return vcpu->arch.apic_base;
 159         else
 160                 return vcpu->arch.apic_base;
 161 }
 162 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 163
 164 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
 165 {
 166         /* TODO: reserve bits check */
 167         if (irqchip_in_kernel(vcpu->kvm))
 168                 kvm_lapic_set_base(vcpu, data);
 169         else
 170                 vcpu->arch.apic_base = data;
 171 }
 172 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 173
 174 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 175 {
 176         WARN_ON(vcpu->arch.exception.pending);
 177         vcpu->arch.exception.pending = true;
 178         vcpu->arch.exception.has_error_code = false;
 179         vcpu->arch.exception.nr = nr;
 180 }
 181 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 182
 183 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long addr,
 184                            u32 error_code)
 185 {
 186         ++vcpu->stat.pf_guest;
 187
 188         if (vcpu->arch.exception.pending) {
 189                 switch(vcpu->arch.exception.nr) {
 190                 case DF_VECTOR:
 191                         /* triple fault -> shutdown */
 192                         set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
 193                         return;
 194                 case PF_VECTOR:
 195                         vcpu->arch.exception.nr = DF_VECTOR;
 196                         vcpu->arch.exception.error_code = 0;
 197                         return;
 198                 default:
 199                         /* replace previous exception with a new one in a hope
 200                            that instruction re-execution will regenerate lost
 201                            exception */
 202                         vcpu->arch.exception.pending = false;
 203                         break;
 204                 }
 205         }
 206         vcpu->arch.cr2 = addr;
 207         kvm_queue_exception_e(vcpu, PF_VECTOR, error_code);
 208 }
 209
 210 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 211 {
 212         vcpu->arch.nmi_pending = 1;
 213 }
 214 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 215
 216 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 217 {
 218         WARN_ON(vcpu->arch.exception.pending);
 219         vcpu->arch.exception.pending = true;
 220         vcpu->arch.exception.has_error_code = true;
 221         vcpu->arch.exception.nr = nr;
 222         vcpu->arch.exception.error_code = error_code;
 223 }
 224 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 225
 226 static void __queue_exception(struct kvm_vcpu *vcpu)
 227 {
 228         kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
 229                                      vcpu->arch.exception.has_error_code,
 230                                      vcpu->arch.exception.error_code);
 231 }
 232
 233 /*
 234  * Load the pae pdptrs.  Return true is they are all valid.
 235  */
 236 int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3)
 237 {
 238         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 239         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 240         int i;
 241         int ret;
 242         u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
 243
 244         ret = kvm_read_guest_page(vcpu->kvm, pdpt_gfn, pdpte,
 245                                   offset * sizeof(u64), sizeof(pdpte));
 246         if (ret < 0) {
 247                 ret = 0;
 248                 goto out;
 249         }
 250         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 251                 if (is_present_gpte(pdpte[i]) &&
 252                     (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
 253                         ret = 0;
 254                         goto out;
 255                 }
 256         }
 257         ret = 1;
 258
 259         memcpy(vcpu->arch.pdptrs, pdpte, sizeof(vcpu->arch.pdptrs));
 260         __set_bit(VCPU_EXREG_PDPTR,
 261                   (unsigned long *)&vcpu->arch.regs_avail);
 262         __set_bit(VCPU_EXREG_PDPTR,
 263                   (unsigned long *)&vcpu->arch.regs_dirty);
 264 out:
 265
 266         return ret;
 267 }
 268 EXPORT_SYMBOL_GPL(load_pdptrs);
 269
 270 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
 271 {
 272         u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
 273         bool changed = true;
 274         int r;
 275
 276         if (is_long_mode(vcpu) || !is_pae(vcpu))
 277                 return false;
 278
 279         if (!test_bit(VCPU_EXREG_PDPTR,
 280                       (unsigned long *)&vcpu->arch.regs_avail))
 281                 return true;
 282
 283         r = kvm_read_guest(vcpu->kvm, vcpu->arch.cr3 & ~31u, pdpte, sizeof(pdpte));
 284         if (r < 0)
 285                 goto out;
 286         changed = memcmp(pdpte, vcpu->arch.pdptrs, sizeof(pdpte)) != 0;
 287 out:
 288
 289         return changed;
 290 }
 291
 292 void kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 293 {
 294         if (cr0 & CR0_RESERVED_BITS) {
 295                 printk(KERN_DEBUG "set_cr0: 0x%lx #GP, reserved bits 0x%lx\n",
 296                        cr0, vcpu->arch.cr0);
 297                 kvm_inject_gp(vcpu, 0);
 298                 return;
 299         }
 300
 301         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD)) {
 302                 printk(KERN_DEBUG "set_cr0: #GP, CD == 0 && NW == 1\n");
 303                 kvm_inject_gp(vcpu, 0);
 304                 return;
 305         }
 306
 307         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE)) {
 308                 printk(KERN_DEBUG "set_cr0: #GP, set PG flag "
 309                        "and a clear PE flag\n");
 310                 kvm_inject_gp(vcpu, 0);
 311                 return;
 312         }
 313
 314         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 315 #ifdef CONFIG_X86_64
 316                 if ((vcpu->arch.shadow_efer & EFER_LME)) {
 317                         int cs_db, cs_l;
 318
 319                         if (!is_pae(vcpu)) {
 320                                 printk(KERN_DEBUG "set_cr0: #GP, start paging "
 321                                        "in long mode while PAE is disabled\n");
 322                                 kvm_inject_gp(vcpu, 0);
 323                                 return;
 324                         }
 325                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 326                         if (cs_l) {
 327                                 printk(KERN_DEBUG "set_cr0: #GP, start paging "
 328                                        "in long mode while CS.L == 1\n");
 329                                 kvm_inject_gp(vcpu, 0);
 330                                 return;
 331
 332                         }
 333                 } else
 334 #endif
 335                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
 336                         printk(KERN_DEBUG "set_cr0: #GP, pdptrs "
 337                                "reserved bits\n");
 338                         kvm_inject_gp(vcpu, 0);
 339                         return;
 340                 }
 341
 342         }
 343
 344         kvm_x86_ops->set_cr0(vcpu, cr0);
 345         vcpu->arch.cr0 = cr0;
 346
 347         kvm_mmu_reset_context(vcpu);
 348         return;
 349 }
 350 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 351
 352 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 353 {
 354         kvm_set_cr0(vcpu, (vcpu->arch.cr0 & ~0x0ful) | (msw & 0x0f));
 355 }
 356 EXPORT_SYMBOL_GPL(kvm_lmsw);
 357
 358 void kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 359 {
 360         unsigned long old_cr4 = vcpu->arch.cr4;
 361         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE;
 362
 363         if (cr4 & CR4_RESERVED_BITS) {
 364                 printk(KERN_DEBUG "set_cr4: #GP, reserved bits\n");
 365                 kvm_inject_gp(vcpu, 0);
 366                 return;
 367         }
 368
 369         if (is_long_mode(vcpu)) {
 370                 if (!(cr4 & X86_CR4_PAE)) {
 371                         printk(KERN_DEBUG "set_cr4: #GP, clearing PAE while "
 372                                "in long mode\n");
 373                         kvm_inject_gp(vcpu, 0);
 374                         return;
 375                 }
 376         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 377                    && ((cr4 ^ old_cr4) & pdptr_bits)
 378                    && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
 379                 printk(KERN_DEBUG "set_cr4: #GP, pdptrs reserved bits\n");
 380                 kvm_inject_gp(vcpu, 0);
 381                 return;
 382         }
 383
 384         if (cr4 & X86_CR4_VMXE) {
 385                 printk(KERN_DEBUG "set_cr4: #GP, setting VMXE\n");
 386                 kvm_inject_gp(vcpu, 0);
 387                 return;
 388         }
 389         kvm_x86_ops->set_cr4(vcpu, cr4);
 390         vcpu->arch.cr4 = cr4;
 391         vcpu->arch.mmu.base_role.cr4_pge = (cr4 & X86_CR4_PGE) && !tdp_enabled;
 392         kvm_mmu_reset_context(vcpu);
 393 }
 394 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 395
 396 void kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 397 {
 398         if (cr3 == vcpu->arch.cr3 && !pdptrs_changed(vcpu)) {
 399                 kvm_mmu_sync_roots(vcpu);
 400                 kvm_mmu_flush_tlb(vcpu);
 401                 return;
 402         }
 403
 404         if (is_long_mode(vcpu)) {
 405                 if (cr3 & CR3_L_MODE_RESERVED_BITS) {
 406                         printk(KERN_DEBUG "set_cr3: #GP, reserved bits\n");
 407                         kvm_inject_gp(vcpu, 0);
 408                         return;
 409                 }
 410         } else {
 411                 if (is_pae(vcpu)) {
 412                         if (cr3 & CR3_PAE_RESERVED_BITS) {
 413                                 printk(KERN_DEBUG
 414                                        "set_cr3: #GP, reserved bits\n");
 415                                 kvm_inject_gp(vcpu, 0);
 416                                 return;
 417                         }
 418                         if (is_paging(vcpu) && !load_pdptrs(vcpu, cr3)) {
 419                                 printk(KERN_DEBUG "set_cr3: #GP, pdptrs "
 420                                        "reserved bits\n");
 421                                 kvm_inject_gp(vcpu, 0);
 422                                 return;
 423                         }
 424                 }
 425                 /*
 426                  * We don't check reserved bits in nonpae mode, because
 427                  * this isn't enforced, and VMware depends on this.
 428                  */
 429         }
 430
 431         /*
 432          * Does the new cr3 value map to physical memory? (Note, we
 433          * catch an invalid cr3 even in real-mode, because it would
 434          * cause trouble later on when we turn on paging anyway.)
 435          *
 436          * A real CPU would silently accept an invalid cr3 and would
 437          * attempt to use it - with largely undefined (and often hard
 438          * to debug) behavior on the guest side.
 439          */
 440         if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
 441                 kvm_inject_gp(vcpu, 0);
 442         else {
 443                 vcpu->arch.cr3 = cr3;
 444                 vcpu->arch.mmu.new_cr3(vcpu);
 445         }
 446 }
 447 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 448
 449 void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 450 {
 451         if (cr8 & CR8_RESERVED_BITS) {
 452                 printk(KERN_DEBUG "set_cr8: #GP, reserved bits 0x%lx\n", cr8);
 453                 kvm_inject_gp(vcpu, 0);
 454                 return;
 455         }
 456         if (irqchip_in_kernel(vcpu->kvm))
 457                 kvm_lapic_set_tpr(vcpu, cr8);
 458         else
 459                 vcpu->arch.cr8 = cr8;
 460 }
 461 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 462
 463 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 464 {
 465         if (irqchip_in_kernel(vcpu->kvm))
 466                 return kvm_lapic_get_cr8(vcpu);
 467         else
 468                 return vcpu->arch.cr8;
 469 }
 470 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 471
 472 static inline u32 bit(int bitno)
 473 {
 474         return 1 << (bitno & 31);
 475 }
 476
 477 /*
 478  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 479  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 480  *
 481  * This list is modified at module load time to reflect the
 482  * capabilities of the host cpu.
 483  */
 484 static u32 msrs_to_save[] = {
 485         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 486         MSR_K6_STAR,
 487 #ifdef CONFIG_X86_64
 488         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 489 #endif
 490         MSR_IA32_TSC, MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 491         MSR_IA32_PERF_STATUS, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
 492 };
 493
 494 static unsigned num_msrs_to_save;
 495
 496 static u32 emulated_msrs[] = {
 497         MSR_IA32_MISC_ENABLE,
 498 };
 499
 500 static void set_efer(struct kvm_vcpu *vcpu, u64 efer)
 501 {
 502         if (efer & efer_reserved_bits) {
 503                 printk(KERN_DEBUG "set_efer: 0x%llx #GP, reserved bits\n",
 504                        efer);
 505                 kvm_inject_gp(vcpu, 0);
 506                 return;
 507         }
 508
 509         if (is_paging(vcpu)
 510             && (vcpu->arch.shadow_efer & EFER_LME) != (efer & EFER_LME)) {
 511                 printk(KERN_DEBUG "set_efer: #GP, change LME while paging\n");
 512                 kvm_inject_gp(vcpu, 0);
 513                 return;
 514         }
 515
 516         if (efer & EFER_FFXSR) {
 517                 struct kvm_cpuid_entry2 *feat;
 518
 519                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 520                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT))) {
 521                         printk(KERN_DEBUG "set_efer: #GP, enable FFXSR w/o CPUID capability\n");
 522                         kvm_inject_gp(vcpu, 0);
 523                         return;
 524                 }
 525         }
 526
 527         if (efer & EFER_SVME) {
 528                 struct kvm_cpuid_entry2 *feat;
 529
 530                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 531                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM))) {
 532                         printk(KERN_DEBUG "set_efer: #GP, enable SVM w/o SVM\n");
 533                         kvm_inject_gp(vcpu, 0);
 534                         return;
 535                 }
 536         }
 537
 538         kvm_x86_ops->set_efer(vcpu, efer);
 539
 540         efer &= ~EFER_LMA;
 541         efer |= vcpu->arch.shadow_efer & EFER_LMA;
 542
 543         vcpu->arch.shadow_efer = efer;
 544
 545         vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
 546         kvm_mmu_reset_context(vcpu);
 547 }
 548
 549 void kvm_enable_efer_bits(u64 mask)
 550 {
 551        efer_reserved_bits &= ~mask;
 552 }
 553 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
 554
 555
 556 /*
 557  * Writes msr value into into the appropriate "register".
 558  * Returns 0 on success, non-0 otherwise.
 559  * Assumes vcpu_load() was already called.
 560  */
 561 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
 562 {
 563         return kvm_x86_ops->set_msr(vcpu, msr_index, data);
 564 }
 565
 566 /*
 567  * Adapt set_msr() to msr_io()'s calling convention
 568  */
 569 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
 570 {
 571         return kvm_set_msr(vcpu, index, *data);
 572 }
 573
 574 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
 575 {
 576         static int version;
 577         struct pvclock_wall_clock wc;
 578         struct timespec now, sys, boot;
 579
 580         if (!wall_clock)
 581                 return;
 582
 583         version++;
 584
 585         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 586
 587         /*
 588          * The guest calculates current wall clock time by adding
 589          * system time (updated by kvm_write_guest_time below) to the
 590          * wall clock specified here.  guest system time equals host
 591          * system time for us, thus we must fill in host boot time here.
 592          */
 593         now = current_kernel_time();
 594         ktime_get_ts(&sys);
 595         boot = ns_to_timespec(timespec_to_ns(&now) - timespec_to_ns(&sys));
 596
 597         wc.sec = boot.tv_sec;
 598         wc.nsec = boot.tv_nsec;
 599         wc.version = version;
 600
 601         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
 602
 603         version++;
 604         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 605 }
 606
 607 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
 608 {
 609         uint32_t quotient, remainder;
 610
 611         /* Don't try to replace with do_div(), this one calculates
 612          * "(dividend << 32) / divisor" */
 613         __asm__ ( "divl %4"
 614                   : "=a" (quotient), "=d" (remainder)
 615                   : "0" (0), "1" (dividend), "r" (divisor) );
 616         return quotient;
 617 }
 618
 619 static void kvm_set_time_scale(uint32_t tsc_khz, struct pvclock_vcpu_time_info *hv_clock)
 620 {
 621         uint64_t nsecs = 1000000000LL;
 622         int32_t  shift = 0;
 623         uint64_t tps64;
 624         uint32_t tps32;
 625
 626         tps64 = tsc_khz * 1000LL;
 627         while (tps64 > nsecs*2) {
 628                 tps64 >>= 1;
 629                 shift--;
 630         }
 631
 632         tps32 = (uint32_t)tps64;
 633         while (tps32 <= (uint32_t)nsecs) {
 634                 tps32 <<= 1;
 635                 shift++;
 636         }
 637
 638         hv_clock->tsc_shift = shift;
 639         hv_clock->tsc_to_system_mul = div_frac(nsecs, tps32);
 640
 641         pr_debug("%s: tsc_khz %u, tsc_shift %d, tsc_mul %u\n",
 642                  __func__, tsc_khz, hv_clock->tsc_shift,
 643                  hv_clock->tsc_to_system_mul);
 644 }
 645
 646 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
 647
 648 static void kvm_write_guest_time(struct kvm_vcpu *v)
 649 {
 650         struct timespec ts;
 651         unsigned long flags;
 652         struct kvm_vcpu_arch *vcpu = &v->arch;
 653         void *shared_kaddr;
 654         unsigned long this_tsc_khz;
 655
 656         if ((!vcpu->time_page))
 657                 return;
 658
 659         this_tsc_khz = get_cpu_var(cpu_tsc_khz);
 660         if (unlikely(vcpu->hv_clock_tsc_khz != this_tsc_khz)) {
 661                 kvm_set_time_scale(this_tsc_khz, &vcpu->hv_clock);
 662                 vcpu->hv_clock_tsc_khz = this_tsc_khz;
 663         }
 664         put_cpu_var(cpu_tsc_khz);
 665
 666         /* Keep irq disabled to prevent changes to the clock */
 667         local_irq_save(flags);
 668         kvm_get_msr(v, MSR_IA32_TSC, &vcpu->hv_clock.tsc_timestamp);
 669         ktime_get_ts(&ts);
 670         local_irq_restore(flags);
 671
 672         /* With all the info we got, fill in the values */
 673
 674         vcpu->hv_clock.system_time = ts.tv_nsec +
 675                                      (NSEC_PER_SEC * (u64)ts.tv_sec);
 676         /*
 677          * The interface expects us to write an even number signaling that the
 678          * update is finished. Since the guest won't see the intermediate
 679          * state, we just increase by 2 at the end.
 680          */
 681         vcpu->hv_clock.version += 2;
 682
 683         shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
 684
 685         memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
 686                sizeof(vcpu->hv_clock));
 687
 688         kunmap_atomic(shared_kaddr, KM_USER0);
 689
 690         mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
 691 }
 692
 693 static int kvm_request_guest_time_update(struct kvm_vcpu *v)
 694 {
 695         struct kvm_vcpu_arch *vcpu = &v->arch;
 696
 697         if (!vcpu->time_page)
 698                 return 0;
 699         set_bit(KVM_REQ_KVMCLOCK_UPDATE, &v->requests);
 700         return 1;
 701 }
 702
 703 static bool msr_mtrr_valid(unsigned msr)
 704 {
 705         switch (msr) {
 706         case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
 707         case MSR_MTRRfix64K_00000:
 708         case MSR_MTRRfix16K_80000:
 709         case MSR_MTRRfix16K_A0000:
 710         case MSR_MTRRfix4K_C0000:
 711         case MSR_MTRRfix4K_C8000:
 712         case MSR_MTRRfix4K_D0000:
 713         case MSR_MTRRfix4K_D8000:
 714         case MSR_MTRRfix4K_E0000:
 715         case MSR_MTRRfix4K_E8000:
 716         case MSR_MTRRfix4K_F0000:
 717         case MSR_MTRRfix4K_F8000:
 718         case MSR_MTRRdefType:
 719         case MSR_IA32_CR_PAT:
 720                 return true;
 721         case 0x2f8:
 722                 return true;
 723         }
 724         return false;
 725 }
 726
 727 static bool valid_pat_type(unsigned t)
 728 {
 729         return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
 730 }
 731
 732 static bool valid_mtrr_type(unsigned t)
 733 {
 734         return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
 735 }
 736
 737 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
 738 {
 739         int i;
 740
 741         if (!msr_mtrr_valid(msr))
 742                 return false;
 743
 744         if (msr == MSR_IA32_CR_PAT) {
 745                 for (i = 0; i < 8; i++)
 746                         if (!valid_pat_type((data >> (i * 8)) & 0xff))
 747                                 return false;
 748                 return true;
 749         } else if (msr == MSR_MTRRdefType) {
 750                 if (data & ~0xcff)
 751                         return false;
 752                 return valid_mtrr_type(data & 0xff);
 753         } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
 754                 for (i = 0; i < 8 ; i++)
 755                         if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
 756                                 return false;
 757                 return true;
 758         }
 759
 760         /* variable MTRRs */
 761         return valid_mtrr_type(data & 0xff);
 762 }
 763
 764 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
 765 {
 766         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
 767
 768         if (!mtrr_valid(vcpu, msr, data))
 769                 return 1;
 770
 771         if (msr == MSR_MTRRdefType) {
 772                 vcpu->arch.mtrr_state.def_type = data;
 773                 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
 774         } else if (msr == MSR_MTRRfix64K_00000)
 775                 p[0] = data;
 776         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
 777                 p[1 + msr - MSR_MTRRfix16K_80000] = data;
 778         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
 779                 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
 780         else if (msr == MSR_IA32_CR_PAT)
 781                 vcpu->arch.pat = data;
 782         else {  /* Variable MTRRs */
 783                 int idx, is_mtrr_mask;
 784                 u64 *pt;
 785
 786                 idx = (msr - 0x200) / 2;
 787                 is_mtrr_mask = msr - 0x200 - 2 * idx;
 788                 if (!is_mtrr_mask)
 789                         pt =
 790                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
 791                 else
 792                         pt =
 793                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
 794                 *pt = data;
 795         }
 796
 797         kvm_mmu_reset_context(vcpu);
 798         return 0;
 799 }
 800
 801 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
 802 {
 803         u64 mcg_cap = vcpu->arch.mcg_cap;
 804         unsigned bank_num = mcg_cap & 0xff;
 805
 806         switch (msr) {
 807         case MSR_IA32_MCG_STATUS:
 808                 vcpu->arch.mcg_status = data;
 809                 break;
 810         case MSR_IA32_MCG_CTL:
 811                 if (!(mcg_cap & MCG_CTL_P))
 812                         return 1;
 813                 if (data != 0 && data != ~(u64)0)
 814                         return -1;
 815                 vcpu->arch.mcg_ctl = data;
 816                 break;
 817         default:
 818                 if (msr >= MSR_IA32_MC0_CTL &&
 819                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
 820                         u32 offset = msr - MSR_IA32_MC0_CTL;
 821                         /* only 0 or all 1s can be written to IA32_MCi_CTL */
 822                         if ((offset & 0x3) == 0 &&
 823                             data != 0 && data != ~(u64)0)
 824                                 return -1;
 825                         vcpu->arch.mce_banks[offset] = data;
 826                         break;
 827                 }
 828                 return 1;
 829         }
 830         return 0;
 831 }
 832
 833 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
 834 {
 835         switch (msr) {
 836         case MSR_EFER:
 837                 set_efer(vcpu, data);
 838                 break;
 839         case MSR_K7_HWCR:
 840                 data &= ~(u64)0x40;     /* ignore flush filter disable */
 841                 if (data != 0) {
 842                         pr_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
 843                                 data);
 844                         return 1;
 845                 }
 846                 break;
 847         case MSR_FAM10H_MMIO_CONF_BASE:
 848                 if (data != 0) {
 849                         pr_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
 850                                 "0x%llx\n", data);
 851                         return 1;
 852                 }
 853                 break;
 854         case MSR_AMD64_NB_CFG:
 855                 break;
 856         case MSR_IA32_DEBUGCTLMSR:
 857                 if (!data) {
 858                         /* We support the non-activated case already */
 859                         break;
 860                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
 861                         /* Values other than LBR and BTF are vendor-specific,
 862                            thus reserved and should throw a #GP */
 863                         return 1;
 864                 }
 865                 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
 866                         __func__, data);
 867                 break;
 868         case MSR_IA32_UCODE_REV:
 869         case MSR_IA32_UCODE_WRITE:
 870         case MSR_VM_HSAVE_PA:
 871         case MSR_AMD64_PATCH_LOADER:
 872                 break;
 873         case 0x200 ... 0x2ff:
 874                 return set_msr_mtrr(vcpu, msr, data);
 875         case MSR_IA32_APICBASE:
 876                 kvm_set_apic_base(vcpu, data);
 877                 break;
 878         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
 879                 return kvm_x2apic_msr_write(vcpu, msr, data);
 880         case MSR_IA32_MISC_ENABLE:
 881                 vcpu->arch.ia32_misc_enable_msr = data;
 882                 break;
 883         case MSR_KVM_WALL_CLOCK:
 884                 vcpu->kvm->arch.wall_clock = data;
 885                 kvm_write_wall_clock(vcpu->kvm, data);
 886                 break;
 887         case MSR_KVM_SYSTEM_TIME: {
 888                 if (vcpu->arch.time_page) {
 889                         kvm_release_page_dirty(vcpu->arch.time_page);
 890                         vcpu->arch.time_page = NULL;
 891                 }
 892
 893                 vcpu->arch.time = data;
 894
 895                 /* we verify if the enable bit is set... */
 896                 if (!(data & 1))
 897                         break;
 898
 899                 /* ...but clean it before doing the actual write */
 900                 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
 901
 902                 vcpu->arch.time_page =
 903                                 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
 904
 905                 if (is_error_page(vcpu->arch.time_page)) {
 906                         kvm_release_page_clean(vcpu->arch.time_page);
 907                         vcpu->arch.time_page = NULL;
 908                 }
 909
 910                 kvm_request_guest_time_update(vcpu);
 911                 break;
 912         }
 913         case MSR_IA32_MCG_CTL:
 914         case MSR_IA32_MCG_STATUS:
 915         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
 916                 return set_msr_mce(vcpu, msr, data);
 917
 918         /* Performance counters are not protected by a CPUID bit,
 919          * so we should check all of them in the generic path for the sake of
 920          * cross vendor migration.
 921          * Writing a zero into the event select MSRs disables them,
 922          * which we perfectly emulate ;-). Any other value should be at least
 923          * reported, some guests depend on them.
 924          */
 925         case MSR_P6_EVNTSEL0:
 926         case MSR_P6_EVNTSEL1:
 927         case MSR_K7_EVNTSEL0:
 928         case MSR_K7_EVNTSEL1:
 929         case MSR_K7_EVNTSEL2:
 930         case MSR_K7_EVNTSEL3:
 931                 if (data != 0)
 932                         pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
 933                                 "0x%x data 0x%llx\n", msr, data);
 934                 break;
 935         /* at least RHEL 4 unconditionally writes to the perfctr registers,
 936          * so we ignore writes to make it happy.
 937          */
 938         case MSR_P6_PERFCTR0:
 939         case MSR_P6_PERFCTR1:
 940         case MSR_K7_PERFCTR0:
 941         case MSR_K7_PERFCTR1:
 942         case MSR_K7_PERFCTR2:
 943         case MSR_K7_PERFCTR3:
 944                 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
 945                         "0x%x data 0x%llx\n", msr, data);
 946                 break;
 947         default:
 948                 if (!ignore_msrs) {
 949                         pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
 950                                 msr, data);
 951                         return 1;
 952                 } else {
 953                         pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
 954                                 msr, data);
 955                         break;
 956                 }
 957         }
 958         return 0;
 959 }
 960 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
 961
 962
 963 /*
 964  * Reads an msr value (of 'msr_index') into 'pdata'.
 965  * Returns 0 on success, non-0 otherwise.
 966  * Assumes vcpu_load() was already called.
 967  */
 968 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
 969 {
 970         return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
 971 }
 972
 973 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
 974 {
 975         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
 976
 977         if (!msr_mtrr_valid(msr))
 978                 return 1;
 979
 980         if (msr == MSR_MTRRdefType)
 981                 *pdata = vcpu->arch.mtrr_state.def_type +
 982                          (vcpu->arch.mtrr_state.enabled << 10);
 983         else if (msr == MSR_MTRRfix64K_00000)
 984                 *pdata = p[0];
 985         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
 986                 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
 987         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
 988                 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
 989         else if (msr == MSR_IA32_CR_PAT)
 990                 *pdata = vcpu->arch.pat;
 991         else {  /* Variable MTRRs */
 992                 int idx, is_mtrr_mask;
 993                 u64 *pt;
 994
 995                 idx = (msr - 0x200) / 2;
 996                 is_mtrr_mask = msr - 0x200 - 2 * idx;
 997                 if (!is_mtrr_mask)
 998                         pt =
 999                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1000                 else
1001                         pt =
1002                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1003                 *pdata = *pt;
1004         }
1005
1006         return 0;
1007 }
1008
1009 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1010 {
1011         u64 data;
1012         u64 mcg_cap = vcpu->arch.mcg_cap;
1013         unsigned bank_num = mcg_cap & 0xff;
1014
1015         switch (msr) {
1016         case MSR_IA32_P5_MC_ADDR:
1017         case MSR_IA32_P5_MC_TYPE:
1018                 data = 0;
1019                 break;
1020         case MSR_IA32_MCG_CAP:
1021                 data = vcpu->arch.mcg_cap;
1022                 break;
1023         case MSR_IA32_MCG_CTL:
1024                 if (!(mcg_cap & MCG_CTL_P))
1025                         return 1;
1026                 data = vcpu->arch.mcg_ctl;
1027                 break;
1028         case MSR_IA32_MCG_STATUS:
1029                 data = vcpu->arch.mcg_status;
1030                 break;
1031         default:
1032                 if (msr >= MSR_IA32_MC0_CTL &&
1033                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1034                         u32 offset = msr - MSR_IA32_MC0_CTL;
1035                         data = vcpu->arch.mce_banks[offset];
1036                         break;
1037                 }
1038                 return 1;
1039         }
1040         *pdata = data;
1041         return 0;
1042 }
1043
1044 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1045 {
1046         u64 data;
1047
1048         switch (msr) {
1049         case MSR_IA32_PLATFORM_ID:
1050         case MSR_IA32_UCODE_REV:
1051         case MSR_IA32_EBL_CR_POWERON:
1052         case MSR_IA32_DEBUGCTLMSR:
1053         case MSR_IA32_LASTBRANCHFROMIP:
1054         case MSR_IA32_LASTBRANCHTOIP:
1055         case MSR_IA32_LASTINTFROMIP:
1056         case MSR_IA32_LASTINTTOIP:
1057         case MSR_K8_SYSCFG:
1058         case MSR_K7_HWCR:
1059         case MSR_VM_HSAVE_PA:
1060         case MSR_P6_EVNTSEL0:
1061         case MSR_P6_EVNTSEL1:
1062         case MSR_K7_EVNTSEL0:
1063         case MSR_K8_INT_PENDING_MSG:
1064         case MSR_AMD64_NB_CFG:
1065         case MSR_FAM10H_MMIO_CONF_BASE:
1066                 data = 0;
1067                 break;
1068         case MSR_MTRRcap:
1069                 data = 0x500 | KVM_NR_VAR_MTRR;
1070                 break;
1071         case 0x200 ... 0x2ff:
1072                 return get_msr_mtrr(vcpu, msr, pdata);
1073         case 0xcd: /* fsb frequency */
1074                 data = 3;
1075                 break;
1076         case MSR_IA32_APICBASE:
1077                 data = kvm_get_apic_base(vcpu);
1078                 break;
1079         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1080                 return kvm_x2apic_msr_read(vcpu, msr, pdata);
1081                 break;
1082         case MSR_IA32_MISC_ENABLE:
1083                 data = vcpu->arch.ia32_misc_enable_msr;
1084                 break;
1085         case MSR_IA32_PERF_STATUS:
1086                 /* TSC increment by tick */
1087                 data = 1000ULL;
1088                 /* CPU multiplier */
1089                 data |= (((uint64_t)4ULL) << 40);
1090                 break;
1091         case MSR_EFER:
1092                 data = vcpu->arch.shadow_efer;
1093                 break;
1094         case MSR_KVM_WALL_CLOCK:
1095                 data = vcpu->kvm->arch.wall_clock;
1096                 break;
1097         case MSR_KVM_SYSTEM_TIME:
1098                 data = vcpu->arch.time;
1099                 break;
1100         case MSR_IA32_P5_MC_ADDR:
1101         case MSR_IA32_P5_MC_TYPE:
1102         case MSR_IA32_MCG_CAP:
1103         case MSR_IA32_MCG_CTL:
1104         case MSR_IA32_MCG_STATUS:
1105         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1106                 return get_msr_mce(vcpu, msr, pdata);
1107         default:
1108                 if (!ignore_msrs) {
1109                         pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
1110                         return 1;
1111                 } else {
1112                         pr_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
1113                         data = 0;
1114                 }
1115                 break;
1116         }
1117         *pdata = data;
1118         return 0;
1119 }
1120 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
1121
1122 /*
1123  * Read or write a bunch of msrs. All parameters are kernel addresses.
1124  *
1125  * @return number of msrs set successfully.
1126  */
1127 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
1128                     struct kvm_msr_entry *entries,
1129                     int (*do_msr)(struct kvm_vcpu *vcpu,
1130                                   unsigned index, u64 *data))
1131 {
1132         int i;
1133
1134         vcpu_load(vcpu);
1135
1136         down_read(&vcpu->kvm->slots_lock);
1137         for (i = 0; i < msrs->nmsrs; ++i)
1138                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
1139                         break;
1140         up_read(&vcpu->kvm->slots_lock);
1141
1142         vcpu_put(vcpu);
1143
1144         return i;
1145 }
1146
1147 /*
1148  * Read or write a bunch of msrs. Parameters are user addresses.
1149  *
1150  * @return number of msrs set successfully.
1151  */
1152 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
1153                   int (*do_msr)(struct kvm_vcpu *vcpu,
1154                                 unsigned index, u64 *data),
1155                   int writeback)
1156 {
1157         struct kvm_msrs msrs;
1158         struct kvm_msr_entry *entries;
1159         int r, n;
1160         unsigned size;
1161
1162         r = -EFAULT;
1163         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
1164                 goto out;
1165
1166         r = -E2BIG;
1167         if (msrs.nmsrs >= MAX_IO_MSRS)
1168                 goto out;
1169
1170         r = -ENOMEM;
1171         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
1172         entries = vmalloc(size);
1173         if (!entries)
1174                 goto out;
1175
1176         r = -EFAULT;
1177         if (copy_from_user(entries, user_msrs->entries, size))
1178                 goto out_free;
1179
1180         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
1181         if (r < 0)
1182                 goto out_free;
1183
1184         r = -EFAULT;
1185         if (writeback && copy_to_user(user_msrs->entries, entries, size))
1186                 goto out_free;
1187
1188         r = n;
1189
1190 out_free:
1191         vfree(entries);
1192 out:
1193         return r;
1194 }
1195
1196 int kvm_dev_ioctl_check_extension(long ext)
1197 {
1198         int r;
1199
1200         switch (ext) {
1201         case KVM_CAP_IRQCHIP:
1202         case KVM_CAP_HLT:
1203         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
1204         case KVM_CAP_SET_TSS_ADDR:
1205         case KVM_CAP_EXT_CPUID:
1206         case KVM_CAP_CLOCKSOURCE:
1207         case KVM_CAP_PIT:
1208         case KVM_CAP_NOP_IO_DELAY:
1209         case KVM_CAP_MP_STATE:
1210         case KVM_CAP_SYNC_MMU:
1211         case KVM_CAP_REINJECT_CONTROL:
1212         case KVM_CAP_IRQ_INJECT_STATUS:
1213         case KVM_CAP_ASSIGN_DEV_IRQ:
1214         case KVM_CAP_IRQFD:
1215         case KVM_CAP_PIT2:
1216                 r = 1;
1217                 break;
1218         case KVM_CAP_COALESCED_MMIO:
1219                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
1220                 break;
1221         case KVM_CAP_VAPIC:
1222                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
1223                 break;
1224         case KVM_CAP_NR_VCPUS:
1225                 r = KVM_MAX_VCPUS;
1226                 break;
1227         case KVM_CAP_NR_MEMSLOTS:
1228                 r = KVM_MEMORY_SLOTS;
1229                 break;
1230         case KVM_CAP_PV_MMU:
1231                 r = !tdp_enabled;
1232                 break;
1233         case KVM_CAP_IOMMU:
1234                 r = iommu_found();
1235                 break;
1236         case KVM_CAP_MCE:
1237                 r = KVM_MAX_MCE_BANKS;
1238                 break;
1239         default:
1240                 r = 0;
1241                 break;
1242         }
1243         return r;
1244
1245 }
1246
1247 long kvm_arch_dev_ioctl(struct file *filp,
1248                         unsigned int ioctl, unsigned long arg)
1249 {
1250         void __user *argp = (void __user *)arg;
1251         long r;
1252
1253         switch (ioctl) {
1254         case KVM_GET_MSR_INDEX_LIST: {
1255                 struct kvm_msr_list __user *user_msr_list = argp;
1256                 struct kvm_msr_list msr_list;
1257                 unsigned n;
1258
1259                 r = -EFAULT;
1260                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
1261                         goto out;
1262                 n = msr_list.nmsrs;
1263                 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
1264                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
1265                         goto out;
1266                 r = -E2BIG;
1267                 if (n < msr_list.nmsrs)
1268                         goto out;
1269                 r = -EFAULT;
1270                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
1271                                  num_msrs_to_save * sizeof(u32)))
1272                         goto out;
1273                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
1274                                  &emulated_msrs,
1275                                  ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
1276                         goto out;
1277                 r = 0;
1278                 break;
1279         }
1280         case KVM_GET_SUPPORTED_CPUID: {
1281                 struct kvm_cpuid2 __user *cpuid_arg = argp;
1282                 struct kvm_cpuid2 cpuid;
1283
1284                 r = -EFAULT;
1285                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1286                         goto out;
1287                 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
1288                                                       cpuid_arg->entries);
1289                 if (r)
1290                         goto out;
1291
1292                 r = -EFAULT;
1293                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1294                         goto out;
1295                 r = 0;
1296                 break;
1297         }
1298         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
1299                 u64 mce_cap;
1300
1301                 mce_cap = KVM_MCE_CAP_SUPPORTED;
1302                 r = -EFAULT;
1303                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
1304                         goto out;
1305                 r = 0;
1306                 break;
1307         }
1308         default:
1309                 r = -EINVAL;
1310         }
1311 out:
1312         return r;
1313 }
1314
1315 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
1316 {
1317         kvm_x86_ops->vcpu_load(vcpu, cpu);
1318         kvm_request_guest_time_update(vcpu);
1319 }
1320
1321 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
1322 {
1323         kvm_x86_ops->vcpu_put(vcpu);
1324         kvm_put_guest_fpu(vcpu);
1325 }
1326
1327 static int is_efer_nx(void)
1328 {
1329         unsigned long long efer = 0;
1330
1331         rdmsrl_safe(MSR_EFER, &efer);
1332         return efer & EFER_NX;
1333 }
1334
1335 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
1336 {
1337         int i;
1338         struct kvm_cpuid_entry2 *e, *entry;
1339
1340         entry = NULL;
1341         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
1342                 e = &vcpu->arch.cpuid_entries[i];
1343                 if (e->function == 0x80000001) {
1344                         entry = e;
1345                         break;
1346                 }
1347         }
1348         if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
1349                 entry->edx &= ~(1 << 20);
1350                 printk(KERN_INFO "kvm: guest NX capability removed\n");
1351         }
1352 }
1353
1354 /* when an old userspace process fills a new kernel module */
1355 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
1356                                     struct kvm_cpuid *cpuid,
1357                                     struct kvm_cpuid_entry __user *entries)
1358 {
1359         int r, i;
1360         struct kvm_cpuid_entry *cpuid_entries;
1361
1362         r = -E2BIG;
1363         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1364                 goto out;
1365         r = -ENOMEM;
1366         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
1367         if (!cpuid_entries)
1368                 goto out;
1369         r = -EFAULT;
1370         if (copy_from_user(cpuid_entries, entries,
1371                            cpuid->nent * sizeof(struct kvm_cpuid_entry)))
1372                 goto out_free;
1373         for (i = 0; i < cpuid->nent; i++) {
1374                 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
1375                 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
1376                 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
1377                 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
1378                 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
1379                 vcpu->arch.cpuid_entries[i].index = 0;
1380                 vcpu->arch.cpuid_entries[i].flags = 0;
1381                 vcpu->arch.cpuid_entries[i].padding[0] = 0;
1382                 vcpu->arch.cpuid_entries[i].padding[1] = 0;
1383                 vcpu->arch.cpuid_entries[i].padding[2] = 0;
1384         }
1385         vcpu->arch.cpuid_nent = cpuid->nent;
1386         cpuid_fix_nx_cap(vcpu);
1387         r = 0;
1388         kvm_apic_set_version(vcpu);
1389
1390 out_free:
1391         vfree(cpuid_entries);
1392 out:
1393         return r;
1394 }
1395
1396 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
1397                                      struct kvm_cpuid2 *cpuid,
1398                                      struct kvm_cpuid_entry2 __user *entries)
1399 {
1400         int r;
1401
1402         r = -E2BIG;
1403         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1404                 goto out;
1405         r = -EFAULT;
1406         if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
1407                            cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
1408                 goto out;
1409         vcpu->arch.cpuid_nent = cpuid->nent;
1410         kvm_apic_set_version(vcpu);
1411         return 0;
1412
1413 out:
1414         return r;
1415 }
1416
1417 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
1418                                      struct kvm_cpuid2 *cpuid,
1419                                      struct kvm_cpuid_entry2 __user *entries)
1420 {
1421         int r;
1422
1423         r = -E2BIG;
1424         if (cpuid->nent < vcpu->arch.cpuid_nent)
1425                 goto out;
1426         r = -EFAULT;
1427         if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
1428                          vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
1429                 goto out;
1430         return 0;
1431
1432 out:
1433         cpuid->nent = vcpu->arch.cpuid_nent;
1434         return r;
1435 }
1436
1437 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1438                            u32 index)
1439 {
1440         entry->function = function;
1441         entry->index = index;
1442         cpuid_count(entry->function, entry->index,
1443                     &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
1444         entry->flags = 0;
1445 }
1446
1447 #define F(x) bit(X86_FEATURE_##x)
1448
1449 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1450                          u32 index, int *nent, int maxnent)
1451 {
1452         unsigned f_nx = is_efer_nx() ? F(NX) : 0;
1453 #ifdef CONFIG_X86_64
1454         unsigned f_lm = F(LM);
1455 #else
1456         unsigned f_lm = 0;
1457 #endif
1458
1459         /* cpuid 1.edx */
1460         const u32 kvm_supported_word0_x86_features =
1461                 F(FPU) | F(VME) | F(DE) | F(PSE) |
1462                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
1463                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SEP) |
1464                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
1465                 F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLSH) |
1466                 0 /* Reserved, DS, ACPI */ | F(MMX) |
1467                 F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) |
1468                 0 /* HTT, TM, Reserved, PBE */;
1469         /* cpuid 0x80000001.edx */
1470         const u32 kvm_supported_word1_x86_features =
1471                 F(FPU) | F(VME) | F(DE) | F(PSE) |
1472                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
1473                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SYSCALL) |
1474                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
1475                 F(PAT) | F(PSE36) | 0 /* Reserved */ |
1476                 f_nx | 0 /* Reserved */ | F(MMXEXT) | F(MMX) |
1477                 F(FXSR) | F(FXSR_OPT) | 0 /* GBPAGES */ | 0 /* RDTSCP */ |
1478                 0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW);
1479         /* cpuid 1.ecx */
1480         const u32 kvm_supported_word4_x86_features =
1481                 F(XMM3) | 0 /* Reserved, DTES64, MONITOR */ |
1482                 0 /* DS-CPL, VMX, SMX, EST */ |
1483                 0 /* TM2 */ | F(SSSE3) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
1484                 0 /* Reserved */ | F(CX16) | 0 /* xTPR Update, PDCM */ |
1485                 0 /* Reserved, DCA */ | F(XMM4_1) |
1486                 F(XMM4_2) | F(X2APIC) | F(MOVBE) | F(POPCNT) |
1487                 0 /* Reserved, XSAVE, OSXSAVE */;
1488         /* cpuid 0x80000001.ecx */
1489         const u32 kvm_supported_word6_x86_features =
1490                 F(LAHF_LM) | F(CMP_LEGACY) | F(SVM) | 0 /* ExtApicSpace */ |
1491                 F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |
1492                 F(3DNOWPREFETCH) | 0 /* OSVW */ | 0 /* IBS */ | F(SSE5) |
1493                 0 /* SKINIT */ | 0 /* WDT */;
1494
1495         /* all calls to cpuid_count() should be made on the same cpu */
1496         get_cpu();
1497         do_cpuid_1_ent(entry, function, index);
1498         ++*nent;
1499
1500         switch (function) {
1501         case 0:
1502                 entry->eax = min(entry->eax, (u32)0xb);
1503                 break;
1504         case 1:
1505                 entry->edx &= kvm_supported_word0_x86_features;
1506                 entry->ecx &= kvm_supported_word4_x86_features;
1507                 /* we support x2apic emulation even if host does not support
1508                  * it since we emulate x2apic in software */
1509                 entry->ecx |= F(X2APIC);
1510                 break;
1511         /* function 2 entries are STATEFUL. That is, repeated cpuid commands
1512          * may return different values. This forces us to get_cpu() before
1513          * issuing the first command, and also to emulate this annoying behavior
1514          * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
1515         case 2: {
1516                 int t, times = entry->eax & 0xff;
1517
1518                 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
1519                 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
1520                 for (t = 1; t < times && *nent < maxnent; ++t) {
1521                         do_cpuid_1_ent(&entry[t], function, 0);
1522                         entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
1523                         ++*nent;
1524                 }
1525                 break;
1526         }
1527         /* function 4 and 0xb have additional index. */
1528         case 4: {
1529                 int i, cache_type;
1530
1531                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1532                 /* read more entries until cache_type is zero */
1533                 for (i = 1; *nent < maxnent; ++i) {
1534                         cache_type = entry[i - 1].eax & 0x1f;
1535                         if (!cache_type)
1536                                 break;
1537                         do_cpuid_1_ent(&entry[i], function, i);
1538                         entry[i].flags |=
1539                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1540                         ++*nent;
1541                 }
1542                 break;
1543         }
1544         case 0xb: {
1545                 int i, level_type;
1546
1547                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1548                 /* read more entries until level_type is zero */
1549                 for (i = 1; *nent < maxnent; ++i) {
1550                         level_type = entry[i - 1].ecx & 0xff00;
1551                         if (!level_type)
1552                                 break;
1553                         do_cpuid_1_ent(&entry[i], function, i);
1554                         entry[i].flags |=
1555                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1556                         ++*nent;
1557                 }
1558                 break;
1559         }
1560         case 0x80000000:
1561                 entry->eax = min(entry->eax, 0x8000001a);
1562                 break;
1563         case 0x80000001:
1564                 entry->edx &= kvm_supported_word1_x86_features;
1565                 entry->ecx &= kvm_supported_word6_x86_features;
1566                 break;
1567         }
1568         put_cpu();
1569 }
1570
1571 #undef F
1572
1573 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
1574                                      struct kvm_cpuid_entry2 __user *entries)
1575 {
1576         struct kvm_cpuid_entry2 *cpuid_entries;
1577         int limit, nent = 0, r = -E2BIG;
1578         u32 func;
1579
1580         if (cpuid->nent < 1)
1581                 goto out;
1582         r = -ENOMEM;
1583         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
1584         if (!cpuid_entries)
1585                 goto out;
1586
1587         do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
1588         limit = cpuid_entries[0].eax;
1589         for (func = 1; func <= limit && nent < cpuid->nent; ++func)
1590                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
1591                              &nent, cpuid->nent);
1592         r = -E2BIG;
1593         if (nent >= cpuid->nent)
1594                 goto out_free;
1595
1596         do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
1597         limit = cpuid_entries[nent - 1].eax;
1598         for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
1599                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
1600                              &nent, cpuid->nent);
1601         r = -E2BIG;
1602         if (nent >= cpuid->nent)
1603                 goto out_free;
1604
1605         r = -EFAULT;
1606         if (copy_to_user(entries, cpuid_entries,
1607                          nent * sizeof(struct kvm_cpuid_entry2)))
1608                 goto out_free;
1609         cpuid->nent = nent;
1610         r = 0;
1611
1612 out_free:
1613         vfree(cpuid_entries);
1614 out:
1615         return r;
1616 }
1617
1618 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
1619                                     struct kvm_lapic_state *s)
1620 {
1621         vcpu_load(vcpu);
1622         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
1623         vcpu_put(vcpu);
1624
1625         return 0;
1626 }
1627
1628 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
1629                                     struct kvm_lapic_state *s)
1630 {
1631         vcpu_load(vcpu);
1632         memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
1633         kvm_apic_post_state_restore(vcpu);
1634         vcpu_put(vcpu);
1635
1636         return 0;
1637 }
1638
1639 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
1640                                     struct kvm_interrupt *irq)
1641 {
1642         if (irq->irq < 0 || irq->irq >= 256)
1643                 return -EINVAL;
1644         if (irqchip_in_kernel(vcpu->kvm))
1645                 return -ENXIO;
1646         vcpu_load(vcpu);
1647
1648         kvm_queue_interrupt(vcpu, irq->irq, false);
1649
1650         vcpu_put(vcpu);
1651
1652         return 0;
1653 }
1654
1655 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
1656 {
1657         vcpu_load(vcpu);
1658         kvm_inject_nmi(vcpu);
1659         vcpu_put(vcpu);
1660
1661         return 0;
1662 }
1663
1664 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
1665                                            struct kvm_tpr_access_ctl *tac)
1666 {
1667         if (tac->flags)
1668                 return -EINVAL;
1669         vcpu->arch.tpr_access_reporting = !!tac->enabled;
1670         return 0;
1671 }
1672
1673 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
1674                                         u64 mcg_cap)
1675 {
1676         int r;
1677         unsigned bank_num = mcg_cap & 0xff, bank;
1678
1679         r = -EINVAL;
1680         if (!bank_num)
1681                 goto out;
1682         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
1683                 goto out;
1684         r = 0;
1685         vcpu->arch.mcg_cap = mcg_cap;
1686         /* Init IA32_MCG_CTL to all 1s */
1687         if (mcg_cap & MCG_CTL_P)
1688                 vcpu->arch.mcg_ctl = ~(u64)0;
1689         /* Init IA32_MCi_CTL to all 1s */
1690         for (bank = 0; bank < bank_num; bank++)
1691                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
1692 out:
1693         return r;
1694 }
1695
1696 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
1697                                       struct kvm_x86_mce *mce)
1698 {
1699         u64 mcg_cap = vcpu->arch.mcg_cap;
1700         unsigned bank_num = mcg_cap & 0xff;
1701         u64 *banks = vcpu->arch.mce_banks;
1702
1703         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
1704                 return -EINVAL;
1705         /*
1706          * if IA32_MCG_CTL is not all 1s, the uncorrected error
1707          * reporting is disabled
1708          */
1709         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
1710             vcpu->arch.mcg_ctl != ~(u64)0)
1711                 return 0;
1712         banks += 4 * mce->bank;
1713         /*
1714          * if IA32_MCi_CTL is not all 1s, the uncorrected error
1715          * reporting is disabled for the bank
1716          */
1717         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
1718                 return 0;
1719         if (mce->status & MCI_STATUS_UC) {
1720                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
1721                     !(vcpu->arch.cr4 & X86_CR4_MCE)) {
1722                         printk(KERN_DEBUG "kvm: set_mce: "
1723                                "injects mce exception while "
1724                                "previous one is in progress!\n");
1725                         set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
1726                         return 0;
1727                 }
1728                 if (banks[1] & MCI_STATUS_VAL)
1729                         mce->status |= MCI_STATUS_OVER;
1730                 banks[2] = mce->addr;
1731                 banks[3] = mce->misc;
1732                 vcpu->arch.mcg_status = mce->mcg_status;
1733                 banks[1] = mce->status;
1734                 kvm_queue_exception(vcpu, MC_VECTOR);
1735         } else if (!(banks[1] & MCI_STATUS_VAL)
1736                    || !(banks[1] & MCI_STATUS_UC)) {
1737                 if (banks[1] & MCI_STATUS_VAL)
1738                         mce->status |= MCI_STATUS_OVER;
1739                 banks[2] = mce->addr;
1740                 banks[3] = mce->misc;
1741                 banks[1] = mce->status;
1742         } else
1743                 banks[1] |= MCI_STATUS_OVER;
1744         return 0;
1745 }
1746
1747 long kvm_arch_vcpu_ioctl(struct file *filp,
1748                          unsigned int ioctl, unsigned long arg)
1749 {
1750         struct kvm_vcpu *vcpu = filp->private_data;
1751         void __user *argp = (void __user *)arg;
1752         int r;
1753         struct kvm_lapic_state *lapic = NULL;
1754
1755         switch (ioctl) {
1756         case KVM_GET_LAPIC: {
1757                 lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
1758
1759                 r = -ENOMEM;
1760                 if (!lapic)
1761                         goto out;
1762                 r = kvm_vcpu_ioctl_get_lapic(vcpu, lapic);
1763                 if (r)
1764                         goto out;
1765                 r = -EFAULT;
1766                 if (copy_to_user(argp, lapic, sizeof(struct kvm_lapic_state)))
1767                         goto out;
1768                 r = 0;
1769                 break;
1770         }
1771         case KVM_SET_LAPIC: {
1772                 lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
1773                 r = -ENOMEM;
1774                 if (!lapic)
1775                         goto out;
1776                 r = -EFAULT;
1777                 if (copy_from_user(lapic, argp, sizeof(struct kvm_lapic_state)))
1778                         goto out;
1779                 r = kvm_vcpu_ioctl_set_lapic(vcpu, lapic);
1780                 if (r)
1781                         goto out;
1782                 r = 0;
1783                 break;
1784         }
1785         case KVM_INTERRUPT: {
1786                 struct kvm_interrupt irq;
1787
1788                 r = -EFAULT;
1789                 if (copy_from_user(&irq, argp, sizeof irq))
1790                         goto out;
1791                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
1792                 if (r)
1793                         goto out;
1794                 r = 0;
1795                 break;
1796         }
1797         case KVM_NMI: {
1798                 r = kvm_vcpu_ioctl_nmi(vcpu);
1799                 if (r)
1800                         goto out;
1801                 r = 0;
1802                 break;
1803         }
1804         case KVM_SET_CPUID: {
1805                 struct kvm_cpuid __user *cpuid_arg = argp;
1806                 struct kvm_cpuid cpuid;
1807
1808                 r = -EFAULT;
1809                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1810                         goto out;
1811                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
1812                 if (r)
1813                         goto out;
1814                 break;
1815         }
1816         case KVM_SET_CPUID2: {
1817                 struct kvm_cpuid2 __user *cpuid_arg = argp;
1818                 struct kvm_cpuid2 cpuid;
1819
1820                 r = -EFAULT;
1821                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1822                         goto out;
1823                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
1824                                               cpuid_arg->entries);
1825                 if (r)
1826                         goto out;
1827                 break;
1828         }
1829         case KVM_GET_CPUID2: {
1830                 struct kvm_cpuid2 __user *cpuid_arg = argp;
1831                 struct kvm_cpuid2 cpuid;
1832
1833                 r = -EFAULT;
1834                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1835                         goto out;
1836                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
1837                                               cpuid_arg->entries);
1838                 if (r)
1839                         goto out;
1840                 r = -EFAULT;
1841                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1842                         goto out;
1843                 r = 0;
1844                 break;
1845         }
1846         case KVM_GET_MSRS:
1847                 r = msr_io(vcpu, argp, kvm_get_msr, 1);
1848                 break;
1849         case KVM_SET_MSRS:
1850                 r = msr_io(vcpu, argp, do_set_msr, 0);
1851                 break;
1852         case KVM_TPR_ACCESS_REPORTING: {
1853                 struct kvm_tpr_access_ctl tac;
1854
1855                 r = -EFAULT;
1856                 if (copy_from_user(&tac, argp, sizeof tac))
1857                         goto out;
1858                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
1859                 if (r)
1860                         goto out;
1861                 r = -EFAULT;
1862                 if (copy_to_user(argp, &tac, sizeof tac))
1863                         goto out;
1864                 r = 0;
1865                 break;
1866         };
1867         case KVM_SET_VAPIC_ADDR: {
1868                 struct kvm_vapic_addr va;
1869
1870                 r = -EINVAL;
1871                 if (!irqchip_in_kernel(vcpu->kvm))
1872                         goto out;
1873                 r = -EFAULT;
1874                 if (copy_from_user(&va, argp, sizeof va))
1875                         goto out;
1876                 r = 0;
1877                 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
1878                 break;
1879         }
1880         case KVM_X86_SETUP_MCE: {
1881                 u64 mcg_cap;
1882
1883                 r = -EFAULT;
1884                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
1885                         goto out;
1886                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
1887                 break;
1888         }
1889         case KVM_X86_SET_MCE: {
1890                 struct kvm_x86_mce mce;
1891
1892                 r = -EFAULT;
1893                 if (copy_from_user(&mce, argp, sizeof mce))
1894                         goto out;
1895                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
1896                 break;
1897         }
1898         default:
1899                 r = -EINVAL;
1900         }
1901 out:
1902         kfree(lapic);
1903         return r;
1904 }
1905
1906 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
1907 {
1908         int ret;
1909
1910         if (addr > (unsigned int)(-3 * PAGE_SIZE))
1911                 return -1;
1912         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
1913         return ret;
1914 }
1915
1916 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
1917                                           u32 kvm_nr_mmu_pages)
1918 {
1919         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
1920                 return -EINVAL;
1921
1922         down_write(&kvm->slots_lock);
1923         spin_lock(&kvm->mmu_lock);
1924
1925         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
1926         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
1927
1928         spin_unlock(&kvm->mmu_lock);
1929         up_write(&kvm->slots_lock);
1930         return 0;
1931 }
1932
1933 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
1934 {
1935         return kvm->arch.n_alloc_mmu_pages;
1936 }
1937
1938 gfn_t unalias_gfn(struct kvm *kvm, gfn_t gfn)
1939 {
1940         int i;
1941         struct kvm_mem_alias *alias;
1942
1943         for (i = 0; i < kvm->arch.naliases; ++i) {
1944                 alias = &kvm->arch.aliases[i];
1945                 if (gfn >= alias->base_gfn
1946                     && gfn < alias->base_gfn + alias->npages)
1947                         return alias->target_gfn + gfn - alias->base_gfn;
1948         }
1949         return gfn;
1950 }
1951
1952 /*
1953  * Set a new alias region.  Aliases map a portion of physical memory into
1954  * another portion.  This is useful for memory windows, for example the PC
1955  * VGA region.
1956  */
1957 static int kvm_vm_ioctl_set_memory_alias(struct kvm *kvm,
1958                                          struct kvm_memory_alias *alias)
1959 {
1960         int r, n;
1961         struct kvm_mem_alias *p;
1962
1963         r = -EINVAL;
1964         /* General sanity checks */
1965         if (alias->memory_size & (PAGE_SIZE - 1))
1966                 goto out;
1967         if (alias->guest_phys_addr & (PAGE_SIZE - 1))
1968                 goto out;
1969         if (alias->slot >= KVM_ALIAS_SLOTS)
1970                 goto out;
1971         if (alias->guest_phys_addr + alias->memory_size
1972             < alias->guest_phys_addr)
1973                 goto out;
1974         if (alias->target_phys_addr + alias->memory_size
1975             < alias->target_phys_addr)
1976                 goto out;
1977
1978         down_write(&kvm->slots_lock);
1979         spin_lock(&kvm->mmu_lock);
1980
1981         p = &kvm->arch.aliases[alias->slot];
1982         p->base_gfn = alias->guest_phys_addr >> PAGE_SHIFT;
1983         p->npages = alias->memory_size >> PAGE_SHIFT;
1984         p->target_gfn = alias->target_phys_addr >> PAGE_SHIFT;
1985
1986         for (n = KVM_ALIAS_SLOTS; n > 0; --n)
1987                 if (kvm->arch.aliases[n - 1].npages)
1988                         break;
1989         kvm->arch.naliases = n;
1990
1991         spin_unlock(&kvm->mmu_lock);
1992         kvm_mmu_zap_all(kvm);
1993
1994         up_write(&kvm->slots_lock);
1995
1996         return 0;
1997
1998 out:
1999         return r;
2000 }
2001
2002 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
2003 {
2004         int r;
2005
2006         r = 0;
2007         switch (chip->chip_id) {
2008         case KVM_IRQCHIP_PIC_MASTER:
2009                 memcpy(&chip->chip.pic,
2010                         &pic_irqchip(kvm)->pics[0],
2011                         sizeof(struct kvm_pic_state));
2012                 break;
2013         case KVM_IRQCHIP_PIC_SLAVE:
2014                 memcpy(&chip->chip.pic,
2015                         &pic_irqchip(kvm)->pics[1],
2016                         sizeof(struct kvm_pic_state));
2017                 break;
2018         case KVM_IRQCHIP_IOAPIC:
2019                 memcpy(&chip->chip.ioapic,
2020                         ioapic_irqchip(kvm),
2021                         sizeof(struct kvm_ioapic_state));
2022                 break;
2023         default:
2024                 r = -EINVAL;
2025                 break;
2026         }
2027         return r;
2028 }
2029
2030 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
2031 {
2032         int r;
2033
2034         r = 0;
2035         switch (chip->chip_id) {
2036         case KVM_IRQCHIP_PIC_MASTER:
2037                 spin_lock(&pic_irqchip(kvm)->lock);
2038                 memcpy(&pic_irqchip(kvm)->pics[0],
2039                         &chip->chip.pic,
2040                         sizeof(struct kvm_pic_state));
2041                 spin_unlock(&pic_irqchip(kvm)->lock);
2042                 break;
2043         case KVM_IRQCHIP_PIC_SLAVE:
2044                 spin_lock(&pic_irqchip(kvm)->lock);
2045                 memcpy(&pic_irqchip(kvm)->pics[1],
2046                         &chip->chip.pic,
2047                         sizeof(struct kvm_pic_state));
2048                 spin_unlock(&pic_irqchip(kvm)->lock);
2049                 break;
2050         case KVM_IRQCHIP_IOAPIC:
2051                 mutex_lock(&kvm->irq_lock);
2052                 memcpy(ioapic_irqchip(kvm),
2053                         &chip->chip.ioapic,
2054                         sizeof(struct kvm_ioapic_state));
2055                 mutex_unlock(&kvm->irq_lock);
2056                 break;
2057         default:
2058                 r = -EINVAL;
2059                 break;
2060         }
2061         kvm_pic_update_irq(pic_irqchip(kvm));
2062         return r;
2063 }
2064
2065 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
2066 {
2067         int r = 0;
2068
2069         mutex_lock(&kvm->arch.vpit->pit_state.lock);
2070         memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
2071         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2072         return r;
2073 }
2074
2075 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
2076 {
2077         int r = 0;
2078
2079         mutex_lock(&kvm->arch.vpit->pit_state.lock);
2080         memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
2081         kvm_pit_load_count(kvm, 0, ps->channels[0].count);
2082         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2083         return r;
2084 }
2085
2086 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
2087                                  struct kvm_reinject_control *control)
2088 {
2089         if (!kvm->arch.vpit)
2090                 return -ENXIO;
2091         mutex_lock(&kvm->arch.vpit->pit_state.lock);
2092         kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
2093         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2094         return 0;
2095 }
2096
2097 /*
2098  * Get (and clear) the dirty memory log for a memory slot.
2099  */
2100 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
2101                                       struct kvm_dirty_log *log)
2102 {
2103         int r;
2104         int n;
2105         struct kvm_memory_slot *memslot;
2106         int is_dirty = 0;
2107
2108         down_write(&kvm->slots_lock);
2109
2110         r = kvm_get_dirty_log(kvm, log, &is_dirty);
2111         if (r)
2112                 goto out;
2113
2114         /* If nothing is dirty, don't bother messing with page tables. */
2115         if (is_dirty) {
2116                 spin_lock(&kvm->mmu_lock);
2117                 kvm_mmu_slot_remove_write_access(kvm, log->slot);
2118                 spin_unlock(&kvm->mmu_lock);
2119                 kvm_flush_remote_tlbs(kvm);
2120                 memslot = &kvm->memslots[log->slot];
2121                 n = ALIGN(memslot->npages, BITS_PER_LONG) / 8;
2122                 memset(memslot->dirty_bitmap, 0, n);
2123         }
2124         r = 0;
2125 out:
2126         up_write(&kvm->slots_lock);
2127         return r;
2128 }
2129
2130 long kvm_arch_vm_ioctl(struct file *filp,
2131                        unsigned int ioctl, unsigned long arg)
2132 {
2133         struct kvm *kvm = filp->private_data;
2134         void __user *argp = (void __user *)arg;
2135         int r = -EINVAL;
2136         /*
2137          * This union makes it completely explicit to gcc-3.x
2138          * that these two variables' stack usage should be
2139          * combined, not added together.
2140          */
2141         union {
2142                 struct kvm_pit_state ps;
2143                 struct kvm_memory_alias alias;
2144                 struct kvm_pit_config pit_config;
2145         } u;
2146
2147         switch (ioctl) {
2148         case KVM_SET_TSS_ADDR:
2149                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
2150                 if (r < 0)
2151                         goto out;
2152                 break;
2153         case KVM_SET_MEMORY_REGION: {
2154                 struct kvm_memory_region kvm_mem;
2155                 struct kvm_userspace_memory_region kvm_userspace_mem;
2156
2157                 r = -EFAULT;
2158                 if (copy_from_user(&kvm_mem, argp, sizeof kvm_mem))
2159                         goto out;
2160                 kvm_userspace_mem.slot = kvm_mem.slot;
2161                 kvm_userspace_mem.flags = kvm_mem.flags;
2162                 kvm_userspace_mem.guest_phys_addr = kvm_mem.guest_phys_addr;
2163                 kvm_userspace_mem.memory_size = kvm_mem.memory_size;
2164                 r = kvm_vm_ioctl_set_memory_region(kvm, &kvm_userspace_mem, 0);
2165                 if (r)
2166                         goto out;
2167                 break;
2168         }
2169         case KVM_SET_NR_MMU_PAGES:
2170                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
2171                 if (r)
2172                         goto out;
2173                 break;
2174         case KVM_GET_NR_MMU_PAGES:
2175                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
2176                 break;
2177         case KVM_SET_MEMORY_ALIAS:
2178                 r = -EFAULT;
2179                 if (copy_from_user(&u.alias, argp, sizeof(struct kvm_memory_alias)))
2180                         goto out;
2181                 r = kvm_vm_ioctl_set_memory_alias(kvm, &u.alias);
2182                 if (r)
2183                         goto out;
2184                 break;
2185         case KVM_CREATE_IRQCHIP:
2186                 r = -ENOMEM;
2187                 kvm->arch.vpic = kvm_create_pic(kvm);
2188                 if (kvm->arch.vpic) {
2189                         r = kvm_ioapic_init(kvm);
2190                         if (r) {
2191                                 kfree(kvm->arch.vpic);
2192                                 kvm->arch.vpic = NULL;
2193                                 goto out;
2194                         }
2195                 } else
2196                         goto out;
2197                 r = kvm_setup_default_irq_routing(kvm);
2198                 if (r) {
2199                         kfree(kvm->arch.vpic);
2200                         kfree(kvm->arch.vioapic);
2201                         goto out;
2202                 }
2203                 break;
2204         case KVM_CREATE_PIT:
2205                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
2206                 goto create_pit;
2207         case KVM_CREATE_PIT2:
2208                 r = -EFAULT;
2209                 if (copy_from_user(&u.pit_config, argp,
2210                                    sizeof(struct kvm_pit_config)))
2211                         goto out;
2212         create_pit:
2213                 down_write(&kvm->slots_lock);
2214                 r = -EEXIST;
2215                 if (kvm->arch.vpit)
2216                         goto create_pit_unlock;
2217                 r = -ENOMEM;
2218                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
2219                 if (kvm->arch.vpit)
2220                         r = 0;
2221         create_pit_unlock:
2222                 up_write(&kvm->slots_lock);
2223                 break;
2224         case KVM_IRQ_LINE_STATUS:
2225         case KVM_IRQ_LINE: {
2226                 struct kvm_irq_level irq_event;
2227
2228                 r = -EFAULT;
2229                 if (copy_from_user(&irq_event, argp, sizeof irq_event))
2230                         goto out;
2231                 if (irqchip_in_kernel(kvm)) {
2232                         __s32 status;
2233                         mutex_lock(&kvm->irq_lock);
2234                         status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
2235                                         irq_event.irq, irq_event.level);
2236                         mutex_unlock(&kvm->irq_lock);
2237                         if (ioctl == KVM_IRQ_LINE_STATUS) {
2238                                 irq_event.status = status;
2239                                 if (copy_to_user(argp, &irq_event,
2240                                                         sizeof irq_event))
2241                                         goto out;
2242                         }
2243                         r = 0;
2244                 }
2245                 break;
2246         }
2247         case KVM_GET_IRQCHIP: {
2248                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
2249                 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
2250
2251                 r = -ENOMEM;
2252                 if (!chip)
2253                         goto out;
2254                 r = -EFAULT;
2255                 if (copy_from_user(chip, argp, sizeof *chip))
2256                         goto get_irqchip_out;
2257                 r = -ENXIO;
2258                 if (!irqchip_in_kernel(kvm))
2259                         goto get_irqchip_out;
2260                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
2261                 if (r)
2262                         goto get_irqchip_out;
2263                 r = -EFAULT;
2264                 if (copy_to_user(argp, chip, sizeof *chip))
2265                         goto get_irqchip_out;
2266                 r = 0;
2267         get_irqchip_out:
2268                 kfree(chip);
2269                 if (r)
2270                         goto out;
2271                 break;
2272         }
2273         case KVM_SET_IRQCHIP: {
2274                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
2275                 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
2276
2277                 r = -ENOMEM;
2278                 if (!chip)
2279                         goto out;
2280                 r = -EFAULT;
2281                 if (copy_from_user(chip, argp, sizeof *chip))
2282                         goto set_irqchip_out;
2283                 r = -ENXIO;
2284                 if (!irqchip_in_kernel(kvm))
2285                         goto set_irqchip_out;
2286                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
2287                 if (r)
2288                         goto set_irqchip_out;
2289                 r = 0;
2290         set_irqchip_out:
2291                 kfree(chip);
2292                 if (r)
2293                         goto out;
2294                 break;
2295         }
2296         case KVM_GET_PIT: {
2297                 r = -EFAULT;
2298                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
2299                         goto out;
2300                 r = -ENXIO;
2301                 if (!kvm->arch.vpit)
2302                         goto out;
2303                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
2304                 if (r)
2305                         goto out;
2306                 r = -EFAULT;
2307                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
2308                         goto out;
2309                 r = 0;
2310                 break;
2311         }
2312         case KVM_SET_PIT: {
2313                 r = -EFAULT;
2314                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
2315                         goto out;
2316                 r = -ENXIO;
2317                 if (!kvm->arch.vpit)
2318                         goto out;
2319                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
2320                 if (r)
2321                         goto out;
2322                 r = 0;
2323                 break;
2324         }
2325         case KVM_REINJECT_CONTROL: {
2326                 struct kvm_reinject_control control;
2327                 r =  -EFAULT;
2328                 if (copy_from_user(&control, argp, sizeof(control)))
2329                         goto out;
2330                 r = kvm_vm_ioctl_reinject(kvm, &control);
2331                 if (r)
2332                         goto out;
2333                 r = 0;
2334                 break;
2335         }
2336         default:
2337                 ;
2338         }
2339 out:
2340         return r;
2341 }
2342
2343 static void kvm_init_msr_list(void)
2344 {
2345         u32 dummy[2];
2346         unsigned i, j;
2347
2348         for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
2349                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
2350                         continue;
2351                 if (j < i)
2352                         msrs_to_save[j] = msrs_to_save[i];
2353                 j++;
2354         }
2355         num_msrs_to_save = j;
2356 }
2357
2358 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
2359                            const void *v)
2360 {
2361         if (vcpu->arch.apic &&
2362             !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, len, v))
2363                 return 0;
2364
2365         return kvm_io_bus_write(&vcpu->kvm->mmio_bus, addr, len, v);
2366 }
2367
2368 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
2369 {
2370         if (vcpu->arch.apic &&
2371             !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, len, v))
2372                 return 0;
2373
2374         return kvm_io_bus_read(&vcpu->kvm->mmio_bus, addr, len, v);
2375 }
2376
2377 static int kvm_read_guest_virt(gva_t addr, void *val, unsigned int bytes,
2378                                struct kvm_vcpu *vcpu)
2379 {
2380         void *data = val;
2381         int r = X86EMUL_CONTINUE;
2382
2383         while (bytes) {
2384                 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2385                 unsigned offset = addr & (PAGE_SIZE-1);
2386                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
2387                 int ret;
2388
2389                 if (gpa == UNMAPPED_GVA) {
2390                         r = X86EMUL_PROPAGATE_FAULT;
2391                         goto out;
2392                 }
2393                 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
2394                 if (ret < 0) {
2395                         r = X86EMUL_UNHANDLEABLE;
2396                         goto out;
2397                 }
2398
2399                 bytes -= toread;
2400                 data += toread;
2401                 addr += toread;
2402         }
2403 out:
2404         return r;
2405 }
2406
2407 static int kvm_write_guest_virt(gva_t addr, void *val, unsigned int bytes,
2408                                 struct kvm_vcpu *vcpu)
2409 {
2410         void *data = val;
2411         int r = X86EMUL_CONTINUE;
2412
2413         while (bytes) {
2414                 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2415                 unsigned offset = addr & (PAGE_SIZE-1);
2416                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
2417                 int ret;
2418
2419                 if (gpa == UNMAPPED_GVA) {
2420                         r = X86EMUL_PROPAGATE_FAULT;
2421                         goto out;
2422                 }
2423                 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
2424                 if (ret < 0) {
2425                         r = X86EMUL_UNHANDLEABLE;
2426                         goto out;
2427                 }
2428
2429                 bytes -= towrite;
2430                 data += towrite;
2431                 addr += towrite;
2432         }
2433 out:
2434         return r;
2435 }
2436
2437
2438 static int emulator_read_emulated(unsigned long addr,
2439                                   void *val,
2440                                   unsigned int bytes,
2441                                   struct kvm_vcpu *vcpu)
2442 {
2443         gpa_t                 gpa;
2444
2445         if (vcpu->mmio_read_completed) {
2446                 memcpy(val, vcpu->mmio_data, bytes);
2447                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
2448                                vcpu->mmio_phys_addr, *(u64 *)val);
2449                 vcpu->mmio_read_completed = 0;
2450                 return X86EMUL_CONTINUE;
2451         }
2452
2453         gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2454
2455         /* For APIC access vmexit */
2456         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2457                 goto mmio;
2458
2459         if (kvm_read_guest_virt(addr, val, bytes, vcpu)
2460                                 == X86EMUL_CONTINUE)
2461                 return X86EMUL_CONTINUE;
2462         if (gpa == UNMAPPED_GVA)
2463                 return X86EMUL_PROPAGATE_FAULT;
2464
2465 mmio:
2466         /*
2467          * Is this MMIO handled locally?
2468          */
2469         if (!vcpu_mmio_read(vcpu, gpa, bytes, val)) {
2470                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes, gpa, *(u64 *)val);
2471                 return X86EMUL_CONTINUE;
2472         }
2473
2474         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
2475
2476         vcpu->mmio_needed = 1;
2477         vcpu->mmio_phys_addr = gpa;
2478         vcpu->mmio_size = bytes;
2479         vcpu->mmio_is_write = 0;
2480
2481         return X86EMUL_UNHANDLEABLE;
2482 }
2483
2484 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
2485                           const void *val, int bytes)
2486 {
2487         int ret;
2488
2489         ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
2490         if (ret < 0)
2491                 return 0;
2492         kvm_mmu_pte_write(vcpu, gpa, val, bytes, 1);
2493         return 1;
2494 }
2495
2496 static int emulator_write_emulated_onepage(unsigned long addr,
2497                                            const void *val,
2498                                            unsigned int bytes,
2499                                            struct kvm_vcpu *vcpu)
2500 {
2501         gpa_t                 gpa;
2502
2503         gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2504
2505         if (gpa == UNMAPPED_GVA) {
2506                 kvm_inject_page_fault(vcpu, addr, 2);
2507                 return X86EMUL_PROPAGATE_FAULT;
2508         }
2509
2510         /* For APIC access vmexit */
2511         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2512                 goto mmio;
2513
2514         if (emulator_write_phys(vcpu, gpa, val, bytes))
2515                 return X86EMUL_CONTINUE;
2516
2517 mmio:
2518         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
2519         /*
2520          * Is this MMIO handled locally?
2521          */
2522         if (!vcpu_mmio_write(vcpu, gpa, bytes, val))
2523                 return X86EMUL_CONTINUE;
2524
2525         vcpu->mmio_needed = 1;
2526         vcpu->mmio_phys_addr = gpa;
2527         vcpu->mmio_size = bytes;
2528         vcpu->mmio_is_write = 1;
2529         memcpy(vcpu->mmio_data, val, bytes);
2530
2531         return X86EMUL_CONTINUE;
2532 }
2533
2534 int emulator_write_emulated(unsigned long addr,
2535                                    const void *val,
2536                                    unsigned int bytes,
2537                                    struct kvm_vcpu *vcpu)
2538 {
2539         /* Crossing a page boundary? */
2540         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
2541                 int rc, now;
2542
2543                 now = -addr & ~PAGE_MASK;
2544                 rc = emulator_write_emulated_onepage(addr, val, now, vcpu);
2545                 if (rc != X86EMUL_CONTINUE)
2546                         return rc;
2547                 addr += now;
2548                 val += now;
2549                 bytes -= now;
2550         }
2551         return emulator_write_emulated_onepage(addr, val, bytes, vcpu);
2552 }
2553 EXPORT_SYMBOL_GPL(emulator_write_emulated);
2554
2555 static int emulator_cmpxchg_emulated(unsigned long addr,
2556                                      const void *old,
2557                                      const void *new,
2558                                      unsigned int bytes,
2559                                      struct kvm_vcpu *vcpu)
2560 {
2561         static int reported;
2562
2563         if (!reported) {
2564                 reported = 1;
2565                 printk(KERN_WARNING "kvm: emulating exchange as write\n");
2566         }
2567 #ifndef CONFIG_X86_64
2568         /* guests cmpxchg8b have to be emulated atomically */
2569         if (bytes == 8) {
2570                 gpa_t gpa;
2571                 struct page *page;
2572                 char *kaddr;
2573                 u64 val;
2574
2575                 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2576
2577                 if (gpa == UNMAPPED_GVA ||
2578                    (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2579                         goto emul_write;
2580
2581                 if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
2582                         goto emul_write;
2583
2584                 val = *(u64 *)new;
2585
2586                 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
2587
2588                 kaddr = kmap_atomic(page, KM_USER0);
2589                 set_64bit((u64 *)(kaddr + offset_in_page(gpa)), val);
2590                 kunmap_atomic(kaddr, KM_USER0);
2591                 kvm_release_page_dirty(page);
2592         }
2593 emul_write:
2594 #endif
2595
2596         return emulator_write_emulated(addr, new, bytes, vcpu);
2597 }
2598
2599 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
2600 {
2601         return kvm_x86_ops->get_segment_base(vcpu, seg);
2602 }
2603
2604 int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
2605 {
2606         kvm_mmu_invlpg(vcpu, address);
2607         return X86EMUL_CONTINUE;
2608 }
2609
2610 int emulate_clts(struct kvm_vcpu *vcpu)
2611 {
2612         kvm_x86_ops->set_cr0(vcpu, vcpu->arch.cr0 & ~X86_CR0_TS);
2613         return X86EMUL_CONTINUE;
2614 }
2615
2616 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
2617 {
2618         struct kvm_vcpu *vcpu = ctxt->vcpu;
2619
2620         switch (dr) {
2621         case 0 ... 3:
2622                 *dest = kvm_x86_ops->get_dr(vcpu, dr);
2623                 return X86EMUL_CONTINUE;
2624         default:
2625                 pr_unimpl(vcpu, "%s: unexpected dr %u\n", __func__, dr);
2626                 return X86EMUL_UNHANDLEABLE;
2627         }
2628 }
2629
2630 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
2631 {
2632         unsigned long mask = (ctxt->mode == X86EMUL_MODE_PROT64) ? ~0ULL : ~0U;
2633         int exception;
2634
2635         kvm_x86_ops->set_dr(ctxt->vcpu, dr, value & mask, &exception);
2636         if (exception) {
2637                 /* FIXME: better handling */
2638                 return X86EMUL_UNHANDLEABLE;
2639         }
2640         return X86EMUL_CONTINUE;
2641 }
2642
2643 void kvm_report_emulation_failure(struct kvm_vcpu *vcpu, const char *context)
2644 {
2645         u8 opcodes[4];
2646         unsigned long rip = kvm_rip_read(vcpu);
2647         unsigned long rip_linear;
2648
2649         if (!printk_ratelimit())
2650                 return;
2651
2652         rip_linear = rip + get_segment_base(vcpu, VCPU_SREG_CS);
2653
2654         kvm_read_guest_virt(rip_linear, (void *)opcodes, 4, vcpu);
2655
2656         printk(KERN_ERR "emulation failed (%s) rip %lx %02x %02x %02x %02x\n",
2657                context, rip, opcodes[0], opcodes[1], opcodes[2], opcodes[3]);
2658 }
2659 EXPORT_SYMBOL_GPL(kvm_report_emulation_failure);
2660
2661 static struct x86_emulate_ops emulate_ops = {
2662         .read_std            = kvm_read_guest_virt,
2663         .read_emulated       = emulator_read_emulated,
2664         .write_emulated      = emulator_write_emulated,
2665         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
2666 };
2667
2668 static void cache_all_regs(struct kvm_vcpu *vcpu)
2669 {
2670         kvm_register_read(vcpu, VCPU_REGS_RAX);
2671         kvm_register_read(vcpu, VCPU_REGS_RSP);
2672         kvm_register_read(vcpu, VCPU_REGS_RIP);
2673         vcpu->arch.regs_dirty = ~0;
2674 }
2675
2676 int emulate_instruction(struct kvm_vcpu *vcpu,
2677                         struct kvm_run *run,
2678                         unsigned long cr2,
2679                         u16 error_code,
2680                         int emulation_type)
2681 {
2682         int r, shadow_mask;
2683         struct decode_cache *c;
2684
2685         kvm_clear_exception_queue(vcpu);
2686         vcpu->arch.mmio_fault_cr2 = cr2;
2687         /*
2688          * TODO: fix x86_emulate.c to use guest_read/write_register
2689          * instead of direct ->regs accesses, can save hundred cycles
2690          * on Intel for instructions that don't read/change RSP, for
2691          * for example.
2692          */
2693         cache_all_regs(vcpu);
2694
2695         vcpu->mmio_is_write = 0;
2696         vcpu->arch.pio.string = 0;
2697
2698         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
2699                 int cs_db, cs_l;
2700                 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
2701
2702                 vcpu->arch.emulate_ctxt.vcpu = vcpu;
2703                 vcpu->arch.emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
2704                 vcpu->arch.emulate_ctxt.mode =
2705                         (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
2706                         ? X86EMUL_MODE_REAL : cs_l
2707                         ? X86EMUL_MODE_PROT64 : cs_db
2708                         ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
2709
2710                 r = x86_decode_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
2711
2712                 /* Only allow emulation of specific instructions on #UD
2713                  * (namely VMMCALL, sysenter, sysexit, syscall)*/
2714                 c = &vcpu->arch.emulate_ctxt.decode;
2715                 if (emulation_type & EMULTYPE_TRAP_UD) {
2716                         if (!c->twobyte)
2717                                 return EMULATE_FAIL;
2718                         switch (c->b) {
2719                         case 0x01: /* VMMCALL */
2720                                 if (c->modrm_mod != 3 || c->modrm_rm != 1)
2721                                         return EMULATE_FAIL;
2722                                 break;
2723                         case 0x34: /* sysenter */
2724                         case 0x35: /* sysexit */
2725                                 if (c->modrm_mod != 0 || c->modrm_rm != 0)
2726                                         return EMULATE_FAIL;
2727                                 break;
2728                         case 0x05: /* syscall */
2729                                 if (c->modrm_mod != 0 || c->modrm_rm != 0)
2730                                         return EMULATE_FAIL;
2731                                 break;
2732                         default:
2733                                 return EMULATE_FAIL;
2734                         }
2735
2736                         if (!(c->modrm_reg == 0 || c->modrm_reg == 3))
2737                                 return EMULATE_FAIL;
2738                 }
2739
2740                 ++vcpu->stat.insn_emulation;
2741                 if (r)  {
2742                         ++vcpu->stat.insn_emulation_fail;
2743                         if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
2744                                 return EMULATE_DONE;
2745                         return EMULATE_FAIL;
2746                 }
2747         }
2748
2749         if (emulation_type & EMULTYPE_SKIP) {
2750                 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.decode.eip);
2751                 return EMULATE_DONE;
2752         }
2753
2754         r = x86_emulate_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
2755         shadow_mask = vcpu->arch.emulate_ctxt.interruptibility;
2756
2757         if (r == 0)
2758                 kvm_x86_ops->set_interrupt_shadow(vcpu, shadow_mask);
2759
2760         if (vcpu->arch.pio.string)
2761                 return EMULATE_DO_MMIO;
2762
2763         if ((r || vcpu->mmio_is_write) && run) {
2764                 run->exit_reason = KVM_EXIT_MMIO;
2765                 run->mmio.phys_addr = vcpu->mmio_phys_addr;
2766                 memcpy(run->mmio.data, vcpu->mmio_data, 8);
2767                 run->mmio.len = vcpu->mmio_size;
2768                 run->mmio.is_write = vcpu->mmio_is_write;
2769         }
2770
2771         if (r) {
2772                 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
2773                         return EMULATE_DONE;
2774                 if (!vcpu->mmio_needed) {
2775                         kvm_report_emulation_failure(vcpu, "mmio");
2776                         return EMULATE_FAIL;
2777                 }
2778                 return EMULATE_DO_MMIO;
2779         }
2780
2781         kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
2782
2783         if (vcpu->mmio_is_write) {
2784                 vcpu->mmio_needed = 0;
2785                 return EMULATE_DO_MMIO;
2786         }
2787
2788         return EMULATE_DONE;
2789 }
2790 EXPORT_SYMBOL_GPL(emulate_instruction);
2791
2792 static int pio_copy_data(struct kvm_vcpu *vcpu)
2793 {
2794         void *p = vcpu->arch.pio_data;
2795         gva_t q = vcpu->arch.pio.guest_gva;
2796         unsigned bytes;
2797         int ret;
2798
2799         bytes = vcpu->arch.pio.size * vcpu->arch.pio.cur_count;
2800         if (vcpu->arch.pio.in)
2801                 ret = kvm_write_guest_virt(q, p, bytes, vcpu);
2802         else
2803                 ret = kvm_read_guest_virt(q, p, bytes, vcpu);
2804         return ret;
2805 }
2806
2807 int complete_pio(struct kvm_vcpu *vcpu)
2808 {
2809         struct kvm_pio_request *io = &vcpu->arch.pio;
2810         long delta;
2811         int r;
2812         unsigned long val;
2813
2814         if (!io->string) {
2815                 if (io->in) {
2816                         val = kvm_register_read(vcpu, VCPU_REGS_RAX);
2817                         memcpy(&val, vcpu->arch.pio_data, io->size);
2818                         kvm_register_write(vcpu, VCPU_REGS_RAX, val);
2819                 }
2820         } else {
2821                 if (io->in) {
2822                         r = pio_copy_data(vcpu);
2823                         if (r)
2824                                 return r;
2825                 }
2826
2827                 delta = 1;
2828                 if (io->rep) {
2829                         delta *= io->cur_count;
2830                         /*
2831                          * The size of the register should really depend on
2832                          * current address size.
2833                          */
2834                         val = kvm_register_read(vcpu, VCPU_REGS_RCX);
2835                         val -= delta;
2836                         kvm_register_write(vcpu, VCPU_REGS_RCX, val);
2837                 }
2838                 if (io->down)
2839                         delta = -delta;
2840                 delta *= io->size;
2841                 if (io->in) {
2842                         val = kvm_register_read(vcpu, VCPU_REGS_RDI);
2843                         val += delta;
2844                         kvm_register_write(vcpu, VCPU_REGS_RDI, val);
2845                 } else {
2846                         val = kvm_register_read(vcpu, VCPU_REGS_RSI);
2847                         val += delta;
2848                         kvm_register_write(vcpu, VCPU_REGS_RSI, val);
2849                 }
2850         }
2851
2852         io->count -= io->cur_count;
2853         io->cur_count = 0;
2854
2855         return 0;
2856 }
2857
2858 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
2859 {
2860         /* TODO: String I/O for in kernel device */
2861         int r;
2862
2863         if (vcpu->arch.pio.in)
2864                 r = kvm_io_bus_read(&vcpu->kvm->pio_bus, vcpu->arch.pio.port,
2865                                     vcpu->arch.pio.size, pd);
2866         else
2867                 r = kvm_io_bus_write(&vcpu->kvm->pio_bus, vcpu->arch.pio.port,
2868                                      vcpu->arch.pio.size, pd);
2869         return r;
2870 }
2871
2872 static int pio_string_write(struct kvm_vcpu *vcpu)
2873 {
2874         struct kvm_pio_request *io = &vcpu->arch.pio;
2875         void *pd = vcpu->arch.pio_data;
2876         int i, r = 0;
2877
2878         for (i = 0; i < io->cur_count; i++) {
2879                 if (kvm_io_bus_write(&vcpu->kvm->pio_bus,
2880                                      io->port, io->size, pd)) {
2881                         r = -EOPNOTSUPP;
2882                         break;
2883                 }
2884                 pd += io->size;
2885         }
2886         return r;
2887 }
2888
2889 int kvm_emulate_pio(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
2890                   int size, unsigned port)
2891 {
2892         unsigned long val;
2893
2894         vcpu->run->exit_reason = KVM_EXIT_IO;
2895         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
2896         vcpu->run->io.size = vcpu->arch.pio.size = size;
2897         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
2898         vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = 1;
2899         vcpu->run->io.port = vcpu->arch.pio.port = port;
2900         vcpu->arch.pio.in = in;
2901         vcpu->arch.pio.string = 0;
2902         vcpu->arch.pio.down = 0;
2903         vcpu->arch.pio.rep = 0;
2904
2905         trace_kvm_pio(vcpu->run->io.direction == KVM_EXIT_IO_OUT, port,
2906                       size, 1);
2907
2908         val = kvm_register_read(vcpu, VCPU_REGS_RAX);
2909         memcpy(vcpu->arch.pio_data, &val, 4);
2910
2911         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
2912                 complete_pio(vcpu);
2913                 return 1;
2914         }
2915         return 0;
2916 }
2917 EXPORT_SYMBOL_GPL(kvm_emulate_pio);
2918
2919 int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
2920                   int size, unsigned long count, int down,
2921                   gva_t address, int rep, unsigned port)
2922 {
2923         unsigned now, in_page;
2924         int ret = 0;
2925
2926         vcpu->run->exit_reason = KVM_EXIT_IO;
2927         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
2928         vcpu->run->io.size = vcpu->arch.pio.size = size;
2929         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
2930         vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = count;
2931         vcpu->run->io.port = vcpu->arch.pio.port = port;
2932         vcpu->arch.pio.in = in;
2933         vcpu->arch.pio.string = 1;
2934         vcpu->arch.pio.down = down;
2935         vcpu->arch.pio.rep = rep;
2936
2937         trace_kvm_pio(vcpu->run->io.direction == KVM_EXIT_IO_OUT, port,
2938                       size, count);
2939
2940         if (!count) {
2941                 kvm_x86_ops->skip_emulated_instruction(vcpu);
2942                 return 1;
2943         }
2944
2945         if (!down)
2946                 in_page = PAGE_SIZE - offset_in_page(address);
2947         else
2948                 in_page = offset_in_page(address) + size;
2949         now = min(count, (unsigned long)in_page / size);
2950         if (!now)
2951                 now = 1;
2952         if (down) {
2953                 /*
2954                  * String I/O in reverse.  Yuck.  Kill the guest, fix later.
2955                  */
2956                 pr_unimpl(vcpu, "guest string pio down\n");
2957                 kvm_inject_gp(vcpu, 0);
2958                 return 1;
2959         }
2960         vcpu->run->io.count = now;
2961         vcpu->arch.pio.cur_count = now;
2962
2963         if (vcpu->arch.pio.cur_count == vcpu->arch.pio.count)
2964                 kvm_x86_ops->skip_emulated_instruction(vcpu);
2965
2966         vcpu->arch.pio.guest_gva = address;
2967
2968         if (!vcpu->arch.pio.in) {
2969                 /* string PIO write */
2970                 ret = pio_copy_data(vcpu);
2971                 if (ret == X86EMUL_PROPAGATE_FAULT) {
2972                         kvm_inject_gp(vcpu, 0);
2973                         return 1;
2974                 }
2975                 if (ret == 0 && !pio_string_write(vcpu)) {
2976                         complete_pio(vcpu);
2977                         if (vcpu->arch.pio.count == 0)
2978                                 ret = 1;
2979                 }
2980         }
2981         /* no string PIO read support yet */
2982
2983         return ret;
2984 }
2985 EXPORT_SYMBOL_GPL(kvm_emulate_pio_string);
2986
2987 static void bounce_off(void *info)
2988 {
2989         /* nothing */
2990 }
2991
2992 static unsigned int  ref_freq;
2993 static unsigned long tsc_khz_ref;
2994
2995 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
2996                                      void *data)
2997 {
2998         struct cpufreq_freqs *freq = data;
2999         struct kvm *kvm;
3000         struct kvm_vcpu *vcpu;
3001         int i, send_ipi = 0;
3002
3003         if (!ref_freq)
3004                 ref_freq = freq->old;
3005
3006         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
3007                 return 0;
3008         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
3009                 return 0;
3010         per_cpu(cpu_tsc_khz, freq->cpu) = cpufreq_scale(tsc_khz_ref, ref_freq, freq->new);
3011
3012         spin_lock(&kvm_lock);
3013         list_for_each_entry(kvm, &vm_list, vm_list) {
3014                 kvm_for_each_vcpu(i, vcpu, kvm) {
3015                         if (vcpu->cpu != freq->cpu)
3016                                 continue;
3017                         if (!kvm_request_guest_time_update(vcpu))
3018                                 continue;
3019                         if (vcpu->cpu != smp_processor_id())
3020                                 send_ipi++;
3021                 }
3022         }
3023         spin_unlock(&kvm_lock);
3024
3025         if (freq->old < freq->new && send_ipi) {
3026                 /*
3027                  * We upscale the frequency.  Must make the guest
3028                  * doesn't see old kvmclock values while running with
3029                  * the new frequency, otherwise we risk the guest sees
3030                  * time go backwards.
3031                  *
3032                  * In case we update the frequency for another cpu
3033                  * (which might be in guest context) send an interrupt
3034                  * to kick the cpu out of guest context.  Next time
3035                  * guest context is entered kvmclock will be updated,
3036                  * so the guest will not see stale values.
3037                  */
3038                 smp_call_function_single(freq->cpu, bounce_off, NULL, 1);
3039         }
3040         return 0;
3041 }
3042
3043 static struct notifier_block kvmclock_cpufreq_notifier_block = {
3044         .notifier_call  = kvmclock_cpufreq_notifier
3045 };
3046
3047 int kvm_arch_init(void *opaque)
3048 {
3049         int r, cpu;
3050         struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
3051
3052         if (kvm_x86_ops) {
3053                 printk(KERN_ERR "kvm: already loaded the other module\n");
3054                 r = -EEXIST;
3055                 goto out;
3056         }
3057
3058         if (!ops->cpu_has_kvm_support()) {
3059                 printk(KERN_ERR "kvm: no hardware support\n");
3060                 r = -EOPNOTSUPP;
3061                 goto out;
3062         }
3063         if (ops->disabled_by_bios()) {
3064                 printk(KERN_ERR "kvm: disabled by bios\n");
3065                 r = -EOPNOTSUPP;
3066                 goto out;
3067         }
3068
3069         r = kvm_mmu_module_init();
3070         if (r)
3071                 goto out;
3072
3073         kvm_init_msr_list();
3074
3075         kvm_x86_ops = ops;
3076         kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
3077         kvm_mmu_set_base_ptes(PT_PRESENT_MASK);
3078         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
3079                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
3080
3081         for_each_possible_cpu(cpu)
3082                 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
3083         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
3084                 tsc_khz_ref = tsc_khz;
3085                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
3086                                           CPUFREQ_TRANSITION_NOTIFIER);
3087         }
3088
3089         return 0;
3090
3091 out:
3092         return r;
3093 }
3094
3095 void kvm_arch_exit(void)
3096 {
3097         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
3098                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
3099                                             CPUFREQ_TRANSITION_NOTIFIER);
3100         kvm_x86_ops = NULL;
3101         kvm_mmu_module_exit();
3102 }
3103
3104 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
3105 {
3106         ++vcpu->stat.halt_exits;
3107         if (irqchip_in_kernel(vcpu->kvm)) {
3108                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
3109                 return 1;
3110         } else {
3111                 vcpu->run->exit_reason = KVM_EXIT_HLT;
3112                 return 0;
3113         }
3114 }
3115 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
3116
3117 static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
3118                            unsigned long a1)
3119 {
3120         if (is_long_mode(vcpu))
3121                 return a0;
3122         else
3123                 return a0 | ((gpa_t)a1 << 32);
3124 }
3125
3126 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
3127 {
3128         unsigned long nr, a0, a1, a2, a3, ret;
3129         int r = 1;
3130
3131         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
3132         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
3133         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
3134         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
3135         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
3136
3137         trace_kvm_hypercall(nr, a0, a1, a2, a3);
3138
3139         if (!is_long_mode(vcpu)) {
3140                 nr &= 0xFFFFFFFF;
3141                 a0 &= 0xFFFFFFFF;
3142                 a1 &= 0xFFFFFFFF;
3143                 a2 &= 0xFFFFFFFF;
3144                 a3 &= 0xFFFFFFFF;
3145         }
3146
3147         switch (nr) {
3148         case KVM_HC_VAPIC_POLL_IRQ:
3149                 ret = 0;
3150                 break;
3151         case KVM_HC_MMU_OP:
3152                 r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
3153                 break;
3154         default:
3155                 ret = -KVM_ENOSYS;
3156                 break;
3157         }
3158         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
3159         ++vcpu->stat.hypercalls;
3160         return r;
3161 }
3162 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
3163
3164 int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
3165 {
3166         char instruction[3];
3167         int ret = 0;
3168         unsigned long rip = kvm_rip_read(vcpu);
3169
3170
3171         /*
3172          * Blow out the MMU to ensure that no other VCPU has an active mapping
3173          * to ensure that the updated hypercall appears atomically across all
3174          * VCPUs.
3175          */
3176         kvm_mmu_zap_all(vcpu->kvm);
3177
3178         kvm_x86_ops->patch_hypercall(vcpu, instruction);
3179         if (emulator_write_emulated(rip, instruction, 3, vcpu)
3180             != X86EMUL_CONTINUE)
3181                 ret = -EFAULT;
3182
3183         return ret;
3184 }
3185
3186 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
3187 {
3188         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
3189 }
3190
3191 void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
3192 {
3193         struct descriptor_table dt = { limit, base };
3194
3195         kvm_x86_ops->set_gdt(vcpu, &dt);
3196 }
3197
3198 void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
3199 {
3200         struct descriptor_table dt = { limit, base };
3201
3202         kvm_x86_ops->set_idt(vcpu, &dt);
3203 }
3204
3205 void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw,
3206                    unsigned long *rflags)
3207 {
3208         kvm_lmsw(vcpu, msw);
3209         *rflags = kvm_x86_ops->get_rflags(vcpu);
3210 }
3211
3212 unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr)
3213 {
3214         unsigned long value;
3215
3216         kvm_x86_ops->decache_cr4_guest_bits(vcpu);
3217         switch (cr) {
3218         case 0:
3219                 value = vcpu->arch.cr0;
3220                 break;
3221         case 2:
3222                 value = vcpu->arch.cr2;
3223                 break;
3224         case 3:
3225                 value = vcpu->arch.cr3;
3226                 break;
3227         case 4:
3228                 value = vcpu->arch.cr4;
3229                 break;
3230         case 8:
3231                 value = kvm_get_cr8(vcpu);
3232                 break;
3233         default:
3234                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
3235                 return 0;
3236         }
3237
3238         return value;
3239 }
3240
3241 void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long val,
3242                      unsigned long *rflags)
3243 {
3244         switch (cr) {
3245         case 0:
3246                 kvm_set_cr0(vcpu, mk_cr_64(vcpu->arch.cr0, val));
3247                 *rflags = kvm_x86_ops->get_rflags(vcpu);
3248                 break;
3249         case 2:
3250                 vcpu->arch.cr2 = val;
3251                 break;
3252         case 3:
3253                 kvm_set_cr3(vcpu, val);
3254                 break;
3255         case 4:
3256                 kvm_set_cr4(vcpu, mk_cr_64(vcpu->arch.cr4, val));
3257                 break;
3258         case 8:
3259                 kvm_set_cr8(vcpu, val & 0xfUL);
3260                 break;
3261         default:
3262                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
3263         }
3264 }
3265
3266 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
3267 {
3268         struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
3269         int j, nent = vcpu->arch.cpuid_nent;
3270
3271         e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
3272         /* when no next entry is found, the current entry[i] is reselected */
3273         for (j = i + 1; ; j = (j + 1) % nent) {
3274                 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
3275                 if (ej->function == e->function) {
3276                         ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
3277                         return j;
3278                 }
3279         }
3280         return 0; /* silence gcc, even though control never reaches here */
3281 }
3282
3283 /* find an entry with matching function, matching index (if needed), and that
3284  * should be read next (if it's stateful) */
3285 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
3286         u32 function, u32 index)
3287 {
3288         if (e->function != function)
3289                 return 0;
3290         if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
3291                 return 0;
3292         if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
3293             !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
3294                 return 0;
3295         return 1;
3296 }
3297
3298 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
3299                                               u32 function, u32 index)
3300 {
3301         int i;
3302         struct kvm_cpuid_entry2 *best = NULL;
3303
3304         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
3305                 struct kvm_cpuid_entry2 *e;
3306
3307                 e = &vcpu->arch.cpuid_entries[i];
3308                 if (is_matching_cpuid_entry(e, function, index)) {
3309                         if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
3310                                 move_to_next_stateful_cpuid_entry(vcpu, i);
3311                         best = e;
3312                         break;
3313                 }
3314                 /*
3315                  * Both basic or both extended?
3316                  */
3317                 if (((e->function ^ function) & 0x80000000) == 0)
3318                         if (!best || e->function > best->function)
3319                                 best = e;
3320         }
3321         return best;
3322 }
3323
3324 int cpuid_maxphyaddr(struct kvm_vcpu *vcpu)
3325 {
3326         struct kvm_cpuid_entry2 *best;
3327
3328         best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
3329         if (best)
3330                 return best->eax & 0xff;
3331         return 36;
3332 }
3333
3334 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
3335 {
3336         u32 function, index;
3337         struct kvm_cpuid_entry2 *best;
3338
3339         function = kvm_register_read(vcpu, VCPU_REGS_RAX);
3340         index = kvm_register_read(vcpu, VCPU_REGS_RCX);
3341         kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
3342         kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
3343         kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
3344         kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
3345         best = kvm_find_cpuid_entry(vcpu, function, index);
3346         if (best) {
3347                 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
3348                 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
3349                 kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
3350                 kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
3351         }
3352         kvm_x86_ops->skip_emulated_instruction(vcpu);
3353         trace_kvm_cpuid(function,
3354                         kvm_register_read(vcpu, VCPU_REGS_RAX),
3355                         kvm_register_read(vcpu, VCPU_REGS_RBX),
3356                         kvm_register_read(vcpu, VCPU_REGS_RCX),
3357                         kvm_register_read(vcpu, VCPU_REGS_RDX));
3358 }
3359 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
3360
3361 /*
3362  * Check if userspace requested an interrupt window, and that the
3363  * interrupt window is open.
3364  *
3365  * No need to exit to userspace if we already have an interrupt queued.
3366  */
3367 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu,
3368                                           struct kvm_run *kvm_run)
3369 {
3370         return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
3371                 kvm_run->request_interrupt_window &&
3372                 kvm_arch_interrupt_allowed(vcpu));
3373 }
3374
3375 static void post_kvm_run_save(struct kvm_vcpu *vcpu,
3376                               struct kvm_run *kvm_run)
3377 {
3378         kvm_run->if_flag = (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
3379         kvm_run->cr8 = kvm_get_cr8(vcpu);
3380         kvm_run->apic_base = kvm_get_apic_base(vcpu);
3381         if (irqchip_in_kernel(vcpu->kvm))
3382                 kvm_run->ready_for_interrupt_injection = 1;
3383         else
3384                 kvm_run->ready_for_interrupt_injection =
3385                         kvm_arch_interrupt_allowed(vcpu) &&
3386                         !kvm_cpu_has_interrupt(vcpu) &&
3387                         !kvm_event_needs_reinjection(vcpu);
3388 }
3389
3390 static void vapic_enter(struct kvm_vcpu *vcpu)
3391 {
3392         struct kvm_lapic *apic = vcpu->arch.apic;
3393         struct page *page;
3394
3395         if (!apic || !apic->vapic_addr)
3396                 return;
3397
3398         page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
3399
3400         vcpu->arch.apic->vapic_page = page;
3401 }
3402
3403 static void vapic_exit(struct kvm_vcpu *vcpu)
3404 {
3405         struct kvm_lapic *apic = vcpu->arch.apic;
3406
3407         if (!apic || !apic->vapic_addr)
3408                 return;
3409
3410         down_read(&vcpu->kvm->slots_lock);
3411         kvm_release_page_dirty(apic->vapic_page);
3412         mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
3413         up_read(&vcpu->kvm->slots_lock);
3414 }
3415
3416 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
3417 {
3418         int max_irr, tpr;
3419
3420         if (!kvm_x86_ops->update_cr8_intercept)
3421                 return;
3422
3423         if (!vcpu->arch.apic->vapic_addr)
3424                 max_irr = kvm_lapic_find_highest_irr(vcpu);
3425         else
3426                 max_irr = -1;
3427
3428         if (max_irr != -1)
3429                 max_irr >>= 4;
3430
3431         tpr = kvm_lapic_get_cr8(vcpu);
3432
3433         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
3434 }
3435
3436 static void inject_pending_irq(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3437 {
3438         /* try to reinject previous events if any */
3439         if (vcpu->arch.nmi_injected) {
3440                 kvm_x86_ops->set_nmi(vcpu);
3441                 return;
3442         }
3443
3444         if (vcpu->arch.interrupt.pending) {
3445                 kvm_x86_ops->set_irq(vcpu);
3446                 return;
3447         }
3448
3449         /* try to inject new event if pending */
3450         if (vcpu->arch.nmi_pending) {
3451                 if (kvm_x86_ops->nmi_allowed(vcpu)) {
3452                         vcpu->arch.nmi_pending = false;
3453                         vcpu->arch.nmi_injected = true;
3454                         kvm_x86_ops->set_nmi(vcpu);
3455                 }
3456         } else if (kvm_cpu_has_interrupt(vcpu)) {
3457                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
3458                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
3459                                             false);
3460                         kvm_x86_ops->set_irq(vcpu);
3461                 }
3462         }
3463 }
3464
3465 static int vcpu_enter_guest(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3466 {
3467         int r;
3468         bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
3469                 kvm_run->request_interrupt_window;
3470
3471         if (vcpu->requests)
3472                 if (test_and_clear_bit(KVM_REQ_MMU_RELOAD, &vcpu->requests))
3473                         kvm_mmu_unload(vcpu);
3474
3475         r = kvm_mmu_reload(vcpu);
3476         if (unlikely(r))
3477                 goto out;
3478
3479         if (vcpu->requests) {
3480                 if (test_and_clear_bit(KVM_REQ_MIGRATE_TIMER, &vcpu->requests))
3481                         __kvm_migrate_timers(vcpu);
3482                 if (test_and_clear_bit(KVM_REQ_KVMCLOCK_UPDATE, &vcpu->requests))
3483                         kvm_write_guest_time(vcpu);
3484                 if (test_and_clear_bit(KVM_REQ_MMU_SYNC, &vcpu->requests))
3485                         kvm_mmu_sync_roots(vcpu);
3486                 if (test_and_clear_bit(KVM_REQ_TLB_FLUSH, &vcpu->requests))
3487                         kvm_x86_ops->tlb_flush(vcpu);
3488                 if (test_and_clear_bit(KVM_REQ_REPORT_TPR_ACCESS,
3489                                        &vcpu->requests)) {
3490                         kvm_run->exit_reason = KVM_EXIT_TPR_ACCESS;
3491                         r = 0;
3492                         goto out;
3493                 }
3494                 if (test_and_clear_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests)) {
3495                         kvm_run->exit_reason = KVM_EXIT_SHUTDOWN;
3496                         r = 0;
3497                         goto out;
3498                 }
3499         }
3500
3501         preempt_disable();
3502
3503         kvm_x86_ops->prepare_guest_switch(vcpu);
3504         kvm_load_guest_fpu(vcpu);
3505
3506         local_irq_disable();
3507
3508         clear_bit(KVM_REQ_KICK, &vcpu->requests);
3509         smp_mb__after_clear_bit();
3510
3511         if (vcpu->requests || need_resched() || signal_pending(current)) {
3512                 set_bit(KVM_REQ_KICK, &vcpu->requests);
3513                 local_irq_enable();
3514                 preempt_enable();
3515                 r = 1;
3516                 goto out;
3517         }
3518
3519         if (vcpu->arch.exception.pending)
3520                 __queue_exception(vcpu);
3521         else
3522                 inject_pending_irq(vcpu, kvm_run);
3523
3524         /* enable NMI/IRQ window open exits if needed */
3525         if (vcpu->arch.nmi_pending)
3526                 kvm_x86_ops->enable_nmi_window(vcpu);
3527         else if (kvm_cpu_has_interrupt(vcpu) || req_int_win)
3528                 kvm_x86_ops->enable_irq_window(vcpu);
3529
3530         if (kvm_lapic_enabled(vcpu)) {
3531                 update_cr8_intercept(vcpu);
3532                 kvm_lapic_sync_to_vapic(vcpu);
3533         }
3534
3535         up_read(&vcpu->kvm->slots_lock);
3536
3537         kvm_guest_enter();
3538
3539         get_debugreg(vcpu->arch.host_dr6, 6);
3540         get_debugreg(vcpu->arch.host_dr7, 7);
3541         if (unlikely(vcpu->arch.switch_db_regs)) {
3542                 get_debugreg(vcpu->arch.host_db[0], 0);
3543                 get_debugreg(vcpu->arch.host_db[1], 1);
3544                 get_debugreg(vcpu->arch.host_db[2], 2);
3545                 get_debugreg(vcpu->arch.host_db[3], 3);
3546
3547                 set_debugreg(0, 7);
3548                 set_debugreg(vcpu->arch.eff_db[0], 0);
3549                 set_debugreg(vcpu->arch.eff_db[1], 1);
3550                 set_debugreg(vcpu->arch.eff_db[2], 2);
3551                 set_debugreg(vcpu->arch.eff_db[3], 3);
3552         }
3553
3554         trace_kvm_entry(vcpu->vcpu_id);
3555         kvm_x86_ops->run(vcpu, kvm_run);
3556
3557         if (unlikely(vcpu->arch.switch_db_regs)) {
3558                 set_debugreg(0, 7);
3559                 set_debugreg(vcpu->arch.host_db[0], 0);
3560                 set_debugreg(vcpu->arch.host_db[1], 1);
3561                 set_debugreg(vcpu->arch.host_db[2], 2);
3562                 set_debugreg(vcpu->arch.host_db[3], 3);
3563         }
3564         set_debugreg(vcpu->arch.host_dr6, 6);
3565         set_debugreg(vcpu->arch.host_dr7, 7);
3566
3567         set_bit(KVM_REQ_KICK, &vcpu->requests);
3568         local_irq_enable();
3569
3570         ++vcpu->stat.exits;
3571
3572         /*
3573          * We must have an instruction between local_irq_enable() and
3574          * kvm_guest_exit(), so the timer interrupt isn't delayed by
3575          * the interrupt shadow.  The stat.exits increment will do nicely.
3576          * But we need to prevent reordering, hence this barrier():
3577          */
3578         barrier();
3579
3580         kvm_guest_exit();
3581
3582         preempt_enable();
3583
3584         down_read(&vcpu->kvm->slots_lock);
3585
3586         /*
3587          * Profile KVM exit RIPs:
3588          */
3589         if (unlikely(prof_on == KVM_PROFILING)) {
3590                 unsigned long rip = kvm_rip_read(vcpu);
3591                 profile_hit(KVM_PROFILING, (void *)rip);
3592         }
3593
3594
3595         kvm_lapic_sync_from_vapic(vcpu);
3596
3597         r = kvm_x86_ops->handle_exit(kvm_run, vcpu);
3598 out:
3599         return r;
3600 }
3601
3602
3603 static int __vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3604 {
3605         int r;
3606
3607         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
3608                 pr_debug("vcpu %d received sipi with vector # %x\n",
3609                          vcpu->vcpu_id, vcpu->arch.sipi_vector);
3610                 kvm_lapic_reset(vcpu);
3611                 r = kvm_arch_vcpu_reset(vcpu);
3612                 if (r)
3613                         return r;
3614                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
3615         }
3616
3617         down_read(&vcpu->kvm->slots_lock);
3618         vapic_enter(vcpu);
3619
3620         r = 1;
3621         while (r > 0) {
3622                 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE)
3623                         r = vcpu_enter_guest(vcpu, kvm_run);
3624                 else {
3625                         up_read(&vcpu->kvm->slots_lock);
3626                         kvm_vcpu_block(vcpu);
3627                         down_read(&vcpu->kvm->slots_lock);
3628                         if (test_and_clear_bit(KVM_REQ_UNHALT, &vcpu->requests))
3629                         {
3630                                 switch(vcpu->arch.mp_state) {
3631                                 case KVM_MP_STATE_HALTED:
3632                                         vcpu->arch.mp_state =
3633                                                 KVM_MP_STATE_RUNNABLE;
3634                                 case KVM_MP_STATE_RUNNABLE:
3635                                         break;
3636                                 case KVM_MP_STATE_SIPI_RECEIVED:
3637                                 default:
3638                                         r = -EINTR;
3639                                         break;
3640                                 }
3641                         }
3642                 }
3643
3644                 if (r <= 0)
3645                         break;
3646
3647                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
3648                 if (kvm_cpu_has_pending_timer(vcpu))
3649                         kvm_inject_pending_timer_irqs(vcpu);
3650
3651                 if (dm_request_for_irq_injection(vcpu, kvm_run)) {
3652                         r = -EINTR;
3653                         kvm_run->exit_reason = KVM_EXIT_INTR;
3654                         ++vcpu->stat.request_irq_exits;
3655                 }
3656                 if (signal_pending(current)) {
3657                         r = -EINTR;
3658                         kvm_run->exit_reason = KVM_EXIT_INTR;
3659                         ++vcpu->stat.signal_exits;
3660                 }
3661                 if (need_resched()) {
3662                         up_read(&vcpu->kvm->slots_lock);
3663                         kvm_resched(vcpu);
3664                         down_read(&vcpu->kvm->slots_lock);
3665                 }
3666         }
3667
3668         up_read(&vcpu->kvm->slots_lock);
3669         post_kvm_run_save(vcpu, kvm_run);
3670
3671         vapic_exit(vcpu);
3672
3673         return r;
3674 }
3675
3676 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3677 {
3678         int r;
3679         sigset_t sigsaved;
3680
3681         vcpu_load(vcpu);
3682
3683         if (vcpu->sigset_active)
3684                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
3685
3686         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
3687                 kvm_vcpu_block(vcpu);
3688                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
3689                 r = -EAGAIN;
3690                 goto out;
3691         }
3692
3693         /* re-sync apic's tpr */
3694         if (!irqchip_in_kernel(vcpu->kvm))
3695                 kvm_set_cr8(vcpu, kvm_run->cr8);
3696
3697         if (vcpu->arch.pio.cur_count) {
3698                 r = complete_pio(vcpu);
3699                 if (r)
3700                         goto out;
3701         }
3702 #if CONFIG_HAS_IOMEM
3703         if (vcpu->mmio_needed) {
3704                 memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8);
3705                 vcpu->mmio_read_completed = 1;
3706                 vcpu->mmio_needed = 0;
3707
3708                 down_read(&vcpu->kvm->slots_lock);
3709                 r = emulate_instruction(vcpu, kvm_run,
3710                                         vcpu->arch.mmio_fault_cr2, 0,
3711                                         EMULTYPE_NO_DECODE);
3712                 up_read(&vcpu->kvm->slots_lock);
3713                 if (r == EMULATE_DO_MMIO) {
3714                         /*
3715                          * Read-modify-write.  Back to userspace.
3716                          */
3717                         r = 0;
3718                         goto out;
3719                 }
3720         }
3721 #endif
3722         if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
3723                 kvm_register_write(vcpu, VCPU_REGS_RAX,
3724                                      kvm_run->hypercall.ret);
3725
3726         r = __vcpu_run(vcpu, kvm_run);
3727
3728 out:
3729         if (vcpu->sigset_active)
3730                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
3731
3732         vcpu_put(vcpu);
3733         return r;
3734 }
3735
3736 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
3737 {
3738         vcpu_load(vcpu);
3739
3740         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
3741         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
3742         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
3743         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
3744         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
3745         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
3746         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
3747         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
3748 #ifdef CONFIG_X86_64
3749         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
3750         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
3751         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
3752         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
3753         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
3754         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
3755         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
3756         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
3757 #endif
3758
3759         regs->rip = kvm_rip_read(vcpu);
3760         regs->rflags = kvm_x86_ops->get_rflags(vcpu);
3761
3762         /*
3763          * Don't leak debug flags in case they were set for guest debugging
3764          */
3765         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
3766                 regs->rflags &= ~(X86_EFLAGS_TF | X86_EFLAGS_RF);
3767
3768         vcpu_put(vcpu);
3769
3770         return 0;
3771 }
3772
3773 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
3774 {
3775         vcpu_load(vcpu);
3776
3777         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
3778         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
3779         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
3780         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
3781         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
3782         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
3783         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
3784         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
3785 #ifdef CONFIG_X86_64
3786         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
3787         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
3788         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
3789         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
3790         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
3791         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
3792         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
3793         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
3794
3795 #endif
3796
3797         kvm_rip_write(vcpu, regs->rip);
3798         kvm_x86_ops->set_rflags(vcpu, regs->rflags);
3799
3800
3801         vcpu->arch.exception.pending = false;
3802
3803         vcpu_put(vcpu);
3804
3805         return 0;
3806 }
3807
3808 void kvm_get_segment(struct kvm_vcpu *vcpu,
3809                      struct kvm_segment *var, int seg)
3810 {
3811         kvm_x86_ops->get_segment(vcpu, var, seg);
3812 }
3813
3814 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
3815 {
3816         struct kvm_segment cs;
3817
3818         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
3819         *db = cs.db;
3820         *l = cs.l;
3821 }
3822 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
3823
3824 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
3825                                   struct kvm_sregs *sregs)
3826 {
3827         struct descriptor_table dt;
3828
3829         vcpu_load(vcpu);
3830
3831         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
3832         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
3833         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
3834         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
3835         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
3836         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
3837
3838         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
3839         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
3840
3841         kvm_x86_ops->get_idt(vcpu, &dt);
3842         sregs->idt.limit = dt.limit;
3843         sregs->idt.base = dt.base;
3844         kvm_x86_ops->get_gdt(vcpu, &dt);
3845         sregs->gdt.limit = dt.limit;
3846         sregs->gdt.base = dt.base;
3847
3848         kvm_x86_ops->decache_cr4_guest_bits(vcpu);
3849         sregs->cr0 = vcpu->arch.cr0;
3850         sregs->cr2 = vcpu->arch.cr2;
3851         sregs->cr3 = vcpu->arch.cr3;
3852         sregs->cr4 = vcpu->arch.cr4;
3853         sregs->cr8 = kvm_get_cr8(vcpu);
3854         sregs->efer = vcpu->arch.shadow_efer;
3855         sregs->apic_base = kvm_get_apic_base(vcpu);
3856
3857         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
3858
3859         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
3860                 set_bit(vcpu->arch.interrupt.nr,
3861                         (unsigned long *)sregs->interrupt_bitmap);
3862
3863         vcpu_put(vcpu);
3864
3865         return 0;
3866 }
3867
3868 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
3869                                     struct kvm_mp_state *mp_state)
3870 {
3871         vcpu_load(vcpu);
3872         mp_state->mp_state = vcpu->arch.mp_state;
3873         vcpu_put(vcpu);
3874         return 0;
3875 }
3876
3877 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
3878                                     struct kvm_mp_state *mp_state)
3879 {
3880         vcpu_load(vcpu);
3881         vcpu->arch.mp_state = mp_state->mp_state;
3882         vcpu_put(vcpu);
3883         return 0;
3884 }
3885
3886 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3887                         struct kvm_segment *var, int seg)
3888 {
3889         kvm_x86_ops->set_segment(vcpu, var, seg);
3890 }
3891
3892 static void seg_desct_to_kvm_desct(struct desc_struct *seg_desc, u16 selector,
3893                                    struct kvm_segment *kvm_desct)
3894 {
3895         kvm_desct->base = seg_desc->base0;
3896         kvm_desct->base |= seg_desc->base1 << 16;
3897         kvm_desct->base |= seg_desc->base2 << 24;
3898         kvm_desct->limit = seg_desc->limit0;
3899         kvm_desct->limit |= seg_desc->limit << 16;
3900         if (seg_desc->g) {
3901                 kvm_desct->limit <<= 12;
3902                 kvm_desct->limit |= 0xfff;
3903         }
3904         kvm_desct->selector = selector;
3905         kvm_desct->type = seg_desc->type;
3906         kvm_desct->present = seg_desc->p;
3907         kvm_desct->dpl = seg_desc->dpl;
3908         kvm_desct->db = seg_desc->d;
3909         kvm_desct->s = seg_desc->s;
3910         kvm_desct->l = seg_desc->l;
3911         kvm_desct->g = seg_desc->g;
3912         kvm_desct->avl = seg_desc->avl;
3913         if (!selector)
3914                 kvm_desct->unusable = 1;
3915         else
3916                 kvm_desct->unusable = 0;
3917         kvm_desct->padding = 0;
3918 }
3919
3920 static void get_segment_descriptor_dtable(struct kvm_vcpu *vcpu,
3921                                           u16 selector,
3922                                           struct descriptor_table *dtable)
3923 {
3924         if (selector & 1 << 2) {
3925                 struct kvm_segment kvm_seg;
3926
3927                 kvm_get_segment(vcpu, &kvm_seg, VCPU_SREG_LDTR);
3928
3929                 if (kvm_seg.unusable)
3930                         dtable->limit = 0;
3931                 else
3932                         dtable->limit = kvm_seg.limit;
3933                 dtable->base = kvm_seg.base;
3934         }
3935         else
3936                 kvm_x86_ops->get_gdt(vcpu, dtable);
3937 }
3938
3939 /* allowed just for 8 bytes segments */
3940 static int load_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
3941                                          struct desc_struct *seg_desc)
3942 {
3943         gpa_t gpa;
3944         struct descriptor_table dtable;
3945         u16 index = selector >> 3;
3946
3947         get_segment_descriptor_dtable(vcpu, selector, &dtable);
3948
3949         if (dtable.limit < index * 8 + 7) {
3950                 kvm_queue_exception_e(vcpu, GP_VECTOR, selector & 0xfffc);
3951                 return 1;
3952         }
3953         gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, dtable.base);
3954         gpa += index * 8;
3955         return kvm_read_guest(vcpu->kvm, gpa, seg_desc, 8);
3956 }
3957
3958 /* allowed just for 8 bytes segments */
3959 static int save_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
3960                                          struct desc_struct *seg_desc)
3961 {
3962         gpa_t gpa;
3963         struct descriptor_table dtable;
3964         u16 index = selector >> 3;
3965
3966         get_segment_descriptor_dtable(vcpu, selector, &dtable);
3967
3968         if (dtable.limit < index * 8 + 7)
3969                 return 1;
3970         gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, dtable.base);
3971         gpa += index * 8;
3972         return kvm_write_guest(vcpu->kvm, gpa, seg_desc, 8);
3973 }
3974
3975 static u32 get_tss_base_addr(struct kvm_vcpu *vcpu,
3976                              struct desc_struct *seg_desc)
3977 {
3978         u32 base_addr;
3979
3980         base_addr = seg_desc->base0;
3981         base_addr |= (seg_desc->base1 << 16);
3982         base_addr |= (seg_desc->base2 << 24);
3983
3984         return vcpu->arch.mmu.gva_to_gpa(vcpu, base_addr);
3985 }
3986
3987 static u16 get_segment_selector(struct kvm_vcpu *vcpu, int seg)
3988 {
3989         struct kvm_segment kvm_seg;
3990
3991         kvm_get_segment(vcpu, &kvm_seg, seg);
3992         return kvm_seg.selector;
3993 }
3994
3995 static int load_segment_descriptor_to_kvm_desct(struct kvm_vcpu *vcpu,
3996                                                 u16 selector,
3997                                                 struct kvm_segment *kvm_seg)
3998 {
3999         struct desc_struct seg_desc;
4000
4001         if (load_guest_segment_descriptor(vcpu, selector, &seg_desc))
4002                 return 1;
4003         seg_desct_to_kvm_desct(&seg_desc, selector, kvm_seg);
4004         return 0;
4005 }
4006
4007 static int kvm_load_realmode_segment(struct kvm_vcpu *vcpu, u16 selector, int seg)
4008 {
4009         struct kvm_segment segvar = {
4010                 .base = selector << 4,
4011                 .limit = 0xffff,
4012                 .selector = selector,
4013                 .type = 3,
4014                 .present = 1,
4015                 .dpl = 3,
4016                 .db = 0,
4017                 .s = 1,
4018                 .l = 0,
4019                 .g = 0,
4020                 .avl = 0,
4021                 .unusable = 0,
4022         };
4023         kvm_x86_ops->set_segment(vcpu, &segvar, seg);
4024         return 0;
4025 }
4026
4027 int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
4028                                 int type_bits, int seg)
4029 {
4030         struct kvm_segment kvm_seg;
4031
4032         if (!(vcpu->arch.cr0 & X86_CR0_PE))
4033                 return kvm_load_realmode_segment(vcpu, selector, seg);
4034         if (load_segment_descriptor_to_kvm_desct(vcpu, selector, &kvm_seg))
4035                 return 1;
4036         kvm_seg.type |= type_bits;
4037
4038         if (seg != VCPU_SREG_SS && seg != VCPU_SREG_CS &&
4039             seg != VCPU_SREG_LDTR)
4040                 if (!kvm_seg.s)
4041                         kvm_seg.unusable = 1;
4042
4043         kvm_set_segment(vcpu, &kvm_seg, seg);
4044         return 0;
4045 }
4046
4047 static void save_state_to_tss32(struct kvm_vcpu *vcpu,
4048                                 struct tss_segment_32 *tss)
4049 {
4050         tss->cr3 = vcpu->arch.cr3;
4051         tss->eip = kvm_rip_read(vcpu);
4052         tss->eflags = kvm_x86_ops->get_rflags(vcpu);
4053         tss->eax = kvm_register_read(vcpu, VCPU_REGS_RAX);
4054         tss->ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
4055         tss->edx = kvm_register_read(vcpu, VCPU_REGS_RDX);
4056         tss->ebx = kvm_register_read(vcpu, VCPU_REGS_RBX);
4057         tss->esp = kvm_register_read(vcpu, VCPU_REGS_RSP);
4058         tss->ebp = kvm_register_read(vcpu, VCPU_REGS_RBP);
4059         tss->esi = kvm_register_read(vcpu, VCPU_REGS_RSI);
4060         tss->edi = kvm_register_read(vcpu, VCPU_REGS_RDI);
4061         tss->es = get_segment_selector(vcpu, VCPU_SREG_ES);
4062         tss->cs = get_segment_selector(vcpu, VCPU_SREG_CS);
4063         tss->ss = get_segment_selector(vcpu, VCPU_SREG_SS);
4064         tss->ds = get_segment_selector(vcpu, VCPU_SREG_DS);
4065         tss->fs = get_segment_selector(vcpu, VCPU_SREG_FS);
4066         tss->gs = get_segment_selector(vcpu, VCPU_SREG_GS);
4067         tss->ldt_selector = get_segment_selector(vcpu, VCPU_SREG_LDTR);
4068 }
4069
4070 static int load_state_from_tss32(struct kvm_vcpu *vcpu,
4071                                   struct tss_segment_32 *tss)
4072 {
4073         kvm_set_cr3(vcpu, tss->cr3);
4074
4075         kvm_rip_write(vcpu, tss->eip);
4076         kvm_x86_ops->set_rflags(vcpu, tss->eflags | 2);
4077
4078         kvm_register_write(vcpu, VCPU_REGS_RAX, tss->eax);
4079         kvm_register_write(vcpu, VCPU_REGS_RCX, tss->ecx);
4080         kvm_register_write(vcpu, VCPU_REGS_RDX, tss->edx);
4081         kvm_register_write(vcpu, VCPU_REGS_RBX, tss->ebx);
4082         kvm_register_write(vcpu, VCPU_REGS_RSP, tss->esp);
4083         kvm_register_write(vcpu, VCPU_REGS_RBP, tss->ebp);
4084         kvm_register_write(vcpu, VCPU_REGS_RSI, tss->esi);
4085         kvm_register_write(vcpu, VCPU_REGS_RDI, tss->edi);
4086
4087         if (kvm_load_segment_descriptor(vcpu, tss->ldt_selector, 0, VCPU_SREG_LDTR))
4088                 return 1;
4089
4090         if (kvm_load_segment_descriptor(vcpu, tss->es, 1, VCPU_SREG_ES))
4091                 return 1;
4092
4093         if (kvm_load_segment_descriptor(vcpu, tss->cs, 9, VCPU_SREG_CS))
4094                 return 1;
4095
4096         if (kvm_load_segment_descriptor(vcpu, tss->ss, 1, VCPU_SREG_SS))
4097                 return 1;
4098
4099         if (kvm_load_segment_descriptor(vcpu, tss->ds, 1, VCPU_SREG_DS))
4100                 return 1;
4101
4102         if (kvm_load_segment_descriptor(vcpu, tss->fs, 1, VCPU_SREG_FS))
4103                 return 1;
4104
4105         if (kvm_load_segment_descriptor(vcpu, tss->gs, 1, VCPU_SREG_GS))
4106                 return 1;
4107         return 0;
4108 }
4109
4110 static void save_state_to_tss16(struct kvm_vcpu *vcpu,
4111                                 struct tss_segment_16 *tss)
4112 {
4113         tss->ip = kvm_rip_read(vcpu);
4114         tss->flag = kvm_x86_ops->get_rflags(vcpu);
4115         tss->ax = kvm_register_read(vcpu, VCPU_REGS_RAX);
4116         tss->cx = kvm_register_read(vcpu, VCPU_REGS_RCX);
4117         tss->dx = kvm_register_read(vcpu, VCPU_REGS_RDX);
4118         tss->bx = kvm_register_read(vcpu, VCPU_REGS_RBX);
4119         tss->sp = kvm_register_read(vcpu, VCPU_REGS_RSP);
4120         tss->bp = kvm_register_read(vcpu, VCPU_REGS_RBP);
4121         tss->si = kvm_register_read(vcpu, VCPU_REGS_RSI);
4122         tss->di = kvm_register_read(vcpu, VCPU_REGS_RDI);
4123
4124         tss->es = get_segment_selector(vcpu, VCPU_SREG_ES);
4125         tss->cs = get_segment_selector(vcpu, VCPU_SREG_CS);
4126         tss->ss = get_segment_selector(vcpu, VCPU_SREG_SS);
4127         tss->ds = get_segment_selector(vcpu, VCPU_SREG_DS);
4128         tss->ldt = get_segment_selector(vcpu, VCPU_SREG_LDTR);
4129         tss->prev_task_link = get_segment_selector(vcpu, VCPU_SREG_TR);
4130 }
4131
4132 static int load_state_from_tss16(struct kvm_vcpu *vcpu,
4133                                  struct tss_segment_16 *tss)
4134 {
4135         kvm_rip_write(vcpu, tss->ip);
4136         kvm_x86_ops->set_rflags(vcpu, tss->flag | 2);
4137         kvm_register_write(vcpu, VCPU_REGS_RAX, tss->ax);
4138         kvm_register_write(vcpu, VCPU_REGS_RCX, tss->cx);
4139         kvm_register_write(vcpu, VCPU_REGS_RDX, tss->dx);
4140         kvm_register_write(vcpu, VCPU_REGS_RBX, tss->bx);
4141         kvm_register_write(vcpu, VCPU_REGS_RSP, tss->sp);
4142         kvm_register_write(vcpu, VCPU_REGS_RBP, tss->bp);
4143         kvm_register_write(vcpu, VCPU_REGS_RSI, tss->si);
4144         kvm_register_write(vcpu, VCPU_REGS_RDI, tss->di);
4145
4146         if (kvm_load_segment_descriptor(vcpu, tss->ldt, 0, VCPU_SREG_LDTR))
4147                 return 1;
4148
4149         if (kvm_load_segment_descriptor(vcpu, tss->es, 1, VCPU_SREG_ES))
4150                 return 1;
4151
4152         if (kvm_load_segment_descriptor(vcpu, tss->cs, 9, VCPU_SREG_CS))
4153                 return 1;
4154
4155         if (kvm_load_segment_descriptor(vcpu, tss->ss, 1, VCPU_SREG_SS))
4156                 return 1;
4157
4158         if (kvm_load_segment_descriptor(vcpu, tss->ds, 1, VCPU_SREG_DS))
4159                 return 1;
4160         return 0;
4161 }
4162
4163 static int kvm_task_switch_16(struct kvm_vcpu *vcpu, u16 tss_selector,
4164                               u16 old_tss_sel, u32 old_tss_base,
4165                               struct desc_struct *nseg_desc)
4166 {
4167         struct tss_segment_16 tss_segment_16;
4168         int ret = 0;
4169
4170         if (kvm_read_guest(vcpu->kvm, old_tss_base, &tss_segment_16,
4171                            sizeof tss_segment_16))
4172                 goto out;
4173
4174         save_state_to_tss16(vcpu, &tss_segment_16);
4175
4176         if (kvm_write_guest(vcpu->kvm, old_tss_base, &tss_segment_16,
4177                             sizeof tss_segment_16))
4178                 goto out;
4179
4180         if (kvm_read_guest(vcpu->kvm, get_tss_base_addr(vcpu, nseg_desc),
4181                            &tss_segment_16, sizeof tss_segment_16))
4182                 goto out;
4183
4184         if (old_tss_sel != 0xffff) {
4185                 tss_segment_16.prev_task_link = old_tss_sel;
4186
4187                 if (kvm_write_guest(vcpu->kvm,
4188                                     get_tss_base_addr(vcpu, nseg_desc),
4189                                     &tss_segment_16.prev_task_link,
4190                                     sizeof tss_segment_16.prev_task_link))
4191                         goto out;
4192         }
4193
4194         if (load_state_from_tss16(vcpu, &tss_segment_16))
4195                 goto out;
4196
4197         ret = 1;
4198 out:
4199         return ret;
4200 }
4201
4202 static int kvm_task_switch_32(struct kvm_vcpu *vcpu, u16 tss_selector,
4203                        u16 old_tss_sel, u32 old_tss_base,
4204                        struct desc_struct *nseg_desc)
4205 {
4206         struct tss_segment_32 tss_segment_32;
4207         int ret = 0;
4208
4209         if (kvm_read_guest(vcpu->kvm, old_tss_base, &tss_segment_32,
4210                            sizeof tss_segment_32))
4211                 goto out;
4212
4213         save_state_to_tss32(vcpu, &tss_segment_32);
4214
4215         if (kvm_write_guest(vcpu->kvm, old_tss_base, &tss_segment_32,
4216                             sizeof tss_segment_32))
4217                 goto out;
4218
4219         if (kvm_read_guest(vcpu->kvm, get_tss_base_addr(vcpu, nseg_desc),
4220                            &tss_segment_32, sizeof tss_segment_32))
4221                 goto out;
4222
4223         if (old_tss_sel != 0xffff) {
4224                 tss_segment_32.prev_task_link = old_tss_sel;
4225
4226                 if (kvm_write_guest(vcpu->kvm,
4227                                     get_tss_base_addr(vcpu, nseg_desc),
4228                                     &tss_segment_32.prev_task_link,
4229                                     sizeof tss_segment_32.prev_task_link))
4230                         goto out;
4231         }
4232
4233         if (load_state_from_tss32(vcpu, &tss_segment_32))
4234                 goto out;
4235
4236         ret = 1;
4237 out:
4238         return ret;
4239 }
4240
4241 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason)
4242 {
4243         struct kvm_segment tr_seg;
4244         struct desc_struct cseg_desc;
4245         struct desc_struct nseg_desc;
4246         int ret = 0;
4247         u32 old_tss_base = get_segment_base(vcpu, VCPU_SREG_TR);
4248         u16 old_tss_sel = get_segment_selector(vcpu, VCPU_SREG_TR);
4249
4250         old_tss_base = vcpu->arch.mmu.gva_to_gpa(vcpu, old_tss_base);
4251
4252         /* FIXME: Handle errors. Failure to read either TSS or their
4253          * descriptors should generate a pagefault.
4254          */
4255         if (load_guest_segment_descriptor(vcpu, tss_selector, &nseg_desc))
4256                 goto out;
4257
4258         if (load_guest_segment_descriptor(vcpu, old_tss_sel, &cseg_desc))
4259                 goto out;
4260
4261         if (reason != TASK_SWITCH_IRET) {
4262                 int cpl;
4263
4264                 cpl = kvm_x86_ops->get_cpl(vcpu);
4265                 if ((tss_selector & 3) > nseg_desc.dpl || cpl > nseg_desc.dpl) {
4266                         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
4267                         return 1;
4268                 }
4269         }
4270
4271         if (!nseg_desc.p || (nseg_desc.limit0 | nseg_desc.limit << 16) < 0x67) {
4272                 kvm_queue_exception_e(vcpu, TS_VECTOR, tss_selector & 0xfffc);
4273                 return 1;
4274         }
4275
4276         if (reason == TASK_SWITCH_IRET || reason == TASK_SWITCH_JMP) {
4277                 cseg_desc.type &= ~(1 << 1); //clear the B flag
4278                 save_guest_segment_descriptor(vcpu, old_tss_sel, &cseg_desc);
4279         }
4280
4281         if (reason == TASK_SWITCH_IRET) {
4282                 u32 eflags = kvm_x86_ops->get_rflags(vcpu);
4283                 kvm_x86_ops->set_rflags(vcpu, eflags & ~X86_EFLAGS_NT);
4284         }
4285
4286         /* set back link to prev task only if NT bit is set in eflags
4287            note that old_tss_sel is not used afetr this point */
4288         if (reason != TASK_SWITCH_CALL && reason != TASK_SWITCH_GATE)
4289                 old_tss_sel = 0xffff;
4290
4291         /* set back link to prev task only if NT bit is set in eflags
4292            note that old_tss_sel is not used afetr this point */
4293         if (reason != TASK_SWITCH_CALL && reason != TASK_SWITCH_GATE)
4294                 old_tss_sel = 0xffff;
4295
4296         if (nseg_desc.type & 8)
4297                 ret = kvm_task_switch_32(vcpu, tss_selector, old_tss_sel,
4298                                          old_tss_base, &nseg_desc);
4299         else
4300                 ret = kvm_task_switch_16(vcpu, tss_selector, old_tss_sel,
4301                                          old_tss_base, &nseg_desc);
4302
4303         if (reason == TASK_SWITCH_CALL || reason == TASK_SWITCH_GATE) {
4304                 u32 eflags = kvm_x86_ops->get_rflags(vcpu);
4305                 kvm_x86_ops->set_rflags(vcpu, eflags | X86_EFLAGS_NT);
4306         }
4307
4308         if (reason != TASK_SWITCH_IRET) {
4309                 nseg_desc.type |= (1 << 1);
4310                 save_guest_segment_descriptor(vcpu, tss_selector,
4311                                               &nseg_desc);
4312         }
4313
4314         kvm_x86_ops->set_cr0(vcpu, vcpu->arch.cr0 | X86_CR0_TS);
4315         seg_desct_to_kvm_desct(&nseg_desc, tss_selector, &tr_seg);
4316         tr_seg.type = 11;
4317         kvm_set_segment(vcpu, &tr_seg, VCPU_SREG_TR);
4318 out:
4319         return ret;
4320 }
4321 EXPORT_SYMBOL_GPL(kvm_task_switch);
4322
4323 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
4324                                   struct kvm_sregs *sregs)
4325 {
4326         int mmu_reset_needed = 0;
4327         int pending_vec, max_bits;
4328         struct descriptor_table dt;
4329
4330         vcpu_load(vcpu);
4331
4332         dt.limit = sregs->idt.limit;
4333         dt.base = sregs->idt.base;
4334         kvm_x86_ops->set_idt(vcpu, &dt);
4335         dt.limit = sregs->gdt.limit;
4336         dt.base = sregs->gdt.base;
4337         kvm_x86_ops->set_gdt(vcpu, &dt);
4338
4339         vcpu->arch.cr2 = sregs->cr2;
4340         mmu_reset_needed |= vcpu->arch.cr3 != sregs->cr3;
4341         vcpu->arch.cr3 = sregs->cr3;
4342
4343         kvm_set_cr8(vcpu, sregs->cr8);
4344
4345         mmu_reset_needed |= vcpu->arch.shadow_efer != sregs->efer;
4346         kvm_x86_ops->set_efer(vcpu, sregs->efer);
4347         kvm_set_apic_base(vcpu, sregs->apic_base);
4348
4349         kvm_x86_ops->decache_cr4_guest_bits(vcpu);
4350
4351         mmu_reset_needed |= vcpu->arch.cr0 != sregs->cr0;
4352         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
4353         vcpu->arch.cr0 = sregs->cr0;
4354
4355         mmu_reset_needed |= vcpu->arch.cr4 != sregs->cr4;
4356         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
4357         if (!is_long_mode(vcpu) && is_pae(vcpu))
4358                 load_pdptrs(vcpu, vcpu->arch.cr3);
4359
4360         if (mmu_reset_needed)
4361                 kvm_mmu_reset_context(vcpu);
4362
4363         max_bits = (sizeof sregs->interrupt_bitmap) << 3;
4364         pending_vec = find_first_bit(
4365                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
4366         if (pending_vec < max_bits) {
4367                 kvm_queue_interrupt(vcpu, pending_vec, false);
4368                 pr_debug("Set back pending irq %d\n", pending_vec);
4369                 if (irqchip_in_kernel(vcpu->kvm))
4370                         kvm_pic_clear_isr_ack(vcpu->kvm);
4371         }
4372
4373         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
4374         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
4375         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
4376         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
4377         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
4378         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
4379
4380         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
4381         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
4382
4383         /* Older userspace won't unhalt the vcpu on reset. */
4384         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
4385             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
4386             !(vcpu->arch.cr0 & X86_CR0_PE))
4387                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
4388
4389         vcpu_put(vcpu);
4390
4391         return 0;
4392 }
4393
4394 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
4395                                         struct kvm_guest_debug *dbg)
4396 {
4397         int i, r;
4398
4399         vcpu_load(vcpu);
4400
4401         if ((dbg->control & (KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_HW_BP)) ==
4402             (KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_HW_BP)) {
4403                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
4404                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
4405                 vcpu->arch.switch_db_regs =
4406                         (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
4407         } else {
4408                 for (i = 0; i < KVM_NR_DB_REGS; i++)
4409                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
4410                 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
4411         }
4412
4413         r = kvm_x86_ops->set_guest_debug(vcpu, dbg);
4414
4415         if (dbg->control & KVM_GUESTDBG_INJECT_DB)
4416                 kvm_queue_exception(vcpu, DB_VECTOR);
4417         else if (dbg->control & KVM_GUESTDBG_INJECT_BP)
4418                 kvm_queue_exception(vcpu, BP_VECTOR);
4419
4420         vcpu_put(vcpu);
4421
4422         return r;
4423 }
4424
4425 /*
4426  * fxsave fpu state.  Taken from x86_64/processor.h.  To be killed when
4427  * we have asm/x86/processor.h
4428  */
4429 struct fxsave {
4430         u16     cwd;
4431         u16     swd;
4432         u16     twd;
4433         u16     fop;
4434         u64     rip;
4435         u64     rdp;
4436         u32     mxcsr;
4437         u32     mxcsr_mask;
4438         u32     st_space[32];   /* 8*16 bytes for each FP-reg = 128 bytes */
4439 #ifdef CONFIG_X86_64
4440         u32     xmm_space[64];  /* 16*16 bytes for each XMM-reg = 256 bytes */
4441 #else
4442         u32     xmm_space[32];  /* 8*16 bytes for each XMM-reg = 128 bytes */
4443 #endif
4444 };
4445
4446 /*
4447  * Translate a guest virtual address to a guest physical address.
4448  */
4449 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
4450                                     struct kvm_translation *tr)
4451 {
4452         unsigned long vaddr = tr->linear_address;
4453         gpa_t gpa;
4454
4455         vcpu_load(vcpu);
4456         down_read(&vcpu->kvm->slots_lock);
4457         gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, vaddr);
4458         up_read(&vcpu->kvm->slots_lock);
4459         tr->physical_address = gpa;
4460         tr->valid = gpa != UNMAPPED_GVA;
4461         tr->writeable = 1;
4462         tr->usermode = 0;
4463         vcpu_put(vcpu);
4464
4465         return 0;
4466 }
4467
4468 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
4469 {
4470         struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
4471
4472         vcpu_load(vcpu);
4473
4474         memcpy(fpu->fpr, fxsave->st_space, 128);
4475         fpu->fcw = fxsave->cwd;
4476         fpu->fsw = fxsave->swd;
4477         fpu->ftwx = fxsave->twd;
4478         fpu->last_opcode = fxsave->fop;
4479         fpu->last_ip = fxsave->rip;
4480         fpu->last_dp = fxsave->rdp;
4481         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
4482
4483         vcpu_put(vcpu);
4484
4485         return 0;
4486 }
4487
4488 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
4489 {
4490         struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
4491
4492         vcpu_load(vcpu);
4493
4494         memcpy(fxsave->st_space, fpu->fpr, 128);
4495         fxsave->cwd = fpu->fcw;
4496         fxsave->swd = fpu->fsw;
4497         fxsave->twd = fpu->ftwx;
4498         fxsave->fop = fpu->last_opcode;
4499         fxsave->rip = fpu->last_ip;
4500         fxsave->rdp = fpu->last_dp;
4501         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
4502
4503         vcpu_put(vcpu);
4504
4505         return 0;
4506 }
4507
4508 void fx_init(struct kvm_vcpu *vcpu)
4509 {
4510         unsigned after_mxcsr_mask;
4511
4512         /*
4513          * Touch the fpu the first time in non atomic context as if
4514          * this is the first fpu instruction the exception handler
4515          * will fire before the instruction returns and it'll have to
4516          * allocate ram with GFP_KERNEL.
4517          */
4518         if (!used_math())
4519                 kvm_fx_save(&vcpu->arch.host_fx_image);
4520
4521         /* Initialize guest FPU by resetting ours and saving into guest's */
4522         preempt_disable();
4523         kvm_fx_save(&vcpu->arch.host_fx_image);
4524         kvm_fx_finit();
4525         kvm_fx_save(&vcpu->arch.guest_fx_image);
4526         kvm_fx_restore(&vcpu->arch.host_fx_image);
4527         preempt_enable();
4528
4529         vcpu->arch.cr0 |= X86_CR0_ET;
4530         after_mxcsr_mask = offsetof(struct i387_fxsave_struct, st_space);
4531         vcpu->arch.guest_fx_image.mxcsr = 0x1f80;
4532         memset((void *)&vcpu->arch.guest_fx_image + after_mxcsr_mask,
4533                0, sizeof(struct i387_fxsave_struct) - after_mxcsr_mask);
4534 }
4535 EXPORT_SYMBOL_GPL(fx_init);
4536
4537 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
4538 {
4539         if (!vcpu->fpu_active || vcpu->guest_fpu_loaded)
4540                 return;
4541
4542         vcpu->guest_fpu_loaded = 1;
4543         kvm_fx_save(&vcpu->arch.host_fx_image);
4544         kvm_fx_restore(&vcpu->arch.guest_fx_image);
4545 }
4546 EXPORT_SYMBOL_GPL(kvm_load_guest_fpu);
4547
4548 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
4549 {
4550         if (!vcpu->guest_fpu_loaded)
4551                 return;
4552
4553         vcpu->guest_fpu_loaded = 0;
4554         kvm_fx_save(&vcpu->arch.guest_fx_image);
4555         kvm_fx_restore(&vcpu->arch.host_fx_image);
4556         ++vcpu->stat.fpu_reload;
4557 }
4558 EXPORT_SYMBOL_GPL(kvm_put_guest_fpu);
4559
4560 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
4561 {
4562         if (vcpu->arch.time_page) {
4563                 kvm_release_page_dirty(vcpu->arch.time_page);
4564                 vcpu->arch.time_page = NULL;
4565         }
4566
4567         kvm_x86_ops->vcpu_free(vcpu);
4568 }
4569
4570 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
4571                                                 unsigned int id)
4572 {
4573         return kvm_x86_ops->vcpu_create(kvm, id);
4574 }
4575
4576 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
4577 {
4578         int r;
4579
4580         /* We do fxsave: this must be aligned. */
4581         BUG_ON((unsigned long)&vcpu->arch.host_fx_image & 0xF);
4582
4583         vcpu->arch.mtrr_state.have_fixed = 1;
4584         vcpu_load(vcpu);
4585         r = kvm_arch_vcpu_reset(vcpu);
4586         if (r == 0)
4587                 r = kvm_mmu_setup(vcpu);
4588         vcpu_put(vcpu);
4589         if (r < 0)
4590                 goto free_vcpu;
4591
4592         return 0;
4593 free_vcpu:
4594         kvm_x86_ops->vcpu_free(vcpu);
4595         return r;
4596 }
4597
4598 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
4599 {
4600         vcpu_load(vcpu);
4601         kvm_mmu_unload(vcpu);
4602         vcpu_put(vcpu);
4603
4604         kvm_x86_ops->vcpu_free(vcpu);
4605 }
4606
4607 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
4608 {
4609         vcpu->arch.nmi_pending = false;
4610         vcpu->arch.nmi_injected = false;
4611
4612         vcpu->arch.switch_db_regs = 0;
4613         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
4614         vcpu->arch.dr6 = DR6_FIXED_1;
4615         vcpu->arch.dr7 = DR7_FIXED_1;
4616
4617         return kvm_x86_ops->vcpu_reset(vcpu);
4618 }
4619
4620 void kvm_arch_hardware_enable(void *garbage)
4621 {
4622         kvm_x86_ops->hardware_enable(garbage);
4623 }
4624
4625 void kvm_arch_hardware_disable(void *garbage)
4626 {
4627         kvm_x86_ops->hardware_disable(garbage);
4628 }
4629
4630 int kvm_arch_hardware_setup(void)
4631 {
4632         return kvm_x86_ops->hardware_setup();
4633 }
4634
4635 void kvm_arch_hardware_unsetup(void)
4636 {
4637         kvm_x86_ops->hardware_unsetup();
4638 }
4639
4640 void kvm_arch_check_processor_compat(void *rtn)
4641 {
4642         kvm_x86_ops->check_processor_compatibility(rtn);
4643 }
4644
4645 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
4646 {
4647         struct page *page;
4648         struct kvm *kvm;
4649         int r;
4650
4651         BUG_ON(vcpu->kvm == NULL);
4652         kvm = vcpu->kvm;
4653
4654         vcpu->arch.mmu.root_hpa = INVALID_PAGE;
4655         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
4656                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
4657         else
4658                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
4659
4660         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
4661         if (!page) {
4662                 r = -ENOMEM;
4663                 goto fail;
4664         }
4665         vcpu->arch.pio_data = page_address(page);
4666
4667         r = kvm_mmu_create(vcpu);
4668         if (r < 0)
4669                 goto fail_free_pio_data;
4670
4671         if (irqchip_in_kernel(kvm)) {
4672                 r = kvm_create_lapic(vcpu);
4673                 if (r < 0)
4674                         goto fail_mmu_destroy;
4675         }
4676
4677         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
4678                                        GFP_KERNEL);
4679         if (!vcpu->arch.mce_banks) {
4680                 r = -ENOMEM;
4681                 goto fail_mmu_destroy;
4682         }
4683         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
4684
4685         return 0;
4686
4687 fail_mmu_destroy:
4688         kvm_mmu_destroy(vcpu);
4689 fail_free_pio_data:
4690         free_page((unsigned long)vcpu->arch.pio_data);
4691 fail:
4692         return r;
4693 }
4694
4695 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
4696 {
4697         kvm_free_lapic(vcpu);
4698         down_read(&vcpu->kvm->slots_lock);
4699         kvm_mmu_destroy(vcpu);
4700         up_read(&vcpu->kvm->slots_lock);
4701         free_page((unsigned long)vcpu->arch.pio_data);
4702 }
4703
4704 struct  kvm *kvm_arch_create_vm(void)
4705 {
4706         struct kvm *kvm = kzalloc(sizeof(struct kvm), GFP_KERNEL);
4707
4708         if (!kvm)
4709                 return ERR_PTR(-ENOMEM);
4710
4711         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
4712         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
4713
4714         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
4715         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
4716
4717         rdtscll(kvm->arch.vm_init_tsc);
4718
4719         return kvm;
4720 }
4721
4722 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
4723 {
4724         vcpu_load(vcpu);
4725         kvm_mmu_unload(vcpu);
4726         vcpu_put(vcpu);
4727 }
4728
4729 static void kvm_free_vcpus(struct kvm *kvm)
4730 {
4731         unsigned int i;
4732         struct kvm_vcpu *vcpu;
4733
4734         /*
4735          * Unpin any mmu pages first.
4736          */
4737         kvm_for_each_vcpu(i, vcpu, kvm)
4738                 kvm_unload_vcpu_mmu(vcpu);
4739         kvm_for_each_vcpu(i, vcpu, kvm)
4740                 kvm_arch_vcpu_free(vcpu);
4741
4742         mutex_lock(&kvm->lock);
4743         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
4744                 kvm->vcpus[i] = NULL;
4745
4746         atomic_set(&kvm->online_vcpus, 0);
4747         mutex_unlock(&kvm->lock);
4748 }
4749
4750 void kvm_arch_sync_events(struct kvm *kvm)
4751 {
4752         kvm_free_all_assigned_devices(kvm);
4753 }
4754
4755 void kvm_arch_destroy_vm(struct kvm *kvm)
4756 {
4757         kvm_iommu_unmap_guest(kvm);
4758         kvm_free_pit(kvm);
4759         kfree(kvm->arch.vpic);
4760         kfree(kvm->arch.vioapic);
4761         kvm_free_vcpus(kvm);
4762         kvm_free_physmem(kvm);
4763         if (kvm->arch.apic_access_page)
4764                 put_page(kvm->arch.apic_access_page);
4765         if (kvm->arch.ept_identity_pagetable)
4766                 put_page(kvm->arch.ept_identity_pagetable);
4767         kfree(kvm);
4768 }
4769
4770 int kvm_arch_set_memory_region(struct kvm *kvm,
4771                                 struct kvm_userspace_memory_region *mem,
4772                                 struct kvm_memory_slot old,
4773                                 int user_alloc)
4774 {
4775         int npages = mem->memory_size >> PAGE_SHIFT;
4776         struct kvm_memory_slot *memslot = &kvm->memslots[mem->slot];
4777
4778         /*To keep backward compatibility with older userspace,
4779          *x86 needs to hanlde !user_alloc case.
4780          */
4781         if (!user_alloc) {
4782                 if (npages && !old.rmap) {
4783                         unsigned long userspace_addr;
4784
4785                         down_write(&current->mm->mmap_sem);
4786                         userspace_addr = do_mmap(NULL, 0,
4787                                                  npages * PAGE_SIZE,
4788                                                  PROT_READ | PROT_WRITE,
4789                                                  MAP_PRIVATE | MAP_ANONYMOUS,
4790                                                  0);
4791                         up_write(&current->mm->mmap_sem);
4792
4793                         if (IS_ERR((void *)userspace_addr))
4794                                 return PTR_ERR((void *)userspace_addr);
4795
4796                         /* set userspace_addr atomically for kvm_hva_to_rmapp */
4797                         spin_lock(&kvm->mmu_lock);
4798                         memslot->userspace_addr = userspace_addr;
4799                         spin_unlock(&kvm->mmu_lock);
4800                 } else {
4801                         if (!old.user_alloc && old.rmap) {
4802                                 int ret;
4803
4804                                 down_write(&current->mm->mmap_sem);
4805                                 ret = do_munmap(current->mm, old.userspace_addr,
4806                                                 old.npages * PAGE_SIZE);
4807                                 up_write(&current->mm->mmap_sem);
4808                                 if (ret < 0)
4809                                         printk(KERN_WARNING
4810                                        "kvm_vm_ioctl_set_memory_region: "
4811                                        "failed to munmap memory\n");
4812                         }
4813                 }
4814         }
4815
4816         spin_lock(&kvm->mmu_lock);
4817         if (!kvm->arch.n_requested_mmu_pages) {
4818                 unsigned int nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
4819                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
4820         }
4821
4822         kvm_mmu_slot_remove_write_access(kvm, mem->slot);
4823         spin_unlock(&kvm->mmu_lock);
4824         kvm_flush_remote_tlbs(kvm);
4825
4826         return 0;
4827 }
4828
4829 void kvm_arch_flush_shadow(struct kvm *kvm)
4830 {
4831         kvm_mmu_zap_all(kvm);
4832         kvm_reload_remote_mmus(kvm);
4833 }
4834
4835 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
4836 {
4837         return vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE
4838                || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
4839                || vcpu->arch.nmi_pending;
4840 }
4841
4842 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
4843 {
4844         int me;
4845         int cpu = vcpu->cpu;
4846
4847         if (waitqueue_active(&vcpu->wq)) {
4848                 wake_up_interruptible(&vcpu->wq);
4849                 ++vcpu->stat.halt_wakeup;
4850         }
4851
4852         me = get_cpu();
4853         if (cpu != me && (unsigned)cpu < nr_cpu_ids && cpu_online(cpu))
4854                 if (!test_and_set_bit(KVM_REQ_KICK, &vcpu->requests))
4855                         smp_send_reschedule(cpu);
4856         put_cpu();
4857 }
4858
4859 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
4860 {
4861         return kvm_x86_ops->interrupt_allowed(vcpu);
4862 }
4863
4864 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
4865 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
4866 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
4867 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
4868 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);