3 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
5 * Rewritten by Cort Dougan (cort@cs.nmt.edu) for PReP
6 * Copyright (C) 1996 Cort Dougan <cort@cs.nmt.edu>
7 * Adapted for Power Macintosh by Paul Mackerras.
8 * Low-level exception handlers and MMU support
9 * rewritten by Paul Mackerras.
10 * Copyright (C) 1996 Paul Mackerras.
12 * Adapted for 64bit PowerPC by Dave Engebretsen, Peter Bergner, and
13 * Mike Corrigan {engebret|bergner|mikejc}@us.ibm.com
15 * This file contains the entry point for the 64-bit kernel along
16 * with some early initialization code common to all 64-bit powerpc
19 * This program is free software; you can redistribute it and/or
20 * modify it under the terms of the GNU General Public License
21 * as published by the Free Software Foundation; either version
22 * 2 of the License, or (at your option) any later version.
25 #include <linux/threads.h>
29 #include <asm/ppc_asm.h>
30 #include <asm/asm-offsets.h>
32 #include <asm/cputable.h>
33 #include <asm/setup.h>
34 #include <asm/hvcall.h>
35 #include <asm/iseries/lpar_map.h>
36 #include <asm/thread_info.h>
37 #include <asm/firmware.h>
38 #include <asm/page_64.h>
39 #include <asm/irqflags.h>
40 #include <asm/kvm_book3s_asm.h>
41 #include <asm/ptrace.h>
43 /* The physical memory is laid out such that the secondary processor
44 * spin code sits at 0x0000...0x00ff. On server, the vectors follow
45 * using the layout described in exceptions-64s.S
49 * Entering into this code we make the following assumptions:
51 * For pSeries or server processors:
52 * 1. The MMU is off & open firmware is running in real mode.
53 * 2. The kernel is entered at __start
54 * -or- For OPAL entry:
55 * 1. The MMU is off, processor in HV mode, primary CPU enters at 0
56 * with device-tree in gpr3
57 * 2. Secondary processors enter at 0x60 with PIR in gpr3
60 * 1. The MMU is on (as it always is for iSeries)
61 * 2. The kernel is entered at system_reset_iSeries
63 * For Book3E processors:
64 * 1. The MMU is on running in AS0 in a state defined in ePAPR
65 * 2. The kernel is entered at __start
72 /* NOP this out unconditionally */
74 b .__start_initialization_multiplatform
77 /* Catch branch to 0 in real mode */
80 /* Secondary processors spin on this value until it becomes nonzero.
81 * When it does it contains the real address of the descriptor
82 * of the function that the cpu should jump to to continue
85 .globl __secondary_hold_spinloop
86 __secondary_hold_spinloop:
89 /* Secondary processors write this value with their cpu # */
90 /* after they enter the spin loop immediately below. */
91 .globl __secondary_hold_acknowledge
92 __secondary_hold_acknowledge:
95 #ifdef CONFIG_PPC_ISERIES
97 * At offset 0x20, there is a pointer to iSeries LPAR data.
98 * This is required by the hypervisor
101 .llong hvReleaseData-KERNELBASE
102 #endif /* CONFIG_PPC_ISERIES */
104 #ifdef CONFIG_RELOCATABLE
105 /* This flag is set to 1 by a loader if the kernel should run
106 * at the loaded address instead of the linked address. This
107 * is used by kexec-tools to keep the the kdump kernel in the
108 * crash_kernel region. The loader is responsible for
109 * observing the alignment requirement.
111 /* Do not move this variable as kexec-tools knows about it. */
115 .long 0x72756e30 /* "run0" -- relocate to 0 by default */
120 * The following code is used to hold secondary processors
121 * in a spin loop after they have entered the kernel, but
122 * before the bulk of the kernel has been relocated. This code
123 * is relocated to physical address 0x60 before prom_init is run.
124 * All of it must fit below the first exception vector at 0x100.
125 * Use .globl here not _GLOBAL because we want __secondary_hold
126 * to be the actual text address, not a descriptor.
128 .globl __secondary_hold
130 #ifndef CONFIG_PPC_BOOK3E
133 mtmsrd r24 /* RI on */
135 /* Grab our physical cpu number */
138 /* Tell the master cpu we're here */
139 /* Relocation is off & we are located at an address less */
140 /* than 0x100, so only need to grab low order offset. */
141 std r24,__secondary_hold_acknowledge-_stext(0)
144 /* All secondary cpus wait here until told to start. */
145 100: ld r4,__secondary_hold_spinloop-_stext(0)
149 #if defined(CONFIG_SMP) || defined(CONFIG_KEXEC)
150 ld r4,0(r4) /* deref function descriptor */
154 /* Make sure that patched code is visible */
161 /* This value is used to mark exception frames on the stack. */
164 .tc ID_72656773_68657265[TC],0x7265677368657265
168 * On server, we include the exception vectors code here as it
169 * relies on absolute addressing which is only possible within
170 * this compilation unit
172 #ifdef CONFIG_PPC_BOOK3S
173 #include "exceptions-64s.S"
176 _GLOBAL(generic_secondary_thread_init)
179 /* turn on 64-bit mode */
182 /* get a valid TOC pointer, wherever we're mapped at */
185 #ifdef CONFIG_PPC_BOOK3E
186 /* Book3E initialization */
188 bl .book3e_secondary_thread_init
190 b generic_secondary_common_init
193 * On pSeries and most other platforms, secondary processors spin
194 * in the following code.
195 * At entry, r3 = this processor's number (physical cpu id)
197 * On Book3E, r4 = 1 to indicate that the initial TLB entry for
198 * this core already exists (setup via some other mechanism such
199 * as SCOM before entry).
201 _GLOBAL(generic_secondary_smp_init)
205 /* turn on 64-bit mode */
208 /* get a valid TOC pointer, wherever we're mapped at */
211 #ifdef CONFIG_PPC_BOOK3E
212 /* Book3E initialization */
215 bl .book3e_secondary_core_init
218 generic_secondary_common_init:
219 /* Set up a paca value for this processor. Since we have the
220 * physical cpu id in r24, we need to search the pacas to find
221 * which logical id maps to our physical one.
223 LOAD_REG_ADDR(r13, paca) /* Load paca pointer */
224 ld r13,0(r13) /* Get base vaddr of paca array */
226 addi r13,r13,PACA_SIZE /* know r13 if used accidentally */
227 b .kexec_wait /* wait for next kernel if !SMP */
229 LOAD_REG_ADDR(r7, nr_cpu_ids) /* Load nr_cpu_ids address */
230 lwz r7,0(r7) /* also the max paca allocated */
231 li r5,0 /* logical cpu id */
232 1: lhz r6,PACAHWCPUID(r13) /* Load HW procid from paca */
233 cmpw r6,r24 /* Compare to our id */
235 addi r13,r13,PACA_SIZE /* Loop to next PACA on miss */
237 cmpw r5,r7 /* Check if more pacas exist */
240 mr r3,r24 /* not found, copy phys to r3 */
241 b .kexec_wait /* next kernel might do better */
244 #ifdef CONFIG_PPC_BOOK3E
245 addi r12,r13,PACA_EXTLB /* and TLB exc frame in another */
246 mtspr SPRN_SPRG_TLB_EXFRAME,r12
249 /* From now on, r24 is expected to be logical cpuid */
252 /* See if we need to call a cpu state restore handler */
253 LOAD_REG_ADDR(r23, cur_cpu_spec)
255 ld r23,CPU_SPEC_RESTORE(r23)
262 3: LOAD_REG_ADDR(r3, spinning_secondaries) /* Decrement spinning_secondaries */
270 lbz r23,PACAPROCSTART(r13) /* Test if this processor should */
273 beq 4b /* Loop until told to go */
275 sync /* order paca.run and cur_cpu_spec */
276 isync /* In case code patching happened */
278 /* Create a temp kernel stack for use before relocation is on. */
279 ld r1,PACAEMERGSP(r13)
280 subi r1,r1,STACK_FRAME_OVERHEAD
287 * Assumes we're mapped EA == RA if the MMU is on.
289 #ifdef CONFIG_PPC_BOOK3S
292 andi. r0,r3,MSR_IR|MSR_DR
300 b . /* prevent speculative execution */
305 * Here is our main kernel entry point. We support currently 2 kind of entries
306 * depending on the value of r5.
308 * r5 != NULL -> OF entry, we go to prom_init, "legacy" parameter content
311 * r5 == NULL -> kexec style entry. r3 is a physical pointer to the
312 * DT block, r4 is a physical pointer to the kernel itself
315 _GLOBAL(__start_initialization_multiplatform)
316 /* Make sure we are running in 64 bits mode */
319 /* Get TOC pointer (current runtime address) */
322 /* find out where we are now */
324 0: mflr r26 /* r26 = runtime addr here */
325 addis r26,r26,(_stext - 0b)@ha
326 addi r26,r26,(_stext - 0b)@l /* current runtime base addr */
329 * Are we booted from a PROM Of-type client-interface ?
333 b .__boot_from_prom /* yes -> prom */
335 /* Save parameters */
339 #ifdef CONFIG_PPC_BOOK3E
340 bl .start_initialization_book3e
341 b .__after_prom_start
343 /* Setup some critical 970 SPRs before switching MMU off */
346 cmpwi r0,0x39 /* 970 */
348 cmpwi r0,0x3c /* 970FX */
350 cmpwi r0,0x44 /* 970MP */
352 cmpwi r0,0x45 /* 970GX */
354 1: bl .__cpu_preinit_ppc970
357 /* Switch off MMU if not already off */
359 b .__after_prom_start
360 #endif /* CONFIG_PPC_BOOK3E */
362 _INIT_STATIC(__boot_from_prom)
363 #ifdef CONFIG_PPC_OF_BOOT_TRAMPOLINE
364 /* Save parameters */
372 * Align the stack to 16-byte boundary
373 * Depending on the size and layout of the ELF sections in the initial
374 * boot binary, the stack pointer may be unaligned on PowerMac
378 #ifdef CONFIG_RELOCATABLE
379 /* Relocate code for where we are now */
384 /* Restore parameters */
391 /* Do all of the interaction with OF client interface */
394 #endif /* #CONFIG_PPC_OF_BOOT_TRAMPOLINE */
396 /* We never return. We also hit that trap if trying to boot
397 * from OF while CONFIG_PPC_OF_BOOT_TRAMPOLINE isn't selected */
400 _STATIC(__after_prom_start)
401 #ifdef CONFIG_RELOCATABLE
402 /* process relocations for the final address of the kernel */
403 lis r25,PAGE_OFFSET@highest /* compute virtual base of kernel */
405 lwz r7,__run_at_load-_stext(r26)
406 cmplwi cr0,r7,1 /* flagged to stay where we are ? */
414 * We need to run with _stext at physical address PHYSICAL_START.
415 * This will leave some code in the first 256B of
416 * real memory, which are reserved for software use.
418 * Note: This process overwrites the OF exception vectors.
420 li r3,0 /* target addr */
421 #ifdef CONFIG_PPC_BOOK3E
422 tovirt(r3,r3) /* on booke, we already run at PAGE_OFFSET */
424 mr. r4,r26 /* In some cases the loader may */
425 beq 9f /* have already put us at zero */
426 li r6,0x100 /* Start offset, the first 0x100 */
427 /* bytes were copied earlier. */
428 #ifdef CONFIG_PPC_BOOK3E
429 tovirt(r6,r6) /* on booke, we already run at PAGE_OFFSET */
432 #ifdef CONFIG_CRASH_DUMP
434 * Check if the kernel has to be running as relocatable kernel based on the
435 * variable __run_at_load, if it is set the kernel is treated as relocatable
436 * kernel, otherwise it will be moved to PHYSICAL_START
438 lwz r7,__run_at_load-_stext(r26)
442 li r5,__end_interrupts - _stext /* just copy interrupts */
446 lis r5,(copy_to_here - _stext)@ha
447 addi r5,r5,(copy_to_here - _stext)@l /* # bytes of memory to copy */
449 bl .copy_and_flush /* copy the first n bytes */
450 /* this includes the code being */
452 addis r8,r3,(4f - _stext)@ha /* Jump to the copy of this code */
453 addi r8,r8,(4f - _stext)@l /* that we just made */
457 p_end: .llong _end - _stext
459 4: /* Now copy the rest of the kernel up to _end */
460 addis r5,r26,(p_end - _stext)@ha
461 ld r5,(p_end - _stext)@l(r5) /* get _end */
462 5: bl .copy_and_flush /* copy the rest */
464 9: b .start_here_multiplatform
467 * Copy routine used to copy the kernel to start at physical address 0
468 * and flush and invalidate the caches as needed.
469 * r3 = dest addr, r4 = source addr, r5 = copy limit, r6 = start offset
470 * on exit, r3, r4, r5 are unchanged, r6 is updated to be >= r5.
472 * Note: this routine *only* clobbers r0, r6 and lr
474 _GLOBAL(copy_and_flush)
477 4: li r0,8 /* Use the smallest common */
478 /* denominator cache line */
479 /* size. This results in */
480 /* extra cache line flushes */
481 /* but operation is correct. */
482 /* Can't get cache line size */
483 /* from NACA as it is being */
486 mtctr r0 /* put # words/line in ctr */
487 3: addi r6,r6,8 /* copy a cache line */
491 dcbst r6,r3 /* write it to memory */
493 icbi r6,r3 /* flush the icache line */
505 #ifdef CONFIG_PPC_PMAC
507 * On PowerMac, secondary processors starts from the reset vector, which
508 * is temporarily turned into a call to one of the functions below.
513 .globl __secondary_start_pmac_0
514 __secondary_start_pmac_0:
515 /* NB the entries for cpus 0, 1, 2 must each occupy 8 bytes. */
525 _GLOBAL(pmac_secondary_start)
526 /* turn on 64-bit mode */
531 rldimi r3,r0,40,23 /* clear bit 23 (rm_ci) */
538 /* get TOC pointer (real address) */
541 /* Copy some CPU settings from CPU 0 */
542 bl .__restore_cpu_ppc970
544 /* pSeries do that early though I don't think we really need it */
547 mtmsrd r3 /* RI on */
549 /* Set up a paca value for this processor. */
550 LOAD_REG_ADDR(r4,paca) /* Load paca pointer */
551 ld r4,0(r4) /* Get base vaddr of paca array */
552 mulli r13,r24,PACA_SIZE /* Calculate vaddr of right paca */
553 add r13,r13,r4 /* for this processor. */
554 SET_PACA(r13) /* Save vaddr of paca in an SPRG*/
556 /* Mark interrupts soft and hard disabled (they might be enabled
557 * in the PACA when doing hotplug)
560 stb r0,PACASOFTIRQEN(r13)
561 stb r0,PACAHARDIRQEN(r13)
563 /* Create a temp kernel stack for use before relocation is on. */
564 ld r1,PACAEMERGSP(r13)
565 subi r1,r1,STACK_FRAME_OVERHEAD
569 #endif /* CONFIG_PPC_PMAC */
572 * This function is called after the master CPU has released the
573 * secondary processors. The execution environment is relocation off.
574 * The paca for this processor has the following fields initialized at
576 * 1. Processor number
577 * 2. Segment table pointer (virtual address)
578 * On entry the following are set:
579 * r1 = stack pointer. vaddr for iSeries, raddr (temp stack) for pSeries
580 * r24 = cpu# (in Linux terms)
581 * r13 = paca virtual address
582 * SPRG_PACA = paca virtual address
587 .globl __secondary_start
589 /* Set thread priority to MEDIUM */
592 /* Initialize the kernel stack. Just a repeat for iSeries. */
593 LOAD_REG_ADDR(r3, current_set)
594 sldi r28,r24,3 /* get current_set[cpu#] */
596 addi r14,r14,THREAD_SIZE-STACK_FRAME_OVERHEAD
597 std r14,PACAKSAVE(r13)
599 /* Do early setup for that CPU (stab, slb, hash table pointer) */
600 bl .early_setup_secondary
603 * setup the new stack pointer, but *don't* use this until
608 /* Clear backchain so we get nice backtraces */
612 /* enable MMU and jump to start_secondary */
613 LOAD_REG_ADDR(r3, .start_secondary_prolog)
614 LOAD_REG_IMMEDIATE(r4, MSR_KERNEL)
615 #ifdef CONFIG_PPC_ISERIES
619 stb r8,PACAHARDIRQEN(r13)
620 END_FW_FTR_SECTION_IFSET(FW_FEATURE_ISERIES)
623 stb r7,PACAHARDIRQEN(r13)
624 END_FW_FTR_SECTION_IFCLR(FW_FEATURE_ISERIES)
625 stb r7,PACASOFTIRQEN(r13)
630 b . /* prevent speculative execution */
633 * Running with relocation on at this point. All we want to do is
634 * zero the stack back-chain pointer and get the TOC virtual address
635 * before going into C code.
637 _GLOBAL(start_secondary_prolog)
640 std r3,0(r1) /* Zero the stack frame pointer */
644 * Reset stack pointer and call start_secondary
645 * to continue with online operation when woken up
646 * from cede in cpu offline.
648 _GLOBAL(start_secondary_resume)
649 ld r1,PACAKSAVE(r13) /* Reload kernel stack pointer */
651 std r3,0(r1) /* Zero the stack frame pointer */
657 * This subroutine clobbers r11 and r12
659 _GLOBAL(enable_64b_mode)
660 mfmsr r11 /* grab the current MSR */
661 #ifdef CONFIG_PPC_BOOK3E
662 oris r11,r11,0x8000 /* CM bit set, we'll set ICM later */
664 #else /* CONFIG_PPC_BOOK3E */
665 li r12,(MSR_64BIT | MSR_ISF)@highest
674 * This puts the TOC pointer into r2, offset by 0x8000 (as expected
675 * by the toolchain). It computes the correct value for wherever we
676 * are running at the moment, using position-independent code.
678 _GLOBAL(relative_toc)
682 ld r2,(p_toc - 0b)(r11)
687 p_toc: .llong __toc_start + 0x8000 - 0b
690 * This is where the main kernel code starts.
692 _INIT_STATIC(start_here_multiplatform)
693 /* set up the TOC (real address) */
696 /* Clear out the BSS. It may have been done in prom_init,
697 * already but that's irrelevant since prom_init will soon
698 * be detached from the kernel completely. Besides, we need
699 * to clear it now for kexec-style entry.
701 LOAD_REG_ADDR(r11,__bss_stop)
702 LOAD_REG_ADDR(r8,__bss_start)
703 sub r11,r11,r8 /* bss size */
704 addi r11,r11,7 /* round up to an even double word */
705 srdi. r11,r11,3 /* shift right by 3 */
709 mtctr r11 /* zero this many doublewords */
714 #ifndef CONFIG_PPC_BOOK3E
717 mtmsrd r6 /* RI on */
720 #ifdef CONFIG_RELOCATABLE
721 /* Save the physical address we're running at in kernstart_addr */
722 LOAD_REG_ADDR(r4, kernstart_addr)
727 /* The following gets the stack set up with the regs */
728 /* pointing to the real addr of the kernel stack. This is */
729 /* all done to support the C function call below which sets */
730 /* up the htab. This is done because we have relocated the */
731 /* kernel but are still running in real mode. */
733 LOAD_REG_ADDR(r3,init_thread_union)
735 /* set up a stack pointer */
736 addi r1,r3,THREAD_SIZE
738 stdu r0,-STACK_FRAME_OVERHEAD(r1)
740 /* Do very early kernel initializations, including initial hash table,
741 * stab and slb setup before we turn on relocation. */
743 /* Restore parameters passed from prom_init/kexec */
745 bl .early_setup /* also sets r13 and SPRG_PACA */
747 LOAD_REG_ADDR(r3, .start_here_common)
752 b . /* prevent speculative execution */
754 /* This is where all platforms converge execution */
755 _INIT_GLOBAL(start_here_common)
756 /* relocation is on at this point */
757 std r1,PACAKSAVE(r13)
759 /* Load the TOC (virtual address) */
764 /* Load up the kernel context */
767 stb r5,PACASOFTIRQEN(r13) /* Soft Disabled */
768 #ifdef CONFIG_PPC_ISERIES
771 ori r5,r5,MSR_EE /* Hard Enabled on iSeries*/
774 END_FW_FTR_SECTION_IFSET(FW_FEATURE_ISERIES)
776 stb r5,PACAHARDIRQEN(r13) /* Hard Disabled on others */
784 * We put a few things here that have to be page-aligned.
785 * This stuff goes at the beginning of the bss, which is page-aligned.
791 .globl empty_zero_page
795 .globl swapper_pg_dir
797 .space PGD_TABLE_SIZE