arch/powerpc/boot/dts/katmai.dts

   1 /*
   2  * Device Tree Source for AMCC Katmai eval board
   3  *
   4  * Copyright (c) 2006, 2007 IBM Corp.
   5  * Benjamin Herrenschmidt <benh@kernel.crashing.org>
   6  *
   7  * Copyright (c) 2006, 2007 IBM Corp.
   8  * Josh Boyer <jwboyer@linux.vnet.ibm.com>
   9  *
  10  * This file is licensed under the terms of the GNU General Public
  11  * License version 2.  This program is licensed "as is" without
  12  * any warranty of any kind, whether express or implied.
  13  */
  14
  15 /dts-v1/;
  16
  17 / {
  18         #address-cells = <2>;
  19         #size-cells = <2>;
  20         model = "amcc,katmai";
  21         compatible = "amcc,katmai";
  22         dcr-parent = <&{/cpus/cpu@0}>;
  23
  24         aliases {
  25                 ethernet0 = &EMAC0;
  26                 serial0 = &UART0;
  27                 serial1 = &UART1;
  28                 serial2 = &UART2;
  29         };
  30
  31         cpus {
  32                 #address-cells = <1>;
  33                 #size-cells = <0>;
  34
  35                 cpu@0 {
  36                         device_type = "cpu";
  37                         model = "PowerPC,440SPe";
  38                         reg = <0x00000000>;
  39                         clock-frequency = <0>; /* Filled in by zImage */
  40                         timebase-frequency = <0>; /* Filled in by zImage */
  41                         i-cache-line-size = <32>;
  42                         d-cache-line-size = <32>;
  43                         i-cache-size = <32768>;
  44                         d-cache-size = <32768>;
  45                         dcr-controller;
  46                         dcr-access-method = "native";
  47                 };
  48         };
  49
  50         memory {
  51                 device_type = "memory";
  52                 reg = <0x0 0x00000000 0x0 0x00000000>; /* Filled in by U-Boot */
  53         };
  54
  55         UIC0: interrupt-controller0 {
  56                 compatible = "ibm,uic-440spe","ibm,uic";
  57                 interrupt-controller;
  58                 cell-index = <0>;
  59                 dcr-reg = <0x0c0 0x009>;
  60                 #address-cells = <0>;
  61                 #size-cells = <0>;
  62                 #interrupt-cells = <2>;
  63         };
  64
  65         UIC1: interrupt-controller1 {
  66                 compatible = "ibm,uic-440spe","ibm,uic";
  67                 interrupt-controller;
  68                 cell-index = <1>;
  69                 dcr-reg = <0x0d0 0x009>;
  70                 #address-cells = <0>;
  71                 #size-cells = <0>;
  72                 #interrupt-cells = <2>;
  73                 interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
  74                 interrupt-parent = <&UIC0>;
  75         };
  76
  77         UIC2: interrupt-controller2 {
  78                 compatible = "ibm,uic-440spe","ibm,uic";
  79                 interrupt-controller;
  80                 cell-index = <2>;
  81                 dcr-reg = <0x0e0 0x009>;
  82                 #address-cells = <0>;
  83                 #size-cells = <0>;
  84                 #interrupt-cells = <2>;
  85                 interrupts = <0xa 0x4 0xb 0x4>; /* cascade */
  86                 interrupt-parent = <&UIC0>;
  87         };
  88
  89         UIC3: interrupt-controller3 {
  90                 compatible = "ibm,uic-440spe","ibm,uic";
  91                 interrupt-controller;
  92                 cell-index = <3>;
  93                 dcr-reg = <0x0f0 0x009>;
  94                 #address-cells = <0>;
  95                 #size-cells = <0>;
  96                 #interrupt-cells = <2>;
  97                 interrupts = <0x10 0x4 0x11 0x4>; /* cascade */
  98                 interrupt-parent = <&UIC0>;
  99         };
 100
 101         SDR0: sdr {
 102                 compatible = "ibm,sdr-440spe";
 103                 dcr-reg = <0x00e 0x002>;
 104         };
 105
 106         CPR0: cpr {
 107                 compatible = "ibm,cpr-440spe";
 108                 dcr-reg = <0x00c 0x002>;
 109         };
 110
 111         plb {
 112                 compatible = "ibm,plb-440spe", "ibm,plb-440gp", "ibm,plb4";
 113                 #address-cells = <2>;
 114                 #size-cells = <1>;
 115                 /*        addr-child     addr-parent    size */
 116                 ranges = <0x4 0xe0000000 0x4 0xe0000000 0x20000000
 117                           0xc 0x00000000 0xc 0x00000000 0x20000000
 118                           0xd 0x00000000 0xd 0x00000000 0x80000000
 119                           0xd 0x80000000 0xd 0x80000000 0x80000000
 120                           0xe 0x00000000 0xe 0x00000000 0x80000000
 121                           0xe 0x80000000 0xe 0x80000000 0x80000000
 122                           0xf 0x00000000 0xf 0x00000000 0x80000000
 123                           0xf 0x80000000 0xf 0x80000000 0x80000000>;
 124                 clock-frequency = <0>; /* Filled in by zImage */
 125
 126                 SDRAM0: sdram {
 127                         compatible = "ibm,sdram-440spe", "ibm,sdram-405gp";
 128                         dcr-reg = <0x010 0x002>;
 129                 };
 130
 131                 MAL0: mcmal {
 132                         compatible = "ibm,mcmal-440spe", "ibm,mcmal2";
 133                         dcr-reg = <0x180 0x062>;
 134                         num-tx-chans = <2>;
 135                         num-rx-chans = <1>;
 136                         interrupt-parent = <&MAL0>;
 137                         interrupts = <0x0 0x1 0x2 0x3 0x4>;
 138                         #interrupt-cells = <1>;
 139                         #address-cells = <0>;
 140                         #size-cells = <0>;
 141                         interrupt-map = </*TXEOB*/ 0x0 &UIC1 0x6 0x4
 142                                          /*RXEOB*/ 0x1 &UIC1 0x7 0x4
 143                                          /*SERR*/  0x2 &UIC1 0x1 0x4
 144                                          /*TXDE*/  0x3 &UIC1 0x2 0x4
 145                                          /*RXDE*/  0x4 &UIC1 0x3 0x4>;
 146                 };
 147
 148                 POB0: opb {
 149                         compatible = "ibm,opb-440spe", "ibm,opb-440gp", "ibm,opb";
 150                         #address-cells = <1>;
 151                         #size-cells = <1>;
 152                         ranges = <0x00000000 0x00000004 0xe0000000 0x20000000>;
 153                         clock-frequency = <0>; /* Filled in by zImage */
 154
 155                         EBC0: ebc {
 156                                 compatible = "ibm,ebc-440spe", "ibm,ebc-440gp", "ibm,ebc";
 157                                 dcr-reg = <0x012 0x002>;
 158                                 #address-cells = <2>;
 159                                 #size-cells = <1>;
 160                                 clock-frequency = <0>; /* Filled in by zImage */
 161                                 interrupts = <0x5 0x1>;
 162                                 interrupt-parent = <&UIC1>;
 163                         };
 164
 165                         UART0: serial@10000200 {
 166                                 device_type = "serial";
 167                                 compatible = "ns16550";
 168                                 reg = <0x10000200 0x00000008>;
 169                                 virtual-reg = <0xa0000200>;
 170                                 clock-frequency = <0>; /* Filled in by zImage */
 171                                 current-speed = <115200>;
 172                                 interrupt-parent = <&UIC0>;
 173                                 interrupts = <0x0 0x4>;
 174                         };
 175
 176                         UART1: serial@10000300 {
 177                                 device_type = "serial";
 178                                 compatible = "ns16550";
 179                                 reg = <0x10000300 0x00000008>;
 180                                 virtual-reg = <0xa0000300>;
 181                                 clock-frequency = <0>;
 182                                 current-speed = <0>;
 183                                 interrupt-parent = <&UIC0>;
 184                                 interrupts = <0x1 0x4>;
 185                         };
 186
 187
 188                         UART2: serial@10000600 {
 189                                 device_type = "serial";
 190                                 compatible = "ns16550";
 191                                 reg = <0x10000600 0x00000008>;
 192                                 virtual-reg = <0xa0000600>;
 193                                 clock-frequency = <0>;
 194                                 current-speed = <0>;
 195                                 interrupt-parent = <&UIC1>;
 196                                 interrupts = <0x5 0x4>;
 197                         };
 198
 199                         IIC0: i2c@10000400 {
 200                                 compatible = "ibm,iic-440spe", "ibm,iic-440gp", "ibm,iic";
 201                                 reg = <0x10000400 0x00000014>;
 202                                 interrupt-parent = <&UIC0>;
 203                                 interrupts = <0x2 0x4>;
 204                         };
 205
 206                         IIC1: i2c@10000500 {
 207                                 compatible = "ibm,iic-440spe", "ibm,iic-440gp", "ibm,iic";
 208                                 reg = <0x10000500 0x00000014>;
 209                                 interrupt-parent = <&UIC0>;
 210                                 interrupts = <0x3 0x4>;
 211                         };
 212
 213                         EMAC0: ethernet@10000800 {
 214                                 linux,network-index = <0x0>;
 215                                 device_type = "network";
 216                                 compatible = "ibm,emac-440spe", "ibm,emac4";
 217                                 interrupt-parent = <&UIC1>;
 218                                 interrupts = <0x1c 0x4 0x1d 0x4>;
 219                                 reg = <0x10000800 0x00000074>;
 220                                 local-mac-address = [000000000000];
 221                                 mal-device = <&MAL0>;
 222                                 mal-tx-channel = <0>;
 223                                 mal-rx-channel = <0>;
 224                                 cell-index = <0>;
 225                                 max-frame-size = <9000>;
 226                                 rx-fifo-size = <4096>;
 227                                 tx-fifo-size = <2048>;
 228                                 phy-mode = "gmii";
 229                                 phy-map = <0x00000000>;
 230                                 has-inverted-stacr-oc;
 231                                 has-new-stacr-staopc;
 232                         };
 233                 };
 234
 235                 PCIX0: pci@c0ec00000 {
 236                         device_type = "pci";
 237                         #interrupt-cells = <1>;
 238                         #size-cells = <2>;
 239                         #address-cells = <3>;
 240                         compatible = "ibm,plb-pcix-440spe", "ibm,plb-pcix";
 241                         primary;
 242                         large-inbound-windows;
 243                         enable-msi-hole;
 244                         reg = <0x0000000c 0x0ec00000   0x00000008       /* Config space access */
 245                                0x00000000 0x00000000 0x00000000         /* no IACK cycles */
 246                                0x0000000c 0x0ed00000   0x00000004   /* Special cycles */
 247                                0x0000000c 0x0ec80000 0x00000100 /* Internal registers */
 248                                0x0000000c 0x0ec80100  0x000000fc>;      /* Internal messaging registers */
 249
 250                         /* Outbound ranges, one memory and one IO,
 251                          * later cannot be changed
 252                          */
 253                         ranges = <0x02000000 0x00000000 0x80000000 0x0000000d 0x80000000 0x00000000 0x80000000
 254                                   0x01000000 0x00000000 0x00000000 0x0000000c 0x08000000 0x00000000 0x00010000>;
 255
 256                         /* Inbound 4GB range starting at 0 */
 257                         dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x1 0x00000000>;
 258
 259                         /* This drives busses 0 to 0xf */
 260                         bus-range = <0x0 0xf>;
 261
 262                         /*
 263                          * On Katmai, the following PCI-X interrupts signals
 264                          * have to be enabled via jumpers (only INTA is
 265                          * enabled per default):
 266                          *
 267                          * INTB: J3: 1-2
 268                          * INTC: J2: 1-2
 269                          * INTD: J1: 1-2
 270                          */
 271                         interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
 272                         interrupt-map = <
 273                                 /* IDSEL 1 */
 274                                 0x800 0x0 0x0 0x1 &UIC1 0x14 0x8
 275                                 0x800 0x0 0x0 0x2 &UIC1 0x13 0x8
 276                                 0x800 0x0 0x0 0x3 &UIC1 0x12 0x8
 277                                 0x800 0x0 0x0 0x4 &UIC1 0x11 0x8
 278                         >;
 279                 };
 280
 281                 PCIE0: pciex@d00000000 {
 282                         device_type = "pci";
 283                         #interrupt-cells = <1>;
 284                         #size-cells = <2>;
 285                         #address-cells = <3>;
 286                         compatible = "ibm,plb-pciex-440spe", "ibm,plb-pciex";
 287                         primary;
 288                         port = <0x0>; /* port number */
 289                         reg = <0x0000000d 0x00000000 0x20000000 /* Config space access */
 290                                0x0000000c 0x10000000 0x00001000>;       /* Registers */
 291                         dcr-reg = <0x100 0x020>;
 292                         sdr-base = <0x300>;
 293
 294                         /* Outbound ranges, one memory and one IO,
 295                          * later cannot be changed
 296                          */
 297                         ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x00000000 0x00000000 0x80000000
 298                                   0x01000000 0x00000000 0x00000000 0x0000000f 0x80000000 0x00000000 0x00010000>;
 299
 300                         /* Inbound 4GB range starting at 0 */
 301                         dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x1 0x00000000>;
 302
 303                         /* This drives busses 0x10 to 0x1f */
 304                         bus-range = <0x10 0x1f>;
 305
 306                         /* Legacy interrupts (note the weird polarity, the bridge seems
 307                          * to invert PCIe legacy interrupts).
 308                          * We are de-swizzling here because the numbers are actually for
 309                          * port of the root complex virtual P2P bridge. But I want
 310                          * to avoid putting a node for it in the tree, so the numbers
 311                          * below are basically de-swizzled numbers.
 312                          * The real slot is on idsel 0, so the swizzling is 1:1
 313                          */
 314                         interrupt-map-mask = <0x0 0x0 0x0 0x7>;
 315                         interrupt-map = <
 316                                 0x0 0x0 0x0 0x1 &UIC3 0x0 0x4 /* swizzled int A */
 317                                 0x0 0x0 0x0 0x2 &UIC3 0x1 0x4 /* swizzled int B */
 318                                 0x0 0x0 0x0 0x3 &UIC3 0x2 0x4 /* swizzled int C */
 319                                 0x0 0x0 0x0 0x4 &UIC3 0x3 0x4 /* swizzled int D */>;
 320                 };
 321
 322                 PCIE1: pciex@d20000000 {
 323                         device_type = "pci";
 324                         #interrupt-cells = <1>;
 325                         #size-cells = <2>;
 326                         #address-cells = <3>;
 327                         compatible = "ibm,plb-pciex-440spe", "ibm,plb-pciex";
 328                         primary;
 329                         port = <0x1>; /* port number */
 330                         reg = <0x0000000d 0x20000000 0x20000000 /* Config space access */
 331                                0x0000000c 0x10001000 0x00001000>;       /* Registers */
 332                         dcr-reg = <0x120 0x020>;
 333                         sdr-base = <0x340>;
 334
 335                         /* Outbound ranges, one memory and one IO,
 336                          * later cannot be changed
 337                          */
 338                         ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x80000000 0x00000000 0x80000000
 339                                   0x01000000 0x00000000 0x00000000 0x0000000f 0x80010000 0x00000000 0x00010000>;
 340
 341                         /* Inbound 4GB range starting at 0 */
 342                         dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x1 0x00000000>;
 343
 344                         /* This drives busses 0x20 to 0x2f */
 345                         bus-range = <0x20 0x2f>;
 346
 347                         /* Legacy interrupts (note the weird polarity, the bridge seems
 348                          * to invert PCIe legacy interrupts).
 349                          * We are de-swizzling here because the numbers are actually for
 350                          * port of the root complex virtual P2P bridge. But I want
 351                          * to avoid putting a node for it in the tree, so the numbers
 352                          * below are basically de-swizzled numbers.
 353                          * The real slot is on idsel 0, so the swizzling is 1:1
 354                          */
 355                         interrupt-map-mask = <0x0 0x0 0x0 0x7>;
 356                         interrupt-map = <
 357                                 0x0 0x0 0x0 0x1 &UIC3 0x4 0x4 /* swizzled int A */
 358                                 0x0 0x0 0x0 0x2 &UIC3 0x5 0x4 /* swizzled int B */
 359                                 0x0 0x0 0x0 0x3 &UIC3 0x6 0x4 /* swizzled int C */
 360                                 0x0 0x0 0x0 0x4 &UIC3 0x7 0x4 /* swizzled int D */>;
 361                 };
 362
 363                 PCIE2: pciex@d40000000 {
 364                         device_type = "pci";
 365                         #interrupt-cells = <1>;
 366                         #size-cells = <2>;
 367                         #address-cells = <3>;
 368                         compatible = "ibm,plb-pciex-440spe", "ibm,plb-pciex";
 369                         primary;
 370                         port = <0x2>; /* port number */
 371                         reg = <0x0000000d 0x40000000 0x20000000 /* Config space access */
 372                                0x0000000c 0x10002000 0x00001000>;       /* Registers */
 373                         dcr-reg = <0x140 0x020>;
 374                         sdr-base = <0x370>;
 375
 376                         /* Outbound ranges, one memory and one IO,
 377                          * later cannot be changed
 378                          */
 379                         ranges = <0x02000000 0x00000000 0x80000000 0x0000000f 0x00000000 0x00000000 0x80000000
 380                                   0x01000000 0x00000000 0x00000000 0x0000000f 0x80020000 0x00000000 0x00010000>;
 381
 382                         /* Inbound 4GB range starting at 0 */
 383                         dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x1 0x00000000>;
 384
 385                         /* This drives busses 0x30 to 0x3f */
 386                         bus-range = <0x30 0x3f>;
 387
 388                         /* Legacy interrupts (note the weird polarity, the bridge seems
 389                          * to invert PCIe legacy interrupts).
 390                          * We are de-swizzling here because the numbers are actually for
 391                          * port of the root complex virtual P2P bridge. But I want
 392                          * to avoid putting a node for it in the tree, so the numbers
 393                          * below are basically de-swizzled numbers.
 394                          * The real slot is on idsel 0, so the swizzling is 1:1
 395                          */
 396                         interrupt-map-mask = <0x0 0x0 0x0 0x7>;
 397                         interrupt-map = <
 398                                 0x0 0x0 0x0 0x1 &UIC3 0x8 0x4 /* swizzled int A */
 399                                 0x0 0x0 0x0 0x2 &UIC3 0x9 0x4 /* swizzled int B */
 400                                 0x0 0x0 0x0 0x3 &UIC3 0xa 0x4 /* swizzled int C */
 401                                 0x0 0x0 0x0 0x4 &UIC3 0xb 0x4 /* swizzled int D */>;
 402                 };
 403         };
 404
 405         chosen {
 406                 linux,stdout-path = "/plb/opb/serial@10000200";
 407         };
 408 };