arch/arm/mach-omap2/devices.c

   1 /*
   2  * linux/arch/arm/mach-omap2/devices.c
   3  *
   4  * OMAP2 platform device setup/initialization
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  */
  11
  12 #include <linux/kernel.h>
  13 #include <linux/init.h>
  14 #include <linux/platform_device.h>
  15 #include <linux/io.h>
  16 #include <linux/clk.h>
  17 #include <linux/err.h>
  18
  19 #include <mach/hardware.h>
  20 #include <mach/irqs.h>
  21 #include <asm/mach-types.h>
  22 #include <asm/mach/map.h>
  23 #include <asm/pmu.h>
  24
  25 #include <plat/tc.h>
  26 #include <plat/board.h>
  27 #include <plat/mcbsp.h>
  28 #include <mach/gpio.h>
  29 #include <plat/mmc.h>
  30 #include <plat/dma.h>
  31 #include <plat/omap_hwmod.h>
  32 #include <plat/omap_device.h>
  33
  34 #include "mux.h"
  35 #include "control.h"
  36
  37 #include "devices.h"
  38
  39 #if defined(CONFIG_VIDEO_OMAP2) || defined(CONFIG_VIDEO_OMAP2_MODULE)
  40
  41 static struct resource cam_resources[] = {
  42         {
  43                 .start          = OMAP24XX_CAMERA_BASE,
  44                 .end            = OMAP24XX_CAMERA_BASE + 0xfff,
  45                 .flags          = IORESOURCE_MEM,
  46         },
  47         {
  48                 .start          = INT_24XX_CAM_IRQ,
  49                 .flags          = IORESOURCE_IRQ,
  50         }
  51 };
  52
  53 static struct platform_device omap_cam_device = {
  54         .name           = "omap24xxcam",
  55         .id             = -1,
  56         .num_resources  = ARRAY_SIZE(cam_resources),
  57         .resource       = cam_resources,
  58 };
  59
  60 static inline void omap_init_camera(void)
  61 {
  62         platform_device_register(&omap_cam_device);
  63 }
  64 #else
  65 static inline void omap_init_camera(void)
  66 {
  67 }
  68 #endif
  69
  70 static struct resource omap3isp_resources[] = {
  71         {
  72                 .start          = OMAP3430_ISP_BASE,
  73                 .end            = OMAP3430_ISP_END,
  74                 .flags          = IORESOURCE_MEM,
  75         },
  76         {
  77                 .start          = OMAP3430_ISP_CCP2_BASE,
  78                 .end            = OMAP3430_ISP_CCP2_END,
  79                 .flags          = IORESOURCE_MEM,
  80         },
  81         {
  82                 .start          = OMAP3430_ISP_CCDC_BASE,
  83                 .end            = OMAP3430_ISP_CCDC_END,
  84                 .flags          = IORESOURCE_MEM,
  85         },
  86         {
  87                 .start          = OMAP3430_ISP_HIST_BASE,
  88                 .end            = OMAP3430_ISP_HIST_END,
  89                 .flags          = IORESOURCE_MEM,
  90         },
  91         {
  92                 .start          = OMAP3430_ISP_H3A_BASE,
  93                 .end            = OMAP3430_ISP_H3A_END,
  94                 .flags          = IORESOURCE_MEM,
  95         },
  96         {
  97                 .start          = OMAP3430_ISP_PREV_BASE,
  98                 .end            = OMAP3430_ISP_PREV_END,
  99                 .flags          = IORESOURCE_MEM,
 100         },
 101         {
 102                 .start          = OMAP3430_ISP_RESZ_BASE,
 103                 .end            = OMAP3430_ISP_RESZ_END,
 104                 .flags          = IORESOURCE_MEM,
 105         },
 106         {
 107                 .start          = OMAP3430_ISP_SBL_BASE,
 108                 .end            = OMAP3430_ISP_SBL_END,
 109                 .flags          = IORESOURCE_MEM,
 110         },
 111         {
 112                 .start          = OMAP3430_ISP_CSI2A_REGS1_BASE,
 113                 .end            = OMAP3430_ISP_CSI2A_REGS1_END,
 114                 .flags          = IORESOURCE_MEM,
 115         },
 116         {
 117                 .start          = OMAP3430_ISP_CSIPHY2_BASE,
 118                 .end            = OMAP3430_ISP_CSIPHY2_END,
 119                 .flags          = IORESOURCE_MEM,
 120         },
 121         {
 122                 .start          = OMAP3630_ISP_CSI2A_REGS2_BASE,
 123                 .end            = OMAP3630_ISP_CSI2A_REGS2_END,
 124                 .flags          = IORESOURCE_MEM,
 125         },
 126         {
 127                 .start          = OMAP3630_ISP_CSI2C_REGS1_BASE,
 128                 .end            = OMAP3630_ISP_CSI2C_REGS1_END,
 129                 .flags          = IORESOURCE_MEM,
 130         },
 131         {
 132                 .start          = OMAP3630_ISP_CSIPHY1_BASE,
 133                 .end            = OMAP3630_ISP_CSIPHY1_END,
 134                 .flags          = IORESOURCE_MEM,
 135         },
 136         {
 137                 .start          = OMAP3630_ISP_CSI2C_REGS2_BASE,
 138                 .end            = OMAP3630_ISP_CSI2C_REGS2_END,
 139                 .flags          = IORESOURCE_MEM,
 140         },
 141         {
 142                 .start          = INT_34XX_CAM_IRQ,
 143                 .flags          = IORESOURCE_IRQ,
 144         }
 145 };
 146
 147 static struct platform_device omap3isp_device = {
 148         .name           = "omap3isp",
 149         .id             = -1,
 150         .num_resources  = ARRAY_SIZE(omap3isp_resources),
 151         .resource       = omap3isp_resources,
 152 };
 153
 154 int omap3_init_camera(struct isp_platform_data *pdata)
 155 {
 156         omap3isp_device.dev.platform_data = pdata;
 157         return platform_device_register(&omap3isp_device);
 158 }
 159
 160 #if defined(CONFIG_OMAP_MBOX_FWK) || defined(CONFIG_OMAP_MBOX_FWK_MODULE)
 161
 162 #define MBOX_REG_SIZE   0x120
 163
 164 #ifdef CONFIG_ARCH_OMAP2
 165 static struct resource omap2_mbox_resources[] = {
 166         {
 167                 .start          = OMAP24XX_MAILBOX_BASE,
 168                 .end            = OMAP24XX_MAILBOX_BASE + MBOX_REG_SIZE - 1,
 169                 .flags          = IORESOURCE_MEM,
 170         },
 171         {
 172                 .start          = INT_24XX_MAIL_U0_MPU,
 173                 .flags          = IORESOURCE_IRQ,
 174                 .name           = "dsp",
 175         },
 176         {
 177                 .start          = INT_24XX_MAIL_U3_MPU,
 178                 .flags          = IORESOURCE_IRQ,
 179                 .name           = "iva",
 180         },
 181 };
 182 static int omap2_mbox_resources_sz = ARRAY_SIZE(omap2_mbox_resources);
 183 #else
 184 #define omap2_mbox_resources            NULL
 185 #define omap2_mbox_resources_sz         0
 186 #endif
 187
 188 #ifdef CONFIG_ARCH_OMAP3
 189 static struct resource omap3_mbox_resources[] = {
 190         {
 191                 .start          = OMAP34XX_MAILBOX_BASE,
 192                 .end            = OMAP34XX_MAILBOX_BASE + MBOX_REG_SIZE - 1,
 193                 .flags          = IORESOURCE_MEM,
 194         },
 195         {
 196                 .start          = INT_24XX_MAIL_U0_MPU,
 197                 .flags          = IORESOURCE_IRQ,
 198                 .name           = "dsp",
 199         },
 200 };
 201 static int omap3_mbox_resources_sz = ARRAY_SIZE(omap3_mbox_resources);
 202 #else
 203 #define omap3_mbox_resources            NULL
 204 #define omap3_mbox_resources_sz         0
 205 #endif
 206
 207 #ifdef CONFIG_ARCH_OMAP4
 208
 209 #define OMAP4_MBOX_REG_SIZE     0x130
 210 static struct resource omap4_mbox_resources[] = {
 211         {
 212                 .start          = OMAP44XX_MAILBOX_BASE,
 213                 .end            = OMAP44XX_MAILBOX_BASE +
 214                                         OMAP4_MBOX_REG_SIZE - 1,
 215                 .flags          = IORESOURCE_MEM,
 216         },
 217         {
 218                 .start          = OMAP44XX_IRQ_MAIL_U0,
 219                 .flags          = IORESOURCE_IRQ,
 220                 .name           = "mbox",
 221         },
 222 };
 223 static int omap4_mbox_resources_sz = ARRAY_SIZE(omap4_mbox_resources);
 224 #else
 225 #define omap4_mbox_resources            NULL
 226 #define omap4_mbox_resources_sz         0
 227 #endif
 228
 229 static struct platform_device mbox_device = {
 230         .name           = "omap-mailbox",
 231         .id             = -1,
 232 };
 233
 234 static inline void omap_init_mbox(void)
 235 {
 236         if (cpu_is_omap24xx()) {
 237                 mbox_device.resource = omap2_mbox_resources;
 238                 mbox_device.num_resources = omap2_mbox_resources_sz;
 239         } else if (cpu_is_omap34xx()) {
 240                 mbox_device.resource = omap3_mbox_resources;
 241                 mbox_device.num_resources = omap3_mbox_resources_sz;
 242         } else if (cpu_is_omap44xx()) {
 243                 mbox_device.resource = omap4_mbox_resources;
 244                 mbox_device.num_resources = omap4_mbox_resources_sz;
 245         } else {
 246                 pr_err("%s: platform not supported\n", __func__);
 247                 return;
 248         }
 249         platform_device_register(&mbox_device);
 250 }
 251 #else
 252 static inline void omap_init_mbox(void) { }
 253 #endif /* CONFIG_OMAP_MBOX_FWK */
 254
 255 static inline void omap_init_sti(void) {}
 256
 257 #if defined(CONFIG_SND_SOC) || defined(CONFIG_SND_SOC_MODULE)
 258
 259 static struct platform_device omap_pcm = {
 260         .name   = "omap-pcm-audio",
 261         .id     = -1,
 262 };
 263
 264 /*
 265  * OMAP2420 has 2 McBSP ports
 266  * OMAP2430 has 5 McBSP ports
 267  * OMAP3 has 5 McBSP ports
 268  * OMAP4 has 4 McBSP ports
 269  */
 270 OMAP_MCBSP_PLATFORM_DEVICE(1);
 271 OMAP_MCBSP_PLATFORM_DEVICE(2);
 272 OMAP_MCBSP_PLATFORM_DEVICE(3);
 273 OMAP_MCBSP_PLATFORM_DEVICE(4);
 274 OMAP_MCBSP_PLATFORM_DEVICE(5);
 275
 276 static void omap_init_audio(void)
 277 {
 278         platform_device_register(&omap_mcbsp1);
 279         platform_device_register(&omap_mcbsp2);
 280         if (cpu_is_omap243x() || cpu_is_omap34xx() || cpu_is_omap44xx()) {
 281                 platform_device_register(&omap_mcbsp3);
 282                 platform_device_register(&omap_mcbsp4);
 283         }
 284         if (cpu_is_omap243x() || cpu_is_omap34xx())
 285                 platform_device_register(&omap_mcbsp5);
 286
 287         platform_device_register(&omap_pcm);
 288 }
 289
 290 #else
 291 static inline void omap_init_audio(void) {}
 292 #endif
 293
 294 #if defined(CONFIG_SPI_OMAP24XX) || defined(CONFIG_SPI_OMAP24XX_MODULE)
 295
 296 #include <plat/mcspi.h>
 297
 298 #define OMAP2_MCSPI1_BASE               0x48098000
 299 #define OMAP2_MCSPI2_BASE               0x4809a000
 300 #define OMAP2_MCSPI3_BASE               0x480b8000
 301 #define OMAP2_MCSPI4_BASE               0x480ba000
 302
 303 #define OMAP4_MCSPI1_BASE               0x48098100
 304 #define OMAP4_MCSPI2_BASE               0x4809a100
 305 #define OMAP4_MCSPI3_BASE               0x480b8100
 306 #define OMAP4_MCSPI4_BASE               0x480ba100
 307
 308 static struct omap2_mcspi_platform_config omap2_mcspi1_config = {
 309         .num_cs         = 4,
 310 };
 311
 312 static struct resource omap2_mcspi1_resources[] = {
 313         {
 314                 .start          = OMAP2_MCSPI1_BASE,
 315                 .end            = OMAP2_MCSPI1_BASE + 0xff,
 316                 .flags          = IORESOURCE_MEM,
 317         },
 318 };
 319
 320 static struct platform_device omap2_mcspi1 = {
 321         .name           = "omap2_mcspi",
 322         .id             = 1,
 323         .num_resources  = ARRAY_SIZE(omap2_mcspi1_resources),
 324         .resource       = omap2_mcspi1_resources,
 325         .dev            = {
 326                 .platform_data = &omap2_mcspi1_config,
 327         },
 328 };
 329
 330 static struct omap2_mcspi_platform_config omap2_mcspi2_config = {
 331         .num_cs         = 2,
 332 };
 333
 334 static struct resource omap2_mcspi2_resources[] = {
 335         {
 336                 .start          = OMAP2_MCSPI2_BASE,
 337                 .end            = OMAP2_MCSPI2_BASE + 0xff,
 338                 .flags          = IORESOURCE_MEM,
 339         },
 340 };
 341
 342 static struct platform_device omap2_mcspi2 = {
 343         .name           = "omap2_mcspi",
 344         .id             = 2,
 345         .num_resources  = ARRAY_SIZE(omap2_mcspi2_resources),
 346         .resource       = omap2_mcspi2_resources,
 347         .dev            = {
 348                 .platform_data = &omap2_mcspi2_config,
 349         },
 350 };
 351
 352 #if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3) || \
 353         defined(CONFIG_ARCH_OMAP4)
 354 static struct omap2_mcspi_platform_config omap2_mcspi3_config = {
 355         .num_cs         = 2,
 356 };
 357
 358 static struct resource omap2_mcspi3_resources[] = {
 359         {
 360         .start          = OMAP2_MCSPI3_BASE,
 361         .end            = OMAP2_MCSPI3_BASE + 0xff,
 362         .flags          = IORESOURCE_MEM,
 363         },
 364 };
 365
 366 static struct platform_device omap2_mcspi3 = {
 367         .name           = "omap2_mcspi",
 368         .id             = 3,
 369         .num_resources  = ARRAY_SIZE(omap2_mcspi3_resources),
 370         .resource       = omap2_mcspi3_resources,
 371         .dev            = {
 372                 .platform_data = &omap2_mcspi3_config,
 373         },
 374 };
 375 #endif
 376
 377 #if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4)
 378 static struct omap2_mcspi_platform_config omap2_mcspi4_config = {
 379         .num_cs         = 1,
 380 };
 381
 382 static struct resource omap2_mcspi4_resources[] = {
 383         {
 384                 .start          = OMAP2_MCSPI4_BASE,
 385                 .end            = OMAP2_MCSPI4_BASE + 0xff,
 386                 .flags          = IORESOURCE_MEM,
 387         },
 388 };
 389
 390 static struct platform_device omap2_mcspi4 = {
 391         .name           = "omap2_mcspi",
 392         .id             = 4,
 393         .num_resources  = ARRAY_SIZE(omap2_mcspi4_resources),
 394         .resource       = omap2_mcspi4_resources,
 395         .dev            = {
 396                 .platform_data = &omap2_mcspi4_config,
 397         },
 398 };
 399 #endif
 400
 401 #ifdef CONFIG_ARCH_OMAP4
 402 static inline void omap4_mcspi_fixup(void)
 403 {
 404         omap2_mcspi1_resources[0].start = OMAP4_MCSPI1_BASE;
 405         omap2_mcspi1_resources[0].end   = OMAP4_MCSPI1_BASE + 0xff;
 406         omap2_mcspi2_resources[0].start = OMAP4_MCSPI2_BASE;
 407         omap2_mcspi2_resources[0].end   = OMAP4_MCSPI2_BASE + 0xff;
 408         omap2_mcspi3_resources[0].start = OMAP4_MCSPI3_BASE;
 409         omap2_mcspi3_resources[0].end   = OMAP4_MCSPI3_BASE + 0xff;
 410         omap2_mcspi4_resources[0].start = OMAP4_MCSPI4_BASE;
 411         omap2_mcspi4_resources[0].end   = OMAP4_MCSPI4_BASE + 0xff;
 412 }
 413 #else
 414 static inline void omap4_mcspi_fixup(void)
 415 {
 416 }
 417 #endif
 418
 419 #if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3) || \
 420         defined(CONFIG_ARCH_OMAP4)
 421 static inline void omap2_mcspi3_init(void)
 422 {
 423         platform_device_register(&omap2_mcspi3);
 424 }
 425 #else
 426 static inline void omap2_mcspi3_init(void)
 427 {
 428 }
 429 #endif
 430
 431 #if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4)
 432 static inline void omap2_mcspi4_init(void)
 433 {
 434         platform_device_register(&omap2_mcspi4);
 435 }
 436 #else
 437 static inline void omap2_mcspi4_init(void)
 438 {
 439 }
 440 #endif
 441
 442 static void omap_init_mcspi(void)
 443 {
 444         if (cpu_is_omap44xx())
 445                 omap4_mcspi_fixup();
 446
 447         platform_device_register(&omap2_mcspi1);
 448         platform_device_register(&omap2_mcspi2);
 449
 450         if (cpu_is_omap2430() || cpu_is_omap343x() || cpu_is_omap44xx())
 451                 omap2_mcspi3_init();
 452
 453         if (cpu_is_omap343x() || cpu_is_omap44xx())
 454                 omap2_mcspi4_init();
 455 }
 456
 457 #else
 458 static inline void omap_init_mcspi(void) {}
 459 #endif
 460
 461 static struct resource omap2_pmu_resource = {
 462         .start  = 3,
 463         .end    = 3,
 464         .flags  = IORESOURCE_IRQ,
 465 };
 466
 467 static struct resource omap3_pmu_resource = {
 468         .start  = INT_34XX_BENCH_MPU_EMUL,
 469         .end    = INT_34XX_BENCH_MPU_EMUL,
 470         .flags  = IORESOURCE_IRQ,
 471 };
 472
 473 static struct platform_device omap_pmu_device = {
 474         .name           = "arm-pmu",
 475         .id             = ARM_PMU_DEVICE_CPU,
 476         .num_resources  = 1,
 477 };
 478
 479 static void omap_init_pmu(void)
 480 {
 481         if (cpu_is_omap24xx())
 482                 omap_pmu_device.resource = &omap2_pmu_resource;
 483         else if (cpu_is_omap34xx())
 484                 omap_pmu_device.resource = &omap3_pmu_resource;
 485         else
 486                 return;
 487
 488         platform_device_register(&omap_pmu_device);
 489 }
 490
 491
 492 #if defined(CONFIG_CRYPTO_DEV_OMAP_SHAM) || defined(CONFIG_CRYPTO_DEV_OMAP_SHAM_MODULE)
 493
 494 #ifdef CONFIG_ARCH_OMAP2
 495 static struct resource omap2_sham_resources[] = {
 496         {
 497                 .start  = OMAP24XX_SEC_SHA1MD5_BASE,
 498                 .end    = OMAP24XX_SEC_SHA1MD5_BASE + 0x64,
 499                 .flags  = IORESOURCE_MEM,
 500         },
 501         {
 502                 .start  = INT_24XX_SHA1MD5,
 503                 .flags  = IORESOURCE_IRQ,
 504         }
 505 };
 506 static int omap2_sham_resources_sz = ARRAY_SIZE(omap2_sham_resources);
 507 #else
 508 #define omap2_sham_resources            NULL
 509 #define omap2_sham_resources_sz         0
 510 #endif
 511
 512 #ifdef CONFIG_ARCH_OMAP3
 513 static struct resource omap3_sham_resources[] = {
 514         {
 515                 .start  = OMAP34XX_SEC_SHA1MD5_BASE,
 516                 .end    = OMAP34XX_SEC_SHA1MD5_BASE + 0x64,
 517                 .flags  = IORESOURCE_MEM,
 518         },
 519         {
 520                 .start  = INT_34XX_SHA1MD52_IRQ,
 521                 .flags  = IORESOURCE_IRQ,
 522         },
 523         {
 524                 .start  = OMAP34XX_DMA_SHA1MD5_RX,
 525                 .flags  = IORESOURCE_DMA,
 526         }
 527 };
 528 static int omap3_sham_resources_sz = ARRAY_SIZE(omap3_sham_resources);
 529 #else
 530 #define omap3_sham_resources            NULL
 531 #define omap3_sham_resources_sz         0
 532 #endif
 533
 534 static struct platform_device sham_device = {
 535         .name           = "omap-sham",
 536         .id             = -1,
 537 };
 538
 539 static void omap_init_sham(void)
 540 {
 541         if (cpu_is_omap24xx()) {
 542                 sham_device.resource = omap2_sham_resources;
 543                 sham_device.num_resources = omap2_sham_resources_sz;
 544         } else if (cpu_is_omap34xx()) {
 545                 sham_device.resource = omap3_sham_resources;
 546                 sham_device.num_resources = omap3_sham_resources_sz;
 547         } else {
 548                 pr_err("%s: platform not supported\n", __func__);
 549                 return;
 550         }
 551         platform_device_register(&sham_device);
 552 }
 553 #else
 554 static inline void omap_init_sham(void) { }
 555 #endif
 556
 557 #if defined(CONFIG_CRYPTO_DEV_OMAP_AES) || defined(CONFIG_CRYPTO_DEV_OMAP_AES_MODULE)
 558
 559 #ifdef CONFIG_ARCH_OMAP2
 560 static struct resource omap2_aes_resources[] = {
 561         {
 562                 .start  = OMAP24XX_SEC_AES_BASE,
 563                 .end    = OMAP24XX_SEC_AES_BASE + 0x4C,
 564                 .flags  = IORESOURCE_MEM,
 565         },
 566         {
 567                 .start  = OMAP24XX_DMA_AES_TX,
 568                 .flags  = IORESOURCE_DMA,
 569         },
 570         {
 571                 .start  = OMAP24XX_DMA_AES_RX,
 572                 .flags  = IORESOURCE_DMA,
 573         }
 574 };
 575 static int omap2_aes_resources_sz = ARRAY_SIZE(omap2_aes_resources);
 576 #else
 577 #define omap2_aes_resources             NULL
 578 #define omap2_aes_resources_sz          0
 579 #endif
 580
 581 #ifdef CONFIG_ARCH_OMAP3
 582 static struct resource omap3_aes_resources[] = {
 583         {
 584                 .start  = OMAP34XX_SEC_AES_BASE,
 585                 .end    = OMAP34XX_SEC_AES_BASE + 0x4C,
 586                 .flags  = IORESOURCE_MEM,
 587         },
 588         {
 589                 .start  = OMAP34XX_DMA_AES2_TX,
 590                 .flags  = IORESOURCE_DMA,
 591         },
 592         {
 593                 .start  = OMAP34XX_DMA_AES2_RX,
 594                 .flags  = IORESOURCE_DMA,
 595         }
 596 };
 597 static int omap3_aes_resources_sz = ARRAY_SIZE(omap3_aes_resources);
 598 #else
 599 #define omap3_aes_resources             NULL
 600 #define omap3_aes_resources_sz          0
 601 #endif
 602
 603 static struct platform_device aes_device = {
 604         .name           = "omap-aes",
 605         .id             = -1,
 606 };
 607
 608 static void omap_init_aes(void)
 609 {
 610         if (cpu_is_omap24xx()) {
 611                 aes_device.resource = omap2_aes_resources;
 612                 aes_device.num_resources = omap2_aes_resources_sz;
 613         } else if (cpu_is_omap34xx()) {
 614                 aes_device.resource = omap3_aes_resources;
 615                 aes_device.num_resources = omap3_aes_resources_sz;
 616         } else {
 617                 pr_err("%s: platform not supported\n", __func__);
 618                 return;
 619         }
 620         platform_device_register(&aes_device);
 621 }
 622
 623 #else
 624 static inline void omap_init_aes(void) { }
 625 #endif
 626
 627 /*-------------------------------------------------------------------------*/
 628
 629 #if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4)
 630
 631 #define MMCHS_SYSCONFIG                 0x0010
 632 #define MMCHS_SYSCONFIG_SWRESET         (1 << 1)
 633 #define MMCHS_SYSSTATUS                 0x0014
 634 #define MMCHS_SYSSTATUS_RESETDONE       (1 << 0)
 635
 636 static struct platform_device dummy_pdev = {
 637         .dev = {
 638                 .bus = &platform_bus_type,
 639         },
 640 };
 641
 642 /**
 643  * omap_hsmmc_reset() - Full reset of each HS-MMC controller
 644  *
 645  * Ensure that each MMC controller is fully reset.  Controllers
 646  * left in an unknown state (by bootloader) may prevent retention
 647  * or OFF-mode.  This is especially important in cases where the
 648  * MMC driver is not enabled, _or_ built as a module.
 649  *
 650  * In order for reset to work, interface, functional and debounce
 651  * clocks must be enabled.  The debounce clock comes from func_32k_clk
 652  * and is not under SW control, so we only enable i- and f-clocks.
 653  **/
 654 static void __init omap_hsmmc_reset(void)
 655 {
 656         u32 i, nr_controllers;
 657         struct clk *iclk, *fclk;
 658
 659         if (cpu_is_omap242x())
 660                 return;
 661
 662         nr_controllers = cpu_is_omap44xx() ? OMAP44XX_NR_MMC :
 663                 (cpu_is_omap34xx() ? OMAP34XX_NR_MMC : OMAP24XX_NR_MMC);
 664
 665         for (i = 0; i < nr_controllers; i++) {
 666                 u32 v, base = 0;
 667                 struct device *dev = &dummy_pdev.dev;
 668
 669                 switch (i) {
 670                 case 0:
 671                         base = OMAP2_MMC1_BASE;
 672                         break;
 673                 case 1:
 674                         base = OMAP2_MMC2_BASE;
 675                         break;
 676                 case 2:
 677                         base = OMAP3_MMC3_BASE;
 678                         break;
 679                 case 3:
 680                         if (!cpu_is_omap44xx())
 681                                 return;
 682                         base = OMAP4_MMC4_BASE;
 683                         break;
 684                 case 4:
 685                         if (!cpu_is_omap44xx())
 686                                 return;
 687                         base = OMAP4_MMC5_BASE;
 688                         break;
 689                 }
 690
 691                 if (cpu_is_omap44xx())
 692                         base += OMAP4_MMC_REG_OFFSET;
 693
 694                 dummy_pdev.id = i;
 695                 dev_set_name(&dummy_pdev.dev, "mmci-omap-hs.%d", i);
 696                 iclk = clk_get(dev, "ick");
 697                 if (IS_ERR(iclk))
 698                         goto err1;
 699                 if (clk_enable(iclk))
 700                         goto err2;
 701
 702                 fclk = clk_get(dev, "fck");
 703                 if (IS_ERR(fclk))
 704                         goto err3;
 705                 if (clk_enable(fclk))
 706                         goto err4;
 707
 708                 omap_writel(MMCHS_SYSCONFIG_SWRESET, base + MMCHS_SYSCONFIG);
 709                 v = omap_readl(base + MMCHS_SYSSTATUS);
 710                 while (!(omap_readl(base + MMCHS_SYSSTATUS) &
 711                          MMCHS_SYSSTATUS_RESETDONE))
 712                         cpu_relax();
 713
 714                 clk_disable(fclk);
 715                 clk_put(fclk);
 716                 clk_disable(iclk);
 717                 clk_put(iclk);
 718         }
 719         return;
 720
 721 err4:
 722         clk_put(fclk);
 723 err3:
 724         clk_disable(iclk);
 725 err2:
 726         clk_put(iclk);
 727 err1:
 728         printk(KERN_WARNING "%s: Unable to enable clocks for MMC%d, "
 729                             "cannot reset.\n",  __func__, i);
 730 }
 731 #else
 732 static inline void omap_hsmmc_reset(void) {}
 733 #endif
 734
 735 #if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE) || \
 736         defined(CONFIG_MMC_OMAP_HS) || defined(CONFIG_MMC_OMAP_HS_MODULE)
 737
 738 static inline void omap2_mmc_mux(struct omap_mmc_platform_data *mmc_controller,
 739                         int controller_nr)
 740 {
 741         if ((mmc_controller->slots[0].switch_pin > 0) && \
 742                 (mmc_controller->slots[0].switch_pin < OMAP_MAX_GPIO_LINES))
 743                 omap_mux_init_gpio(mmc_controller->slots[0].switch_pin,
 744                                         OMAP_PIN_INPUT_PULLUP);
 745         if ((mmc_controller->slots[0].gpio_wp > 0) && \
 746                 (mmc_controller->slots[0].gpio_wp < OMAP_MAX_GPIO_LINES))
 747                 omap_mux_init_gpio(mmc_controller->slots[0].gpio_wp,
 748                                         OMAP_PIN_INPUT_PULLUP);
 749
 750         if (cpu_is_omap2420() && controller_nr == 0) {
 751                 omap_mux_init_signal("sdmmc_cmd", 0);
 752                 omap_mux_init_signal("sdmmc_clki", 0);
 753                 omap_mux_init_signal("sdmmc_clko", 0);
 754                 omap_mux_init_signal("sdmmc_dat0", 0);
 755                 omap_mux_init_signal("sdmmc_dat_dir0", 0);
 756                 omap_mux_init_signal("sdmmc_cmd_dir", 0);
 757                 if (mmc_controller->slots[0].caps & MMC_CAP_4_BIT_DATA) {
 758                         omap_mux_init_signal("sdmmc_dat1", 0);
 759                         omap_mux_init_signal("sdmmc_dat2", 0);
 760                         omap_mux_init_signal("sdmmc_dat3", 0);
 761                         omap_mux_init_signal("sdmmc_dat_dir1", 0);
 762                         omap_mux_init_signal("sdmmc_dat_dir2", 0);
 763                         omap_mux_init_signal("sdmmc_dat_dir3", 0);
 764                 }
 765
 766                 /*
 767                  * Use internal loop-back in MMC/SDIO Module Input Clock
 768                  * selection
 769                  */
 770                 if (mmc_controller->slots[0].internal_clock) {
 771                         u32 v = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
 772                         v |= (1 << 24);
 773                         omap_ctrl_writel(v, OMAP2_CONTROL_DEVCONF0);
 774                 }
 775         }
 776
 777         if (cpu_is_omap34xx()) {
 778                 if (controller_nr == 0) {
 779                         omap_mux_init_signal("sdmmc1_clk",
 780                                 OMAP_PIN_INPUT_PULLUP);
 781                         omap_mux_init_signal("sdmmc1_cmd",
 782                                 OMAP_PIN_INPUT_PULLUP);
 783                         omap_mux_init_signal("sdmmc1_dat0",
 784                                 OMAP_PIN_INPUT_PULLUP);
 785                         if (mmc_controller->slots[0].caps &
 786                                 (MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA)) {
 787                                 omap_mux_init_signal("sdmmc1_dat1",
 788                                         OMAP_PIN_INPUT_PULLUP);
 789                                 omap_mux_init_signal("sdmmc1_dat2",
 790                                         OMAP_PIN_INPUT_PULLUP);
 791                                 omap_mux_init_signal("sdmmc1_dat3",
 792                                         OMAP_PIN_INPUT_PULLUP);
 793                         }
 794                         if (mmc_controller->slots[0].caps &
 795                                                 MMC_CAP_8_BIT_DATA) {
 796                                 omap_mux_init_signal("sdmmc1_dat4",
 797                                         OMAP_PIN_INPUT_PULLUP);
 798                                 omap_mux_init_signal("sdmmc1_dat5",
 799                                         OMAP_PIN_INPUT_PULLUP);
 800                                 omap_mux_init_signal("sdmmc1_dat6",
 801                                         OMAP_PIN_INPUT_PULLUP);
 802                                 omap_mux_init_signal("sdmmc1_dat7",
 803                                         OMAP_PIN_INPUT_PULLUP);
 804                         }
 805                 }
 806                 if (controller_nr == 1) {
 807                         /* MMC2 */
 808                         omap_mux_init_signal("sdmmc2_clk",
 809                                 OMAP_PIN_INPUT_PULLUP);
 810                         omap_mux_init_signal("sdmmc2_cmd",
 811                                 OMAP_PIN_INPUT_PULLUP);
 812                         omap_mux_init_signal("sdmmc2_dat0",
 813                                 OMAP_PIN_INPUT_PULLUP);
 814
 815                         /*
 816                          * For 8 wire configurations, Lines DAT4, 5, 6 and 7 need to be muxed
 817                          * in the board-*.c files
 818                          */
 819                         if (mmc_controller->slots[0].caps &
 820                                 (MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA)) {
 821                                 omap_mux_init_signal("sdmmc2_dat1",
 822                                         OMAP_PIN_INPUT_PULLUP);
 823                                 omap_mux_init_signal("sdmmc2_dat2",
 824                                         OMAP_PIN_INPUT_PULLUP);
 825                                 omap_mux_init_signal("sdmmc2_dat3",
 826                                         OMAP_PIN_INPUT_PULLUP);
 827                         }
 828                         if (mmc_controller->slots[0].caps &
 829                                                         MMC_CAP_8_BIT_DATA) {
 830                                 omap_mux_init_signal("sdmmc2_dat4.sdmmc2_dat4",
 831                                         OMAP_PIN_INPUT_PULLUP);
 832                                 omap_mux_init_signal("sdmmc2_dat5.sdmmc2_dat5",
 833                                         OMAP_PIN_INPUT_PULLUP);
 834                                 omap_mux_init_signal("sdmmc2_dat6.sdmmc2_dat6",
 835                                         OMAP_PIN_INPUT_PULLUP);
 836                                 omap_mux_init_signal("sdmmc2_dat7.sdmmc2_dat7",
 837                                         OMAP_PIN_INPUT_PULLUP);
 838                         }
 839                 }
 840
 841                 /*
 842                  * For MMC3 the pins need to be muxed in the board-*.c files
 843                  */
 844         }
 845 }
 846
 847 void __init omap2_init_mmc(struct omap_mmc_platform_data **mmc_data,
 848                         int nr_controllers)
 849 {
 850         int i;
 851         char *name;
 852
 853         for (i = 0; i < nr_controllers; i++) {
 854                 unsigned long base, size;
 855                 unsigned int irq = 0;
 856
 857                 if (!mmc_data[i])
 858                         continue;
 859
 860                 omap2_mmc_mux(mmc_data[i], i);
 861
 862                 switch (i) {
 863                 case 0:
 864                         base = OMAP2_MMC1_BASE;
 865                         irq = INT_24XX_MMC_IRQ;
 866                         break;
 867                 case 1:
 868                         base = OMAP2_MMC2_BASE;
 869                         irq = INT_24XX_MMC2_IRQ;
 870                         break;
 871                 case 2:
 872                         if (!cpu_is_omap44xx() && !cpu_is_omap34xx())
 873                                 return;
 874                         base = OMAP3_MMC3_BASE;
 875                         irq = INT_34XX_MMC3_IRQ;
 876                         break;
 877                 case 3:
 878                         if (!cpu_is_omap44xx())
 879                                 return;
 880                         base = OMAP4_MMC4_BASE;
 881                         irq = OMAP44XX_IRQ_MMC4;
 882                         break;
 883                 case 4:
 884                         if (!cpu_is_omap44xx())
 885                                 return;
 886                         base = OMAP4_MMC5_BASE;
 887                         irq = OMAP44XX_IRQ_MMC5;
 888                         break;
 889                 default:
 890                         continue;
 891                 }
 892
 893                 if (cpu_is_omap2420()) {
 894                         size = OMAP2420_MMC_SIZE;
 895                         name = "mmci-omap";
 896                 } else if (cpu_is_omap44xx()) {
 897                         if (i < 3)
 898                                 irq += OMAP44XX_IRQ_GIC_START;
 899                         size = OMAP4_HSMMC_SIZE;
 900                         name = "mmci-omap-hs";
 901                 } else {
 902                         size = OMAP3_HSMMC_SIZE;
 903                         name = "mmci-omap-hs";
 904                 }
 905                 omap_mmc_add(name, i, base, size, irq, mmc_data[i]);
 906         };
 907 }
 908
 909 #endif
 910
 911 /*-------------------------------------------------------------------------*/
 912
 913 #if defined(CONFIG_HDQ_MASTER_OMAP) || defined(CONFIG_HDQ_MASTER_OMAP_MODULE)
 914 #if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3430)
 915 #define OMAP_HDQ_BASE   0x480B2000
 916 #endif
 917 static struct resource omap_hdq_resources[] = {
 918         {
 919                 .start          = OMAP_HDQ_BASE,
 920                 .end            = OMAP_HDQ_BASE + 0x1C,
 921                 .flags          = IORESOURCE_MEM,
 922         },
 923         {
 924                 .start          = INT_24XX_HDQ_IRQ,
 925                 .flags          = IORESOURCE_IRQ,
 926         },
 927 };
 928 static struct platform_device omap_hdq_dev = {
 929         .name = "omap_hdq",
 930         .id = 0,
 931         .dev = {
 932                 .platform_data = NULL,
 933         },
 934         .num_resources  = ARRAY_SIZE(omap_hdq_resources),
 935         .resource       = omap_hdq_resources,
 936 };
 937 static inline void omap_hdq_init(void)
 938 {
 939         (void) platform_device_register(&omap_hdq_dev);
 940 }
 941 #else
 942 static inline void omap_hdq_init(void) {}
 943 #endif
 944
 945 /*---------------------------------------------------------------------------*/
 946
 947 #if defined(CONFIG_VIDEO_OMAP2_VOUT) || \
 948         defined(CONFIG_VIDEO_OMAP2_VOUT_MODULE)
 949 #if defined(CONFIG_FB_OMAP2) || defined(CONFIG_FB_OMAP2_MODULE)
 950 static struct resource omap_vout_resource[3 - CONFIG_FB_OMAP2_NUM_FBS] = {
 951 };
 952 #else
 953 static struct resource omap_vout_resource[2] = {
 954 };
 955 #endif
 956
 957 static struct platform_device omap_vout_device = {
 958         .name           = "omap_vout",
 959         .num_resources  = ARRAY_SIZE(omap_vout_resource),
 960         .resource       = &omap_vout_resource[0],
 961         .id             = -1,
 962 };
 963 static void omap_init_vout(void)
 964 {
 965         if (platform_device_register(&omap_vout_device) < 0)
 966                 printk(KERN_ERR "Unable to register OMAP-VOUT device\n");
 967 }
 968 #else
 969 static inline void omap_init_vout(void) {}
 970 #endif
 971
 972 /*-------------------------------------------------------------------------*/
 973
 974 static int __init omap2_init_devices(void)
 975 {
 976         /*
 977          * please keep these calls, and their implementations above,
 978          * in alphabetical order so they're easier to sort through.
 979          */
 980         omap_hsmmc_reset();
 981         omap_init_audio();
 982         omap_init_camera();
 983         omap_init_mbox();
 984         omap_init_mcspi();
 985         omap_init_pmu();
 986         omap_hdq_init();
 987         omap_init_sti();
 988         omap_init_sham();
 989         omap_init_aes();
 990         omap_init_vout();
 991
 992         return 0;
 993 }
 994 arch_initcall(omap2_init_devices);
 995
 996 #if defined(CONFIG_OMAP_WATCHDOG) || defined(CONFIG_OMAP_WATCHDOG_MODULE)
 997 static struct omap_device_pm_latency omap_wdt_latency[] = {
 998         [0] = {
 999                 .deactivate_func = omap_device_idle_hwmods,
1000                 .activate_func   = omap_device_enable_hwmods,
1001                 .flags           = OMAP_DEVICE_LATENCY_AUTO_ADJUST,
1002         },
1003 };
1004
1005 static int __init omap_init_wdt(void)
1006 {
1007         int id = -1;
1008         struct omap_device *od;
1009         struct omap_hwmod *oh;
1010         char *oh_name = "wd_timer2";
1011         char *dev_name = "omap_wdt";
1012
1013         if (!cpu_class_is_omap2())
1014                 return 0;
1015
1016         oh = omap_hwmod_lookup(oh_name);
1017         if (!oh) {
1018                 pr_err("Could not look up wd_timer%d hwmod\n", id);
1019                 return -EINVAL;
1020         }
1021
1022         od = omap_device_build(dev_name, id, oh, NULL, 0,
1023                                 omap_wdt_latency,
1024                                 ARRAY_SIZE(omap_wdt_latency), 0);
1025         WARN(IS_ERR(od), "Cant build omap_device for %s:%s.\n",
1026                                 dev_name, oh->name);
1027         return 0;
1028 }
1029 subsys_initcall(omap_init_wdt);
1030 #endif