1 include4/img_types.h | 5
2 include4/pdumpdefs.h | 1
3 include4/pvrmodule.h | 31
4 include4/pvrversion.h | 8
5 include4/services.h | 46
6 include4/servicesext.h | 6
7 include4/sgxapi_km.h | 65
8 services4/3rdparty/bufferclass_example/bufferclass_example.c | 32
9 services4/3rdparty/bufferclass_example/bufferclass_example.h | 25
10 services4/3rdparty/bufferclass_example/bufferclass_example_linux.c | 20
11 services4/3rdparty/bufferclass_example/bufferclass_example_private.c | 76 -
12 services4/3rdparty/bufferclass_example/kbuild/Makefile | 40
13 services4/3rdparty/dc_omap3430_linux/kbuild/Makefile | 39
14 services4/3rdparty/dc_omap3430_linux/omaplfb.h | 7
15 services4/3rdparty/dc_omap3430_linux/omaplfb_displayclass.c | 60
16 services4/3rdparty/dc_omap3430_linux/omaplfb_linux.c | 52
17 services4/include/pvr_bridge.h | 26
18 services4/include/servicesint.h | 17
19 services4/include/sgx_bridge.h | 95 +
20 services4/include/sgx_bridge_km.h | 139 -
21 services4/include/sgxinfo.h | 347 ++--
22 services4/srvkm/Makefile | 68
23 services4/srvkm/bridged/bridged_pvr_bridge.c | 732 ++++++++-
24 services4/srvkm/common/deviceclass.c | 6
25 services4/srvkm/common/devicemem.c | 3
26 services4/srvkm/common/handle.c | 58
27 services4/srvkm/common/power.c | 15
28 services4/srvkm/common/pvrsrv.c | 151 +-
29 services4/srvkm/common/queue.c | 4
30 services4/srvkm/common/resman.c | 13
31 services4/srvkm/devices/sgx/mmu.c | 2
32 services4/srvkm/devices/sgx/mmu.h | 2
33 services4/srvkm/devices/sgx/pb.c | 37
34 services4/srvkm/devices/sgx/sgx2dcore.c | 21
35 services4/srvkm/devices/sgx/sgx_bridge_km.h | 158 ++
36 services4/srvkm/devices/sgx/sgxinfokm.h | 146 +
37 services4/srvkm/devices/sgx/sgxinit.c | 734 ++--------
38 services4/srvkm/devices/sgx/sgxkick.c | 327 +++-
39 services4/srvkm/devices/sgx/sgxreset.c | 330 ++++
40 services4/srvkm/devices/sgx/sgxtransfer.c | 312 ++++
41 services4/srvkm/devices/sgx/sgxutils.c | 459 +++---
42 services4/srvkm/devices/sgx/sgxutils.h | 28
43 services4/srvkm/env/linux/env_data.h | 8
44 services4/srvkm/env/linux/event.c | 221 +++
45 services4/srvkm/env/linux/event.h | 32
46 services4/srvkm/env/linux/kbuild/Makefile | 81 +
47 services4/srvkm/env/linux/mm.c | 8
48 services4/srvkm/env/linux/module.c | 342 +++-
49 services4/srvkm/env/linux/osfunc.c | 347 +++-
50 services4/srvkm/env/linux/pdump.c | 13
51 services4/srvkm/env/linux/proc.c | 17
52 services4/srvkm/env/linux/pvr_debug.c | 2
53 services4/srvkm/hwdefs/sgxdefs.h | 4
54 services4/srvkm/hwdefs/sgxerrata.h | 9
55 services4/srvkm/hwdefs/sgxfeaturedefs.h | 11
56 services4/srvkm/include/device.h | 35
57 services4/srvkm/include/handle.h | 10
58 services4/srvkm/include/osfunc.h | 32
59 services4/srvkm/include/pdump_km.h | 2
60 services4/srvkm/include/resman.h | 5
61 services4/srvkm/include/srvkm.h | 4
62 services4/system/include/syscommon.h | 2
63 services4/system/omap3430/sysconfig.c | 24
64 services4/system/omap3430/sysconfig.h | 7
65 services4/system/omap3430/sysutils.c | 2
66 65 files changed, 4286 insertions(+), 1675 deletions(-)
69 diff -Nurd git/drivers/gpu/pvr/include4/img_types.h git/drivers/gpu/pvr/include4/img_types.h
70 --- git/drivers/gpu/pvr/include4/img_types.h 2009-01-05 20:00:44.000000000 +0100
71 +++ git/drivers/gpu/pvr/include4/img_types.h 2008-12-18 15:47:29.000000000 +0100
73 typedef signed long IMG_INT32, *IMG_PINT32;
77 +#if !defined(USE_CODE)
78 + typedef unsigned long long IMG_UINT64, *IMG_PUINT64;
79 + typedef long long IMG_INT64, *IMG_PINT64;
83 #error("define an OS")
84 diff -Nurd git/drivers/gpu/pvr/include4/pdumpdefs.h git/drivers/gpu/pvr/include4/pdumpdefs.h
85 --- git/drivers/gpu/pvr/include4/pdumpdefs.h 2009-01-05 20:00:44.000000000 +0100
86 +++ git/drivers/gpu/pvr/include4/pdumpdefs.h 2008-12-18 15:47:29.000000000 +0100
88 PVRSRV_PDUMP_MEM_FORMAT_RESERVED = 1,
89 PVRSRV_PDUMP_MEM_FORMAT_TILED = 8,
90 PVRSRV_PDUMP_MEM_FORMAT_TWIDDLED = 9,
91 + PVRSRV_PDUMP_MEM_FORMAT_HYBRID = 10,
93 PVRSRV_PDUMP_MEM_FORMAT_FORCE_I32 = 0x7fffffff
95 diff -Nurd git/drivers/gpu/pvr/include4/pvrmodule.h git/drivers/gpu/pvr/include4/pvrmodule.h
96 --- git/drivers/gpu/pvr/include4/pvrmodule.h 1970-01-01 01:00:00.000000000 +0100
97 +++ git/drivers/gpu/pvr/include4/pvrmodule.h 2008-12-18 15:47:29.000000000 +0100
99 +/**********************************************************************
101 + * Copyright(c) 2008 Imagination Technologies Ltd. All rights reserved.
103 + * This program is free software; you can redistribute it and/or modify it
104 + * under the terms and conditions of the GNU General Public License,
105 + * version 2, as published by the Free Software Foundation.
107 + * This program is distributed in the hope it will be useful but, except
108 + * as otherwise stated in writing, without any warranty; without even the
109 + * implied warranty of merchantability or fitness for a particular purpose.
110 + * See the GNU General Public License for more details.
112 + * You should have received a copy of the GNU General Public License along with
113 + * this program; if not, write to the Free Software Foundation, Inc.,
114 + * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
116 + * The full GNU General Public License is included in this distribution in
117 + * the file called "COPYING".
119 + * Contact Information:
120 + * Imagination Technologies Ltd. <gpl-support@imgtec.com>
121 + * Home Park Estate, Kings Langley, Herts, WD4 8LZ, UK
123 + ******************************************************************************/
125 +#ifndef _PVRMODULE_H_
126 +#define _PVRMODULE_H_
127 +MODULE_AUTHOR("Imagination Technologies Ltd. <gpl-support@imgtec.com>");
128 +MODULE_LICENSE("GPL");
130 diff -Nurd git/drivers/gpu/pvr/include4/pvrversion.h git/drivers/gpu/pvr/include4/pvrversion.h
131 --- git/drivers/gpu/pvr/include4/pvrversion.h 2009-01-05 20:00:44.000000000 +0100
132 +++ git/drivers/gpu/pvr/include4/pvrversion.h 2008-12-18 15:47:29.000000000 +0100
134 #define _PVRVERSION_H_
136 #define PVRVERSION_MAJ 1
137 -#define PVRVERSION_MIN 1
138 -#define PVRVERSION_BRANCH 11
139 -#define PVRVERSION_BUILD 970
140 -#define PVRVERSION_STRING "1.1.11.970"
141 +#define PVRVERSION_MIN 2
142 +#define PVRVERSION_BRANCH 12
143 +#define PVRVERSION_BUILD 838
144 +#define PVRVERSION_STRING "1.2.12.838"
148 diff -Nurd git/drivers/gpu/pvr/include4/servicesext.h git/drivers/gpu/pvr/include4/servicesext.h
149 --- git/drivers/gpu/pvr/include4/servicesext.h 2009-01-05 20:00:44.000000000 +0100
150 +++ git/drivers/gpu/pvr/include4/servicesext.h 2008-12-18 15:47:29.000000000 +0100
152 PVRSRV_PIXEL_FORMAT_V8U8,
153 PVRSRV_PIXEL_FORMAT_V16U16,
154 PVRSRV_PIXEL_FORMAT_QWVU8888,
155 + PVRSRV_PIXEL_FORMAT_XLVU8888,
156 + PVRSRV_PIXEL_FORMAT_QWVU16,
157 PVRSRV_PIXEL_FORMAT_D16,
158 PVRSRV_PIXEL_FORMAT_D24S8,
159 PVRSRV_PIXEL_FORMAT_D24X8,
161 PVRSRV_PIXEL_FORMAT_YUY2,
162 PVRSRV_PIXEL_FORMAT_DXT23,
163 PVRSRV_PIXEL_FORMAT_DXT45,
164 - PVRSRV_PIXEL_FORMAT_G32R32F,
165 + PVRSRV_PIXEL_FORMAT_G32R32F,
166 + PVRSRV_PIXEL_FORMAT_NV11,
167 + PVRSRV_PIXEL_FORMAT_NV12,
169 PVRSRV_PIXEL_FORMAT_FORCE_I32 = 0x7fffffff,
170 } PVRSRV_PIXEL_FORMAT;
171 diff -Nurd git/drivers/gpu/pvr/include4/services.h git/drivers/gpu/pvr/include4/services.h
172 --- git/drivers/gpu/pvr/include4/services.h 2009-01-05 20:00:44.000000000 +0100
173 +++ git/drivers/gpu/pvr/include4/services.h 2008-12-18 15:47:29.000000000 +0100
175 #include "pdumpdefs.h"
178 -#if defined(SERVICES4)
179 #define IMG_CONST const
184 #define PVRSRV_MAX_CMD_SIZE 1024
186 #define PVRSRV_MAX_DEVICES 16
188 +#define EVENTOBJNAME_MAXLENGTH (50)
190 #define PVRSRV_MEM_READ (1<<0)
191 #define PVRSRV_MEM_WRITE (1<<1)
192 #define PVRSRV_MEM_CACHE_CONSISTENT (1<<2)
194 #define PVRSRV_MISC_INFO_TIMER_PRESENT (1<<0)
195 #define PVRSRV_MISC_INFO_CLOCKGATE_PRESENT (1<<1)
196 #define PVRSRV_MISC_INFO_MEMSTATS_PRESENT (1<<2)
197 +#define PVRSRV_MISC_INFO_GLOBALEVENTOBJECT_PRESENT (1<<3)
199 #define PVRSRV_PDUMP_MAX_FILENAME_SIZE 20
200 #define PVRSRV_PDUMP_MAX_COMMENT_SIZE 200
202 IMG_OPENGLES2 = 0x00000003,
203 IMG_D3DM = 0x00000004,
204 IMG_SRV_UM = 0x00000005,
205 - IMG_OPENVG = 0x00000006
206 + IMG_OPENVG = 0x00000006,
207 + IMG_SRVCLIENT = 0x00000007,
215 -#if defined(SERVICES4)
217 IMG_PVOID pvLinAddrKM;
221 IMG_DEV_VIRTADDR sDevVAddr;
224 } PVRSRV_DEVICE_IDENTIFIER;
226 +typedef struct _PVRSRV_EVENTOBJECT_
229 + IMG_CHAR szName[EVENTOBJNAME_MAXLENGTH];
231 + IMG_HANDLE hOSEventKM;
233 +} PVRSRV_EVENTOBJECT;
235 typedef struct _PVRSRV_MISC_INFO_
238 IMG_UINT32 ui32MemoryStrLen;
241 + PVRSRV_EVENTOBJECT sGlobalEventObject;
242 + IMG_HANDLE hOSGlobalEvent;
250 PVRSRV_ERROR IMG_CALLCONV PVRSRVConnect(PVRSRV_CONNECTION *psConnection);
253 PVRSRV_ERROR IMG_CALLCONV PVRSRVGetMiscInfo (IMG_CONST PVRSRV_CONNECTION *psConnection, PVRSRV_MISC_INFO *psMiscInfo);
256 -PVRSRV_ERROR IMG_CALLCONV PVRSRVReleaseMiscInfo (PVRSRV_MISC_INFO *psMiscInfo);
257 +PVRSRV_ERROR IMG_CALLCONV PVRSRVReleaseMiscInfo (IMG_CONST PVRSRV_CONNECTION *psConnection, PVRSRV_MISC_INFO *psMiscInfo);
265 -PVRSRV_ERROR PollForValue (volatile IMG_UINT32 *pui32LinMemAddr,
266 +PVRSRV_ERROR PollForValue ( PVRSRV_CONNECTION *psConnection,
267 + IMG_HANDLE hOSEvent,
268 + volatile IMG_UINT32 *pui32LinMemAddr,
269 IMG_UINT32 ui32Value,
271 IMG_UINT32 ui32Waitus,
272 @@ -631,21 +644,18 @@
273 IMG_UINT32 ui32RegValue,
274 IMG_UINT32 ui32Flags);
278 PVRSRV_ERROR IMG_CALLCONV PVRSRVPDumpRegPolWithFlags(IMG_CONST PVRSRV_CONNECTION *psConnection,
279 IMG_UINT32 ui32RegAddr,
280 IMG_UINT32 ui32RegValue,
282 IMG_UINT32 ui32Flags);
285 PVRSRV_ERROR IMG_CALLCONV PVRSRVPDumpRegPol(IMG_CONST PVRSRV_CONNECTION *psConnection,
286 IMG_UINT32 ui32RegAddr,
287 IMG_UINT32 ui32RegValue,
288 IMG_UINT32 ui32Mask);
292 PVRSRV_ERROR IMG_CALLCONV PVRSRVPDumpPDReg(IMG_CONST PVRSRV_CONNECTION *psConnection,
293 IMG_UINT32 ui32RegAddr,
295 PVRSRV_CLIENT_MEM_INFO *psMemInfo,
296 IMG_UINT32 ui32Offset,
297 IMG_DEV_PHYADDR sPDDevPAddr);
301 PVRSRV_ERROR IMG_CALLCONV PVRSRVPDumpMemPages(IMG_CONST PVRSRV_CONNECTION *psConnection,
303 IMG_CONST IMG_CHAR *pszComment,
304 IMG_BOOL bContinuous);
306 -#if defined(SERVICES4)
308 PVRSRV_ERROR IMG_CALLCONV PVRSRVPDumpCommentf(IMG_CONST PVRSRV_CONNECTION *psConnection,
309 IMG_BOOL bContinuous,
311 PVRSRV_ERROR IMG_CALLCONV PVRSRVPDumpCommentWithFlagsf(IMG_CONST PVRSRV_CONNECTION *psConnection,
312 IMG_UINT32 ui32Flags,
313 IMG_CONST IMG_CHAR *pszFormat, ...);
317 PVRSRV_ERROR IMG_CALLCONV PVRSRVPDumpDriverInfo(IMG_CONST PVRSRV_CONNECTION *psConnection,
320 IMG_UINT32 ui32PDumpFlags);
325 IMG_BOOL IMG_CALLCONV PVRSRVPDumpIsCapturingTest(IMG_CONST PVRSRV_CONNECTION *psConnection);
328 PVRSRV_ERROR IMG_CALLCONV PVRSRVPDumpCycleCountRegRead(IMG_CONST PVRSRV_CONNECTION *psConnection,
329 IMG_UINT32 ui32RegOffset,
330 IMG_BOOL bLastFrame);
333 IMG_IMPORT IMG_HANDLE PVRSRVLoadLibrary(IMG_CHAR *pszLibraryName);
334 IMG_IMPORT PVRSRV_ERROR PVRSRVUnloadLibrary(IMG_HANDLE hExtDrv);
336 IMG_PVOID PVRSRVReallocUserModeMemTracking(IMG_VOID *pvMem, IMG_UINT32 ui32NewSize, IMG_CHAR *pszFileName, IMG_UINT32 ui32LineNumber);
339 -PVRSRV_ERROR PVRSRVEventObjectWait(PVRSRV_CONNECTION *psConnection,
340 - IMG_HANDLE hOSEvent,
341 - IMG_UINT32 ui32MSTimeout);
343 +PVRSRV_ERROR PVRSRVEventObjectWait(PVRSRV_CONNECTION * psConnection,
344 + IMG_HANDLE hOSEvent);
346 #define TIME_NOT_PASSED_UINT32(a,b,c) ((a - b) < c)
348 diff -Nurd git/drivers/gpu/pvr/include4/sgxapi_km.h git/drivers/gpu/pvr/include4/sgxapi_km.h
349 --- git/drivers/gpu/pvr/include4/sgxapi_km.h 2009-01-05 20:00:44.000000000 +0100
350 +++ git/drivers/gpu/pvr/include4/sgxapi_km.h 2008-12-18 15:47:29.000000000 +0100
356 #if defined(__linux__) && !defined(USE_CODE)
357 #if defined(__KERNEL__)
358 #include <asm/unistd.h>
360 #define SGX_MAX_TA_STATUS_VALS 32
361 #define SGX_MAX_3D_STATUS_VALS 2
363 +#define SGX_MAX_SRC_SYNCS 4
365 #define PFLAGS_POWERDOWN 0x00000001
366 #define PFLAGS_POWERUP 0x00000002
369 IMG_SYS_PHYADDR sPhysBase;
372 +#ifdef SUPPORT_SGX_HWPERF
374 +#define PVRSRV_SGX_HWPERF_CBSIZE 0x100
376 +#define PVRSRV_SGX_HWPERF_INVALID 1
377 +#define PVRSRV_SGX_HWPERF_TRANSFER 2
378 +#define PVRSRV_SGX_HWPERF_TA 3
379 +#define PVRSRV_SGX_HWPERF_3D 4
381 +#define PVRSRV_SGX_HWPERF_ON 0x40
384 +typedef struct _PVRSRV_SGX_HWPERF_CBDATA_
386 + IMG_UINT32 ui32FrameNo;
387 + IMG_UINT32 ui32Type;
388 + IMG_UINT32 ui32StartTimeWraps;
389 + IMG_UINT32 ui32StartTime;
390 + IMG_UINT32 ui32EndTimeWraps;
391 + IMG_UINT32 ui32EndTime;
392 + IMG_UINT32 ui32ClockSpeed;
393 + IMG_UINT32 ui32TimeMax;
394 +} PVRSRV_SGX_HWPERF_CBDATA;
396 +typedef struct _PVRSRV_SGX_HWPERF_CB_
398 + IMG_UINT32 ui32Woff;
399 + IMG_UINT32 ui32Roff;
400 + PVRSRV_SGX_HWPERF_CBDATA psHWPerfCBData[PVRSRV_SGX_HWPERF_CBSIZE];
401 +} PVRSRV_SGX_HWPERF_CB;
404 +typedef struct _SGX_MISC_INFO_HWPERF_RETRIEVE_CB
406 + PVRSRV_SGX_HWPERF_CBDATA* psHWPerfData;
407 + IMG_UINT32 ui32ArraySize;
408 + IMG_UINT32 ui32DataCount;
409 + IMG_UINT32 ui32Time;
410 +} SGX_MISC_INFO_HWPERF_RETRIEVE_CB;
414 typedef enum _SGX_MISC_INFO_REQUEST_
416 + SGX_MISC_INFO_REQUEST_CLOCKSPEED = 0,
417 +#ifdef SUPPORT_SGX_HWPERF
418 + SGX_MISC_INFO_REQUEST_HWPERF_CB_ON,
419 + SGX_MISC_INFO_REQUEST_HWPERF_CB_OFF,
420 + SGX_MISC_INFO_REQUEST_HWPERF_RETRIEVE_CB,
422 SGX_MISC_INFO_REQUEST_FORCE_I16 = 0x7fff
423 } SGX_MISC_INFO_REQUEST;
426 typedef struct _SGX_MISC_INFO_
428 SGX_MISC_INFO_REQUEST eRequest;
433 + IMG_UINT32 ui32SGXClockSpeed;
434 +#ifdef SUPPORT_SGX_HWPERF
435 + SGX_MISC_INFO_HWPERF_RETRIEVE_CB sRetrieveCB;
441 } PVR3DIF4_KICKTA_PDUMP, *PPVR3DIF4_KICKTA_PDUMP;
444 +#if defined(TRANSFER_QUEUE)
445 +#if defined(SGX_FEATURE_2D_HARDWARE)
446 +#define SGX_MAX_2D_BLIT_CMD_SIZE 26
447 +#define SGX_MAX_2D_SRC_SYNC_OPS 3
449 +#define SGX_MAX_TRANSFER_STATUS_VALS 64
450 +#define SGX_MAX_TRANSFER_SYNC_OPS 5
453 #if defined (__cplusplus)
456 diff -Nurd git/drivers/gpu/pvr/services4/3rdparty/bufferclass_example/bufferclass_example.c git/drivers/gpu/pvr/services4/3rdparty/bufferclass_example/bufferclass_example.c
457 --- git/drivers/gpu/pvr/services4/3rdparty/bufferclass_example/bufferclass_example.c 2009-01-05 20:00:44.000000000 +0100
458 +++ git/drivers/gpu/pvr/services4/3rdparty/bufferclass_example/bufferclass_example.c 2008-12-18 15:47:29.000000000 +0100
459 @@ -197,11 +197,27 @@
460 return PVRSRV_ERROR_OUT_OF_MEMORY;
465 + psDevInfo->sBufferInfo.pixelformat = BC_EXAMPLE_PIXELFORMAT;
466 + psDevInfo->sBufferInfo.ui32Width = BC_EXAMPLE_WIDTH;
467 + psDevInfo->sBufferInfo.ui32Height = BC_EXAMPLE_HEIGHT;
468 + psDevInfo->sBufferInfo.ui32ByteStride = BC_EXAMPLE_STRIDE;
469 + psDevInfo->sBufferInfo.ui32BufferDeviceID = BC_EXAMPLE_DEVICEID;
470 + psDevInfo->sBufferInfo.ui32Flags = PVRSRV_BC_FLAGS_YUVCSC_FULL_RANGE | PVRSRV_BC_FLAGS_YUVCSC_BT601;
472 for(i=0; i < BC_EXAMPLE_NUM_BUFFERS; i++)
474 + IMG_UINT32 ui32Size = BC_EXAMPLE_HEIGHT * BC_EXAMPLE_STRIDE;
476 + if(psDevInfo->sBufferInfo.pixelformat == PVRSRV_PIXEL_FORMAT_YUV420)
479 + ui32Size += ((BC_EXAMPLE_STRIDE >> 1) * (BC_EXAMPLE_HEIGHT >> 1) << 1);
483 - if (AllocContigMemory(BC_EXAMPLE_HEIGHT * BC_EXAMPLE_STRIDE,
484 + if (AllocContigMemory(ui32Size,
485 &psDevInfo->psSystemBuffer[i].hMemHandle,
486 &psDevInfo->psSystemBuffer[i].sCPUVAddr,
487 &sSystemBufferCPUPAddr) != PVRSRV_OK)
488 @@ -211,12 +227,14 @@
490 psDevInfo->ui32NumBuffers++;
492 - psDevInfo->psSystemBuffer[i].ui32Size = BC_EXAMPLE_HEIGHT * BC_EXAMPLE_STRIDE;
493 + psDevInfo->psSystemBuffer[i].ui32Size = ui32Size;
494 psDevInfo->psSystemBuffer[i].sSysAddr = CpuPAddrToSysPAddr(sSystemBufferCPUPAddr);
495 psDevInfo->psSystemBuffer[i].sPageAlignSysAddr.uiAddr = (psDevInfo->psSystemBuffer[i].sSysAddr.uiAddr & 0xFFFFF000);
496 psDevInfo->psSystemBuffer[i].psSyncData = IMG_NULL;
499 + psDevInfo->sBufferInfo.ui32BufferCount = psDevInfo->ui32NumBuffers;
503 psDevInfo->sBCJTable.ui32TableSize = sizeof(PVRSRV_BC_SRV2BUFFER_KMJTABLE);
506 return PVRSRV_ERROR_DEVICE_REGISTER_FAILED;
511 - psDevInfo->sBufferInfo.pixelformat = BC_EXAMPLE_PIXELFORMAT;
512 - psDevInfo->sBufferInfo.ui32Width = BC_EXAMPLE_WIDTH;
513 - psDevInfo->sBufferInfo.ui32Height = BC_EXAMPLE_HEIGHT;
514 - psDevInfo->sBufferInfo.ui32ByteStride = BC_EXAMPLE_STRIDE;
515 - psDevInfo->sBufferInfo.ui32BufferDeviceID = BC_EXAMPLE_DEVICEID;
516 - psDevInfo->sBufferInfo.ui32Flags = PVRSRV_BC_FLAGS_YUVCSC_FULL_RANGE | PVRSRV_BC_FLAGS_YUVCSC_BT601;
517 - psDevInfo->sBufferInfo.ui32BufferCount = psDevInfo->ui32NumBuffers;
521 diff -Nurd git/drivers/gpu/pvr/services4/3rdparty/bufferclass_example/bufferclass_example.h git/drivers/gpu/pvr/services4/3rdparty/bufferclass_example/bufferclass_example.h
522 --- git/drivers/gpu/pvr/services4/3rdparty/bufferclass_example/bufferclass_example.h 2009-01-05 20:00:44.000000000 +0100
523 +++ git/drivers/gpu/pvr/services4/3rdparty/bufferclass_example/bufferclass_example.h 2008-12-18 15:47:29.000000000 +0100
526 #define BC_EXAMPLE_NUM_BUFFERS 3
528 -#define BC_EXAMPLE_WIDTH (160)
532 +#define BC_EXAMPLE_WIDTH (320)
533 #define BC_EXAMPLE_HEIGHT (160)
534 -#define BC_EXAMPLE_STRIDE (160*2)
535 +#define BC_EXAMPLE_STRIDE (320)
536 +#define BC_EXAMPLE_PIXELFORMAT (PVRSRV_PIXEL_FORMAT_YUV420)
541 +#define BC_EXAMPLE_WIDTH (320)
542 +#define BC_EXAMPLE_HEIGHT (160)
543 +#define BC_EXAMPLE_STRIDE (320*2)
544 #define BC_EXAMPLE_PIXELFORMAT (PVRSRV_PIXEL_FORMAT_YVYU)
548 +#define BC_EXAMPLE_WIDTH (320)
549 +#define BC_EXAMPLE_HEIGHT (160)
550 +#define BC_EXAMPLE_STRIDE (320*2)
551 +#define BC_EXAMPLE_PIXELFORMAT (PVRSRV_PIXEL_FORMAT_RGB565)
556 #define BC_EXAMPLE_DEVICEID 0
559 diff -Nurd git/drivers/gpu/pvr/services4/3rdparty/bufferclass_example/bufferclass_example_linux.c git/drivers/gpu/pvr/services4/3rdparty/bufferclass_example/bufferclass_example_linux.c
560 --- git/drivers/gpu/pvr/services4/3rdparty/bufferclass_example/bufferclass_example_linux.c 2009-01-05 20:00:44.000000000 +0100
561 +++ git/drivers/gpu/pvr/services4/3rdparty/bufferclass_example/bufferclass_example_linux.c 2008-12-18 15:47:29.000000000 +0100
564 #include "bufferclass_example.h"
565 #include "bufferclass_example_linux.h"
566 +#include "pvrmodule.h"
568 #define DEVNAME "bc_example"
570 -MODULE_AUTHOR("Imagination Technologies Ltd. <gpl-support@imgtec.com>");
571 -MODULE_LICENSE("GPL");
572 MODULE_SUPPORTED_DEVICE(DEVNAME);
574 int BC_Example_Bridge(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg);
575 @@ -259,22 +258,11 @@
577 return PVRSRV_ERROR_OUT_OF_MEMORY;
582 - IMG_VOID *pvEnd = pvLinAddr + ui32Size;
584 - for(pvPage = pvLinAddr; pvPage < pvEnd; pvPage += PAGE_SIZE)
586 - SetPageReserved(virt_to_page(pvPage));
589 - pPhysAddr->uiAddr = dma;
590 - *pLinAddr = pvLinAddr;
591 + pPhysAddr->uiAddr = dma;
592 + *pLinAddr = pvLinAddr;
596 - return PVRSRV_ERROR_OUT_OF_MEMORY;
601 diff -Nurd git/drivers/gpu/pvr/services4/3rdparty/bufferclass_example/bufferclass_example_private.c git/drivers/gpu/pvr/services4/3rdparty/bufferclass_example/bufferclass_example_private.c
602 --- git/drivers/gpu/pvr/services4/3rdparty/bufferclass_example/bufferclass_example_private.c 2009-01-05 20:00:44.000000000 +0100
603 +++ git/drivers/gpu/pvr/services4/3rdparty/bufferclass_example/bufferclass_example_private.c 2008-12-18 15:47:29.000000000 +0100
606 #include "bufferclass_example.h"
608 +void FillYUV420Image(void *pvDest, int width, int height, int bytestride)
610 + static int iPhase = 0;
612 + unsigned char u,v,y;
613 + unsigned char *pui8y = (unsigned char *)pvDest;
614 + unsigned short *pui16uv;
615 + unsigned int count = 0;
617 + for(j=0;j<height;j++)
619 + for(i=0;i<width;i++)
621 + y = (((i+iPhase)>>6)%(2)==0)? 0x7f:0x00;
623 + pui8y[count++] = y;
627 + pui16uv = (unsigned short *)((unsigned char *)pvDest + (width * height));
630 + for(j=0;j<height;j+=2)
632 + for(i=0;i<width;i+=2)
634 + u = (j<(height/2))? ((i<(width/2))? 0xFF:0x33) : ((i<(width/2))? 0x33:0xAA);
635 + v = (j<(height/2))? ((i<(width/2))? 0xAC:0x0) : ((i<(width/2))? 0x03:0xEE);
638 + pui16uv[count++] = (v << 8) | u;
646 void FillYUV422Image(void *pvDest, int width, int height, int bytestride)
650 for(y=0;y<height;y++)
652 - for(x=0;x<width >> 1;x++)
653 + for(x=0;x<width;x+=2)
655 - u = (y<(height/2))? ((x<(width/4))? 0xFF:0x33) : ((x<(width/4))? 0x33:0xAA);
656 - v = (y<(height/2))? ((x<(width/4))? 0xAA:0x0) : ((x<(width/4))? 0x03:0xEE);
657 + u = (y<(height/2))? ((x<(width/2))? 0xFF:0x33) : ((x<(width/2))? 0x33:0xAA);
658 + v = (y<(height/2))? ((x<(width/2))? 0xAA:0x0) : ((x<(width/2))? 0x03:0xEE);
660 - y0 = y1 = (((x+iPhase)>>4)%(2)==0)? 0x7f:0x00;
661 + y0 = y1 = (((x+iPhase)>>6)%(2)==0)? 0x7f:0x00;
664 pui32yuv[count++] = (y1 << 24) | (v << 16) | (y0 << 8) | u;
665 @@ -115,19 +152,36 @@
667 psSyncData = psBuffer->psSyncData;
673 + if(psSyncData->ui32ReadOpsPending != psSyncData->ui32ReadOpsComplete)
679 psSyncData->ui32WriteOpsPending++;
682 - if(psBufferInfo->pixelformat == PVRSRV_PIXEL_FORMAT_RGB565)
684 - FillRGB565Image(psBuffer->sCPUVAddr, BC_EXAMPLE_WIDTH, BC_EXAMPLE_HEIGHT, BC_EXAMPLE_STRIDE);
687 + switch(psBufferInfo->pixelformat)
689 - FillYUV422Image(psBuffer->sCPUVAddr, BC_EXAMPLE_WIDTH, BC_EXAMPLE_HEIGHT, BC_EXAMPLE_STRIDE);
690 + case PVRSRV_PIXEL_FORMAT_RGB565:
693 + FillRGB565Image(psBuffer->sCPUVAddr, BC_EXAMPLE_WIDTH, BC_EXAMPLE_HEIGHT, BC_EXAMPLE_STRIDE);
696 + case PVRSRV_PIXEL_FORMAT_YVYU:
698 + FillYUV422Image(psBuffer->sCPUVAddr, BC_EXAMPLE_WIDTH, BC_EXAMPLE_HEIGHT, BC_EXAMPLE_STRIDE);
701 + case PVRSRV_PIXEL_FORMAT_YUV420:
703 + FillYUV420Image(psBuffer->sCPUVAddr, BC_EXAMPLE_WIDTH, BC_EXAMPLE_HEIGHT, BC_EXAMPLE_STRIDE);
709 diff -Nurd git/drivers/gpu/pvr/services4/3rdparty/bufferclass_example/kbuild/Makefile git/drivers/gpu/pvr/services4/3rdparty/bufferclass_example/kbuild/Makefile
710 --- git/drivers/gpu/pvr/services4/3rdparty/bufferclass_example/kbuild/Makefile 1970-01-01 01:00:00.000000000 +0100
711 +++ git/drivers/gpu/pvr/services4/3rdparty/bufferclass_example/kbuild/Makefile 2008-12-18 15:47:29.000000000 +0100
714 +# Copyright(c) 2008 Imagination Technologies Ltd. All rights reserved.
716 +# This program is free software; you can redistribute it and/or modify it
717 +# under the terms and conditions of the GNU General Public License,
718 +# version 2, as published by the Free Software Foundation.
720 +# This program is distributed in the hope it will be useful but, except
721 +# as otherwise stated in writing, without any warranty; without even the
722 +# implied warranty of merchantability or fitness for a particular purpose.
723 +# See the GNU General Public License for more details.
725 +# You should have received a copy of the GNU General Public License along with
726 +# this program; if not, write to the Free Software Foundation, Inc.,
727 +# 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
729 +# The full GNU General Public License is included in this distribution in
730 +# the file called "COPYING".
732 +# Contact Information:
733 +# Imagination Technologies Ltd. <gpl-support@imgtec.com>
734 +# Home Park Estate, Kings Langley, Herts, WD4 8LZ, UK
741 +INCLUDES = -I$(EURASIAROOT)/include4 \
742 + -I$(EURASIAROOT)/services4/include \
743 + -I$(EURASIAROOT)/services4/system/$(PVR_SYSTEM) \
744 + -I$(EURASIAROOT)/services4/system/include \
746 +SOURCES = ../bufferclass_example.c \
747 + ../bufferclass_example_linux.c \
748 + ../bufferclass_example_private.c
753 diff -Nurd git/drivers/gpu/pvr/services4/3rdparty/dc_omap3430_linux/kbuild/Makefile git/drivers/gpu/pvr/services4/3rdparty/dc_omap3430_linux/kbuild/Makefile
754 --- git/drivers/gpu/pvr/services4/3rdparty/dc_omap3430_linux/kbuild/Makefile 1970-01-01 01:00:00.000000000 +0100
755 +++ git/drivers/gpu/pvr/services4/3rdparty/dc_omap3430_linux/kbuild/Makefile 2008-12-18 15:47:29.000000000 +0100
758 +# Copyright(c) 2008 Imagination Technologies Ltd. All rights reserved.
760 +# This program is free software; you can redistribute it and/or modify it
761 +# under the terms and conditions of the GNU General Public License,
762 +# version 2, as published by the Free Software Foundation.
764 +# This program is distributed in the hope it will be useful but, except
765 +# as otherwise stated in writing, without any warranty; without even the
766 +# implied warranty of merchantability or fitness for a particular purpose.
767 +# See the GNU General Public License for more details.
769 +# You should have received a copy of the GNU General Public License along with
770 +# this program; if not, write to the Free Software Foundation, Inc.,
771 +# 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
773 +# The full GNU General Public License is included in this distribution in
774 +# the file called "COPYING".
776 +# Contact Information:
777 +# Imagination Technologies Ltd. <gpl-support@imgtec.com>
778 +# Home Park Estate, Kings Langley, Herts, WD4 8LZ, UK
785 +INCLUDES = -I$(EURASIAROOT)/include4 \
786 + -I$(EURASIAROOT)/services4/include \
787 + -I$(EURASIAROOT)/services4/system/$(PVR_SYSTEM) \
788 + -I$(EURASIAROOT)/services4/system/include \
790 +SOURCES = ../omaplfb_displayclass.c \
796 diff -Nurd git/drivers/gpu/pvr/services4/3rdparty/dc_omap3430_linux/omaplfb_displayclass.c git/drivers/gpu/pvr/services4/3rdparty/dc_omap3430_linux/omaplfb_displayclass.c
797 --- git/drivers/gpu/pvr/services4/3rdparty/dc_omap3430_linux/omaplfb_displayclass.c 2009-01-05 20:00:44.000000000 +0100
798 +++ git/drivers/gpu/pvr/services4/3rdparty/dc_omap3430_linux/omaplfb_displayclass.c 2008-12-18 15:47:29.000000000 +0100
800 #define DISPLAY_DEVICE_NAME "PowerVR OMAP Linux Display Driver"
802 #define DRIVER_PREFIX "omaplfb"
803 +//extern int omap2_disp_get_output_dev(int);
805 static IMG_VOID *gpvAnchor;
808 PVR_POWER_STATE eCurrentPowerState);
811 -extern void omap_dispc_set_plane_base(int plane, IMG_UINT32 phys_addr);
813 static PFN_DC_GET_PVRJTABLE pfnGetPVRJTable = IMG_NULL;
815 static OMAPLFB_DEVINFO * GetAnchorPtr(IMG_VOID)
816 @@ -124,28 +123,53 @@
817 static PVRSRV_ERROR Flip(OMAPLFB_SWAPCHAIN *psSwapChain,
820 - if (1 /* omap2_disp_get_output_dev(OMAP2_GRAPHICS) == OMAP2_OUTPUT_LCD */)
821 + IMG_UINT32 control;
822 + OMAPLFB_DEVINFO *psDevInfo;
824 + psDevInfo = GetAnchorPtr();
826 + if (1) //omap2_disp_get_output_dev(OMAP2_GRAPHICS) == OMAP2_OUTPUT_LCD)
828 - omap_dispc_set_plane_base(0, aPhyAddr);
829 + OMAPLFBVSyncWriteReg(psSwapChain, OMAPLCD_GFX_BA0, aPhyAddr);
831 + OMAPLFBVSyncWriteReg(psSwapChain, OMAPLCD_GFX_BA1, aPhyAddr);
833 + control = OMAPLFBVSyncReadReg(psSwapChain, OMAPLCD_CONTROL);
834 + control |= OMAP_CONTROL_GOLCD;
835 + OMAPLFBVSyncWriteReg(psSwapChain, OMAPLCD_CONTROL, control);
840 - if (0 /*omap2_disp_get_output_dev(OMAP2_GRAPHICS) == OMAP2_OUTPUT_TV*/)
841 + if (0) //omap2_disp_get_output_dev(OMAP2_GRAPHICS) == OMAP2_OUTPUT_TV)
843 - omap_dispc_set_plane_base(0, aPhyAddr);
844 + OMAPLFBVSyncWriteReg(psSwapChain, OMAPLCD_GFX_BA0, aPhyAddr);
845 + OMAPLFBVSyncWriteReg(psSwapChain, OMAPLCD_GFX_BA1, aPhyAddr + psDevInfo->sFBInfo.ui32ByteStride);
847 + control = OMAPLFBVSyncReadReg(psSwapChain, OMAPLCD_CONTROL);
848 + control |= OMAP_CONTROL_GODIGITAL;
849 + OMAPLFBVSyncWriteReg(psSwapChain, OMAPLCD_CONTROL, control);
855 return PVRSRV_ERROR_INVALID_PARAMS;
858 static IMG_VOID EnableVSyncInterrupt(OMAPLFB_SWAPCHAIN *psSwapChain)
862 + IMG_UINT32 ui32InterruptEnable = OMAPLFBVSyncReadReg(psSwapChain, OMAPLCD_IRQENABLE);
863 + ui32InterruptEnable |= OMAPLCD_INTMASK_VSYNC;
864 + OMAPLFBVSyncWriteReg(psSwapChain, OMAPLCD_IRQENABLE, ui32InterruptEnable );
867 static IMG_VOID DisableVSyncInterrupt(OMAPLFB_SWAPCHAIN *psSwapChain)
870 + IMG_UINT32 ui32InterruptEnable = OMAPLFBVSyncReadReg(psSwapChain, OMAPLCD_IRQENABLE);
871 + ui32InterruptEnable &= ~(OMAPLCD_INTMASK_VSYNC);
872 + OMAPLFBVSyncWriteReg(psSwapChain, OMAPLCD_IRQENABLE, ui32InterruptEnable);
875 static PVRSRV_ERROR OpenDCDevice(IMG_UINT32 ui32DeviceID,
881 memset(&psDevInfo->sLINNotifBlock, 0, sizeof(psDevInfo->sLINNotifBlock));
883 psDevInfo->sLINNotifBlock.notifier_call = FrameBufferEvents;
885 PVR_UNREFERENCED_PARAMETER(ui32OEMFlags);
886 PVR_UNREFERENCED_PARAMETER(pui32SwapChainID);
893 || psDstSurfAttrib->sDims.ui32Width != psDevInfo->sDisplayDim.ui32Width
894 || psDstSurfAttrib->sDims.ui32Height != psDevInfo->sDisplayDim.ui32Height)
897 return PVRSRV_ERROR_INVALID_PARAMS;
901 || psDstSurfAttrib->sDims.ui32Width != psSrcSurfAttrib->sDims.ui32Width
902 || psDstSurfAttrib->sDims.ui32Height != psSrcSurfAttrib->sDims.ui32Height)
905 return PVRSRV_ERROR_INVALID_PARAMS;
908 @@ -467,12 +495,21 @@
912 + psSwapChain->pvRegs = ioremap(psDevInfo->psLINFBInfo->fix.mmio_start, psDevInfo->psLINFBInfo->fix.mmio_len);
914 + if (psSwapChain->pvRegs == IMG_NULL)
916 + printk(KERN_WARNING DRIVER_PREFIX ": Couldn't map registers needed for flipping\n");
917 + goto ErrorFreeVSyncItems;
921 unblank_display(psDevInfo);
923 if (OMAPLFBInstallVSyncISR(psSwapChain) != PVRSRV_OK)
925 printk(KERN_WARNING DRIVER_PREFIX ": ISR handler failed to register\n");
926 - goto ErrorFreeVSyncItems;
927 + goto ErrorUnmapRegisters;
930 EnableVSyncInterrupt(psSwapChain);
935 +ErrorUnmapRegisters:
936 + iounmap(psSwapChain->pvRegs);
938 OMAPLFBFreeKernelMem(psVSyncFlips);
944 + iounmap(psSwapChain->pvRegs);
947 OMAPLFBFreeKernelMem(psSwapChain->psVSyncFlips);
948 OMAPLFBFreeKernelMem(psSwapChain->psBuffer);
949 OMAPLFBFreeKernelMem(psSwapChain);
950 diff -Nurd git/drivers/gpu/pvr/services4/3rdparty/dc_omap3430_linux/omaplfb.h git/drivers/gpu/pvr/services4/3rdparty/dc_omap3430_linux/omaplfb.h
951 --- git/drivers/gpu/pvr/services4/3rdparty/dc_omap3430_linux/omaplfb.h 2009-01-05 20:00:44.000000000 +0100
952 +++ git/drivers/gpu/pvr/services4/3rdparty/dc_omap3430_linux/omaplfb.h 2008-12-18 15:47:29.000000000 +0100
954 IMG_UINT32 ui32RemoveIndex;
960 PVRSRV_DC_DISP2SRV_KMJTABLE *psPVRJTable;
965 IMG_VOID *OMAPLFBAllocKernelMem(IMG_UINT32 ui32Size);
966 IMG_VOID OMAPLFBFreeKernelMem(IMG_VOID *pvMem);
967 -IMG_VOID OMAPLFBWriteReg(OMAPLFB_SWAPCHAIN *psSwapChain, IMG_UINT32 ui32Offset, IMG_UINT32 ui32Value);
968 -IMG_UINT32 OMAPLFBReadReg(OMAPLFB_SWAPCHAIN *psSwapChain, IMG_UINT32 ui32Offset);
969 +IMG_VOID OMAPLFBVSyncWriteReg(OMAPLFB_SWAPCHAIN *psSwapChain, IMG_UINT32 ui32Offset, IMG_UINT32 ui32Value);
970 +IMG_UINT32 OMAPLFBVSyncReadReg(OMAPLFB_SWAPCHAIN *psSwapChain, IMG_UINT32 ui32Offset);
971 PVRSRV_ERROR OMAPLFBGetLibFuncAddr(IMG_CHAR *szFunctionName, PFN_DC_GET_PVRJTABLE *ppfnFuncTable);
972 PVRSRV_ERROR OMAPLFBInstallVSyncISR (OMAPLFB_SWAPCHAIN *psSwapChain);
973 PVRSRV_ERROR OMAPLFBUninstallVSyncISR(OMAPLFB_SWAPCHAIN *psSwapChain);
974 diff -Nurd git/drivers/gpu/pvr/services4/3rdparty/dc_omap3430_linux/omaplfb_linux.c git/drivers/gpu/pvr/services4/3rdparty/dc_omap3430_linux/omaplfb_linux.c
975 --- git/drivers/gpu/pvr/services4/3rdparty/dc_omap3430_linux/omaplfb_linux.c 2009-01-05 20:00:44.000000000 +0100
976 +++ git/drivers/gpu/pvr/services4/3rdparty/dc_omap3430_linux/omaplfb_linux.c 2008-12-18 15:47:29.000000000 +0100
977 @@ -101,28 +100,57 @@
981 -OMAPLFBVSyncISR(void *arg)
982 +OMAPLFBVSyncISR(void *arg, struct pt_regs *regs)
984 - (void) OMAPLFBVSyncIHandler((OMAPLFB_SWAPCHAIN *)arg);
985 + OMAPLFB_SWAPCHAIN *psSwapChain= (OMAPLFB_SWAPCHAIN *)arg;
987 + (void) OMAPLFBVSyncIHandler(psSwapChain);
990 -#define DISPC_IRQ_VSYNC 0x0002
992 PVRSRV_ERROR OMAPLFBInstallVSyncISR(OMAPLFB_SWAPCHAIN *psSwapChain)
995 - if (omap_dispc_request_irq(DISPC_IRQ_VSYNC, OMAPLFBVSyncISR, psSwapChain) != 0)
996 - return PVRSRV_ERROR_OUT_OF_MEMORY; /* not worth a proper mapping */
998 + if (1) //omap2_disp_get_output_dev(OMAP2_GRAPHICS) == OMAP2_OUTPUT_LCD)
1000 + if (omap_dispc_request_irq(DISPC_IRQ_VSYNC, OMAPLFBVSyncISR,
1001 + psSwapChain) != 0)
1003 + printk("request OMAPLCD IRQ failed");
1004 + return PVRSRV_ERROR_INIT_FAILURE;
1008 + if (0) //omap2_disp_get_output_dev(OMAP2_GRAPHICS) == OMAP2_OUTPUT_TV)
1010 + if (omap_dispc_request_irq(DISPC_IRQSTATUS_EVSYNC_EVEN|DISPC_IRQSTATUS_EVSYNC_ODD, OMAPLFBVSyncISR, psSwapChain) != 0)
1012 + printk("request OMAPLCD IRQ failed");
1013 + return PVRSRV_ERROR_INIT_FAILURE;
1021 PVRSRV_ERROR OMAPLFBUninstallVSyncISR (OMAPLFB_SWAPCHAIN *psSwapChain)
1023 - omap_dispc_free_irq(DISPC_IRQ_VSYNC, OMAPLFBVSyncISR, psSwapChain);
1024 + omap_dispc_free_irq(DISPC_IRQ_VSYNC, OMAPLFBVSyncISR, psSwapChain);
1030 +IMG_VOID OMAPLFBVSyncWriteReg(OMAPLFB_SWAPCHAIN *psSwapChain, IMG_UINT32 ui32Offset, IMG_UINT32 ui32Value)
1032 + IMG_VOID *pvRegAddr = (IMG_VOID *)((IMG_UINT8 *)psSwapChain->pvRegs + ui32Offset);
1035 + writel(ui32Value, pvRegAddr);
1038 +IMG_UINT32 OMAPLFBVSyncReadReg(OMAPLFB_SWAPCHAIN *psSwapChain, IMG_UINT32 ui32Offset)
1040 + return readl((IMG_UINT8 *)psSwapChain->pvRegs + ui32Offset);
1043 module_init(OMAPLFB_Init);
1044 diff -Nurd git/drivers/gpu/pvr/services4/include/pvr_bridge.h git/drivers/gpu/pvr/services4/include/pvr_bridge.h
1045 --- git/drivers/gpu/pvr/services4/include/pvr_bridge.h 2009-01-05 20:00:44.000000000 +0100
1046 +++ git/drivers/gpu/pvr/services4/include/pvr_bridge.h 2008-12-18 15:47:29.000000000 +0100
1047 @@ -202,14 +202,14 @@
1049 #define PVRSRV_BRIDGE_EVENT_OBJECT_CMD_FIRST (PVRSRV_BRIDGE_INITSRV_CMD_LAST+1)
1050 #define PVRSRV_BRIDGE_EVENT_OBJECT_WAIT PVRSRV_IOWR(PVRSRV_BRIDGE_EVENT_OBJECT_CMD_FIRST+0)
1051 -#define PVRSRV_BRIDGE_EVENT_OBJECT_CONNECT PVRSRV_IOWR(PVRSRV_BRIDGE_EVENT_OBJECT_CMD_FIRST+1)
1052 -#define PVRSRV_BRIDGE_EVENT_OBJECT_DISCONNECT PVRSRV_IOWR(PVRSRV_BRIDGE_EVENT_OBJECT_CMD_FIRST+2)
1053 +#define PVRSRV_BRIDGE_EVENT_OBJECT_OPEN PVRSRV_IOWR(PVRSRV_BRIDGE_EVENT_OBJECT_CMD_FIRST+1)
1054 +#define PVRSRV_BRIDGE_EVENT_OBJECT_CLOSE PVRSRV_IOWR(PVRSRV_BRIDGE_EVENT_OBJECT_CMD_FIRST+2)
1055 #define PVRSRV_BRIDGE_EVENT_OBJECT_CMD_LAST (PVRSRV_BRIDGE_EVENT_OBJECT_CMD_FIRST+2)
1057 #define PVRSRV_BRIDGE_LAST_NON_DEVICE_CMD (PVRSRV_BRIDGE_EVENT_OBJECT_CMD_LAST+1)
1060 -#define PVRSRV_KERNAL_MODE_CLIENT 1
1061 +#define PVRSRV_KERNEL_MODE_CLIENT 1
1063 typedef struct PVRSRV_BRIDGE_RETURN_TAG
1066 typedef struct PVRSRV_BRIDGE_IN_PDUMP_DUMPPDDEVPADDR_TAG
1068 IMG_UINT32 ui32BridgeFlags;
1069 - IMG_HANDLE *hKernelMemInfo;
1070 + IMG_HANDLE hKernelMemInfo;
1071 IMG_UINT32 ui32Offset;
1072 IMG_DEV_PHYADDR sPDDevPAddr;
1073 }PVRSRV_BRIDGE_IN_PDUMP_DUMPPDDEVPADDR;
1074 @@ -1302,9 +1302,25 @@
1076 IMG_UINT32 ui32BridgeFlags;
1077 IMG_HANDLE hOSEventKM;
1078 - IMG_UINT32 ui32MSTimeout;
1079 } PVRSRV_BRIDGE_IN_EVENT_OBJECT_WAIT;
1081 +typedef struct PVRSRV_BRIDGE_IN_EVENT_OBJECT_OPEN_TAG
1083 + PVRSRV_EVENTOBJECT sEventObject;
1084 +} PVRSRV_BRIDGE_IN_EVENT_OBJECT_OPEN;
1086 +typedef struct PVRSRV_BRIDGE_OUT_EVENT_OBJECT_OPEN_TAG
1088 + IMG_HANDLE hOSEvent;
1089 + PVRSRV_ERROR eError;
1090 +} PVRSRV_BRIDGE_OUT_EVENT_OBJECT_OPEN;
1092 +typedef struct PVRSRV_BRIDGE_IN_EVENT_OBJECT_CLOSE_TAG
1094 + PVRSRV_EVENTOBJECT sEventObject;
1095 + IMG_HANDLE hOSEventKM;
1096 +} PVRSRV_BRIDGE_IN_EVENT_OBJECT_CLOSE;
1098 #if defined (__cplusplus)
1101 diff -Nurd git/drivers/gpu/pvr/services4/include/servicesint.h git/drivers/gpu/pvr/services4/include/servicesint.h
1102 --- git/drivers/gpu/pvr/services4/include/servicesint.h 2009-01-05 20:00:44.000000000 +0100
1103 +++ git/drivers/gpu/pvr/services4/include/servicesint.h 2008-12-18 15:47:29.000000000 +0100
1106 #define DRIVERNAME_MAXLENGTH (100)
1108 -#define EVENTOBJNAME_MAXLENGTH (50)
1111 -typedef struct _PVRSRV_EVENTOBJECT_
1114 - IMG_CHAR szName[EVENTOBJNAME_MAXLENGTH];
1116 - IMG_HANDLE hOSEventKM;
1117 -} PVRSRV_EVENTOBJECT;
1120 typedef struct _PVRSRV_KERNEL_MEM_INFO_
1123 } PVRSRV_KERNEL_SYNC_INFO;
1125 +typedef struct _PVRSRV_DEVICE_SYNC_OBJECT_
1127 + IMG_UINT32 ui32ReadOpPendingVal;
1128 + IMG_DEV_VIRTADDR sReadOpsCompleteDevVAddr;
1129 + IMG_UINT32 ui32WriteOpPendingVal;
1130 + IMG_DEV_VIRTADDR sWriteOpsCompleteDevVAddr;
1131 +} PVRSRV_DEVICE_SYNC_OBJECT;
1133 typedef struct _PVRSRV_SYNC_OBJECT
1135 diff -Nurd git/drivers/gpu/pvr/services4/include/sgx_bridge.h git/drivers/gpu/pvr/services4/include/sgx_bridge.h
1136 --- git/drivers/gpu/pvr/services4/include/sgx_bridge.h 2009-01-05 20:00:44.000000000 +0100
1137 +++ git/drivers/gpu/pvr/services4/include/sgx_bridge.h 2008-12-18 15:47:29.000000000 +0100
1139 #define PVRSRV_BRIDGE_SGX_REGISTER_HW_RENDER_CONTEXT PVRSRV_IOWR(PVRSRV_BRIDGE_SGX_CMD_BASE+20)
1140 #define PVRSRV_BRIDGE_SGX_FLUSH_HW_RENDER_TARGET PVRSRV_IOWR(PVRSRV_BRIDGE_SGX_CMD_BASE+21)
1141 #define PVRSRV_BRIDGE_SGX_UNREGISTER_HW_RENDER_CONTEXT PVRSRV_IOWR(PVRSRV_BRIDGE_SGX_CMD_BASE+22)
1142 +#if defined(SGX_FEATURE_2D_HARDWARE)
1143 +#define PVRSRV_BRIDGE_SGX_SUBMIT2D PVRSRV_IOWR(PVRSRV_BRIDGE_SGX_CMD_BASE+23)
1144 +#define PVRSRV_BRIDGE_SGX_REGISTER_HW_2D_CONTEXT PVRSRV_IOWR(PVRSRV_BRIDGE_SGX_CMD_BASE+24)
1145 +#define PVRSRV_BRIDGE_SGX_UNREGISTER_HW_2D_CONTEXT PVRSRV_IOWR(PVRSRV_BRIDGE_SGX_CMD_BASE+25)
1147 +#define PVRSRV_BRIDGE_SGX_REGISTER_HW_TRANSFER_CONTEXT PVRSRV_IOWR(PVRSRV_BRIDGE_SGX_CMD_BASE+26)
1148 +#define PVRSRV_BRIDGE_SGX_UNREGISTER_HW_TRANSFER_CONTEXT PVRSRV_IOWR(PVRSRV_BRIDGE_SGX_CMD_BASE+27)
1149 +#define PVRSRV_BRIDGE_SGX_READ_HWPERF_COUNTERS PVRSRV_IOWR(PVRSRV_BRIDGE_SGX_CMD_BASE+28)
1151 -#define PVRSRV_BRIDGE_LAST_SGX_CMD (PVRSRV_BRIDGE_SGX_CMD_BASE+22)
1152 +#define PVRSRV_BRIDGE_LAST_SGX_CMD (PVRSRV_BRIDGE_SGX_CMD_BASE+28)
1155 typedef struct PVRSRV_BRIDGE_IN_GETPHYSPAGEADDR
1156 @@ -161,8 +169,18 @@
1158 IMG_UINT32 ui32BridgeFlags;
1159 IMG_HANDLE hDevCookie;
1160 - IMG_DEV_VIRTADDR sHWRenderContextDevVAddr;
1161 + PVRSRV_TRANSFER_SGX_KICK sKick;
1162 }PVRSRV_BRIDGE_IN_SUBMITTRANSFER;
1164 +#if defined(SGX_FEATURE_2D_HARDWARE)
1166 +typedef struct PVRSRV_BRIDGE_IN_SUBMIT2D_TAG
1168 + IMG_UINT32 ui32BridgeFlags;
1169 + IMG_HANDLE hDevCookie;
1170 + PVRSRV_2D_SGX_KICK sKick;
1171 +} PVRSRV_BRIDGE_IN_SUBMIT2D;
1176 @@ -330,6 +348,33 @@
1177 IMG_HANDLE hHWRenderContext;
1178 }PVRSRV_BRIDGE_OUT_SGX_REGISTER_HW_RENDER_CONTEXT;
1180 +typedef struct PVRSRV_BRIDGE_IN_SGX_UNREGISTER_HW_RENDER_CONTEXT_TAG
1182 + IMG_UINT32 ui32BridgeFlags;
1183 + IMG_HANDLE hDevCookie;
1184 + IMG_HANDLE hHWRenderContext;
1185 +}PVRSRV_BRIDGE_IN_SGX_UNREGISTER_HW_RENDER_CONTEXT;
1187 +typedef struct PVRSRV_BRIDGE_IN_SGX_REGISTER_HW_TRANSFER_CONTEXT_TAG
1189 + IMG_UINT32 ui32BridgeFlags;
1190 + IMG_HANDLE hDevCookie;
1191 + IMG_DEV_VIRTADDR sHWTransferContextDevVAddr;
1192 +}PVRSRV_BRIDGE_IN_SGX_REGISTER_HW_TRANSFER_CONTEXT;
1194 +typedef struct PVRSRV_BRIDGE_OUT_SGX_REGISTER_HW_TRANSFER_CONTEXT_TAG
1196 + PVRSRV_ERROR eError;
1197 + IMG_HANDLE hHWTransferContext;
1198 +}PVRSRV_BRIDGE_OUT_SGX_REGISTER_HW_TRANSFER_CONTEXT;
1200 +typedef struct PVRSRV_BRIDGE_IN_SGX_UNREGISTER_HW_TRANSFER_CONTEXT_TAG
1202 + IMG_UINT32 ui32BridgeFlags;
1203 + IMG_HANDLE hDevCookie;
1204 + IMG_HANDLE hHWTransferContext;
1205 +}PVRSRV_BRIDGE_IN_SGX_UNREGISTER_HW_TRANSFER_CONTEXT;
1207 typedef struct PVRSRV_BRIDGE_IN_SGX_FLUSH_HW_RENDER_TARGET_TAG
1209 IMG_UINT32 ui32BridgeFlags;
1210 @@ -337,18 +382,54 @@
1211 IMG_DEV_VIRTADDR sHWRTDataSetDevVAddr;
1212 }PVRSRV_BRIDGE_IN_SGX_FLUSH_HW_RENDER_TARGET;
1214 -typedef struct PVRSRV_BRIDGE_IN_SGX_UNREGISTER_HW_RENDER_CONTEXT_TAG
1216 +#if defined(SGX_FEATURE_2D_HARDWARE)
1217 +typedef struct PVRSRV_BRIDGE_IN_SGX_REGISTER_HW_2D_CONTEXT_TAG
1219 IMG_UINT32 ui32BridgeFlags;
1220 IMG_HANDLE hDevCookie;
1221 - IMG_HANDLE hHWRenderContext;
1222 -}PVRSRV_BRIDGE_IN_SGX_UNREGISTER_HW_RENDER_CONTEXT;
1223 + IMG_DEV_VIRTADDR sHW2DContextDevVAddr;
1224 +}PVRSRV_BRIDGE_IN_SGX_REGISTER_HW_2D_CONTEXT;
1226 +typedef struct PVRSRV_BRIDGE_OUT_SGX_REGISTER_HW_2D_CONTEXT_TAG
1228 + PVRSRV_ERROR eError;
1229 + IMG_HANDLE hHW2DContext;
1230 +}PVRSRV_BRIDGE_OUT_SGX_REGISTER_HW_2D_CONTEXT;
1232 +typedef struct PVRSRV_BRIDGE_IN_SGX_UNREGISTER_HW_2D_CONTEXT_TAG
1234 + IMG_UINT32 ui32BridgeFlags;
1235 + IMG_HANDLE hDevCookie;
1236 + IMG_HANDLE hHW2DContext;
1237 +}PVRSRV_BRIDGE_IN_SGX_UNREGISTER_HW_2D_CONTEXT;
1240 -#if defined(SGX_FEATURE_2D_HARDWARE)
1241 #define SGX2D_MAX_BLT_CMD_SIZ 256
1245 +typedef struct PVRSRV_BRIDGE_IN_SGX_READ_HWPERF_COUNTERS_TAG
1247 + IMG_UINT32 ui32BridgeFlags;
1248 + IMG_HANDLE hDevCookie;
1249 + IMG_UINT32 ui32PerfReg;
1250 + IMG_BOOL bNewPerf;
1251 + IMG_UINT32 ui32NewPerf;
1252 + IMG_UINT32 ui32NewPerfReset;
1253 + IMG_UINT32 ui32PerfCountersReg;
1254 +} PVRSRV_BRIDGE_IN_SGX_READ_HWPERF_COUNTERS;
1256 +typedef struct PVRSRV_BRIDGE_OUT_SGX_READ_HWPERF_COUNTERS_TAG
1258 + PVRSRV_ERROR eError;
1259 + IMG_UINT32 ui32OldPerf;
1260 + IMG_UINT32 aui32Counters[PVRSRV_SGX_HWPERF_NUM_COUNTERS];
1261 + IMG_UINT32 ui32KickTACounter;
1262 + IMG_UINT32 ui32KickTARenderCounter;
1263 + IMG_UINT32 ui32CPUTime;
1264 + IMG_UINT32 ui32SGXTime;
1265 +} PVRSRV_BRIDGE_OUT_SGX_READ_HWPERF_COUNTERS;
1267 #if defined (__cplusplus)
1270 diff -Nurd git/drivers/gpu/pvr/services4/include/sgx_bridge_km.h git/drivers/gpu/pvr/services4/include/sgx_bridge_km.h
1271 --- git/drivers/gpu/pvr/services4/include/sgx_bridge_km.h 2009-01-05 20:00:44.000000000 +0100
1272 +++ git/drivers/gpu/pvr/services4/include/sgx_bridge_km.h 1970-01-01 01:00:00.000000000 +0100
1274 -/**********************************************************************
1276 - * Copyright(c) 2008 Imagination Technologies Ltd. All rights reserved.
1278 - * This program is free software; you can redistribute it and/or modify it
1279 - * under the terms and conditions of the GNU General Public License,
1280 - * version 2, as published by the Free Software Foundation.
1282 - * This program is distributed in the hope it will be useful but, except
1283 - * as otherwise stated in writing, without any warranty; without even the
1284 - * implied warranty of merchantability or fitness for a particular purpose.
1285 - * See the GNU General Public License for more details.
1287 - * You should have received a copy of the GNU General Public License along with
1288 - * this program; if not, write to the Free Software Foundation, Inc.,
1289 - * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
1291 - * The full GNU General Public License is included in this distribution in
1292 - * the file called "COPYING".
1294 - * Contact Information:
1295 - * Imagination Technologies Ltd. <gpl-support@imgtec.com>
1296 - * Home Park Estate, Kings Langley, Herts, WD4 8LZ, UK
1298 - ******************************************************************************/
1300 -#if !defined(__SGX_BRIDGE_KM_H__)
1301 -#define __SGX_BRIDGE_KM_H__
1303 -#include "sgxapi_km.h"
1304 -#include "sgxinfo.h"
1305 -#include "sgxinfokm.h"
1306 -#include "sgx_bridge.h"
1307 -#include "pvr_bridge.h"
1308 -#include "perproc.h"
1310 -#if defined (__cplusplus)
1315 -PVRSRV_ERROR SGXSubmitTransferKM(IMG_HANDLE hDevHandle,
1316 - IMG_DEV_VIRTADDR sHWRenderContextDevVAddr);
1319 -PVRSRV_ERROR SGXDoKickKM(IMG_HANDLE hDevHandle,
1320 - PVR3DIF4_CCB_KICK *psCCBKick);
1323 -PVRSRV_ERROR SGXGetPhysPageAddrKM(IMG_HANDLE hDevMemHeap,
1324 - IMG_DEV_VIRTADDR sDevVAddr,
1325 - IMG_DEV_PHYADDR *pDevPAddr,
1326 - IMG_CPU_PHYADDR *pCpuPAddr);
1329 -PVRSRV_ERROR IMG_CALLCONV SGXGetMMUPDAddrKM(IMG_HANDLE hDevCookie,
1330 - IMG_HANDLE hDevMemContext,
1331 - IMG_DEV_PHYADDR *psPDDevPAddr);
1334 -PVRSRV_ERROR SGXGetClientInfoKM(IMG_HANDLE hDevCookie,
1335 - PVR3DIF4_CLIENT_INFO* psClientInfo);
1338 -PVRSRV_ERROR SGXGetMiscInfoKM(PVRSRV_SGXDEV_INFO *psDevInfo,
1339 - SGX_MISC_INFO *psMiscInfo);
1341 -#if defined(SGX_FEATURE_2D_HARDWARE)
1343 -PVRSRV_ERROR SGX2DQueueBlitKM(PVRSRV_SGXDEV_INFO *psDevInfo,
1344 - PVRSRV_KERNEL_SYNC_INFO *psDstSync,
1345 - IMG_UINT32 ui32NumSrcSyncs,
1346 - PVRSRV_KERNEL_SYNC_INFO *apsSrcSync[],
1347 - IMG_UINT32 ui32DataByteSize,
1348 - IMG_UINT32 *pui32BltData);
1350 -#if defined(SGX2D_DIRECT_BLITS)
1352 -PVRSRV_ERROR SGX2DDirectBlitKM(PVRSRV_SGXDEV_INFO *psDevInfo,
1353 - IMG_UINT32 ui32DataByteSize,
1354 - IMG_UINT32 *pui32BltData);
1358 -#if defined(SGX_FEATURE_2D_HARDWARE) || defined(PVR2D_ALT_2DHW)
1360 -PVRSRV_ERROR SGX2DQueryBlitsCompleteKM(PVRSRV_SGXDEV_INFO *psDevInfo,
1361 - PVRSRV_KERNEL_SYNC_INFO *psSyncInfo,
1362 - IMG_BOOL bWaitForComplete);
1366 -PVRSRV_ERROR SGXGetInfoForSrvinitKM(IMG_HANDLE hDevHandle,
1367 - SGX_BRIDGE_INFO_FOR_SRVINIT *psInitInfo);
1370 -PVRSRV_ERROR DevInitSGXPart2KM(PVRSRV_PER_PROCESS_DATA *psPerProc,
1371 - IMG_HANDLE hDevHandle,
1372 - SGX_BRIDGE_INIT_INFO *psInitInfo);
1374 -IMG_IMPORT PVRSRV_ERROR
1375 -SGXFindSharedPBDescKM(IMG_HANDLE hDevCookie,
1376 - IMG_UINT32 ui32TotalPBSize,
1377 - IMG_HANDLE *phSharedPBDesc,
1378 - PVRSRV_KERNEL_MEM_INFO **ppsSharedPBDescKernelMemInfo,
1379 - PVRSRV_KERNEL_MEM_INFO **ppsHWPBDescKernelMemInfo,
1380 - PVRSRV_KERNEL_MEM_INFO **ppsBlockKernelMemInfo,
1381 - PVRSRV_KERNEL_MEM_INFO ***pppsSharedPBDescSubKernelMemInfos,
1382 - IMG_UINT32 *ui32SharedPBDescSubKernelMemInfosCount);
1384 -IMG_IMPORT PVRSRV_ERROR
1385 -SGXUnrefSharedPBDescKM(IMG_HANDLE hSharedPBDesc);
1387 -IMG_IMPORT PVRSRV_ERROR
1388 -SGXAddSharedPBDescKM(IMG_HANDLE hDevCookie,
1389 - PVRSRV_KERNEL_MEM_INFO *psSharedPBDescKernelMemInfo,
1390 - PVRSRV_KERNEL_MEM_INFO *psHWPBDescKernelMemInfo,
1391 - PVRSRV_KERNEL_MEM_INFO *psBlockKernelMemInfo,
1392 - IMG_UINT32 ui32TotalPBSize,
1393 - IMG_HANDLE *phSharedPBDesc,
1394 - PVRSRV_KERNEL_MEM_INFO **psSharedPBDescSubKernelMemInfos,
1395 - IMG_UINT32 ui32SharedPBDescSubKernelMemInfosCount);
1398 -IMG_IMPORT PVRSRV_ERROR
1399 -SGXGetInternalDevInfoKM(IMG_HANDLE hDevCookie,
1400 - PVR3DIF4_INTERNAL_DEVINFO *psSGXInternalDevInfo);
1403 -#if defined(SGX_FEATURE_2D_HARDWARE)
1404 -#define SGX2D_MAX_BLT_CMD_SIZ 256
1407 -#if defined (__cplusplus)
1413 diff -Nurd git/drivers/gpu/pvr/services4/include/sgxinfo.h git/drivers/gpu/pvr/services4/include/sgxinfo.h
1414 --- git/drivers/gpu/pvr/services4/include/sgxinfo.h 2009-01-05 20:00:44.000000000 +0100
1415 +++ git/drivers/gpu/pvr/services4/include/sgxinfo.h 2008-12-18 15:47:29.000000000 +0100
1417 #if defined(SGX_SUPPORT_HWPROFILING)
1418 IMG_HANDLE hKernelHWProfilingMemInfo;
1420 +#if defined(SUPPORT_SGX_HWPERF)
1421 + IMG_HANDLE hKernelHWPerfCBMemInfo;
1424 IMG_UINT32 ui32EDMTaskReg0;
1425 IMG_UINT32 ui32EDMTaskReg1;
1427 - IMG_UINT32 ui32ClockGateMask;
1428 + IMG_UINT32 ui32ClkGateCtl;
1429 + IMG_UINT32 ui32ClkGateCtl2;
1430 + IMG_UINT32 ui32ClkGateStatusMask;
1432 IMG_UINT32 ui32CacheControl;
1434 @@ -111,11 +116,13 @@
1435 #define PVRSRV_CCBFLAGS_RASTERCMD 0x1
1436 #define PVRSRV_CCBFLAGS_TRANSFERCMD 0x2
1437 #define PVRSRV_CCBFLAGS_PROCESS_QUEUESCMD 0x3
1438 +#if defined(SGX_FEATURE_2D_HARDWARE)
1439 +#define PVRSRV_CCBFLAGS_2DCMD 0x4
1442 #define PVRSRV_KICKFLAG_RENDER 0x1
1443 #define PVRSRV_KICKFLAG_PIXEL 0x2
1446 #define SGX_BIF_INVALIDATE_PTCACHE 0x1
1447 #define SGX_BIF_INVALIDATE_PDCACHE 0x2
1449 @@ -125,25 +132,40 @@
1450 PVRSRV_SGX_COMMAND_TYPE eCommand;
1451 PVRSRV_SGX_COMMAND sCommand;
1452 IMG_HANDLE hCCBKernelMemInfo;
1453 - IMG_HANDLE hDstKernelSyncInfo;
1454 - IMG_UINT32 ui32DstReadOpsPendingOffset;
1455 - IMG_UINT32 ui32DstWriteOpsPendingOffset;
1456 + IMG_HANDLE hRenderSurfSyncInfo;
1458 IMG_UINT32 ui32NumTAStatusVals;
1459 - IMG_UINT32 aui32TAStatusValueOffset[SGX_MAX_TA_STATUS_VALS];
1460 IMG_HANDLE ahTAStatusSyncInfo[SGX_MAX_TA_STATUS_VALS];
1462 IMG_UINT32 ui32Num3DStatusVals;
1463 - IMG_UINT32 aui323DStatusValueOffset[SGX_MAX_3D_STATUS_VALS];
1464 IMG_HANDLE ah3DStatusSyncInfo[SGX_MAX_3D_STATUS_VALS];
1466 - IMG_BOOL bTerminate;
1467 - IMG_HANDLE hUpdateDstKernelSyncInfo;
1469 + IMG_BOOL bFirstKickOrResume;
1470 +#if (defined(NO_HARDWARE) || defined(PDUMP))
1471 + IMG_BOOL bTerminateOrAbort;
1473 + IMG_UINT32 ui32KickFlags;
1476 + IMG_UINT32 ui32CCBOffset;
1479 + IMG_UINT32 ui32NumSrcSyncs;
1480 + IMG_HANDLE ahSrcKernelSyncInfo[SGX_MAX_SRC_SYNCS];
1483 + IMG_BOOL bTADependency;
1484 + IMG_HANDLE hTA3DSyncInfo;
1486 + IMG_HANDLE hTASyncInfo;
1487 + IMG_HANDLE h3DSyncInfo;
1488 +#if defined(NO_HARDWARE)
1489 IMG_UINT32 ui32WriteOpsPendingVal;
1491 - IMG_UINT32 ui32KickFlags;
1492 } PVR3DIF4_CCB_KICK;
1496 typedef struct _PVRSRV_SGX_HOST_CTL_
1499 @@ -158,163 +180,25 @@
1500 IMG_UINT32 ui32ResManFlags;
1501 IMG_DEV_VIRTADDR sResManCleanupData;
1504 IMG_DEV_VIRTADDR sTAHWPBDesc;
1505 IMG_DEV_VIRTADDR s3DHWPBDesc;
1506 + IMG_DEV_VIRTADDR sHostHWPBDesc;
1508 -} PVRSRV_SGX_HOST_CTL;
1511 -#if defined(SUPPORT_HW_RECOVERY)
1512 -typedef struct _SGX_INIT_SCRIPT_DATA
1514 - IMG_UINT32 asHWRecoveryData[SGX_MAX_DEV_DATA];
1515 -} SGX_INIT_SCRIPT_DATA;
1518 -typedef struct _PVRSRV_SGXDEV_INFO_
1520 - PVRSRV_DEVICE_TYPE eDeviceType;
1521 - PVRSRV_DEVICE_CLASS eDeviceClass;
1523 - IMG_UINT8 ui8VersionMajor;
1524 - IMG_UINT8 ui8VersionMinor;
1525 - IMG_UINT32 ui32CoreConfig;
1526 - IMG_UINT32 ui32CoreFlags;
1529 - IMG_PVOID pvRegsBaseKM;
1533 - IMG_HANDLE hRegMapping;
1536 - IMG_SYS_PHYADDR sRegsPhysBase;
1538 - IMG_UINT32 ui32RegSize;
1541 - IMG_UINT32 ui32CoreClockSpeed;
1543 -#if defined(SGX_FEATURE_2D_HARDWARE)
1545 - SGX_SLAVE_PORT s2DSlavePortKM;
1548 - PVRSRV_RESOURCE s2DSlaveportResource;
1551 - IMG_UINT32 ui322DFifoSize;
1552 - IMG_UINT32 ui322DFifoOffset;
1554 - IMG_HANDLE h2DCmdCookie;
1556 - IMG_HANDLE h2DQueue;
1557 - IMG_BOOL b2DHWRecoveryInProgress;
1558 - IMG_BOOL b2DHWRecoveryEndPending;
1559 - IMG_UINT32 ui322DCompletedBlits;
1560 - IMG_BOOL b2DLockupSuspected;
1564 - IMG_VOID *psStubPBDescListKM;
1568 - IMG_DEV_PHYADDR sKernelPDDevPAddr;
1570 - IMG_VOID *pvDeviceMemoryHeap;
1571 - PPVRSRV_KERNEL_MEM_INFO psKernelCCBMemInfo;
1572 - PVRSRV_SGX_KERNEL_CCB *psKernelCCB;
1573 - PPVRSRV_SGX_CCB_INFO psKernelCCBInfo;
1574 - PPVRSRV_KERNEL_MEM_INFO psKernelCCBCtlMemInfo;
1575 - PVRSRV_SGX_CCB_CTL *psKernelCCBCtl;
1576 - PPVRSRV_KERNEL_MEM_INFO psKernelCCBEventKickerMemInfo;
1577 - IMG_UINT32 *pui32KernelCCBEventKicker;
1578 - IMG_UINT32 ui32TAKickAddress;
1579 - IMG_UINT32 ui32TexLoadKickAddress;
1580 - IMG_UINT32 ui32VideoHandlerAddress;
1581 -#if defined(SGX_SUPPORT_HWPROFILING)
1582 - PPVRSRV_KERNEL_MEM_INFO psKernelHWProfilingMemInfo;
1586 - IMG_UINT32 ui32ClientRefCount;
1589 - IMG_UINT32 ui32CacheControl;
1594 - IMG_VOID *pvMMUContextList;
1597 - IMG_BOOL bForcePTOff;
1599 - IMG_UINT32 ui32EDMTaskReg0;
1600 - IMG_UINT32 ui32EDMTaskReg1;
1602 - IMG_UINT32 ui32ClockGateMask;
1603 - SGX_INIT_SCRIPTS sScripts;
1604 -#if defined(SUPPORT_HW_RECOVERY)
1605 - SGX_INIT_SCRIPT_DATA sScriptData;
1608 - IMG_HANDLE hBIFResetPDOSMemHandle;
1609 - IMG_DEV_PHYADDR sBIFResetPDDevPAddr;
1610 - IMG_DEV_PHYADDR sBIFResetPTDevPAddr;
1611 - IMG_DEV_PHYADDR sBIFResetPageDevPAddr;
1612 - IMG_UINT32 *pui32BIFResetPD;
1613 - IMG_UINT32 *pui32BIFResetPT;
1617 -#if defined(SUPPORT_HW_RECOVERY)
1619 - IMG_HANDLE hTimer;
1621 - IMG_UINT32 ui32TimeStamp;
1625 - IMG_UINT32 ui32NumResets;
1627 - PVRSRV_KERNEL_MEM_INFO *psKernelSGXHostCtlMemInfo;
1628 - PVRSRV_SGX_HOST_CTL *psSGXHostCtl;
1630 - IMG_UINT32 ui32Flags;
1633 - IMG_UINT32 ui32RegFlags;
1635 - #if defined(PDUMP)
1636 - PVRSRV_SGX_PDUMP_CONTEXT sPDContext;
1638 + IMG_UINT32 ui32NumActivePowerEvents;
1640 -#if defined(SUPPORT_SGX_MMU_DUMMY_PAGE)
1642 - IMG_VOID *pvDummyPTPageCpuVAddr;
1643 - IMG_DEV_PHYADDR sDummyPTDevPAddr;
1644 - IMG_HANDLE hDummyPTPageOSMemHandle;
1645 - IMG_VOID *pvDummyDataPageCpuVAddr;
1646 - IMG_DEV_PHYADDR sDummyDataDevPAddr;
1647 - IMG_HANDLE hDummyDataPageOSMemHandle;
1648 +#if defined(SUPPORT_SGX_HWPERF)
1649 + IMG_UINT32 ui32HWPerfFlags;
1652 - IMG_UINT32 asSGXDevData[SGX_MAX_DEV_DATA];
1654 -#if defined(SUPPORT_SGX_EVENT_OBJECT)
1655 - PVRSRV_EVENTOBJECT *psSGXEventObject;
1658 + IMG_UINT32 ui32TimeWraps;
1659 +} PVRSRV_SGX_HOST_CTL;
1661 -} PVRSRV_SGXDEV_INFO;
1663 typedef struct _PVR3DIF4_CLIENT_INFO_
1665 - IMG_VOID *pvRegsBase;
1666 - IMG_HANDLE hBlockMapping;
1667 - SGX_SLAVE_PORT s2DSlavePort;
1668 IMG_UINT32 ui32ProcessID;
1669 IMG_VOID *pvProcess;
1670 PVRSRV_MISC_INFO sMiscInfo;
1671 @@ -330,13 +214,9 @@
1672 typedef struct _PVR3DIF4_INTERNAL_DEVINFO_
1674 IMG_UINT32 ui32Flags;
1675 - IMG_BOOL bTimerEnable;
1676 IMG_HANDLE hCtlKernelMemInfoHandle;
1677 IMG_BOOL bForcePTOff;
1678 IMG_UINT32 ui32RegFlags;
1679 -#if defined(SUPPORT_SGX_EVENT_OBJECT)
1680 - IMG_HANDLE hOSEvent;
1682 } PVR3DIF4_INTERNAL_DEVINFO;
1684 typedef struct _PVRSRV_SGX_SHARED_CCB_
1685 @@ -371,5 +251,150 @@
1689 +typedef struct _CTL_STATUS_
1691 + IMG_DEV_VIRTADDR sStatusDevAddr;
1692 + IMG_UINT32 ui32StatusValue;
1693 +} CTL_STATUS, *PCTL_STATUS;
1695 +#if defined(TRANSFER_QUEUE)
1696 +#define SGXTQ_MAX_STATUS 5
1697 +typedef struct _PVR3DIF4_CMDTA_SHARED_
1699 + IMG_UINT32 ui32NumTAStatusVals;
1700 + IMG_UINT32 ui32Num3DStatusVals;
1703 + IMG_UINT32 ui32WriteOpsPendingVal;
1704 + IMG_DEV_VIRTADDR sWriteOpsCompleteDevVAddr;
1705 + IMG_UINT32 ui32ReadOpsPendingVal;
1706 + IMG_DEV_VIRTADDR sReadOpsCompleteDevVAddr;
1709 + IMG_UINT32 ui32TQSyncWriteOpsPendingVal;
1710 + IMG_DEV_VIRTADDR sTQSyncWriteOpsCompleteDevVAddr;
1711 + IMG_UINT32 ui32TQSyncReadOpsPendingVal;
1712 + IMG_DEV_VIRTADDR sTQSyncReadOpsCompleteDevVAddr;
1715 + IMG_UINT32 ui323DTQSyncWriteOpsPendingVal;
1716 + IMG_DEV_VIRTADDR s3DTQSyncWriteOpsCompleteDevVAddr;
1717 + IMG_UINT32 ui323DTQSyncReadOpsPendingVal;
1718 + IMG_DEV_VIRTADDR s3DTQSyncReadOpsCompleteDevVAddr;
1721 + IMG_UINT32 ui32NumSrcSyncs;
1722 + PVRSRV_DEVICE_SYNC_OBJECT asSrcSyncs[SGX_MAX_SRC_SYNCS];
1724 + CTL_STATUS sCtlTAStatusInfo[SGX_MAX_TA_STATUS_VALS];
1725 + CTL_STATUS sCtl3DStatusInfo[SGX_MAX_3D_STATUS_VALS];
1727 + PVRSRV_DEVICE_SYNC_OBJECT sTA3DDependancy;
1729 +} PVR3DIF4_CMDTA_SHARED;
1731 +typedef struct _PVR3DIF4_TRANSFERCMD_SHARED_
1735 + IMG_UINT32 ui32SrcReadOpPendingVal;
1736 + IMG_DEV_VIRTADDR sSrcReadOpsCompleteDevAddr;
1738 + IMG_UINT32 ui32SrcWriteOpPendingVal;
1739 + IMG_DEV_VIRTADDR sSrcWriteOpsCompleteDevAddr;
1743 + IMG_UINT32 ui32DstReadOpPendingVal;
1744 + IMG_DEV_VIRTADDR sDstReadOpsCompleteDevAddr;
1746 + IMG_UINT32 ui32DstWriteOpPendingVal;
1747 + IMG_DEV_VIRTADDR sDstWriteOpsCompleteDevAddr;
1750 + IMG_UINT32 ui32TASyncWriteOpsPendingVal;
1751 + IMG_DEV_VIRTADDR sTASyncWriteOpsCompleteDevVAddr;
1752 + IMG_UINT32 ui32TASyncReadOpsPendingVal;
1753 + IMG_DEV_VIRTADDR sTASyncReadOpsCompleteDevVAddr;
1756 + IMG_UINT32 ui323DSyncWriteOpsPendingVal;
1757 + IMG_DEV_VIRTADDR s3DSyncWriteOpsCompleteDevVAddr;
1758 + IMG_UINT32 ui323DSyncReadOpsPendingVal;
1759 + IMG_DEV_VIRTADDR s3DSyncReadOpsCompleteDevVAddr;
1761 + IMG_UINT32 ui32NumStatusVals;
1762 + CTL_STATUS sCtlStatusInfo[SGXTQ_MAX_STATUS];
1764 + IMG_UINT32 ui32NumSrcSync;
1765 + IMG_UINT32 ui32NumDstSync;
1767 + IMG_DEV_VIRTADDR sSrcWriteOpsDevVAddr[SGX_MAX_TRANSFER_SYNC_OPS];
1768 + IMG_DEV_VIRTADDR sSrcReadOpsDevVAddr[SGX_MAX_TRANSFER_SYNC_OPS];
1770 + IMG_DEV_VIRTADDR sDstWriteOpsDevVAddr[SGX_MAX_TRANSFER_SYNC_OPS];
1771 + IMG_DEV_VIRTADDR sDstReadOpsDevVAddr[SGX_MAX_TRANSFER_SYNC_OPS];
1772 +} PVR3DIF4_TRANSFERCMD_SHARED, *PPVR3DIF4_TRANSFERCMD_SHARED;
1774 +typedef struct _PVRSRV_TRANSFER_SGX_KICK_
1776 + IMG_HANDLE hCCBMemInfo;
1777 + IMG_UINT32 ui32SharedCmdCCBOffset;
1779 + IMG_DEV_VIRTADDR sHWTransferContextDevVAddr;
1781 + IMG_HANDLE hTASyncInfo;
1782 + IMG_HANDLE h3DSyncInfo;
1784 + IMG_UINT32 ui32NumSrcSync;
1785 + IMG_HANDLE ahSrcSyncInfo[SGX_MAX_TRANSFER_SYNC_OPS];
1787 + IMG_UINT32 ui32NumDstSync;
1788 + IMG_HANDLE ahDstSyncInfo[SGX_MAX_TRANSFER_SYNC_OPS];
1790 + IMG_UINT32 ui32StatusFirstSync;
1791 +} PVRSRV_TRANSFER_SGX_KICK, *PPVRSRV_TRANSFER_SGX_KICK;
1793 +#if defined(SGX_FEATURE_2D_HARDWARE)
1794 +typedef struct _PVR3DIF4_2DCMD_SHARED_ {
1796 + IMG_UINT32 ui32NumSrcSync;
1797 + PVRSRV_DEVICE_SYNC_OBJECT sSrcSyncData[SGX_MAX_2D_SRC_SYNC_OPS];
1800 + PVRSRV_DEVICE_SYNC_OBJECT sDstSyncData;
1803 + PVRSRV_DEVICE_SYNC_OBJECT sTASyncData;
1806 + PVRSRV_DEVICE_SYNC_OBJECT s3DSyncData;
1807 +} PVR3DIF4_2DCMD_SHARED, *PPVR3DIF4_2DCMD_SHARED;
1809 +typedef struct _PVRSRV_2D_SGX_KICK_
1811 + IMG_HANDLE hCCBMemInfo;
1812 + IMG_UINT32 ui32SharedCmdCCBOffset;
1814 + IMG_DEV_VIRTADDR sHW2DContextDevVAddr;
1816 + IMG_UINT32 ui32NumSrcSync;
1817 + IMG_HANDLE ahSrcSyncInfo[SGX_MAX_2D_SRC_SYNC_OPS];
1820 + IMG_HANDLE hDstSyncInfo;
1823 + IMG_HANDLE hTASyncInfo;
1826 + IMG_HANDLE h3DSyncInfo;
1828 +} PVRSRV_2D_SGX_KICK, *PPVRSRV_2D_SGX_KICK;
1832 +#define PVRSRV_SGX_HWPERF_NUM_COUNTERS 9
1836 diff -Nurd git/drivers/gpu/pvr/services4/srvkm/bridged/bridged_pvr_bridge.c git/drivers/gpu/pvr/services4/srvkm/bridged/bridged_pvr_bridge.c
1837 --- git/drivers/gpu/pvr/services4/srvkm/bridged/bridged_pvr_bridge.c 2009-01-05 20:00:44.000000000 +0100
1838 +++ git/drivers/gpu/pvr/services4/srvkm/bridged/bridged_pvr_bridge.c 2008-12-18 15:47:29.000000000 +0100
1840 #include "bridged_pvr_bridge.h"
1841 #include "env_data.h"
1844 #if defined (__linux__)
1849 static IMG_BOOL gbInitServerRunning = IMG_FALSE;
1850 static IMG_BOOL gbInitServerRan = IMG_FALSE;
1851 -static IMG_BOOL gbInitServerSuccessful = IMG_FALSE;
1852 +static IMG_BOOL gbInitSuccessful = IMG_FALSE;
1854 PVRSRV_BRIDGE_DISPATCH_TABLE_ENTRY g_BridgeDispatchTable[BRIDGE_DISPATCH_TABLE_ENTRY_COUNT];
1856 @@ -446,7 +445,13 @@
1861 +#if defined(OS_PVRSRV_ALLOC_DEVICE_MEM_BW)
1863 +PVRSRVAllocDeviceMemBW(IMG_UINT32 ui32BridgeID,
1864 + PVRSRV_BRIDGE_IN_ALLOCDEVICEMEM *psAllocDeviceMemIN,
1865 + PVRSRV_BRIDGE_OUT_ALLOCDEVICEMEM *psAllocDeviceMemOUT,
1866 + PVRSRV_PER_PROCESS_DATA *psPerProc);
1869 PVRSRVAllocDeviceMemBW(IMG_UINT32 ui32BridgeID,
1870 PVRSRV_BRIDGE_IN_ALLOCDEVICEMEM *psAllocDeviceMemIN,
1872 psAllocDeviceMemOUT->sClientMemInfo.sDevVAddr = psMemInfo->sDevVAddr;
1873 psAllocDeviceMemOUT->sClientMemInfo.ui32Flags = psMemInfo->ui32Flags;
1874 psAllocDeviceMemOUT->sClientMemInfo.ui32AllocSize = psMemInfo->ui32AllocSize;
1875 - psAllocDeviceMemOUT->sClientMemInfo.hMappingInfo = IMG_NULL;
1876 + psAllocDeviceMemOUT->sClientMemInfo.hMappingInfo = psMemInfo->sMemBlk.hOSMemHandle;
1878 psAllocDeviceMemOUT->eError =
1879 PVRSRVAllocHandle(psPerProc->psHandleBase,
1887 PVRSRVFreeDeviceMemBW(IMG_UINT32 ui32BridgeID,
1888 @@ -1547,12 +1553,12 @@
1892 - if(psDoKickIN->sCCBKick.hDstKernelSyncInfo != IMG_NULL)
1893 + if(psDoKickIN->sCCBKick.hTA3DSyncInfo != IMG_NULL)
1896 PVRSRVLookupHandle(psPerProc->psHandleBase,
1897 - &psDoKickIN->sCCBKick.hDstKernelSyncInfo,
1898 - psDoKickIN->sCCBKick.hDstKernelSyncInfo,
1899 + &psDoKickIN->sCCBKick.hTA3DSyncInfo,
1900 + psDoKickIN->sCCBKick.hTA3DSyncInfo,
1901 PVRSRV_HANDLE_TYPE_SYNC_INFO);
1903 if(psRetOUT->eError != PVRSRV_OK)
1904 @@ -1561,13 +1567,12 @@
1908 -#if defined (NO_HARDWARE)
1909 - if(psDoKickIN->sCCBKick.hUpdateDstKernelSyncInfo != IMG_NULL)
1910 + if(psDoKickIN->sCCBKick.hTASyncInfo != IMG_NULL)
1913 PVRSRVLookupHandle(psPerProc->psHandleBase,
1914 - &psDoKickIN->sCCBKick.hUpdateDstKernelSyncInfo,
1915 - psDoKickIN->sCCBKick.hUpdateDstKernelSyncInfo,
1916 + &psDoKickIN->sCCBKick.hTASyncInfo,
1917 + psDoKickIN->sCCBKick.hTASyncInfo,
1918 PVRSRV_HANDLE_TYPE_SYNC_INFO);
1920 if(psRetOUT->eError != PVRSRV_OK)
1921 @@ -1575,7 +1580,46 @@
1927 + if(psDoKickIN->sCCBKick.h3DSyncInfo != IMG_NULL)
1929 + psRetOUT->eError =
1930 + PVRSRVLookupHandle(psPerProc->psHandleBase,
1931 + &psDoKickIN->sCCBKick.h3DSyncInfo,
1932 + psDoKickIN->sCCBKick.h3DSyncInfo,
1933 + PVRSRV_HANDLE_TYPE_SYNC_INFO);
1935 + if(psRetOUT->eError != PVRSRV_OK)
1942 + if (psDoKickIN->sCCBKick.ui32NumSrcSyncs > SGX_MAX_SRC_SYNCS)
1944 + psRetOUT->eError = PVRSRV_ERROR_INVALID_PARAMS;
1947 + for(i=0; i<psDoKickIN->sCCBKick.ui32NumSrcSyncs; i++)
1949 + psRetOUT->eError =
1950 + PVRSRVLookupHandle(psPerProc->psHandleBase,
1951 + &psDoKickIN->sCCBKick.ahSrcKernelSyncInfo[i],
1952 + psDoKickIN->sCCBKick.ahSrcKernelSyncInfo[i],
1953 + PVRSRV_HANDLE_TYPE_SYNC_INFO);
1955 + if(psRetOUT->eError != PVRSRV_OK)
1961 + if (psDoKickIN->sCCBKick.ui32NumTAStatusVals > SGX_MAX_TA_STATUS_VALS)
1963 + psRetOUT->eError = PVRSRV_ERROR_INVALID_PARAMS;
1966 for (i = 0; i < psDoKickIN->sCCBKick.ui32NumTAStatusVals; i++)
1969 @@ -1590,6 +1634,11 @@
1973 + if (psDoKickIN->sCCBKick.ui32Num3DStatusVals > SGX_MAX_3D_STATUS_VALS)
1975 + psRetOUT->eError = PVRSRV_ERROR_INVALID_PARAMS;
1978 for(i = 0; i < psDoKickIN->sCCBKick.ui32Num3DStatusVals; i++)
1981 @@ -1604,6 +1653,20 @@
1985 + if(psDoKickIN->sCCBKick.hRenderSurfSyncInfo != IMG_NULL)
1987 + psRetOUT->eError =
1988 + PVRSRVLookupHandle(psPerProc->psHandleBase,
1989 + &psDoKickIN->sCCBKick.hRenderSurfSyncInfo,
1990 + psDoKickIN->sCCBKick.hRenderSurfSyncInfo,
1991 + PVRSRV_HANDLE_TYPE_SYNC_INFO);
1993 + if(psRetOUT->eError != PVRSRV_OK)
2000 SGXDoKickKM(hDevCookieInt,
2001 &psDoKickIN->sCCBKick);
2002 @@ -1620,51 +1683,119 @@
2003 PVRSRV_PER_PROCESS_DATA *psPerProc)
2005 IMG_HANDLE hDevCookieInt;
2006 + PVRSRV_TRANSFER_SGX_KICK *psKick;
2009 PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_SGX_SUBMITTRANSFER);
2010 PVR_UNREFERENCED_PARAMETER(ui32BridgeID);
2012 + psKick = &psSubmitTransferIN->sKick;
2015 PVRSRVLookupHandle(psPerProc->psHandleBase,
2017 psSubmitTransferIN->hDevCookie,
2018 PVRSRV_HANDLE_TYPE_DEV_NODE);
2020 if(psRetOUT->eError != PVRSRV_OK)
2026 - SGXSubmitTransferKM(hDevCookieInt,
2027 - psSubmitTransferIN->sHWRenderContextDevVAddr);
2028 + PVRSRVLookupHandle(psPerProc->psHandleBase,
2029 + &psKick->hCCBMemInfo,
2030 + psKick->hCCBMemInfo,
2031 + PVRSRV_HANDLE_TYPE_MEM_INFO);
2032 + if(psRetOUT->eError != PVRSRV_OK)
2037 + if (psKick->hTASyncInfo != IMG_NULL)
2039 + psRetOUT->eError =
2040 + PVRSRVLookupHandle(psPerProc->psHandleBase,
2041 + &psKick->hTASyncInfo,
2042 + psKick->hTASyncInfo,
2043 + PVRSRV_HANDLE_TYPE_SYNC_INFO);
2044 + if(psRetOUT->eError != PVRSRV_OK)
2050 + if (psKick->h3DSyncInfo != IMG_NULL)
2052 + psRetOUT->eError =
2053 + PVRSRVLookupHandle(psPerProc->psHandleBase,
2054 + &psKick->h3DSyncInfo,
2055 + psKick->h3DSyncInfo,
2056 + PVRSRV_HANDLE_TYPE_SYNC_INFO);
2057 + if(psRetOUT->eError != PVRSRV_OK)
2063 + if (psKick->ui32NumSrcSync > SGX_MAX_TRANSFER_SYNC_OPS)
2065 + psRetOUT->eError = PVRSRV_ERROR_INVALID_PARAMS;
2068 + for (i = 0; i < psKick->ui32NumSrcSync; i++)
2070 + psRetOUT->eError =
2071 + PVRSRVLookupHandle(psPerProc->psHandleBase,
2072 + &psKick->ahSrcSyncInfo[i],
2073 + psKick->ahSrcSyncInfo[i],
2074 + PVRSRV_HANDLE_TYPE_SYNC_INFO);
2075 + if(psRetOUT->eError != PVRSRV_OK)
2081 + if (psKick->ui32NumDstSync > SGX_MAX_TRANSFER_SYNC_OPS)
2083 + psRetOUT->eError = PVRSRV_ERROR_INVALID_PARAMS;
2086 + for (i = 0; i < psKick->ui32NumDstSync; i++)
2088 + psRetOUT->eError =
2089 + PVRSRVLookupHandle(psPerProc->psHandleBase,
2090 + &psKick->ahDstSyncInfo[i],
2091 + psKick->ahDstSyncInfo[i],
2092 + PVRSRV_HANDLE_TYPE_SYNC_INFO);
2093 + if(psRetOUT->eError != PVRSRV_OK)
2099 + psRetOUT->eError = SGXSubmitTransferKM(hDevCookieInt, psKick);
2105 +#if defined(SGX_FEATURE_2D_HARDWARE)
2107 -SGXGetMiscInfoBW(IMG_UINT32 ui32BridgeID,
2108 - PVRSRV_BRIDGE_IN_SGXGETMISCINFO *psSGXGetMiscInfoIN,
2109 - PVRSRV_BRIDGE_RETURN *psRetOUT,
2110 - PVRSRV_PER_PROCESS_DATA *psPerProc)
2111 +SGXSubmit2DBW(IMG_UINT32 ui32BridgeID,
2112 + PVRSRV_BRIDGE_IN_SUBMIT2D *psSubmit2DIN,
2113 + PVRSRV_BRIDGE_RETURN *psRetOUT,
2114 + PVRSRV_PER_PROCESS_DATA *psPerProc)
2116 IMG_HANDLE hDevCookieInt;
2117 - PVRSRV_SGXDEV_INFO *psDevInfo;
2118 - SGX_MISC_INFO *psMiscInfo;
2121 - PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_SGX_GETMISCINFO);
2122 + PVRSRV_2D_SGX_KICK *psKick;
2127 - (SGX_MISC_INFO *)((IMG_UINT8 *)psSGXGetMiscInfoIN
2128 - + sizeof(PVRSRV_BRIDGE_IN_SGXGETMISCINFO));
2129 + PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_SGX_SUBMIT2D);
2130 + PVR_UNREFERENCED_PARAMETER(ui32BridgeID);
2133 - PVRSRVLookupHandle(psPerProc->psHandleBase,
2135 - psSGXGetMiscInfoIN->hDevCookie,
2136 + PVRSRVLookupHandle(psPerProc->psHandleBase,
2138 + psSubmit2DIN->hDevCookie,
2139 PVRSRV_HANDLE_TYPE_DEV_NODE);
2141 if(psRetOUT->eError != PVRSRV_OK)
2142 @@ -1672,45 +1803,156 @@
2146 - psDevInfo = (PVRSRV_SGXDEV_INFO *)((PVRSRV_DEVICE_NODE *)hDevCookieInt)->pvDevice;
2147 + psKick = &psSubmit2DIN->sKick;
2149 - if(CopyFromUserWrapper(psPerProc,
2152 - psSGXGetMiscInfoIN->psMiscInfo,
2153 - sizeof(SGX_MISC_INFO)) != PVRSRV_OK)
2154 + psRetOUT->eError =
2155 + PVRSRVLookupHandle(psPerProc->psHandleBase,
2156 + &psKick->hCCBMemInfo,
2157 + psKick->hCCBMemInfo,
2158 + PVRSRV_HANDLE_TYPE_MEM_INFO);
2159 + if(psRetOUT->eError != PVRSRV_OK)
2165 - switch(psMiscInfo->eRequest)
2166 + if (psKick->hTASyncInfo != IMG_NULL)
2170 + psRetOUT->eError =
2171 + PVRSRVLookupHandle(psPerProc->psHandleBase,
2172 + &psKick->hTASyncInfo,
2173 + psKick->hTASyncInfo,
2174 + PVRSRV_HANDLE_TYPE_SYNC_INFO);
2175 + if(psRetOUT->eError != PVRSRV_OK)
2182 - psRetOUT->eError = SGXGetMiscInfoKM(psDevInfo, psMiscInfo);
2183 + if (psKick->h3DSyncInfo != IMG_NULL)
2185 + psRetOUT->eError =
2186 + PVRSRVLookupHandle(psPerProc->psHandleBase,
2187 + &psKick->h3DSyncInfo,
2188 + psKick->h3DSyncInfo,
2189 + PVRSRV_HANDLE_TYPE_SYNC_INFO);
2190 + if(psRetOUT->eError != PVRSRV_OK)
2197 - switch(psMiscInfo->eRequest)
2198 + if (psKick->ui32NumSrcSync > SGX_MAX_2D_SRC_SYNC_OPS)
2202 + psRetOUT->eError = PVRSRV_ERROR_INVALID_PARAMS;
2205 + for (i = 0; i < psKick->ui32NumSrcSync; i++)
2207 + psRetOUT->eError =
2208 + PVRSRVLookupHandle(psPerProc->psHandleBase,
2209 + &psKick->ahSrcSyncInfo[i],
2210 + psKick->ahSrcSyncInfo[i],
2211 + PVRSRV_HANDLE_TYPE_SYNC_INFO);
2212 + if(psRetOUT->eError != PVRSRV_OK)
2218 - if(CopyToUserWrapper(psPerProc,
2220 - psSGXGetMiscInfoIN->psMiscInfo,
2222 - sizeof(SGX_MISC_INFO)) != PVRSRV_OK)
2223 + if (psKick->hDstSyncInfo != IMG_NULL)
2226 + psRetOUT->eError =
2227 + PVRSRVLookupHandle(psPerProc->psHandleBase,
2228 + &psKick->hDstSyncInfo,
2229 + psKick->hDstSyncInfo,
2230 + PVRSRV_HANDLE_TYPE_SYNC_INFO);
2231 + if(psRetOUT->eError != PVRSRV_OK)
2237 + psRetOUT->eError =
2238 + SGXSubmit2DKM(hDevCookieInt, psKick);
2247 +SGXGetMiscInfoBW(IMG_UINT32 ui32BridgeID,
2248 + PVRSRV_BRIDGE_IN_SGXGETMISCINFO *psSGXGetMiscInfoIN,
2249 + PVRSRV_BRIDGE_RETURN *psRetOUT,
2250 + PVRSRV_PER_PROCESS_DATA *psPerProc)
2252 + IMG_HANDLE hDevCookieInt;
2253 + PVRSRV_SGXDEV_INFO *psDevInfo;
2254 + SGX_MISC_INFO *psMiscInfo;
2256 + PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID,
2257 + PVRSRV_BRIDGE_SGX_GETMISCINFO);
2259 + psRetOUT->eError = PVRSRVLookupHandle(psPerProc->psHandleBase,
2261 + psSGXGetMiscInfoIN->hDevCookie,
2262 + PVRSRV_HANDLE_TYPE_DEV_NODE);
2264 + if(psRetOUT->eError != PVRSRV_OK)
2269 + psDevInfo = (PVRSRV_SGXDEV_INFO *)((PVRSRV_DEVICE_NODE*)hDevCookieInt)->pvDevice;
2271 + psMiscInfo = psSGXGetMiscInfoIN->psMiscInfo;
2272 + psRetOUT->eError = SGXGetMiscInfoKM(psDevInfo, psMiscInfo);
2277 +#if defined(SUPPORT_SGX_HWPERF)
2279 +SGXReadHWPerfCountersBW(IMG_UINT32 ui32BridgeID,
2280 + PVRSRV_BRIDGE_IN_SGX_READ_HWPERF_COUNTERS *psSGXReadHWPerfCountersIN,
2281 + PVRSRV_BRIDGE_OUT_SGX_READ_HWPERF_COUNTERS *psSGXReadHWPerfCountersOUT,
2282 + PVRSRV_PER_PROCESS_DATA *psPerProc)
2284 + IMG_HANDLE hDevCookieInt;
2285 + PVRSRV_SGXDEV_INFO *psDevInfo;
2287 + PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_SGX_READ_HWPERF_COUNTERS);
2289 + psSGXReadHWPerfCountersOUT->eError = PVRSRVLookupHandle(psPerProc->psHandleBase,
2291 + psSGXReadHWPerfCountersIN->hDevCookie,
2292 + PVRSRV_HANDLE_TYPE_DEV_NODE);
2294 + if(psSGXReadHWPerfCountersOUT->eError != PVRSRV_OK)
2299 + psDevInfo = ((PVRSRV_DEVICE_NODE*)hDevCookieInt)->pvDevice;
2301 + psSGXReadHWPerfCountersOUT->eError = SGXReadHWPerfCountersKM(psDevInfo,
2302 + psSGXReadHWPerfCountersIN->ui32PerfReg,
2303 + &psSGXReadHWPerfCountersOUT->ui32OldPerf,
2304 + psSGXReadHWPerfCountersIN->bNewPerf,
2305 + psSGXReadHWPerfCountersIN->ui32NewPerf,
2306 + psSGXReadHWPerfCountersIN->ui32NewPerfReset,
2307 + psSGXReadHWPerfCountersIN->ui32PerfCountersReg,
2308 + &psSGXReadHWPerfCountersOUT->aui32Counters[0],
2309 + &psSGXReadHWPerfCountersOUT->ui32KickTACounter,
2310 + &psSGXReadHWPerfCountersOUT->ui32KickTARenderCounter,
2311 + &psSGXReadHWPerfCountersOUT->ui32CPUTime,
2312 + &psSGXReadHWPerfCountersOUT->ui32SGXTime);
2319 PVRSRVInitSrvConnectBW(IMG_UINT32 ui32BridgeID,
2320 IMG_VOID *psBridgeIn,
2321 @@ -1752,15 +1994,13 @@
2325 - PDUMPENDINITPHASE();
2327 - gbInitServerSuccessful = psInitSrvDisconnectIN->bInitSuccesful;
2329 psPerProc->bInitProcess = IMG_FALSE;
2330 gbInitServerRunning = IMG_FALSE;
2331 gbInitServerRan = IMG_TRUE;
2333 - psRetOUT->eError = PVRSRV_OK;
2334 + psRetOUT->eError = PVRSRVFinaliseSystem(psInitSrvDisconnectIN->bInitSuccesful);
2336 + gbInitSuccessful = (IMG_BOOL)(((psRetOUT->eError == PVRSRV_OK) && (psInitSrvDisconnectIN->bInitSuccesful)));
2340 @@ -1772,15 +2012,99 @@
2341 PVRSRV_BRIDGE_RETURN *psRetOUT,
2342 PVRSRV_PER_PROCESS_DATA *psPerProc)
2344 + IMG_HANDLE hOSEventKM;
2346 PVR_UNREFERENCED_PARAMETER(psPerProc);
2348 PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_EVENT_OBJECT_WAIT);
2350 - psRetOUT->eError = OSEventObjectWait(psEventObjectWaitIN->hOSEventKM, psEventObjectWaitIN->ui32MSTimeout);
2351 + psRetOUT->eError = PVRSRVLookupHandle(psPerProc->psHandleBase,
2353 + psEventObjectWaitIN->hOSEventKM,
2354 + PVRSRV_HANDLE_TYPE_EVENT_OBJECT_CONNECT);
2356 + if(psRetOUT->eError != PVRSRV_OK)
2361 + psRetOUT->eError = OSEventObjectWait(hOSEventKM);
2367 +PVRSRVEventObjectOpenBW(IMG_UINT32 ui32BridgeID,
2368 + PVRSRV_BRIDGE_IN_EVENT_OBJECT_OPEN *psEventObjectOpenIN,
2369 + PVRSRV_BRIDGE_OUT_EVENT_OBJECT_OPEN *psEventObjectOpenOUT,
2370 + PVRSRV_PER_PROCESS_DATA *psPerProc)
2373 + PVR_UNREFERENCED_PARAMETER(psPerProc);
2375 + PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_EVENT_OBJECT_OPEN);
2377 + psEventObjectOpenOUT->eError =
2378 + PVRSRVLookupHandle(psPerProc->psHandleBase,
2379 + &psEventObjectOpenIN->sEventObject.hOSEventKM,
2380 + psEventObjectOpenIN->sEventObject.hOSEventKM,
2381 + PVRSRV_HANDLE_TYPE_SHARED_EVENT_OBJECT);
2383 + if(psEventObjectOpenOUT->eError != PVRSRV_OK)
2387 + psEventObjectOpenOUT->eError = OSEventObjectOpen(&psEventObjectOpenIN->sEventObject, &psEventObjectOpenOUT->hOSEvent);
2389 + if(psEventObjectOpenOUT->eError != PVRSRV_OK)
2393 + psEventObjectOpenOUT->eError =
2394 + PVRSRVAllocHandle(psPerProc->psHandleBase,
2395 + &psEventObjectOpenOUT->hOSEvent,
2396 + psEventObjectOpenOUT->hOSEvent,
2397 + PVRSRV_HANDLE_TYPE_EVENT_OBJECT_CONNECT,
2398 + PVRSRV_HANDLE_ALLOC_FLAG_NONE);
2403 +PVRSRVEventObjectCloseBW(IMG_UINT32 ui32BridgeID,
2404 + PVRSRV_BRIDGE_IN_EVENT_OBJECT_CLOSE *psEventObjectCloseIN,
2405 + PVRSRV_BRIDGE_RETURN *psRetOUT,
2406 + PVRSRV_PER_PROCESS_DATA *psPerProc)
2408 + IMG_HANDLE hOSEventKM;
2410 + PVR_UNREFERENCED_PARAMETER(psPerProc);
2412 + PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_EVENT_OBJECT_CLOSE);
2414 + psRetOUT->eError =
2415 + PVRSRVLookupHandle(psPerProc->psHandleBase,
2416 + &psEventObjectCloseIN->sEventObject.hOSEventKM,
2417 + psEventObjectCloseIN->sEventObject.hOSEventKM,
2418 + PVRSRV_HANDLE_TYPE_SHARED_EVENT_OBJECT);
2419 + if(psRetOUT->eError != PVRSRV_OK)
2424 + psRetOUT->eError = PVRSRVLookupAndReleaseHandle(psPerProc->psHandleBase,
2426 + psEventObjectCloseIN->hOSEventKM,
2427 + PVRSRV_HANDLE_TYPE_EVENT_OBJECT_CONNECT);
2429 + if(psRetOUT->eError != PVRSRV_OK)
2434 + psRetOUT->eError = OSEventObjectClose(&psEventObjectCloseIN->sEventObject, hOSEventKM);
2440 SGXDevInitPart2BW(IMG_UINT32 ui32BridgeID,
2441 @@ -1847,6 +2171,13 @@
2442 bLookupFailed |= (eError != PVRSRV_OK);
2445 +#if defined(SUPPORT_SGX_HWPERF)
2446 + eError = PVRSRVLookupHandle(psPerProc->psHandleBase,
2448 + psSGXDevInitPart2IN->sInitInfo.hKernelHWPerfCBMemInfo,
2449 + PVRSRV_HANDLE_TYPE_MEM_INFO);
2450 + bLookupFailed |= (eError != PVRSRV_OK);
2454 for (i = 0; i < SGX_MAX_INIT_MEM_HANDLES; i++)
2455 @@ -1907,6 +2238,13 @@
2456 bReleaseFailed |= (eError != PVRSRV_OK);
2459 +#if defined(SUPPORT_SGX_HWPERF)
2460 + eError = PVRSRVLookupAndReleaseHandle(psPerProc->psHandleBase,
2461 + &psSGXDevInitPart2IN->sInitInfo.hKernelHWPerfCBMemInfo,
2462 + psSGXDevInitPart2IN->sInitInfo.hKernelHWPerfCBMemInfo,
2463 + PVRSRV_HANDLE_TYPE_MEM_INFO);
2464 + bReleaseFailed |= (eError != PVRSRV_OK);
2468 for (i = 0; i < SGX_MAX_INIT_MEM_HANDLES; i++)
2469 @@ -1950,6 +2288,10 @@
2470 bDissociateFailed |= (eError != PVRSRV_OK);
2473 +#if defined(SUPPORT_SGX_HWPERF)
2474 + eError = PVRSRVDissociateDeviceMemKM(hDevCookieInt, psSGXDevInitPart2IN->sInitInfo.hKernelHWPerfCBMemInfo);
2475 + bDissociateFailed |= (eError != PVRSRV_OK);
2479 for (i = 0; i < SGX_MAX_INIT_MEM_HANDLES; i++)
2480 @@ -2005,7 +2347,6 @@
2481 PVRSRV_PER_PROCESS_DATA *psPerProc)
2483 IMG_HANDLE hDevCookieInt;
2484 - PVRSRV_SGXDEV_INFO *psDevInfo;
2485 IMG_HANDLE hHWRenderContextInt;
2487 PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_SGX_REGISTER_HW_RENDER_CONTEXT);
2488 @@ -2020,10 +2361,8 @@
2492 - psDevInfo = (PVRSRV_SGXDEV_INFO *)((PVRSRV_DEVICE_NODE *)hDevCookieInt)->pvDevice;
2494 hHWRenderContextInt =
2495 - SGXRegisterHWRenderContextKM(psDevInfo,
2496 + SGXRegisterHWRenderContextKM(hDevCookieInt,
2497 &psSGXRegHWRenderContextIN->sHWRenderContextDevVAddr);
2499 if (hHWRenderContextInt == IMG_NULL)
2500 @@ -2043,54 +2382,180 @@
2504 -SGXFlushHWRenderTargetBW(IMG_UINT32 ui32BridgeID,
2505 - PVRSRV_BRIDGE_IN_SGX_FLUSH_HW_RENDER_TARGET *psSGXFlushHWRenderTargetIN,
2506 - PVRSRV_BRIDGE_RETURN *psRetOUT,
2507 - PVRSRV_PER_PROCESS_DATA *psPerProc)
2508 +SGXUnregisterHWRenderContextBW(IMG_UINT32 ui32BridgeID,
2509 + PVRSRV_BRIDGE_IN_SGX_UNREGISTER_HW_RENDER_CONTEXT *psSGXUnregHWRenderContextIN,
2510 + PVRSRV_BRIDGE_RETURN *psRetOUT,
2511 + PVRSRV_PER_PROCESS_DATA *psPerProc)
2513 - IMG_HANDLE hDevCookieInt;
2514 - PVRSRV_SGXDEV_INFO *psDevInfo;
2516 - PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_SGX_FLUSH_HW_RENDER_TARGET);
2517 + IMG_HANDLE hHWRenderContextInt;
2519 + PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_SGX_UNREGISTER_HW_RENDER_CONTEXT);
2522 + PVRSRVLookupHandle(psPerProc->psHandleBase,
2523 + &hHWRenderContextInt,
2524 + psSGXUnregHWRenderContextIN->hHWRenderContext,
2525 + PVRSRV_HANDLE_TYPE_SGX_HW_RENDER_CONTEXT);
2526 + if(psRetOUT->eError != PVRSRV_OK)
2531 + psRetOUT->eError = SGXUnregisterHWRenderContextKM(hHWRenderContextInt);
2532 + if(psRetOUT->eError != PVRSRV_OK)
2537 + psRetOUT->eError =
2538 + PVRSRVReleaseHandle(psPerProc->psHandleBase,
2539 + psSGXUnregHWRenderContextIN->hHWRenderContext,
2540 + PVRSRV_HANDLE_TYPE_SGX_HW_RENDER_CONTEXT);
2546 +SGXRegisterHWTransferContextBW(IMG_UINT32 ui32BridgeID,
2547 + PVRSRV_BRIDGE_IN_SGX_REGISTER_HW_TRANSFER_CONTEXT *psSGXRegHWTransferContextIN,
2548 + PVRSRV_BRIDGE_OUT_SGX_REGISTER_HW_TRANSFER_CONTEXT *psSGXRegHWTransferContextOUT,
2549 + PVRSRV_PER_PROCESS_DATA *psPerProc)
2551 + IMG_HANDLE hDevCookieInt;
2552 + IMG_HANDLE hHWTransferContextInt;
2554 + PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_SGX_REGISTER_HW_TRANSFER_CONTEXT);
2556 + psSGXRegHWTransferContextOUT->eError =
2557 PVRSRVLookupHandle(psPerProc->psHandleBase,
2559 - psSGXFlushHWRenderTargetIN->hDevCookie,
2560 + psSGXRegHWTransferContextIN->hDevCookie,
2561 PVRSRV_HANDLE_TYPE_DEV_NODE);
2562 + if(psSGXRegHWTransferContextOUT->eError != PVRSRV_OK)
2567 + hHWTransferContextInt =
2568 + SGXRegisterHWTransferContextKM(hDevCookieInt,
2569 + &psSGXRegHWTransferContextIN->sHWTransferContextDevVAddr);
2571 + if (hHWTransferContextInt == IMG_NULL)
2573 + psSGXRegHWTransferContextOUT->eError = PVRSRV_ERROR_GENERIC;
2577 + psSGXRegHWTransferContextOUT->eError =
2578 + PVRSRVAllocHandle(psPerProc->psHandleBase,
2579 + &psSGXRegHWTransferContextOUT->hHWTransferContext,
2580 + hHWTransferContextInt,
2581 + PVRSRV_HANDLE_TYPE_SGX_HW_TRANSFER_CONTEXT,
2582 + PVRSRV_HANDLE_ALLOC_FLAG_NONE);
2588 +SGXUnregisterHWTransferContextBW(IMG_UINT32 ui32BridgeID,
2589 + PVRSRV_BRIDGE_IN_SGX_UNREGISTER_HW_TRANSFER_CONTEXT *psSGXUnregHWTransferContextIN,
2590 + PVRSRV_BRIDGE_RETURN *psRetOUT,
2591 + PVRSRV_PER_PROCESS_DATA *psPerProc)
2593 + IMG_HANDLE hHWTransferContextInt;
2595 + PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_SGX_UNREGISTER_HW_TRANSFER_CONTEXT);
2597 + psRetOUT->eError =
2598 + PVRSRVLookupHandle(psPerProc->psHandleBase,
2599 + &hHWTransferContextInt,
2600 + psSGXUnregHWTransferContextIN->hHWTransferContext,
2601 + PVRSRV_HANDLE_TYPE_SGX_HW_TRANSFER_CONTEXT);
2602 if(psRetOUT->eError != PVRSRV_OK)
2607 + psRetOUT->eError = SGXUnregisterHWTransferContextKM(hHWTransferContextInt);
2608 + if(psRetOUT->eError != PVRSRV_OK)
2613 + psRetOUT->eError =
2614 + PVRSRVReleaseHandle(psPerProc->psHandleBase,
2615 + psSGXUnregHWTransferContextIN->hHWTransferContext,
2616 + PVRSRV_HANDLE_TYPE_SGX_HW_TRANSFER_CONTEXT);
2621 +#if defined(SGX_FEATURE_2D_HARDWARE)
2623 +SGXRegisterHW2DContextBW(IMG_UINT32 ui32BridgeID,
2624 + PVRSRV_BRIDGE_IN_SGX_REGISTER_HW_2D_CONTEXT *psSGXRegHW2DContextIN,
2625 + PVRSRV_BRIDGE_OUT_SGX_REGISTER_HW_2D_CONTEXT *psSGXRegHW2DContextOUT,
2626 + PVRSRV_PER_PROCESS_DATA *psPerProc)
2628 + IMG_HANDLE hDevCookieInt;
2629 + PVRSRV_SGXDEV_INFO *psDevInfo;
2630 + IMG_HANDLE hHW2DContextInt;
2632 + PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_SGX_REGISTER_HW_2D_CONTEXT);
2634 + psSGXRegHW2DContextOUT->eError =
2635 + PVRSRVLookupHandle(psPerProc->psHandleBase,
2637 + psSGXRegHW2DContextIN->hDevCookie,
2638 + PVRSRV_HANDLE_TYPE_DEV_NODE);
2639 + if(psSGXRegHW2DContextOUT->eError != PVRSRV_OK)
2644 psDevInfo = (PVRSRV_SGXDEV_INFO *)((PVRSRV_DEVICE_NODE *)hDevCookieInt)->pvDevice;
2646 - SGXFlushHWRenderTargetKM(psDevInfo, psSGXFlushHWRenderTargetIN->sHWRTDataSetDevVAddr);
2648 + SGXRegisterHW2DContextKM(hDevCookieInt,
2649 + &psSGXRegHW2DContextIN->sHW2DContextDevVAddr);
2651 + if (hHW2DContextInt == IMG_NULL)
2653 + psSGXRegHW2DContextOUT->eError = PVRSRV_ERROR_GENERIC;
2657 + psSGXRegHW2DContextOUT->eError =
2658 + PVRSRVAllocHandle(psPerProc->psHandleBase,
2659 + &psSGXRegHW2DContextOUT->hHW2DContext,
2661 + PVRSRV_HANDLE_TYPE_SGX_HW_2D_CONTEXT,
2662 + PVRSRV_HANDLE_ALLOC_FLAG_NONE);
2668 -SGXUnregisterHWRenderContextBW(IMG_UINT32 ui32BridgeID,
2669 - PVRSRV_BRIDGE_IN_SGX_UNREGISTER_HW_RENDER_CONTEXT *psSGXUnregHWRenderContextIN,
2670 +SGXUnregisterHW2DContextBW(IMG_UINT32 ui32BridgeID,
2671 + PVRSRV_BRIDGE_IN_SGX_UNREGISTER_HW_2D_CONTEXT *psSGXUnregHW2DContextIN,
2672 PVRSRV_BRIDGE_RETURN *psRetOUT,
2673 PVRSRV_PER_PROCESS_DATA *psPerProc)
2675 - IMG_HANDLE hHWRenderContextInt;
2676 + IMG_HANDLE hHW2DContextInt;
2678 - PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_SGX_UNREGISTER_HW_RENDER_CONTEXT);
2679 + PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_SGX_UNREGISTER_HW_2D_CONTEXT);
2682 PVRSRVLookupHandle(psPerProc->psHandleBase,
2683 - &hHWRenderContextInt,
2684 - psSGXUnregHWRenderContextIN->hHWRenderContext,
2685 - PVRSRV_HANDLE_TYPE_SGX_HW_RENDER_CONTEXT);
2687 + psSGXUnregHW2DContextIN->hHW2DContext,
2688 + PVRSRV_HANDLE_TYPE_SGX_HW_2D_CONTEXT);
2689 if(psRetOUT->eError != PVRSRV_OK)
2694 - psRetOUT->eError = SGXUnregisterHWRenderContextKM(hHWRenderContextInt);
2695 + psRetOUT->eError = SGXUnregisterHW2DContextKM(hHW2DContextInt);
2696 if(psRetOUT->eError != PVRSRV_OK)
2699 @@ -2098,11 +2563,37 @@
2702 PVRSRVReleaseHandle(psPerProc->psHandleBase,
2703 - psSGXUnregHWRenderContextIN->hHWRenderContext,
2704 - PVRSRV_HANDLE_TYPE_SGX_HW_RENDER_CONTEXT);
2705 + psSGXUnregHW2DContextIN->hHW2DContext,
2706 + PVRSRV_HANDLE_TYPE_SGX_HW_2D_CONTEXT);
2713 +SGXFlushHWRenderTargetBW(IMG_UINT32 ui32BridgeID,
2714 + PVRSRV_BRIDGE_IN_SGX_FLUSH_HW_RENDER_TARGET *psSGXFlushHWRenderTargetIN,
2715 + PVRSRV_BRIDGE_RETURN *psRetOUT,
2716 + PVRSRV_PER_PROCESS_DATA *psPerProc)
2718 + IMG_HANDLE hDevCookieInt;
2720 + PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_SGX_FLUSH_HW_RENDER_TARGET);
2722 + psRetOUT->eError =
2723 + PVRSRVLookupHandle(psPerProc->psHandleBase,
2725 + psSGXFlushHWRenderTargetIN->hDevCookie,
2726 + PVRSRV_HANDLE_TYPE_DEV_NODE);
2727 + if(psRetOUT->eError != PVRSRV_OK)
2732 + SGXFlushHWRenderTargetKM(hDevCookieInt, psSGXFlushHWRenderTargetIN->sHWRTDataSetDevVAddr);
2737 #if defined(SGX_FEATURE_2D_HARDWARE)
2739 @@ -2679,16 +3170,63 @@
2740 PVRSRV_BRIDGE_OUT_GET_MISC_INFO *psGetMiscInfoOUT,
2741 PVRSRV_PER_PROCESS_DATA *psPerProc)
2743 + PVRSRV_ERROR eError;
2745 PVR_UNREFERENCED_PARAMETER(psPerProc);
2747 PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_GET_MISC_INFO);
2749 OSMemCopy(&psGetMiscInfoOUT->sMiscInfo,
2750 &psGetMiscInfoIN->sMiscInfo,
2751 sizeof(PVRSRV_MISC_INFO));
2753 - psGetMiscInfoOUT->eError = PVRSRVGetMiscInfoKM(&psGetMiscInfoIN->sMiscInfo);
2754 - psGetMiscInfoOUT->sMiscInfo = psGetMiscInfoIN->sMiscInfo;
2755 + if (psGetMiscInfoIN->sMiscInfo.ui32StateRequest & PVRSRV_MISC_INFO_MEMSTATS_PRESENT)
2758 + eError = OSAllocMem(PVRSRV_OS_PAGEABLE_HEAP,
2759 + psGetMiscInfoOUT->sMiscInfo.ui32MemoryStrLen,
2760 + (IMG_VOID **)&psGetMiscInfoOUT->sMiscInfo.pszMemoryStr, 0);
2761 + if(eError != PVRSRV_OK)
2763 + PVR_DPF((PVR_DBG_ERROR, "PVRSRVGetMiscInfoBW Out of memory"));
2767 + psGetMiscInfoOUT->eError = PVRSRVGetMiscInfoKM(&psGetMiscInfoOUT->sMiscInfo);
2770 + eError = CopyToUserWrapper(psPerProc, ui32BridgeID,
2771 + psGetMiscInfoIN->sMiscInfo.pszMemoryStr,
2772 + psGetMiscInfoOUT->sMiscInfo.pszMemoryStr,
2773 + psGetMiscInfoOUT->sMiscInfo.ui32MemoryStrLen);
2776 + OSFreeMem(PVRSRV_OS_PAGEABLE_HEAP,
2777 + psGetMiscInfoOUT->sMiscInfo.ui32MemoryStrLen,
2778 + (IMG_VOID *)psGetMiscInfoOUT->sMiscInfo.pszMemoryStr, 0);
2781 + psGetMiscInfoOUT->sMiscInfo.pszMemoryStr = psGetMiscInfoIN->sMiscInfo.pszMemoryStr;
2783 + if(eError != PVRSRV_OK)
2786 + PVR_DPF((PVR_DBG_ERROR, "PVRSRVGetMiscInfoBW Error copy to user"));
2792 + psGetMiscInfoOUT->eError = PVRSRVGetMiscInfoKM(&psGetMiscInfoOUT->sMiscInfo);
2795 + if (psGetMiscInfoIN->sMiscInfo.ui32StateRequest & PVRSRV_MISC_INFO_GLOBALEVENTOBJECT_PRESENT)
2797 + psGetMiscInfoOUT->eError = PVRSRVAllocHandle(psPerProc->psHandleBase,
2798 + &psGetMiscInfoOUT->sMiscInfo.sGlobalEventObject.hOSEventKM,
2799 + psGetMiscInfoOUT->sMiscInfo.sGlobalEventObject.hOSEventKM,
2800 + PVRSRV_HANDLE_TYPE_SHARED_EVENT_OBJECT,
2801 + PVRSRV_HANDLE_ALLOC_FLAG_SHARED);
2806 @@ -3526,6 +4064,7 @@
2807 psKernelMemInfo->ui32Flags;
2808 psAllocSharedSysMemOUT->sClientMemInfo.ui32AllocSize =
2809 psKernelMemInfo->ui32AllocSize;
2810 + psAllocSharedSysMemOUT->sClientMemInfo.hMappingInfo = psKernelMemInfo->sMemBlk.hOSMemHandle;
2811 psAllocSharedSysMemOUT->eError =
2812 PVRSRVAllocHandle(psPerProc->psHandleBase,
2813 &psAllocSharedSysMemOUT->sClientMemInfo.hKernelMemInfo,
2814 @@ -3641,7 +4180,7 @@
2815 psKernelMemInfo->ui32Flags;
2816 psMapMemInfoMemOUT->sClientMemInfo.ui32AllocSize =
2817 psKernelMemInfo->ui32AllocSize;
2818 - psMapMemInfoMemOUT->sClientMemInfo.hMappingInfo = IMG_NULL;
2819 + psMapMemInfoMemOUT->sClientMemInfo.hMappingInfo = psKernelMemInfo->sMemBlk.hOSMemHandle;
2820 psMapMemInfoMemOUT->eError =
2821 PVRSRVAllocSubHandle(psPerProc->psHandleBase,
2822 &psMapMemInfoMemOUT->sClientMemInfo.hKernelMemInfo,
2823 @@ -3972,6 +4511,8 @@
2826 SetDispatchTableEntry(PVRSRV_BRIDGE_EVENT_OBJECT_WAIT, PVRSRVEventObjectWaitBW);
2827 + SetDispatchTableEntry(PVRSRV_BRIDGE_EVENT_OBJECT_OPEN, PVRSRVEventObjectOpenBW);
2828 + SetDispatchTableEntry(PVRSRV_BRIDGE_EVENT_OBJECT_CLOSE, PVRSRVEventObjectCloseBW);
2831 #if defined(SUPPORT_SGX1)
2832 @@ -4009,7 +4550,18 @@
2833 SetDispatchTableEntry(PVRSRV_BRIDGE_SGX_REGISTER_HW_RENDER_CONTEXT, SGXRegisterHWRenderContextBW);
2834 SetDispatchTableEntry(PVRSRV_BRIDGE_SGX_FLUSH_HW_RENDER_TARGET, SGXFlushHWRenderTargetBW);
2835 SetDispatchTableEntry(PVRSRV_BRIDGE_SGX_UNREGISTER_HW_RENDER_CONTEXT, SGXUnregisterHWRenderContextBW);
2837 +#if defined(SGX_FEATURE_2D_HARDWARE)
2838 +#if defined(TRANSFER_QUEUE)
2839 + SetDispatchTableEntry(PVRSRV_BRIDGE_SGX_SUBMIT2D, SGXSubmit2DBW);
2841 + SetDispatchTableEntry(PVRSRV_BRIDGE_SGX_REGISTER_HW_2D_CONTEXT, SGXRegisterHW2DContextBW);
2842 + SetDispatchTableEntry(PVRSRV_BRIDGE_SGX_UNREGISTER_HW_2D_CONTEXT, SGXUnregisterHW2DContextBW);
2844 + SetDispatchTableEntry(PVRSRV_BRIDGE_SGX_REGISTER_HW_TRANSFER_CONTEXT, SGXRegisterHWTransferContextBW);
2845 + SetDispatchTableEntry(PVRSRV_BRIDGE_SGX_UNREGISTER_HW_TRANSFER_CONTEXT, SGXUnregisterHWTransferContextBW);
2847 +#if defined(SUPPORT_SGX_HWPERF)
2848 + SetDispatchTableEntry(PVRSRV_BRIDGE_SGX_READ_HWPERF_COUNTERS, SGXReadHWPerfCountersBW);
2852 @@ -4059,7 +4611,7 @@
2856 - if(!gbInitServerSuccessful)
2857 + if(!gbInitSuccessful)
2859 PVR_DPF((PVR_DBG_ERROR, "%s: Initialisation failed. Driver unusable.",
2861 diff -Nurd git/drivers/gpu/pvr/services4/srvkm/common/deviceclass.c git/drivers/gpu/pvr/services4/srvkm/common/deviceclass.c
2862 --- git/drivers/gpu/pvr/services4/srvkm/common/deviceclass.c 2009-01-05 20:00:44.000000000 +0100
2863 +++ git/drivers/gpu/pvr/services4/srvkm/common/deviceclass.c 2008-12-18 15:47:29.000000000 +0100
2866 ******************************************************************************/
2868 -#include <linux/module.h>
2869 #include "services_headers.h"
2870 #include "buffer_manager.h"
2871 #include "kernelbuffer.h"
2872 @@ -1128,7 +1127,8 @@
2875 apsSrcSync[0] = psBuffer->sDeviceClassBuffer.psKernelSyncInfo;
2876 - if(psBuffer->psSwapChain->psLastFlipBuffer)
2877 + if(psBuffer->psSwapChain->psLastFlipBuffer &&
2878 + psBuffer != psBuffer->psSwapChain->psLastFlipBuffer)
2880 apsSrcSync[1] = psBuffer->psSwapChain->psLastFlipBuffer->sDeviceClassBuffer.psKernelSyncInfo;
2882 @@ -1389,7 +1389,7 @@
2886 -IMG_VOID PVRSRVSetDCState(IMG_UINT32 ui32State)
2887 +IMG_VOID IMG_CALLCONV PVRSRVSetDCState(IMG_UINT32 ui32State)
2889 PVRSRV_DISPLAYCLASS_INFO *psDCInfo;
2890 PVRSRV_DEVICE_NODE *psDeviceNode;
2891 diff -Nurd git/drivers/gpu/pvr/services4/srvkm/common/devicemem.c git/drivers/gpu/pvr/services4/srvkm/common/devicemem.c
2892 --- git/drivers/gpu/pvr/services4/srvkm/common/devicemem.c 2009-01-05 20:00:44.000000000 +0100
2893 +++ git/drivers/gpu/pvr/services4/srvkm/common/devicemem.c 2008-12-18 15:47:29.000000000 +0100
2896 IMG_HANDLE hDevMemContext;
2899 + if (!hDevMemHeap ||
2902 return PVRSRV_ERROR_INVALID_PARAMS;
2904 diff -Nurd git/drivers/gpu/pvr/services4/srvkm/common/handle.c git/drivers/gpu/pvr/services4/srvkm/common/handle.c
2905 --- git/drivers/gpu/pvr/services4/srvkm/common/handle.c 2009-01-05 20:00:44.000000000 +0100
2906 +++ git/drivers/gpu/pvr/services4/srvkm/common/handle.c 2008-12-18 15:47:29.000000000 +0100
2908 ******************************************************************************/
2910 #ifdef PVR_SECURE_HANDLES
2912 +#include <linux/vmalloc.h>
2917 #include "services_headers.h"
2919 #define HANDLE_BLOCK_SIZE 256
2922 +#define HANDLE_LARGE_BLOCK_SIZE 1024
2924 #define HANDLE_HASH_TAB_INIT_SIZE 32
2926 #define INDEX_IS_VALID(psBase, i) ((i) < (psBase)->ui32TotalHandCount)
2927 @@ -100,13 +106,13 @@
2931 - bIsEmpty = (psList->ui32Next == ui32Index);
2932 + bIsEmpty = (IMG_BOOL)(psList->ui32Next == ui32Index);
2938 - bIsEmpty2 = (psList->ui32Prev == ui32Index);
2939 + bIsEmpty2 = (IMG_BOOL)(psList->ui32Prev == ui32Index);
2940 PVR_ASSERT(bIsEmpty == bIsEmpty2);
2948 #ifdef INLINE_IS_PRAGMA
2949 #pragma inline(NoChildren)
2957 #ifdef INLINE_IS_PRAGMA
2958 #pragma inline(ParentHandle)
2959 @@ -328,6 +336,14 @@
2961 if (psBase->psHandleArray != IMG_NULL)
2964 + if (psBase->bVmallocUsed)
2966 + vfree(psBase->psHandleArray);
2967 + psBase->psHandleArray = IMG_NULL;
2971 eError = OSFreeMem(PVRSRV_OS_NON_PAGEABLE_HEAP,
2972 psBase->ui32TotalHandCount * sizeof(struct sHandle),
2973 psBase->psHandleArray,
2976 PVR_ASSERT(hHandle != IMG_NULL);
2977 PVR_ASSERT(hHandle == INDEX_TO_HANDLE(psBase, ui32Index));
2978 + PVR_UNREFERENCED_PARAMETER(hHandle);
2982 @@ -495,22 +512,46 @@
2983 return (IMG_HANDLE) HASH_Retrieve_Extended(psBase->psHashTab, aKey);
2986 +#define NEW_HANDLE_ARRAY_SIZE(psBase, handleNumberIncrement) \
2987 + (((psBase)->ui32TotalHandCount + (handleNumberIncrement)) * \
2988 + sizeof(struct sHandle))
2990 static PVRSRV_ERROR IncreaseHandleArraySize(PVRSRV_HANDLE_BASE *psBase)
2992 struct sHandle *psNewHandleArray;
2993 IMG_HANDLE hNewHandBlockAlloc;
2994 PVRSRV_ERROR eError;
2995 struct sHandle *psHandle;
2996 + IMG_UINT32 ui32HandleNumberIncrement = HANDLE_BLOCK_SIZE;
2997 + IMG_UINT32 ui32NewHandleArraySize = NEW_HANDLE_ARRAY_SIZE(psBase, ui32HandleNumberIncrement);
2999 + IMG_BOOL bVmallocUsed = IMG_FALSE;
3003 eError = OSAllocMem(PVRSRV_OS_NON_PAGEABLE_HEAP,
3004 - (psBase->ui32TotalHandCount + HANDLE_BLOCK_SIZE) * sizeof(struct sHandle),
3005 + ui32NewHandleArraySize,
3006 (IMG_PVOID *)&psNewHandleArray,
3007 &hNewHandBlockAlloc);
3008 if (eError != PVRSRV_OK)
3011 + PVR_TRACE(("IncreaseHandleArraySize: OSAllocMem failed (%d), trying vmalloc", eError));
3013 + ui32HandleNumberIncrement = HANDLE_LARGE_BLOCK_SIZE;
3014 + ui32NewHandleArraySize = NEW_HANDLE_ARRAY_SIZE(psBase, ui32HandleNumberIncrement);
3016 + psNewHandleArray = vmalloc(ui32NewHandleArraySize);
3017 + if (psNewHandleArray == IMG_NULL)
3019 + PVR_TRACE(("IncreaseHandleArraySize: vmalloc failed"));
3020 + return PVRSRV_ERROR_OUT_OF_MEMORY;
3022 + bVmallocUsed = IMG_TRUE;
3024 PVR_DPF((PVR_DBG_ERROR, "IncreaseHandleArraySize: Couldn't allocate new handle array (%d)", eError));
3033 for(psHandle = psNewHandleArray + psBase->ui32TotalHandCount;
3034 - psHandle < psNewHandleArray + psBase->ui32TotalHandCount + HANDLE_BLOCK_SIZE;
3035 + psHandle < psNewHandleArray + psBase->ui32TotalHandCount + ui32HandleNumberIncrement;
3038 psHandle->eType = PVRSRV_HANDLE_TYPE_NONE;
3039 @@ -538,15 +579,18 @@
3041 psBase->psHandleArray = psNewHandleArray;
3042 psBase->hHandBlockAlloc = hNewHandBlockAlloc;
3044 + psBase->bVmallocUsed = bVmallocUsed;
3048 PVR_ASSERT(psBase->ui32FreeHandCount == 0);
3049 - psBase->ui32FreeHandCount = HANDLE_BLOCK_SIZE;
3050 + psBase->ui32FreeHandCount = ui32HandleNumberIncrement;
3052 PVR_ASSERT(psBase->ui32FirstFreeIndex == 0);
3053 psBase->ui32FirstFreeIndex = psBase->ui32TotalHandCount;
3055 - psBase->ui32TotalHandCount += HANDLE_BLOCK_SIZE;
3056 + psBase->ui32TotalHandCount += ui32HandleNumberIncrement;
3058 PVR_ASSERT(psBase->ui32LastFreeIndexPlusOne == 0);
3059 psBase->ui32LastFreeIndexPlusOne = psBase->ui32TotalHandCount;
3062 PVR_ASSERT(eType != PVRSRV_HANDLE_TYPE_NONE);
3064 - PVR_ASSERT(psBase->psHashTab != NULL);
3065 + PVR_ASSERT(psBase->psHashTab != IMG_NULL);
3067 if (!(eFlag & PVRSRV_HANDLE_ALLOC_FLAG_MULTI))
3069 diff -Nurd git/drivers/gpu/pvr/services4/srvkm/common/power.c git/drivers/gpu/pvr/services4/srvkm/common/power.c
3070 --- git/drivers/gpu/pvr/services4/srvkm/common/power.c 2009-01-05 20:00:44.000000000 +0100
3071 +++ git/drivers/gpu/pvr/services4/srvkm/common/power.c 2008-12-18 15:47:29.000000000 +0100
3072 @@ -207,6 +207,21 @@
3076 +PVRSRV_ERROR PVRSRVSetDevicePowerStateCoreKM(IMG_UINT32 ui32DeviceIndex,
3077 + PVR_POWER_STATE eNewPowerState)
3079 + PVRSRV_ERROR eError;
3080 + eError = PVRSRVDevicePrePowerStateKM(IMG_FALSE, ui32DeviceIndex, eNewPowerState);
3081 + if(eError != PVRSRV_OK)
3086 + eError = PVRSRVDevicePostPowerStateKM(IMG_FALSE, ui32DeviceIndex, eNewPowerState);
3092 PVRSRV_ERROR PVRSRVSetDevicePowerStateKM(IMG_UINT32 ui32DeviceIndex,
3093 PVR_POWER_STATE eNewPowerState,
3094 diff -Nurd git/drivers/gpu/pvr/services4/srvkm/common/pvrsrv.c git/drivers/gpu/pvr/services4/srvkm/common/pvrsrv.c
3095 --- git/drivers/gpu/pvr/services4/srvkm/common/pvrsrv.c 2009-01-05 20:00:44.000000000 +0100
3096 +++ git/drivers/gpu/pvr/services4/srvkm/common/pvrsrv.c 2008-12-18 15:47:29.000000000 +0100
3098 #include "buffer_manager.h"
3100 #include "perproc.h"
3101 +#include "pdump_km.h"
3109 -PVRSRV_ERROR PVRSRVInit(PSYS_DATA psSysData)
3110 +PVRSRV_ERROR IMG_CALLCONV PVRSRVInit(PSYS_DATA psSysData)
3112 PVRSRV_ERROR eError;
3114 @@ -215,6 +216,20 @@
3115 gpsSysData->eCurrentPowerState = PVRSRV_POWER_STATE_D0;
3116 gpsSysData->eFailedPowerState = PVRSRV_POWER_Unspecified;
3119 + if(OSAllocMem( PVRSRV_OS_PAGEABLE_HEAP,
3120 + sizeof(PVRSRV_EVENTOBJECT) ,
3121 + (IMG_VOID **)&psSysData->psGlobalEventObject, 0) != PVRSRV_OK)
3127 + if(OSEventObjectCreate("PVRSRV_GLOBAL_EVENTOBJECT", psSysData->psGlobalEventObject) != PVRSRV_OK)
3135 @@ -224,12 +239,21 @@
3139 -IMG_VOID PVRSRVDeInit(PSYS_DATA psSysData)
3140 +IMG_VOID IMG_CALLCONV PVRSRVDeInit(PSYS_DATA psSysData)
3142 PVRSRV_ERROR eError;
3144 PVR_UNREFERENCED_PARAMETER(psSysData);
3147 + if(psSysData->psGlobalEventObject)
3149 + OSEventObjectDestroy(psSysData->psGlobalEventObject);
3150 + OSFreeMem( PVRSRV_OS_PAGEABLE_HEAP,
3151 + sizeof(PVRSRV_EVENTOBJECT) ,
3152 + psSysData->psGlobalEventObject, 0);
3155 eError = PVRSRVHandleDeInit();
3156 if (eError != PVRSRV_OK)
3158 @@ -246,10 +270,10 @@
3162 -PVRSRV_ERROR PVRSRVRegisterDevice(PSYS_DATA psSysData,
3163 - PVRSRV_ERROR (*pfnRegisterDevice)(PVRSRV_DEVICE_NODE*),
3164 - IMG_UINT32 ui32SOCInterruptBit,
3165 - IMG_UINT32 *pui32DeviceIndex)
3166 +PVRSRV_ERROR IMG_CALLCONV PVRSRVRegisterDevice(PSYS_DATA psSysData,
3167 + PVRSRV_ERROR (*pfnRegisterDevice)(PVRSRV_DEVICE_NODE*),
3168 + IMG_UINT32 ui32SOCInterruptBit,
3169 + IMG_UINT32 *pui32DeviceIndex)
3171 PVRSRV_ERROR eError;
3172 PVRSRV_DEVICE_NODE *psDeviceNode;
3173 @@ -342,6 +366,61 @@
3180 + eError = PVRSRVResManConnect(RESMAN_KERNEL_PROCESSID, IMG_TRUE);
3181 + if (eError != PVRSRV_OK)
3183 + PVR_DPF((PVR_DBG_ERROR,"PVRSRVInitialiseDevice: Failed PVRSRVResManConnect call"));
3191 +PVRSRV_ERROR IMG_CALLCONV PVRSRVFinaliseSystem(IMG_BOOL bInitSuccessful)
3193 + PVRSRV_DEVICE_NODE *psDeviceNode;
3194 + SYS_DATA *psSysData;
3195 + PVRSRV_ERROR eError;
3197 + PVR_DPF((PVR_DBG_MESSAGE, "PVRSRVFinaliseSystem"));
3199 + eError = SysAcquireData(&psSysData);
3200 + if(eError != PVRSRV_OK)
3202 + PVR_DPF((PVR_DBG_ERROR,"PVRSRVFinaliseSystem: Failed to get SysData"));
3206 + if (bInitSuccessful)
3208 + eError = SysFinalise();
3209 + if (eError != PVRSRV_OK)
3211 + PVR_DPF((PVR_DBG_ERROR,"PVRSRVFinaliseSystem: SysFinalise failed (%d)", eError));
3216 + psDeviceNode = psSysData->psDeviceNodeList;
3217 + while (psDeviceNode)
3219 + eError = PVRSRVSetDevicePowerStateKM(psDeviceNode->sDevId.ui32DeviceIndex,
3220 + PVRSRV_POWER_Unspecified,
3221 + KERNEL_ID, IMG_FALSE);
3222 + if (eError != PVRSRV_OK)
3224 + PVR_DPF((PVR_DBG_ERROR,"PVRSRVFinaliseSystem: Failed PVRSRVSetDevicePowerStateKM call (device index: %d)", psDeviceNode->sDevId.ui32DeviceIndex));
3226 + psDeviceNode = psDeviceNode->psNext;
3230 + PDUMPENDINITPHASE();
3239 -PVRSRV_ERROR PVRSRVDeinitialiseDevice(IMG_UINT32 ui32DevIndex)
3240 +PVRSRV_ERROR IMG_CALLCONV PVRSRVDeinitialiseDevice(IMG_UINT32 ui32DevIndex)
3242 PVRSRV_DEVICE_NODE *psDeviceNode;
3243 PVRSRV_DEVICE_NODE **ppsDevNode;
3244 @@ -441,10 +520,6 @@
3249 -#if defined(SUPPORT_ACTIVE_POWER_MANAGEMENT)
3252 eError = PVRSRVSetDevicePowerStateKM(ui32DevIndex,
3253 PVRSRV_POWER_STATE_D3,
3255 @@ -454,7 +529,16 @@
3256 PVR_DPF((PVR_DBG_ERROR,"PVRSRVDeinitialiseDevice: Failed PVRSRVSetDevicePowerStateKM call"));
3264 + eError = PVRSRVResManConnect(RESMAN_KERNEL_PROCESSID, IMG_FALSE);
3265 + if (eError != PVRSRV_OK)
3267 + PVR_DPF((PVR_DBG_ERROR,"PVRSRVDeinitialiseDevice: Failed PVRSRVResManConnect call"));
3273 @@ -481,11 +565,11 @@
3277 -PVRSRV_ERROR PollForValueKM (volatile IMG_UINT32* pui32LinMemAddr,
3278 - IMG_UINT32 ui32Value,
3279 - IMG_UINT32 ui32Mask,
3280 - IMG_UINT32 ui32Waitus,
3281 - IMG_UINT32 ui32Tries)
3282 +PVRSRV_ERROR IMG_CALLCONV PollForValueKM (volatile IMG_UINT32* pui32LinMemAddr,
3283 + IMG_UINT32 ui32Value,
3284 + IMG_UINT32 ui32Mask,
3285 + IMG_UINT32 ui32Waitus,
3286 + IMG_UINT32 ui32Tries)
3288 IMG_BOOL bStart = IMG_FALSE;
3289 IMG_UINT32 uiStart = 0, uiCurrent=0, uiMaxTime;
3292 if(psMiscInfo->ui32StateRequest & ~(PVRSRV_MISC_INFO_TIMER_PRESENT
3293 |PVRSRV_MISC_INFO_CLOCKGATE_PRESENT
3294 - |PVRSRV_MISC_INFO_MEMSTATS_PRESENT))
3295 + |PVRSRV_MISC_INFO_MEMSTATS_PRESENT
3296 + |PVRSRV_MISC_INFO_GLOBALEVENTOBJECT_PRESENT))
3298 PVR_DPF((PVR_DBG_ERROR,"PVRSRVGetMiscInfoKM: invalid state request flags"));
3299 return PVRSRV_ERROR_INVALID_PARAMS;
3300 @@ -719,13 +804,20 @@
3301 i32Count = OSSNPrintf(pszStr, 100, "\n\0");
3302 UPDATE_SPACE(pszStr, i32Count, ui32StrLen);
3305 + if((psMiscInfo->ui32StateRequest & PVRSRV_MISC_INFO_GLOBALEVENTOBJECT_PRESENT)
3306 + && psSysData->psGlobalEventObject)
3308 + psMiscInfo->ui32StatePresent |= PVRSRV_MISC_INFO_GLOBALEVENTOBJECT_PRESENT;
3309 + psMiscInfo->sGlobalEventObject = *psSysData->psGlobalEventObject;
3316 -PVRSRV_ERROR PVRSRVGetFBStatsKM(IMG_UINT32 *pui32Total,
3317 - IMG_UINT32 *pui32Available)
3318 +PVRSRV_ERROR IMG_CALLCONV PVRSRVGetFBStatsKM(IMG_UINT32 *pui32Total,
3319 + IMG_UINT32 *pui32Available)
3321 IMG_UINT32 ui32Total = 0, i = 0;
3322 IMG_UINT32 ui32Available = 0;
3327 -IMG_BOOL PVRSRVDeviceLISR(PVRSRV_DEVICE_NODE *psDeviceNode)
3328 +IMG_BOOL IMG_CALLCONV PVRSRVDeviceLISR(PVRSRV_DEVICE_NODE *psDeviceNode)
3330 SYS_DATA *psSysData;
3331 IMG_BOOL bStatus = IMG_FALSE;
3336 -IMG_BOOL PVRSRVSystemLISR(IMG_VOID *pvSysData)
3337 +IMG_BOOL IMG_CALLCONV PVRSRVSystemLISR(IMG_VOID *pvSysData)
3339 SYS_DATA *psSysData = pvSysData;
3340 IMG_BOOL bStatus = IMG_FALSE;
3345 -IMG_VOID PVRSRVMISR(IMG_VOID *pvSysData)
3346 +IMG_VOID IMG_CALLCONV PVRSRVMISR(IMG_VOID *pvSysData)
3348 SYS_DATA *psSysData = pvSysData;
3349 PVRSRV_DEVICE_NODE *psDeviceNode;
3350 @@ -853,10 +945,21 @@
3352 PVRSRVProcessQueues(ISR_ID, IMG_FALSE);
3356 + if (psSysData->psGlobalEventObject)
3358 + IMG_HANDLE hOSEventKM = psSysData->psGlobalEventObject->hOSEventKM;
3361 + OSEventObjectSignal(hOSEventKM);
3367 -PVRSRV_ERROR PVRSRVSaveRestoreLiveSegments(IMG_HANDLE hArena, IMG_PBYTE pbyBuffer, IMG_UINT32 *puiBufSize, IMG_BOOL bSave)
3368 +PVRSRV_ERROR IMG_CALLCONV PVRSRVSaveRestoreLiveSegments(IMG_HANDLE hArena, IMG_PBYTE pbyBuffer,
3369 + IMG_UINT32 *puiBufSize, IMG_BOOL bSave)
3371 IMG_UINT32 uiBytesSaved = 0;
3372 IMG_PVOID pvLocalMemCPUVAddr;
3373 diff -Nurd git/drivers/gpu/pvr/services4/srvkm/common/queue.c git/drivers/gpu/pvr/services4/srvkm/common/queue.c
3374 --- git/drivers/gpu/pvr/services4/srvkm/common/queue.c 2009-01-05 20:00:44.000000000 +0100
3375 +++ git/drivers/gpu/pvr/services4/srvkm/common/queue.c 2008-12-18 15:47:29.000000000 +0100
3376 @@ -760,14 +760,10 @@
3378 PVRSRVCommandCompleteCallbacks();
3380 -#if defined(SYS_USING_INTERRUPTS)
3383 OSScheduleMISR(psSysData);
3386 - PVR_UNREFERENCED_PARAMETER(bScheduleMISR);
3391 diff -Nurd git/drivers/gpu/pvr/services4/srvkm/common/resman.c git/drivers/gpu/pvr/services4/srvkm/common/resman.c
3392 --- git/drivers/gpu/pvr/services4/srvkm/common/resman.c 2009-01-05 20:00:44.000000000 +0100
3393 +++ git/drivers/gpu/pvr/services4/srvkm/common/resman.c 2008-12-18 15:47:29.000000000 +0100
3394 @@ -145,6 +141,10 @@
3396 case RESMAN_TYPE_HW_RENDER_CONTEXT:
3397 return "HW Render Context Resource";
3398 + case RESMAN_TYPE_HW_TRANSFER_CONTEXT:
3399 + return "HW Transfer Context Resource";
3400 + case RESMAN_TYPE_HW_2D_CONTEXT:
3401 + return "HW 2D Context Resource";
3402 case RESMAN_TYPE_SHARED_PB_DESC:
3403 return "Shared Parameter Buffer Description Resource";
3405 @@ -378,7 +378,12 @@
3406 FreeResourceByCriteria(psProcess, RESMAN_CRITERIA_RESTYPE, RESMAN_TYPE_OS_USERMODE_MAPPING, 0, 0, IMG_TRUE);
3409 + FreeResourceByCriteria(psProcess, RESMAN_CRITERIA_RESTYPE, RESMAN_TYPE_EVENT_OBJECT, 0, 0, IMG_TRUE);
3412 FreeResourceByCriteria(psProcess, RESMAN_CRITERIA_RESTYPE, RESMAN_TYPE_HW_RENDER_CONTEXT, 0, 0, IMG_TRUE);
3413 + FreeResourceByCriteria(psProcess, RESMAN_CRITERIA_RESTYPE, RESMAN_TYPE_HW_TRANSFER_CONTEXT, 0, 0, IMG_TRUE);
3414 + FreeResourceByCriteria(psProcess, RESMAN_CRITERIA_RESTYPE, RESMAN_TYPE_HW_2D_CONTEXT, 0, 0, IMG_TRUE);
3415 FreeResourceByCriteria(psProcess, RESMAN_CRITERIA_RESTYPE, RESMAN_TYPE_TRANSFER_CONTEXT, 0, 0, IMG_TRUE);
3416 FreeResourceByCriteria(psProcess, RESMAN_CRITERIA_RESTYPE, RESMAN_TYPE_SHARED_PB_DESC, 0, 0, IMG_TRUE);
3418 diff -Nurd git/drivers/gpu/pvr/services4/srvkm/devices/sgx/mmu.c git/drivers/gpu/pvr/services4/srvkm/devices/sgx/mmu.c
3419 --- git/drivers/gpu/pvr/services4/srvkm/devices/sgx/mmu.c 2009-01-05 20:00:44.000000000 +0100
3420 +++ git/drivers/gpu/pvr/services4/srvkm/devices/sgx/mmu.c 2008-12-18 15:47:29.000000000 +0100
3421 @@ -1966,6 +1966,8 @@
3428 static void PageTest(void* pMem, IMG_DEV_PHYADDR sDevPAddr)
3430 diff -Nurd git/drivers/gpu/pvr/services4/srvkm/devices/sgx/mmu.h git/drivers/gpu/pvr/services4/srvkm/devices/sgx/mmu.h
3431 --- git/drivers/gpu/pvr/services4/srvkm/devices/sgx/mmu.h 2009-01-05 20:00:44.000000000 +0100
3432 +++ git/drivers/gpu/pvr/services4/srvkm/devices/sgx/mmu.h 2008-12-18 15:47:29.000000000 +0100
3437 +#include "sgxinfokm.h"
3440 MMU_Initialise (PVRSRV_DEVICE_NODE *psDeviceNode, MMU_CONTEXT **ppsMMUContext, IMG_DEV_PHYADDR *psPDDevPAddr);
3442 diff -Nurd git/drivers/gpu/pvr/services4/srvkm/devices/sgx/pb.c git/drivers/gpu/pvr/services4/srvkm/devices/sgx/pb.c
3443 --- git/drivers/gpu/pvr/services4/srvkm/devices/sgx/pb.c 2009-01-05 20:00:44.000000000 +0100
3444 +++ git/drivers/gpu/pvr/services4/srvkm/devices/sgx/pb.c 2008-12-18 15:47:29.000000000 +0100
3447 psSGXDevInfo = (PVRSRV_SGXDEV_INFO *)((PVRSRV_DEVICE_NODE *)hDevCookie)->pvDevice;
3453 for(psStubPBDesc = psSGXDevInfo->psStubPBDescListKM;
3454 psStubPBDesc != IMG_NULL;
3455 psStubPBDesc = psStubPBDesc->psNext)
3457 if(psStubPBDesc->ui32TotalPBSize == ui32TotalPBSize)
3459 + psStubPBDesc = psSGXDevInfo->psStubPBDescListKM;
3460 + if (psStubPBDesc != IMG_NULL)
3462 + if(psStubPBDesc->ui32TotalPBSize != ui32TotalPBSize)
3464 + PVR_DPF((PVR_DBG_ERROR,
3465 + "SGXFindSharedPBDescKM: Shared PB requested with different size (0x%x) from existing shared PB (0x%x) - requested size ignored",
3466 + ui32TotalPBSize, psStubPBDesc->ui32TotalPBSize));
3471 PRESMAN_ITEM psResItem;
3472 @@ -125,20 +140,6 @@
3476 -IMG_VOID ResetPBs(PVRSRV_SGXDEV_INFO* psSGXDevInfo)
3478 - PVRSRV_STUB_PBDESC **ppsStubPBDesc;
3480 - for(ppsStubPBDesc = (PVRSRV_STUB_PBDESC **)&psSGXDevInfo->psStubPBDescListKM;
3481 - *ppsStubPBDesc != IMG_NULL;
3482 - ppsStubPBDesc = &(*ppsStubPBDesc)->psNext)
3484 - PVRSRV_STUB_PBDESC *psStubPBDesc = *ppsStubPBDesc;
3485 - IMG_UINT32* pui32Flags = (IMG_UINT32*)psStubPBDesc->psHWPBDescKernelMemInfo->pvLinAddrKM;
3492 SGXCleanupSharedPBDescKM(PVRSRV_STUB_PBDESC *psStubPBDescIn)
3495 PVR_DPF((PVR_DBG_ERROR,
3496 "SGXAddSharedPBDescKM: "
3497 - "Failed to register exisitng shared "
3498 + "Failed to register existing shared "
3499 "PBDesc with the resource manager"));
3506 - psStubPBDesc->ppsSubKernelMemInfos=IMG_NULL;
3507 + psStubPBDesc->ppsSubKernelMemInfos = IMG_NULL;
3509 if(OSAllocMem(PVRSRV_OS_NON_PAGEABLE_HEAP,
3510 sizeof(PVRSRV_KERNEL_MEM_INFO *)
3511 @@ -395,8 +396,10 @@
3515 - for(i=0; i<ui32SharedPBDescSubKernelMemInfosCount; i++)
3516 + for (i = 0; i < ui32SharedPBDescSubKernelMemInfosCount; i++)
3518 PVRSRVFreeDeviceMemKM(hDevCookie, ppsSharedPBDescSubKernelMemInfos[i], IMG_FALSE);
3521 PVRSRVFreeSharedSysMemoryKM(psSharedPBDescKernelMemInfo);
3522 PVRSRVFreeDeviceMemKM(hDevCookie, psStubPBDesc->psHWPBDescKernelMemInfo, IMG_FALSE);
3523 diff -Nurd git/drivers/gpu/pvr/services4/srvkm/devices/sgx/sgx2dcore.c git/drivers/gpu/pvr/services4/srvkm/devices/sgx/sgx2dcore.c
3524 --- git/drivers/gpu/pvr/services4/srvkm/devices/sgx/sgx2dcore.c 2009-01-05 20:00:44.000000000 +0100
3525 +++ git/drivers/gpu/pvr/services4/srvkm/devices/sgx/sgx2dcore.c 2008-12-18 15:47:29.000000000 +0100
3527 #include "sgxdefs.h"
3528 #include "services_headers.h"
3529 #include "sgxinfo.h"
3530 +#include "sgxinfokm.h"
3532 #if defined(SGX_FEATURE_2D_HARDWARE)
3534 #include "sgx2dcore.h"
3536 -#define SGX2D_FLUSH_BH (0xF0000000)
3537 +#define SGX2D_FLUSH_BH 0xF0000000
3538 +#define SGX2D_FENCE_BH 0x70000000
3540 #define SGX2D_QUEUED_BLIT_PAD 4
3542 #define SGX2D_COMMAND_QUEUE_SIZE 1024
3545 if (hCmdCookie != IMG_NULL)
3547 - PVRSRVCommandCompleteKM(hCmdCookie, IMG_FALSE);
3548 + PVRSRVCommandCompleteKM(hCmdCookie, IMG_TRUE);
3551 PVR_DPF((PVR_DBG_CALLTRACE, "SGX2DHandle2DComplete: Exit"));
3554 SGX2DWriteSlavePortBatch(psDevInfo, pui32BltData, ui32DataByteSize);
3556 - SGX2DWriteSlavePort(psDevInfo, EURASIA2D_FENCE_BH);
3557 + SGX2DWriteSlavePort(psDevInfo, SGX2D_FENCE_BH);
3561 @@ -817,6 +820,18 @@
3563 PVR_DPF((PVR_DBG_ERROR,"SGX2DQueryBlitsCompleteKM: Timed out. Ops pending."));
3567 + PVRSRV_SYNC_DATA *psSyncData = psSyncInfo->psSyncData;
3569 + PVR_TRACE(("SGX2DQueryBlitsCompleteKM: Syncinfo: %p, Syncdata: %p", psSyncInfo, psSyncData));
3571 + PVR_TRACE(("SGX2DQueryBlitsCompleteKM: Read ops complete: %d, Read ops pending: %d", psSyncData->ui32ReadOpsComplete, psSyncData->ui32ReadOpsPending));
3572 + PVR_TRACE(("SGX2DQueryBlitsCompleteKM: Write ops complete: %d, Write ops pending: %d", psSyncData->ui32WriteOpsComplete, psSyncData->ui32WriteOpsPending));
3577 return PVRSRV_ERROR_TIMEOUT;
3580 diff -Nurd git/drivers/gpu/pvr/services4/srvkm/devices/sgx/sgx_bridge_km.h git/drivers/gpu/pvr/services4/srvkm/devices/sgx/sgx_bridge_km.h
3581 --- git/drivers/gpu/pvr/services4/srvkm/devices/sgx/sgx_bridge_km.h 1970-01-01 01:00:00.000000000 +0100
3582 +++ git/drivers/gpu/pvr/services4/srvkm/devices/sgx/sgx_bridge_km.h 2008-12-18 15:47:29.000000000 +0100
3584 +/**********************************************************************
3586 + * Copyright(c) 2008 Imagination Technologies Ltd. All rights reserved.
3588 + * This program is free software; you can redistribute it and/or modify it
3589 + * under the terms and conditions of the GNU General Public License,
3590 + * version 2, as published by the Free Software Foundation.
3592 + * This program is distributed in the hope it will be useful but, except
3593 + * as otherwise stated in writing, without any warranty; without even the
3594 + * implied warranty of merchantability or fitness for a particular purpose.
3595 + * See the GNU General Public License for more details.
3597 + * You should have received a copy of the GNU General Public License along with
3598 + * this program; if not, write to the Free Software Foundation, Inc.,
3599 + * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
3601 + * The full GNU General Public License is included in this distribution in
3602 + * the file called "COPYING".
3604 + * Contact Information:
3605 + * Imagination Technologies Ltd. <gpl-support@imgtec.com>
3606 + * Home Park Estate, Kings Langley, Herts, WD4 8LZ, UK
3608 + ******************************************************************************/
3610 +#if !defined(__SGX_BRIDGE_KM_H__)
3611 +#define __SGX_BRIDGE_KM_H__
3613 +#include "sgxapi_km.h"
3614 +#include "sgxinfo.h"
3615 +#include "sgxinfokm.h"
3616 +#include "sgx_bridge.h"
3617 +#include "pvr_bridge.h"
3618 +#include "perproc.h"
3620 +#if defined (__cplusplus)
3625 +PVRSRV_ERROR SGXSubmitTransferKM(IMG_HANDLE hDevHandle, PVRSRV_TRANSFER_SGX_KICK *psKick);
3627 +#if defined(SGX_FEATURE_2D_HARDWARE)
3628 +IMG_EXPORT PVRSRV_ERROR SGXSubmit2DKM(IMG_HANDLE hDevHandle, PVRSRV_2D_SGX_KICK *psKick);
3632 +PVRSRV_ERROR SGXDoKickKM(IMG_HANDLE hDevHandle,
3633 + PVR3DIF4_CCB_KICK *psCCBKick);
3636 +PVRSRV_ERROR SGXGetPhysPageAddrKM(IMG_HANDLE hDevMemHeap,
3637 + IMG_DEV_VIRTADDR sDevVAddr,
3638 + IMG_DEV_PHYADDR *pDevPAddr,
3639 + IMG_CPU_PHYADDR *pCpuPAddr);
3642 +PVRSRV_ERROR IMG_CALLCONV SGXGetMMUPDAddrKM(IMG_HANDLE hDevCookie,
3643 + IMG_HANDLE hDevMemContext,
3644 + IMG_DEV_PHYADDR *psPDDevPAddr);
3647 +PVRSRV_ERROR SGXGetClientInfoKM(IMG_HANDLE hDevCookie,
3648 + PVR3DIF4_CLIENT_INFO* psClientInfo);
3651 +PVRSRV_ERROR SGXGetMiscInfoKM(PVRSRV_SGXDEV_INFO *psDevInfo,
3652 + SGX_MISC_INFO *psMiscInfo);
3654 +#if defined(SUPPORT_SGX_HWPERF)
3656 +PVRSRV_ERROR SGXReadHWPerfCountersKM(PVRSRV_SGXDEV_INFO *psDevInfo,
3657 + IMG_UINT32 ui32PerfReg,
3658 + IMG_UINT32 *pui32OldPerf,
3659 + IMG_BOOL bNewPerf,
3660 + IMG_UINT32 ui32NewPerf,
3661 + IMG_UINT32 ui32NewPerfReset,
3662 + IMG_UINT32 ui32PerfCountersReg,
3663 + IMG_UINT32 *pui32Counters,
3664 + IMG_UINT32 *pui32KickTACounter,
3665 + IMG_UINT32 *pui32KickTARenderCounter,
3666 + IMG_UINT32 *pui32CPUTime,
3667 + IMG_UINT32 *pui32SGXTime);
3670 +#if defined(SGX_FEATURE_2D_HARDWARE)
3672 +PVRSRV_ERROR SGX2DQueueBlitKM(PVRSRV_SGXDEV_INFO *psDevInfo,
3673 + PVRSRV_KERNEL_SYNC_INFO *psDstSync,
3674 + IMG_UINT32 ui32NumSrcSyncs,
3675 + PVRSRV_KERNEL_SYNC_INFO *apsSrcSync[],
3676 + IMG_UINT32 ui32DataByteSize,
3677 + IMG_UINT32 *pui32BltData);
3679 +#if defined(SGX2D_DIRECT_BLITS)
3681 +PVRSRV_ERROR SGX2DDirectBlitKM(PVRSRV_SGXDEV_INFO *psDevInfo,
3682 + IMG_UINT32 ui32DataByteSize,
3683 + IMG_UINT32 *pui32BltData);
3687 +#if defined(SGX_FEATURE_2D_HARDWARE) || defined(PVR2D_ALT_2DHW)
3689 +PVRSRV_ERROR SGX2DQueryBlitsCompleteKM(PVRSRV_SGXDEV_INFO *psDevInfo,
3690 + PVRSRV_KERNEL_SYNC_INFO *psSyncInfo,
3691 + IMG_BOOL bWaitForComplete);
3695 +PVRSRV_ERROR SGXGetInfoForSrvinitKM(IMG_HANDLE hDevHandle,
3696 + SGX_BRIDGE_INFO_FOR_SRVINIT *psInitInfo);
3699 +PVRSRV_ERROR DevInitSGXPart2KM(PVRSRV_PER_PROCESS_DATA *psPerProc,
3700 + IMG_HANDLE hDevHandle,
3701 + SGX_BRIDGE_INIT_INFO *psInitInfo);
3703 +IMG_IMPORT PVRSRV_ERROR
3704 +SGXFindSharedPBDescKM(IMG_HANDLE hDevCookie,
3705 + IMG_UINT32 ui32TotalPBSize,
3706 + IMG_HANDLE *phSharedPBDesc,
3707 + PVRSRV_KERNEL_MEM_INFO **ppsSharedPBDescKernelMemInfo,
3708 + PVRSRV_KERNEL_MEM_INFO **ppsHWPBDescKernelMemInfo,
3709 + PVRSRV_KERNEL_MEM_INFO **ppsBlockKernelMemInfo,
3710 + PVRSRV_KERNEL_MEM_INFO ***pppsSharedPBDescSubKernelMemInfos,
3711 + IMG_UINT32 *ui32SharedPBDescSubKernelMemInfosCount);
3713 +IMG_IMPORT PVRSRV_ERROR
3714 +SGXUnrefSharedPBDescKM(IMG_HANDLE hSharedPBDesc);
3716 +IMG_IMPORT PVRSRV_ERROR
3717 +SGXAddSharedPBDescKM(IMG_HANDLE hDevCookie,
3718 + PVRSRV_KERNEL_MEM_INFO *psSharedPBDescKernelMemInfo,
3719 + PVRSRV_KERNEL_MEM_INFO *psHWPBDescKernelMemInfo,
3720 + PVRSRV_KERNEL_MEM_INFO *psBlockKernelMemInfo,
3721 + IMG_UINT32 ui32TotalPBSize,
3722 + IMG_HANDLE *phSharedPBDesc,
3723 + PVRSRV_KERNEL_MEM_INFO **psSharedPBDescSubKernelMemInfos,
3724 + IMG_UINT32 ui32SharedPBDescSubKernelMemInfosCount);
3727 +IMG_IMPORT PVRSRV_ERROR
3728 +SGXGetInternalDevInfoKM(IMG_HANDLE hDevCookie,
3729 + PVR3DIF4_INTERNAL_DEVINFO *psSGXInternalDevInfo);
3732 +#if defined(SGX_FEATURE_2D_HARDWARE)
3733 +#define SGX2D_MAX_BLT_CMD_SIZ 256
3736 +#if defined (__cplusplus)
3742 diff -Nurd git/drivers/gpu/pvr/services4/srvkm/devices/sgx/sgxinfokm.h git/drivers/gpu/pvr/services4/srvkm/devices/sgx/sgxinfokm.h
3743 --- git/drivers/gpu/pvr/services4/srvkm/devices/sgx/sgxinfokm.h 2009-01-05 20:00:44.000000000 +0100
3744 +++ git/drivers/gpu/pvr/services4/srvkm/devices/sgx/sgxinfokm.h 2008-12-18 15:47:29.000000000 +0100
3745 @@ -45,14 +45,152 @@
3747 #define PVRSRV_USSE_EDM_RESMAN_CLEANUP_RT_REQUEST 0x01
3748 #define PVRSRV_USSE_EDM_RESMAN_CLEANUP_RC_REQUEST 0x02
3749 -#define PVRSRV_USSE_EDM_RESMAN_CLEANUP_COMPLETE 0x04
3750 -#define PVRSRV_USSE_EDM_RESMAN_CLEANUP_INVALPD 0x10
3751 -#define PVRSRV_USSE_EDM_RESMAN_CLEANUP_INVALPT 0x20
3752 +#define PVRSRV_USSE_EDM_RESMAN_CLEANUP_TC_REQUEST 0x04
3753 +#define PVRSRV_USSE_EDM_RESMAN_CLEANUP_2DC_REQUEST 0x08
3754 +#define PVRSRV_USSE_EDM_RESMAN_CLEANUP_COMPLETE 0x10
3755 +#define PVRSRV_USSE_EDM_RESMAN_CLEANUP_INVALPD 0x20
3756 +#define PVRSRV_USSE_EDM_RESMAN_CLEANUP_INVALPT 0x40
3758 +typedef struct _PVRSRV_SGXDEV_INFO_
3760 + PVRSRV_DEVICE_TYPE eDeviceType;
3761 + PVRSRV_DEVICE_CLASS eDeviceClass;
3763 + IMG_UINT8 ui8VersionMajor;
3764 + IMG_UINT8 ui8VersionMinor;
3765 + IMG_UINT32 ui32CoreConfig;
3766 + IMG_UINT32 ui32CoreFlags;
3769 + IMG_PVOID pvRegsBaseKM;
3773 + IMG_HANDLE hRegMapping;
3776 + IMG_SYS_PHYADDR sRegsPhysBase;
3778 + IMG_UINT32 ui32RegSize;
3781 + IMG_UINT32 ui32CoreClockSpeed;
3782 + IMG_UINT32 ui32uKernelTimerClock;
3784 +#if defined(SGX_FEATURE_2D_HARDWARE)
3786 + SGX_SLAVE_PORT s2DSlavePortKM;
3789 + PVRSRV_RESOURCE s2DSlaveportResource;
3792 + IMG_UINT32 ui322DFifoSize;
3793 + IMG_UINT32 ui322DFifoOffset;
3795 + IMG_HANDLE h2DCmdCookie;
3797 + IMG_HANDLE h2DQueue;
3798 + IMG_BOOL b2DHWRecoveryInProgress;
3799 + IMG_BOOL b2DHWRecoveryEndPending;
3800 + IMG_UINT32 ui322DCompletedBlits;
3801 + IMG_BOOL b2DLockupSuspected;
3805 + IMG_VOID *psStubPBDescListKM;
3809 + IMG_DEV_PHYADDR sKernelPDDevPAddr;
3811 + IMG_VOID *pvDeviceMemoryHeap;
3812 + PPVRSRV_KERNEL_MEM_INFO psKernelCCBMemInfo;
3813 + PVRSRV_SGX_KERNEL_CCB *psKernelCCB;
3814 + PPVRSRV_SGX_CCB_INFO psKernelCCBInfo;
3815 + PPVRSRV_KERNEL_MEM_INFO psKernelCCBCtlMemInfo;
3816 + PVRSRV_SGX_CCB_CTL *psKernelCCBCtl;
3817 + PPVRSRV_KERNEL_MEM_INFO psKernelCCBEventKickerMemInfo;
3818 + IMG_UINT32 *pui32KernelCCBEventKicker;
3819 + IMG_UINT32 ui32TAKickAddress;
3820 + IMG_UINT32 ui32TexLoadKickAddress;
3821 + IMG_UINT32 ui32VideoHandlerAddress;
3822 +#if defined(SGX_SUPPORT_HWPROFILING)
3823 + PPVRSRV_KERNEL_MEM_INFO psKernelHWProfilingMemInfo;
3825 + IMG_UINT32 ui32KickTACounter;
3826 + IMG_UINT32 ui32KickTARenderCounter;
3827 +#if defined(SUPPORT_SGX_HWPERF)
3828 + PPVRSRV_KERNEL_MEM_INFO psKernelHWPerfCBMemInfo;
3832 + IMG_UINT32 ui32ClientRefCount;
3835 + IMG_UINT32 ui32CacheControl;
3840 + IMG_VOID *pvMMUContextList;
3843 + IMG_BOOL bForcePTOff;
3845 + IMG_UINT32 ui32EDMTaskReg0;
3846 + IMG_UINT32 ui32EDMTaskReg1;
3848 + IMG_UINT32 ui32ClkGateCtl;
3849 + IMG_UINT32 ui32ClkGateCtl2;
3850 + IMG_UINT32 ui32ClkGateStatusMask;
3851 + SGX_INIT_SCRIPTS sScripts;
3854 + IMG_HANDLE hBIFResetPDOSMemHandle;
3855 + IMG_DEV_PHYADDR sBIFResetPDDevPAddr;
3856 + IMG_DEV_PHYADDR sBIFResetPTDevPAddr;
3857 + IMG_DEV_PHYADDR sBIFResetPageDevPAddr;
3858 + IMG_UINT32 *pui32BIFResetPD;
3859 + IMG_UINT32 *pui32BIFResetPT;
3862 +#if defined(SUPPORT_HW_RECOVERY)
3864 + IMG_HANDLE hTimer;
3866 + IMG_UINT32 ui32TimeStamp;
3870 + IMG_UINT32 ui32NumResets;
3872 + PVRSRV_KERNEL_MEM_INFO *psKernelSGXHostCtlMemInfo;
3873 + PVRSRV_SGX_HOST_CTL *psSGXHostCtl;
3875 + IMG_UINT32 ui32Flags;
3878 + IMG_UINT32 ui32RegFlags;
3880 + #if defined(PDUMP)
3881 + PVRSRV_SGX_PDUMP_CONTEXT sPDContext;
3884 +#if defined(SUPPORT_SGX_MMU_DUMMY_PAGE)
3886 + IMG_VOID *pvDummyPTPageCpuVAddr;
3887 + IMG_DEV_PHYADDR sDummyPTDevPAddr;
3888 + IMG_HANDLE hDummyPTPageOSMemHandle;
3889 + IMG_VOID *pvDummyDataPageCpuVAddr;
3890 + IMG_DEV_PHYADDR sDummyDataDevPAddr;
3891 + IMG_HANDLE hDummyDataPageOSMemHandle;
3894 + IMG_UINT32 asSGXDevData[SGX_MAX_DEV_DATA];
3896 +} PVRSRV_SGXDEV_INFO;
3899 typedef struct _SGX_TIMING_INFORMATION_
3901 @@ -122,10 +260,8 @@
3903 PVRSRV_ERROR SGXRegisterDevice (PVRSRV_DEVICE_NODE *psDeviceNode);
3906 IMG_VOID SGXOSTimer(IMG_VOID *pvData);
3908 -IMG_VOID ResetPBs(PVRSRV_SGXDEV_INFO *psDevInfo);
3909 #if defined(NO_HARDWARE)
3910 static INLINE IMG_VOID NoHardwareGenerateEvent(PVRSRV_SGXDEV_INFO *psDevInfo,
3911 IMG_UINT32 ui32StatusRegister,
3912 diff -Nurd git/drivers/gpu/pvr/services4/srvkm/devices/sgx/sgxinit.c git/drivers/gpu/pvr/services4/srvkm/devices/sgx/sgxinit.c
3913 --- git/drivers/gpu/pvr/services4/srvkm/devices/sgx/sgxinit.c 2009-01-05 20:00:44.000000000 +0100
3914 +++ git/drivers/gpu/pvr/services4/srvkm/devices/sgx/sgxinit.c 2008-12-18 15:47:29.000000000 +0100
3918 IMG_BOOL SGX_ISRHandler(IMG_VOID *pvData);
3919 -IMG_VOID SGXScheduleProcessQueues(IMG_VOID *pvData);
3921 IMG_UINT32 gui32EventStatusServicesByISR = 0;
3923 -static IMG_VOID ResetSGX(PVRSRV_SGXDEV_INFO *psDevInfo,
3924 - IMG_UINT32 ui32PDUMPFlags);
3925 +IMG_VOID SGXReset(PVRSRV_SGXDEV_INFO *psDevInfo,
3926 + IMG_UINT32 ui32PDUMPFlags);
3928 -PVRSRV_ERROR SGXInitialise(PVRSRV_SGXDEV_INFO *psDevInfo,
3929 - IMG_BOOL bHardwareRecovery);
3930 +static PVRSRV_ERROR SGXInitialise(PVRSRV_SGXDEV_INFO *psDevInfo,
3931 + IMG_BOOL bHardwareRecovery);
3932 PVRSRV_ERROR SGXDeinitialise(IMG_HANDLE hDevCookie);
3934 -#if defined(SGX_FEATURE_MULTIPLE_MEM_CONTEXTS)
3935 -#define SGX_BIF_DIR_LIST_INDEX_EDM 15
3936 -#define SGX_BIF_DIR_LIST_REG_EDM EUR_CR_BIF_DIR_LIST_BASE15
3938 -#define SGX_BIF_DIR_LIST_REG_EDM EUR_CR_BIF_DIR_LIST_BASE0
3941 static IMG_VOID SGXCommandComplete(PVRSRV_DEVICE_NODE *psDeviceNode)
3944 #if defined(SGX_SUPPORT_HWPROFILING)
3945 psDevInfo->psKernelHWProfilingMemInfo = (PVRSRV_KERNEL_MEM_INFO *)psInitInfo->hKernelHWProfilingMemInfo;
3947 +#if defined(SUPPORT_SGX_HWPERF)
3948 + psDevInfo->psKernelHWPerfCBMemInfo = (PVRSRV_KERNEL_MEM_INFO *)psInitInfo->hKernelHWPerfCBMemInfo;
3954 (IMG_VOID **)&psKernelCCBInfo, 0);
3955 if (eError != PVRSRV_OK)
3957 - PVR_DPF((PVR_DBG_ERROR,"DevInitSGXPart2KM: Failed to alloc memory"));
3958 + PVR_DPF((PVR_DBG_ERROR,"InitDevInfo: Failed to alloc memory"));
3959 goto failed_allockernelccb;
3964 psDevInfo->ui32EDMTaskReg0 = psInitInfo->ui32EDMTaskReg0;
3965 psDevInfo->ui32EDMTaskReg1 = psInitInfo->ui32EDMTaskReg1;
3966 - psDevInfo->ui32ClockGateMask = psInitInfo->ui32ClockGateMask;
3967 + psDevInfo->ui32ClkGateCtl = psInitInfo->ui32ClkGateCtl;
3968 + psDevInfo->ui32ClkGateCtl2 = psInitInfo->ui32ClkGateCtl2;
3969 + psDevInfo->ui32ClkGateStatusMask = psInitInfo->ui32ClkGateStatusMask;
3973 @@ -183,10 +181,20 @@
3974 if (eNewPowerState == PVRSRV_POWER_STATE_D3)
3976 PVRSRV_SGX_HOST_CTL *psSGXHostCtl = psDevInfo->psSGXHostCtl;
3977 - #if defined (SGX_FEATURE_AUTOCLOCKGATING) && (!defined(NO_HARDWARE) || defined(PDUMP))
3978 - IMG_UINT32 ui32ClockMask = psDevInfo->ui32ClockGateMask;
3980 + #if defined (SGX_FEATURE_AUTOCLOCKGATING) && (!defined(NO_HARDWARE) || defined(PDUMP))
3981 + IMG_UINT32 ui32ClockMask = psDevInfo->ui32ClkGateStatusMask;
3984 +#if defined(SUPPORT_HW_RECOVERY)
3986 + if (OSDisableTimer(psDevInfo->hTimer) != PVRSRV_OK)
3988 + PVR_DPF((PVR_DBG_ERROR,"SGXPrePowerState: Failed to disable timer"));
3989 + return PVRSRV_ERROR_GENERIC;
3994 psSGXHostCtl->ui32PowManFlags |= PVRSRV_USSE_EDM_POWMAN_POWEROFF_REQUEST;
3997 MAX_HW_TIME_US/WAIT_TRY_COUNT,
3998 WAIT_TRY_COUNT) != PVRSRV_OK)
4000 - PVR_DPF((PVR_DBG_ERROR,"Wait for chip power off failed."));
4001 + PVR_DPF((PVR_DBG_ERROR,"SGXPrePowerState: Wait for chip power off failed."));
4006 MAX_HW_TIME_US/WAIT_TRY_COUNT,
4007 WAIT_TRY_COUNT) != PVRSRV_OK)
4009 - PVR_DPF((PVR_DBG_ERROR,"Wait for chip idle failed."));
4010 + PVR_DPF((PVR_DBG_ERROR,"SGXPrePowerState: Wait for chip idle failed."));
4013 PDUMPREGPOL(EUR_CR_CLKGATESTATUS, 0, ui32ClockMask);
4014 @@ -278,6 +286,14 @@
4015 PVR_DPF((PVR_DBG_ERROR,"SGXPostPowerState: SGXInitialise failed"));
4018 +#if defined(SUPPORT_HW_RECOVERY)
4019 + eError = OSEnableTimer(psDevInfo->hTimer);
4020 + if (eError != PVRSRV_OK)
4022 + PVR_DPF((PVR_DBG_ERROR,"SGXPostPowerState : Failed to enable host timer"));
4023 + return PVRSRV_ERROR_GENERIC;
4028 PVR_DPF((PVR_DBG_WARNING,
4033 -#define SCRIPT_DATA(pData, offset, type) (*((type *)(((char *)pData) + offset)))
4034 -#define SCRIPT_DATA_UI32(pData, offset) SCRIPT_DATA(pData, offset, IMG_UINT32)
4036 static PVRSRV_ERROR SGXRunScript(PVRSRV_SGXDEV_INFO *psDevInfo, SGX_INIT_COMMAND *psScript, IMG_UINT32 ui32NumInitCommands)
4038 @@ -333,14 +347,18 @@
4039 return PVRSRV_ERROR_GENERIC;;
4042 -PVRSRV_ERROR SGXInitialise(PVRSRV_SGXDEV_INFO *psDevInfo,
4043 - IMG_BOOL bHardwareRecovery)
4044 +static PVRSRV_ERROR SGXInitialise(PVRSRV_SGXDEV_INFO *psDevInfo,
4045 + IMG_BOOL bHardwareRecovery)
4047 PVRSRV_ERROR eError;
4048 IMG_UINT32 ui32ReadOffset, ui32WriteOffset;
4051 - ResetSGX(psDevInfo, PDUMP_FLAGS_CONTINUOUS);
4052 + OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_CLKGATECTL, psDevInfo->ui32ClkGateCtl);
4053 + PDUMPREGWITHFLAGS(EUR_CR_CLKGATECTL, psDevInfo->ui32ClkGateCtl, PDUMP_FLAGS_CONTINUOUS);
4056 + SGXReset(psDevInfo, PDUMP_FLAGS_CONTINUOUS);
4059 *psDevInfo->pui32KernelCCBEventKicker = 0;
4060 @@ -381,12 +399,14 @@
4062 PVRSRV_USSE_EDM_INTERRUPT_HWR,
4063 MAX_HW_TIME_US/WAIT_TRY_COUNT,
4064 - WAIT_TRY_COUNT) != PVRSRV_OK)
4065 + 1000) != PVRSRV_OK)
4067 - PVR_DPF((PVR_DBG_ERROR, "HWRecoveryResetSGXEDM: Wait for uKernel HW Recovery failed"));
4068 + PVR_DPF((PVR_DBG_ERROR, "SGXInitialise: Wait for uKernel HW Recovery failed"));
4069 + return PVRSRV_ERROR_RETRY;
4077 @@ -426,259 +446,6 @@
4081 -static IMG_VOID ResetSGXSleep(PVRSRV_SGXDEV_INFO *psDevInfo,
4082 - IMG_UINT32 ui32PDUMPFlags,
4085 -#if !defined(PDUMP)
4086 - PVR_UNREFERENCED_PARAMETER(ui32PDUMPFlags);
4090 - OSWaitus(1000 * 1000000 / psDevInfo->ui32CoreClockSpeed);
4093 - PDUMPIDLWITHFLAGS(1000, ui32PDUMPFlags);
4098 -static IMG_VOID ResetSGX(PVRSRV_SGXDEV_INFO *psDevInfo,
4099 - IMG_UINT32 ui32PDUMPFlags)
4101 - IMG_UINT32 ui32RegVal;
4103 - const IMG_UINT32 ui32SoftResetRegVal =
4104 - #ifdef EUR_CR_SOFT_RESET_TWOD_RESET_MASK
4105 - EUR_CR_SOFT_RESET_TWOD_RESET_MASK |
4107 - EUR_CR_SOFT_RESET_DPM_RESET_MASK |
4108 - EUR_CR_SOFT_RESET_TA_RESET_MASK |
4109 - EUR_CR_SOFT_RESET_USE_RESET_MASK |
4110 - EUR_CR_SOFT_RESET_ISP_RESET_MASK |
4111 - EUR_CR_SOFT_RESET_TSP_RESET_MASK;
4113 - const IMG_UINT32 ui32BifInvalDCVal = EUR_CR_BIF_CTRL_INVALDC_MASK;
4115 - const IMG_UINT32 ui32BifFaultMask =
4116 - EUR_CR_BIF_INT_STAT_FAULT_MASK;
4118 -#if defined(SGX_FEATURE_MULTIPLE_MEM_CONTEXTS)
4119 - IMG_UINT32 ui32BIFCtrl;
4120 -#if defined(EUR_CR_BIF_MEM_ARB_CONFIG)
4121 - IMG_UINT32 ui32BIFMemArb;
4126 - PVR_UNREFERENCED_PARAMETER(ui32PDUMPFlags);
4129 - psDevInfo->ui32NumResets++;
4131 - PDUMPCOMMENTWITHFLAGS(ui32PDUMPFlags, "Start of SGX reset sequence\r\n");
4133 -#if defined(FIX_HW_BRN_23944)
4135 - ui32RegVal = EUR_CR_BIF_CTRL_PAUSE_MASK;
4136 - OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_BIF_CTRL, ui32RegVal);
4137 - PDUMPREGWITHFLAGS(EUR_CR_BIF_CTRL, ui32RegVal, ui32PDUMPFlags);
4139 - ResetSGXSleep(psDevInfo, ui32PDUMPFlags, IMG_TRUE);
4141 - ui32RegVal = OSReadHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_BIF_INT_STAT);
4142 - if (ui32RegVal & ui32BifFaultMask)
4145 - ui32RegVal = EUR_CR_BIF_CTRL_PAUSE_MASK | EUR_CR_BIF_CTRL_CLEAR_FAULT_MASK;
4146 - OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_BIF_CTRL, ui32RegVal);
4147 - PDUMPREGWITHFLAGS(EUR_CR_BIF_CTRL, ui32RegVal, ui32PDUMPFlags);
4149 - ResetSGXSleep(psDevInfo, ui32PDUMPFlags, IMG_TRUE);
4151 - ui32RegVal = EUR_CR_BIF_CTRL_PAUSE_MASK;
4152 - OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_BIF_CTRL, ui32RegVal);
4153 - PDUMPREGWITHFLAGS(EUR_CR_BIF_CTRL, ui32RegVal, ui32PDUMPFlags);
4155 - ResetSGXSleep(psDevInfo, ui32PDUMPFlags, IMG_TRUE);
4160 - ui32RegVal = ui32SoftResetRegVal | EUR_CR_SOFT_RESET_BIF_RESET_MASK;
4161 - OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_SOFT_RESET, ui32RegVal);
4162 - PDUMPREGWITHFLAGS(EUR_CR_SOFT_RESET, ui32RegVal, ui32PDUMPFlags);
4164 - ResetSGXSleep(psDevInfo, ui32PDUMPFlags, IMG_TRUE);
4168 -#if defined(SGX_FEATURE_MULTIPLE_MEM_CONTEXTS)
4170 - OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_BIF_BANK_SET, ui32RegVal);
4171 - PDUMPREGWITHFLAGS(EUR_CR_BIF_BANK_SET, ui32RegVal, ui32PDUMPFlags);
4172 - OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_BIF_BANK0, ui32RegVal);
4173 - PDUMPREGWITHFLAGS(EUR_CR_BIF_BANK0, ui32RegVal, ui32PDUMPFlags);
4175 -#if defined(EUR_CR_BIF_MEM_ARB_CONFIG)
4178 - ui32BIFMemArb = (12UL << EUR_CR_BIF_MEM_ARB_CONFIG_PAGE_SIZE_SHIFT) |
4179 - (7UL << EUR_CR_BIF_MEM_ARB_CONFIG_BEST_CNT_SHIFT) |
4180 - (12UL << EUR_CR_BIF_MEM_ARB_CONFIG_TTE_THRESH_SHIFT);
4181 - OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_BIF_MEM_ARB_CONFIG, ui32BIFMemArb);
4182 - PDUMPREGWITHFLAGS(EUR_CR_BIF_MEM_ARB_CONFIG, ui32BIFMemArb, ui32PDUMPFlags);
4192 - ui32RegVal = psDevInfo->sBIFResetPDDevPAddr.uiAddr;
4193 - OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_BIF_DIR_LIST_BASE0, ui32RegVal);
4195 - ResetSGXSleep(psDevInfo, ui32PDUMPFlags, IMG_FALSE);
4198 - ui32RegVal = ui32SoftResetRegVal;
4199 - OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_SOFT_RESET, ui32RegVal);
4200 - PDUMPREGWITHFLAGS(EUR_CR_SOFT_RESET, ui32RegVal, ui32PDUMPFlags);
4203 - OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_BIF_CTRL, ui32BifInvalDCVal);
4204 - ResetSGXSleep(psDevInfo, ui32PDUMPFlags, IMG_FALSE);
4206 - OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_BIF_CTRL, ui32RegVal);
4208 - ResetSGXSleep(psDevInfo, ui32PDUMPFlags, IMG_TRUE);
4215 - IMG_UINT32 ui32BifIntStat = OSReadHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_BIF_INT_STAT);
4216 - IMG_DEV_VIRTADDR sBifFault;
4217 - IMG_UINT32 ui32PDIndex, ui32PTIndex;
4219 - if ((ui32BifIntStat & ui32BifFaultMask) == 0)
4230 - sBifFault.uiAddr = OSReadHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_BIF_FAULT);
4231 - PVR_DPF((PVR_DBG_WARNING, "ResetSGX: Page fault 0x%x/0x%x", ui32BifIntStat, sBifFault.uiAddr));
4232 - ui32PDIndex = sBifFault.uiAddr >> (SGX_MMU_PAGE_SHIFT + SGX_MMU_PT_SHIFT);
4233 - ui32PTIndex = (sBifFault.uiAddr & SGX_MMU_PT_MASK) >> SGX_MMU_PAGE_SHIFT;
4236 - ui32RegVal = ui32SoftResetRegVal | EUR_CR_SOFT_RESET_BIF_RESET_MASK;
4237 - OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_SOFT_RESET, ui32RegVal);
4240 - psDevInfo->pui32BIFResetPD[ui32PDIndex] = psDevInfo->sBIFResetPTDevPAddr.uiAddr | SGX_MMU_PDE_VALID;
4241 - psDevInfo->pui32BIFResetPT[ui32PTIndex] = psDevInfo->sBIFResetPageDevPAddr.uiAddr | SGX_MMU_PTE_VALID;
4244 - ui32RegVal = OSReadHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_EVENT_STATUS);
4245 - OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_EVENT_HOST_CLEAR, ui32RegVal);
4246 - ui32RegVal = OSReadHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_EVENT_STATUS2);
4247 - OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_EVENT_HOST_CLEAR2, ui32RegVal);
4249 - ResetSGXSleep(psDevInfo, ui32PDUMPFlags, IMG_FALSE);
4252 - ui32RegVal = ui32SoftResetRegVal;
4253 - OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_SOFT_RESET, ui32RegVal);
4254 - ResetSGXSleep(psDevInfo, ui32PDUMPFlags, IMG_FALSE);
4257 - OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_BIF_CTRL, ui32BifInvalDCVal);
4258 - ResetSGXSleep(psDevInfo, ui32PDUMPFlags, IMG_FALSE);
4260 - OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_BIF_CTRL, ui32RegVal);
4261 - ResetSGXSleep(psDevInfo, ui32PDUMPFlags, IMG_FALSE);
4264 - psDevInfo->pui32BIFResetPD[ui32PDIndex] = 0;
4265 - psDevInfo->pui32BIFResetPT[ui32PTIndex] = 0;
4271 -#if defined(SGX_FEATURE_MULTIPLE_MEM_CONTEXTS)
4273 - ui32BIFCtrl = (SGX_BIF_DIR_LIST_INDEX_EDM << EUR_CR_BIF_BANK0_INDEX_EDM_SHIFT);
4274 -#ifdef SGX_FEATURE_2D_HARDWARE
4276 - ui32BIFCtrl |= (SGX_BIF_DIR_LIST_INDEX_EDM << EUR_CR_BIF_BANK0_INDEX_2D_SHIFT);
4278 -#if defined(FIX_HW_BRN_23410)
4280 - ui32BIFCtrl |= (SGX_BIF_DIR_LIST_INDEX_EDM << EUR_CR_BIF_BANK0_INDEX_TA_SHIFT);
4283 - OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_BIF_BANK0, ui32BIFCtrl);
4284 - PDUMPREGWITHFLAGS(EUR_CR_BIF_BANK0, ui32BIFCtrl, ui32PDUMPFlags);
4288 - OSWriteHWReg(psDevInfo->pvRegsBaseKM, SGX_BIF_DIR_LIST_REG_EDM, psDevInfo->sKernelPDDevPAddr.uiAddr);
4289 - PDUMPPDREGWITHFLAGS(SGX_BIF_DIR_LIST_REG_EDM, psDevInfo->sKernelPDDevPAddr.uiAddr, ui32PDUMPFlags, PDUMP_PD_UNIQUETAG);
4291 -#ifdef SGX_FEATURE_2D_HARDWARE
4293 - OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_BIF_TWOD_REQ_BASE, SGX_2D_HEAP_BASE);
4294 - PDUMPREGWITHFLAGS(EUR_CR_BIF_TWOD_REQ_BASE, SGX_2D_HEAP_BASE, ui32PDUMPFlags);
4297 -#if !defined(SGX_FEATURE_MULTIPLE_MEM_CONTEXTS)
4299 - ui32RegVal = ui32SoftResetRegVal | EUR_CR_SOFT_RESET_BIF_RESET_MASK;
4300 - OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_SOFT_RESET, ui32RegVal);
4301 - PDUMPREGWITHFLAGS(EUR_CR_SOFT_RESET, ui32RegVal, ui32PDUMPFlags);
4302 - ResetSGXSleep(psDevInfo, ui32PDUMPFlags, IMG_TRUE);
4304 - ui32RegVal = ui32SoftResetRegVal;
4305 - OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_SOFT_RESET, ui32RegVal);
4306 - PDUMPREGWITHFLAGS(EUR_CR_SOFT_RESET, ui32RegVal, ui32PDUMPFlags);
4307 - ResetSGXSleep(psDevInfo, ui32PDUMPFlags, IMG_TRUE);
4311 - OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_BIF_CTRL, ui32BifInvalDCVal);
4312 - PDUMPREGWITHFLAGS(EUR_CR_BIF_CTRL, ui32BifInvalDCVal, ui32PDUMPFlags);
4314 - ResetSGXSleep(psDevInfo, ui32PDUMPFlags, IMG_TRUE);
4317 - OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_BIF_CTRL, ui32RegVal);
4318 - PDUMPREGWITHFLAGS(EUR_CR_BIF_CTRL, ui32RegVal, ui32PDUMPFlags);
4320 - PVR_DPF((PVR_DBG_WARNING,"Soft Reset of SGX"));
4321 - ResetSGXSleep(psDevInfo, ui32PDUMPFlags, IMG_TRUE);
4325 - OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_SOFT_RESET, ui32RegVal);
4326 - PDUMPREGWITHFLAGS(EUR_CR_SOFT_RESET, ui32RegVal, ui32PDUMPFlags);
4329 - ResetSGXSleep(psDevInfo, ui32PDUMPFlags, IMG_TRUE);
4331 - PDUMPCOMMENTWITHFLAGS(ui32PDUMPFlags, "End of SGX reset sequence\r\n");
4334 static PVRSRV_ERROR DevInitSGXPart1 (IMG_VOID *pvDeviceNode)
4336 PVRSRV_SGXDEV_INFO *psDevInfo;
4339 psDevInfo->sKernelPDDevPAddr = sPDDevPAddr;
4343 for(i=0; i<psDeviceNode->sDevMemoryInfo.ui32HeapCount; i++)
4345 @@ -759,25 +527,6 @@
4346 return PVRSRV_ERROR_GENERIC;
4349 -#if defined(SUPPORT_SGX_EVENT_OBJECT)
4351 - if(OSAllocMem( PVRSRV_OS_PAGEABLE_HEAP,
4352 - sizeof(PVRSRV_EVENTOBJECT) ,
4353 - (IMG_VOID **)&psDevInfo->psSGXEventObject, 0) != PVRSRV_OK)
4356 - PVR_DPF((PVR_DBG_ERROR,"DevInitSGXPart1 : Failed to alloc memory for event object"));
4357 - return (PVRSRV_ERROR_OUT_OF_MEMORY);
4360 - if(OSEventObjectCreate("PVRSRV_EVENTOBJECT_SGX", psDevInfo->psSGXEventObject) != PVRSRV_OK)
4362 - PVR_DPF((PVR_DBG_ERROR,"DevInitSGXPart1 : Failed to create event object"));
4363 - return (PVRSRV_ERROR_OUT_OF_MEMORY);
4371 @@ -816,9 +565,10 @@
4374 psDevInfo->ui32CoreClockSpeed = psSGXTimingInfo->ui32CoreClockSpeed;
4375 + psDevInfo->ui32uKernelTimerClock = psSGXTimingInfo->ui32CoreClockSpeed / psSGXTimingInfo->ui32uKernelFreq;
4378 - psInitInfo->ui32uKernelTimerClock = psSGXTimingInfo->ui32CoreClockSpeed / psSGXTimingInfo->ui32uKernelFreq;
4379 + psInitInfo->ui32uKernelTimerClock = psDevInfo->ui32uKernelTimerClock;
4380 #if defined(SUPPORT_HW_RECOVERY)
4381 psInitInfo->ui32HWRecoverySampleRate = psSGXTimingInfo->ui32uKernelFreq / psSGXTimingInfo->ui32HWRecoveryFreq;
4390 OSMemSet(psDevInfo->psKernelCCB, 0, sizeof(PVRSRV_SGX_KERNEL_CCB));
4391 @@ -983,27 +732,16 @@
4392 PDUMPCOMMENT("Kernel CCB Event Kicker");
4393 PDUMPMEM(IMG_NULL, psDevInfo->psKernelCCBEventKickerMemInfo, 0, sizeof(*psDevInfo->pui32KernelCCBEventKicker), PDUMP_FLAGS_CONTINUOUS, MAKEUNIQUETAG(psDevInfo->psKernelCCBEventKickerMemInfo));
4396 +#if defined(SUPPORT_HW_RECOVERY)
4398 - eError = PVRSRVSetDevicePowerStateKM(psDeviceNode->sDevId.ui32DeviceIndex,
4399 - PVRSRV_POWER_Unspecified,
4400 - KERNEL_ID, IMG_FALSE);
4401 - if (eError != PVRSRV_OK)
4403 - PVR_DPF((PVR_DBG_ERROR,"DevInitSGXPart2KM: Failed PVRSRVSetDevicePowerStateKM call"));
4407 -#if defined(SUPPORT_HW_RECOVERY)
4409 + psDevInfo->hTimer = OSAddTimer(SGXOSTimer, psDeviceNode,
4410 + 1000 * 50 / psSGXDeviceMap->sTimingInfo.ui32uKernelFreq);
4411 + if(psDevInfo->hTimer == IMG_NULL)
4413 - SGX_TIMING_INFORMATION* psSGXTimingInfo = & psSGXDeviceMap->sTimingInfo;
4415 - psDevInfo->hTimer = OSAddTimer(SGXOSTimer, psDeviceNode, 1000 * 50 / psSGXTimingInfo->ui32uKernelFreq);
4416 - if(psDevInfo->hTimer == IMG_NULL)
4418 - PVR_DPF((PVR_DBG_ERROR,"OSAddTimer : Failed to register timer callback function"));
4419 - return PVRSRV_ERROR_GENERIC;
4421 + PVR_DPF((PVR_DBG_ERROR,"DevInitSGXPart2KM : Failed to register timer callback function"));
4422 + return PVRSRV_ERROR_GENERIC;
4426 @@ -1030,38 +768,17 @@
4429 #if defined(SUPPORT_HW_RECOVERY)
4431 - if(psDevInfo->hTimer)
4433 - eError = OSRemoveTimer (psDevInfo->hTimer);
4434 - if (eError != PVRSRV_OK)
4436 - PVR_DPF((PVR_DBG_ERROR,"DevDeInitSGX: Failed to remove timer"));
4442 - MMU_BIFResetPDFree(psDevInfo);
4451 -#if !defined(SUPPORT_ACTIVE_POWER_MANAGEMENT)
4453 - eError = SGXDeinitialise((IMG_HANDLE)psDevInfo);
4454 + eError = OSRemoveTimer(psDevInfo->hTimer);
4455 if (eError != PVRSRV_OK)
4457 - PVR_DPF((PVR_DBG_ERROR,"DevDeInitSGX: SGXDeinitialise failed"));
4459 + PVR_DPF((PVR_DBG_ERROR,"DevDeInitSGX: Failed to remove timer"));
4462 + psDevInfo->hTimer = IMG_NULL;
4466 + MMU_BIFResetPDFree(psDevInfo);
4470 @@ -1146,23 +863,14 @@
4474 -#if defined(SUPPORT_SGX_EVENT_OBJECT)
4476 - if(psDevInfo->psSGXEventObject)
4478 - OSEventObjectDestroy(psDevInfo->psSGXEventObject);
4479 - OSFreeMem( PVRSRV_OS_PAGEABLE_HEAP,
4480 - sizeof(PVRSRV_EVENTOBJECT) ,
4481 - psDevInfo->psSGXEventObject, 0);
4486 OSFreePages(PVRSRV_OS_PAGEABLE_HEAP|PVRSRV_HAP_MULTI_PROCESS,
4487 sizeof(PVRSRV_SGXDEV_INFO),
4489 hDevInfoOSMemHandle);
4491 + psDeviceNode->pvDevice = IMG_NULL;
4493 if (psDeviceMemoryHeap != IMG_NULL)
4496 @@ -1178,47 +886,17 @@
4500 -IMG_VOID HWRecoveryResetSGX (PVRSRV_SGXDEV_INFO *psDevInfo,
4501 - IMG_UINT32 ui32Component,
4502 - IMG_UINT32 ui32CallerID)
4504 - PVRSRV_ERROR eError;
4506 - PVR_UNREFERENCED_PARAMETER(ui32Component);
4507 - PVR_UNREFERENCED_PARAMETER(ui32CallerID);
4510 - PVR_DPF((PVR_DBG_ERROR, "HWRecoveryResetSGX: SGX Hardware Recovery triggered"));
4516 - ResetPBs(psDevInfo);
4519 - eError = SGXInitialise(psDevInfo, IMG_TRUE);
4520 - if (eError != PVRSRV_OK)
4522 - PVR_DPF((PVR_DBG_ERROR,"HWRecoveryResetSGX: SGXInitialise failed (%d)", eError));
4530 -IMG_VOID HWRecoveryResetSGXEDM (PVRSRV_DEVICE_NODE *psDeviceNode,
4531 - IMG_UINT32 ui32Component,
4532 +#if defined(SYS_USING_INTERRUPTS) || defined(SUPPORT_HW_RECOVERY)
4533 +static IMG_VOID HWRecoveryResetSGX (PVRSRV_DEVICE_NODE *psDeviceNode,
4534 + IMG_UINT32 ui32Component,
4535 IMG_UINT32 ui32CallerID)
4537 PVRSRV_ERROR eError;
4538 PVRSRV_SGXDEV_INFO *psDevInfo = (PVRSRV_SGXDEV_INFO*)psDeviceNode->pvDevice;
4539 PVRSRV_SGX_HOST_CTL *psSGXHostCtl = (PVRSRV_SGX_HOST_CTL *)psDevInfo->psSGXHostCtl;
4541 -#if defined(SGX_FEATURE_2D_HARDWARE)
4542 - SGX2DHWRecoveryStart(psDevInfo);
4544 + PVR_UNREFERENCED_PARAMETER(ui32Component);
4548 eError = PVRSRVPowerLock(ui32CallerID, IMG_FALSE);
4549 @@ -1227,15 +905,32 @@
4553 - PVR_DPF((PVR_DBG_WARNING,"HWRecoveryResetSGXEDM: Power transition in progress"));
4554 + PVR_DPF((PVR_DBG_WARNING,"HWRecoveryResetSGX: Power transition in progress"));
4558 psSGXHostCtl->ui32InterruptClearFlags |= PVRSRV_USSE_EDM_INTERRUPT_HWR;
4560 + PVR_DPF((PVR_DBG_ERROR, "HWRecoveryResetSGX: SGX Hardware Recovery triggered"));
4562 - HWRecoveryResetSGX(psDevInfo, ui32Component, ui32CallerID);
4570 + eError = SGXInitialise(psDevInfo, IMG_TRUE);
4572 + while (eError == PVRSRV_ERROR_RETRY);
4573 + if (eError != PVRSRV_OK)
4575 + PVR_DPF((PVR_DBG_ERROR,"HWRecoveryResetSGX: SGXInitialise failed (%d)", eError));
4581 PVRSRVPowerUnlock(ui32CallerID);
4584 @@ -1244,11 +939,9 @@
4587 PVRSRVProcessQueues(ui32CallerID, IMG_TRUE);
4589 -#if defined(SGX_FEATURE_2D_HARDWARE)
4590 - SGX2DHWRecoveryEnd(psDevInfo);
4596 #if defined(SUPPORT_HW_RECOVERY)
4597 IMG_VOID SGXOSTimer(IMG_VOID *pvData)
4598 @@ -1261,10 +954,6 @@
4599 IMG_UINT32 ui32CurrentEDMTasks;
4600 IMG_BOOL bLockup = IMG_FALSE;
4601 IMG_BOOL bPoweredDown;
4602 -#if defined(SGX_FEATURE_2D_HARDWARE)
4603 - IMG_UINT32 ui322DCompletedBlits = 0;
4604 - IMG_BOOL b2DCoreIsBusy;
4608 psDevInfo->ui32TimeStamp++;
4609 @@ -1305,42 +994,6 @@
4613 -#if defined(SGX_FEATURE_2D_HARDWARE)
4614 - if (!bPoweredDown)
4616 - ui322DCompletedBlits = psDevInfo->ui322DCompletedBlits;
4617 - psDevInfo->ui322DCompletedBlits = SGX2DCompletedBlits(psDevInfo);
4620 - if (!bLockup && !bPoweredDown)
4622 - b2DCoreIsBusy = SGX2DIsBusy(psDevInfo);
4624 - if (b2DCoreIsBusy && ui322DCompletedBlits == psDevInfo->ui322DCompletedBlits)
4626 - if (psDevInfo->b2DLockupSuspected)
4628 - PVR_DPF((PVR_DBG_ERROR, "SGXTimer() detects 2D lockup (%d blits completed)", psDevInfo->ui322DCompletedBlits));
4629 - bLockup = IMG_TRUE;
4630 - psDevInfo->b2DLockupSuspected = IMG_FALSE;
4635 - psDevInfo->b2DLockupSuspected = IMG_TRUE;
4640 - psDevInfo->b2DLockupSuspected = IMG_FALSE;
4645 - psDevInfo->b2DLockupSuspected = IMG_FALSE;
4651 PVRSRV_SGX_HOST_CTL *psSGXHostCtl = (PVRSRV_SGX_HOST_CTL *)psDevInfo->psSGXHostCtl;
4652 @@ -1349,7 +1002,7 @@
4653 psSGXHostCtl->ui32HostDetectedLockups ++;
4656 - HWRecoveryResetSGXEDM(psDeviceNode, 0, KERNEL_ID);
4657 + HWRecoveryResetSGX(psDeviceNode, 0, KERNEL_ID);
4661 @@ -1394,14 +1047,6 @@
4662 ui32EventClear |= EUR_CR_EVENT_HOST_CLEAR_SW_EVENT_MASK;
4665 -#if defined(SGX_FEATURE_2D_HARDWARE)
4666 - if (ui32EventStatus & EUR_CR_EVENT_STATUS_TWOD_COMPLETE_MASK)
4668 - ui32EventClear |= EUR_CR_EVENT_HOST_CLEAR_TWOD_COMPLETE_MASK;
4669 - SGX2DHandle2DComplete(psDevInfo);
4675 bInterruptProcessed = IMG_TRUE;
4676 @@ -1420,7 +1065,6 @@
4678 IMG_VOID SGX_MISRHandler (IMG_VOID *pvData)
4680 - PVRSRV_ERROR eError = PVRSRV_OK;
4681 PVRSRV_DEVICE_NODE *psDeviceNode = (PVRSRV_DEVICE_NODE *)pvData;
4682 PVRSRV_SGXDEV_INFO *psDevInfo = (PVRSRV_SGXDEV_INFO*)psDeviceNode->pvDevice;
4683 PVRSRV_SGX_HOST_CTL *psSGXHostCtl = (PVRSRV_SGX_HOST_CTL *)psDevInfo->psSGXHostCtl;
4684 @@ -1428,64 +1072,12 @@
4685 if ((psSGXHostCtl->ui32InterruptFlags & PVRSRV_USSE_EDM_INTERRUPT_HWR) &&
4686 !(psSGXHostCtl->ui32InterruptClearFlags & PVRSRV_USSE_EDM_INTERRUPT_HWR))
4688 - HWRecoveryResetSGXEDM(psDeviceNode, 0, ISR_ID);
4689 + HWRecoveryResetSGX(psDeviceNode, 0, ISR_ID);
4692 - if ((eError == PVRSRV_OK) &&
4693 - (psSGXHostCtl->ui32InterruptFlags & PVRSRV_USSE_EDM_INTERRUPT_ACTIVE_POWER) &&
4694 - !(psSGXHostCtl->ui32PowManFlags & PVRSRV_USSE_EDM_POWMAN_POWEROFF_REQUEST))
4698 #if defined(SUPPORT_ACTIVE_POWER_MANAGEMENT)
4704 - eError = PVRSRVSetDevicePowerStateKM(psDeviceNode->sDevId.ui32DeviceIndex,
4705 - PVRSRV_POWER_STATE_D3,
4706 - ISR_ID, IMG_FALSE);
4707 - if (eError == PVRSRV_OK)
4709 - if ((*(volatile IMG_UINT32 *)(&psSGXHostCtl->ui32PowManFlags)
4710 - & PVRSRV_USSE_EDM_POWMAN_POWEROFF_RESTART_IMMEDIATE) != 0)
4715 - psDeviceNode->bReProcessDeviceCommandComplete = IMG_TRUE;
4718 - else if (eError == PVRSRV_ERROR_RETRY)
4722 - eError = PVRSRV_OK;
4728 + SGXTestActivePowerEvent(psDeviceNode, ISR_ID);
4732 -#if defined(SUPPORT_SGX_EVENT_OBJECT)
4733 - if (psDevInfo->psSGXEventObject)
4735 - PVRSRV_EVENTOBJECT *psEventObject = psDevInfo->psSGXEventObject;
4736 - if(psEventObject->hOSEventKM)
4738 - OSEventObjectSignal(psEventObject->hOSEventKM);
4744 - if (eError != PVRSRV_OK)
4746 - PVR_DPF((PVR_DBG_ERROR, "SGX_MISRHandler error:%lu", eError));
4751 @@ -1494,7 +1086,6 @@
4753 DEVICE_MEMORY_INFO *psDevMemoryInfo;
4754 DEVICE_MEMORY_HEAP_INFO *psDeviceMemoryHeap;
4755 - IMG_BOOL bSharedPB = IMG_TRUE;
4758 psDeviceNode->sDevId.eDeviceType = DEV_DEVICE_TYPE;
4759 @@ -1684,13 +1275,8 @@
4760 | PVRSRV_HAP_MULTI_PROCESS;
4761 psDeviceMemoryHeap[SGX_SYNCINFO_HEAP_ID].pszName = "CacheCoherent";
4762 psDeviceMemoryHeap[SGX_SYNCINFO_HEAP_ID].pszBSName = "CacheCoherent BS";
4763 -#if defined(SGX535)
4765 psDeviceMemoryHeap[SGX_SYNCINFO_HEAP_ID].DevMemHeapType = DEVICE_MEMORY_HEAP_SHARED_EXPORTED;
4768 - psDeviceMemoryHeap[SGX_SYNCINFO_HEAP_ID].DevMemHeapType = DEVICE_MEMORY_HEAP_SHARED_EXPORTED;
4772 psDeviceMemoryHeap[SGX_3DPARAMETERS_HEAP_ID].ui32HeapID = HEAP_ID(PVRSRV_DEVICE_TYPE_SGX, SGX_3DPARAMETERS_HEAP_ID);
4773 @@ -1698,32 +1284,23 @@
4774 psDeviceMemoryHeap[SGX_3DPARAMETERS_HEAP_ID].ui32HeapSize = SGX_3DPARAMETERS_HEAP_SIZE;
4775 psDeviceMemoryHeap[SGX_3DPARAMETERS_HEAP_ID].pszName = "3DParameters";
4776 psDeviceMemoryHeap[SGX_3DPARAMETERS_HEAP_ID].pszBSName = "3DParameters BS";
4781 - psDeviceMemoryHeap[SGX_3DPARAMETERS_HEAP_ID].ui32Attribs = PVRSRV_HAP_WRITECOMBINE
4782 - | PVRSRV_MEM_RAM_BACKED_ALLOCATION
4784 - | PVRSRV_HAP_KERNEL_ONLY;
4785 +#if defined(SUPPORT_PERCONTEXT_PB)
4786 + psDeviceMemoryHeap[SGX_3DPARAMETERS_HEAP_ID].ui32Attribs = PVRSRV_HAP_WRITECOMBINE
4787 + | PVRSRV_MEM_RAM_BACKED_ALLOCATION
4788 + | PVRSRV_HAP_SINGLE_PROCESS;
4789 + psDeviceMemoryHeap[SGX_3DPARAMETERS_HEAP_ID].DevMemHeapType = DEVICE_MEMORY_HEAP_PERCONTEXT;
4791 - | PVRSRV_HAP_MULTI_PROCESS;
4793 - psDeviceMemoryHeap[SGX_3DPARAMETERS_HEAP_ID].DevMemHeapType = DEVICE_MEMORY_HEAP_SHARED_EXPORTED;
4797 - psDeviceMemoryHeap[SGX_3DPARAMETERS_HEAP_ID].ui32Attribs = PVRSRV_HAP_WRITECOMBINE
4798 - | PVRSRV_MEM_RAM_BACKED_ALLOCATION
4799 - | PVRSRV_HAP_SINGLE_PROCESS;
4800 - psDeviceMemoryHeap[SGX_3DPARAMETERS_HEAP_ID].DevMemHeapType = DEVICE_MEMORY_HEAP_PERCONTEXT;
4802 + psDeviceMemoryHeap[SGX_3DPARAMETERS_HEAP_ID].ui32Attribs = PVRSRV_HAP_WRITECOMBINE
4803 + | PVRSRV_MEM_RAM_BACKED_ALLOCATION
4804 + | PVRSRV_HAP_MULTI_PROCESS;
4805 + psDeviceMemoryHeap[SGX_3DPARAMETERS_HEAP_ID].DevMemHeapType = DEVICE_MEMORY_HEAP_SHARED_EXPORTED;
4809 psDeviceMemoryHeap[SGX_GENERAL_MAPPING_HEAP_ID].ui32HeapID = HEAP_ID( PVRSRV_DEVICE_TYPE_SGX , SGX_GENERAL_MAPPING_HEAP_ID);
4810 psDeviceMemoryHeap[SGX_GENERAL_MAPPING_HEAP_ID].sDevVAddrBase.uiAddr = SGX_GENERAL_MAPPING_HEAP_BASE;
4811 psDeviceMemoryHeap[SGX_GENERAL_MAPPING_HEAP_ID].ui32HeapSize = SGX_GENERAL_MAPPING_HEAP_SIZE;
4812 - psDeviceMemoryHeap[SGX_GENERAL_MAPPING_HEAP_ID].ui32Attribs = PVRSRV_HAP_WRITECOMBINE | PVRSRV_HAP_SINGLE_PROCESS;
4813 + psDeviceMemoryHeap[SGX_GENERAL_MAPPING_HEAP_ID].ui32Attribs = PVRSRV_HAP_WRITECOMBINE | PVRSRV_HAP_MULTI_PROCESS;
4814 psDeviceMemoryHeap[SGX_GENERAL_MAPPING_HEAP_ID].pszName = "GeneralMapping";
4815 psDeviceMemoryHeap[SGX_GENERAL_MAPPING_HEAP_ID].pszBSName = "GeneralMapping BS";
4817 @@ -1767,23 +1344,7 @@
4820 psClientInfo->ui32ProcessID = OSGetCurrentProcessIDKM();
4821 -#if defined(SGX_FEATURE_2D_HARDWARE)
4822 - psClientInfo->s2DSlavePort = psDevInfo->s2DSlavePortKM;
4824 - psClientInfo->pvRegsBase = psDevInfo->pvRegsBaseKM;
4826 -#if defined(SUPPORT_SGX_EVENT_OBJECT)
4827 - if (psDevInfo->psSGXEventObject)
4829 - PVRSRV_EVENTOBJECT *psEventObject = psDevInfo->psSGXEventObject;
4830 - psClientInfo->hOSEventKM = psEventObject->hOSEventKM;
4834 - psClientInfo->hOSEventKM = IMG_NULL;
4840 OSMemCopy(&psClientInfo->asDevData, &psDevInfo->asSGXDevData, sizeof(psClientInfo->asDevData));
4841 @@ -1792,13 +1353,48 @@
4847 -PVRSRV_ERROR SGXGetMiscInfoKM(PVRSRV_SGXDEV_INFO *psDevInfo, SGX_MISC_INFO *psMiscInfo)
4848 +PVRSRV_ERROR SGXGetMiscInfoKM(PVRSRV_SGXDEV_INFO *psDevInfo,
4849 + SGX_MISC_INFO *psMiscInfo)
4851 - PVR_UNREFERENCED_PARAMETER(psDevInfo);
4853 switch(psMiscInfo->eRequest)
4855 + case SGX_MISC_INFO_REQUEST_CLOCKSPEED:
4857 + psMiscInfo->uData.ui32SGXClockSpeed = psDevInfo->ui32CoreClockSpeed;
4860 +#ifdef SUPPORT_SGX_HWPERF
4861 + case SGX_MISC_INFO_REQUEST_HWPERF_CB_ON:
4863 + psDevInfo->psSGXHostCtl->ui32HWPerfFlags |= PVRSRV_SGX_HWPERF_ON;
4866 + case SGX_MISC_INFO_REQUEST_HWPERF_CB_OFF:
4868 + psDevInfo->psSGXHostCtl->ui32HWPerfFlags &= ~PVRSRV_SGX_HWPERF_ON;
4871 + case SGX_MISC_INFO_REQUEST_HWPERF_RETRIEVE_CB:
4873 + SGX_MISC_INFO_HWPERF_RETRIEVE_CB* psRetrieve = &psMiscInfo->uData.sRetrieveCB;
4874 + PVRSRV_SGX_HWPERF_CB* psHWPerfCB = (PVRSRV_SGX_HWPERF_CB*)psDevInfo->psKernelHWPerfCBMemInfo->pvLinAddrKM;
4877 + for (; psHWPerfCB->ui32Woff != psHWPerfCB->ui32Roff && i < psRetrieve->ui32ArraySize; i++)
4879 + PVRSRV_SGX_HWPERF_CBDATA* psData = &psHWPerfCB->psHWPerfCBData[psHWPerfCB->ui32Roff];
4880 + OSMemCopy(&psRetrieve->psHWPerfData[i], psData, sizeof(PVRSRV_SGX_HWPERF_CBDATA));
4881 + psRetrieve->psHWPerfData[i].ui32ClockSpeed = psDevInfo->ui32CoreClockSpeed;
4882 + psRetrieve->psHWPerfData[i].ui32TimeMax = psDevInfo->ui32uKernelTimerClock;
4883 + psHWPerfCB->ui32Roff = (psHWPerfCB->ui32Roff + 1) & (PVRSRV_SGX_HWPERF_CBSIZE - 1);
4885 + psRetrieve->ui32DataCount = i;
4886 + psRetrieve->ui32Time = OSClockus();
4893 @@ -1807,3 +1403,55 @@
4898 +#if defined(SUPPORT_SGX_HWPERF)
4900 +PVRSRV_ERROR SGXReadHWPerfCountersKM(PVRSRV_SGXDEV_INFO *psDevInfo,
4901 + IMG_UINT32 ui32PerfReg,
4902 + IMG_UINT32 *pui32OldPerf,
4903 + IMG_BOOL bNewPerf,
4904 + IMG_UINT32 ui32NewPerf,
4905 + IMG_UINT32 ui32NewPerfReset,
4906 + IMG_UINT32 ui32PerfCountersReg,
4907 + IMG_UINT32 *pui32Counters,
4908 + IMG_UINT32 *pui32KickTACounter,
4909 + IMG_UINT32 *pui32KickTARenderCounter,
4910 + IMG_UINT32 *pui32CPUTime,
4911 + IMG_UINT32 *pui32SGXTime)
4918 + *pui32OldPerf = OSReadHWReg(psDevInfo->pvRegsBaseKM, ui32PerfReg);
4920 + for (i = 0; i < 9; ++i)
4922 + pui32Counters[i] = OSReadHWReg(psDevInfo->pvRegsBaseKM, ui32PerfCountersReg + (i * 4));
4925 + *pui32KickTACounter = psDevInfo->ui32KickTACounter;
4926 + *pui32KickTARenderCounter = psDevInfo->ui32KickTARenderCounter;
4928 + *pui32CPUTime = OSClockus();
4929 + *pui32SGXTime = psDevInfo->psSGXHostCtl->ui32TimeWraps;
4936 + if(ui32NewPerfReset != 0)
4938 + OSWriteHWReg(psDevInfo->pvRegsBaseKM, ui32PerfReg, ui32NewPerf | ui32NewPerfReset);
4941 + OSWriteHWReg(psDevInfo->pvRegsBaseKM, ui32PerfReg, ui32NewPerf);
4949 diff -Nurd git/drivers/gpu/pvr/services4/srvkm/devices/sgx/sgxkick.c git/drivers/gpu/pvr/services4/srvkm/devices/sgx/sgxkick.c
4950 --- git/drivers/gpu/pvr/services4/srvkm/devices/sgx/sgxkick.c 2009-01-05 20:00:44.000000000 +0100
4951 +++ git/drivers/gpu/pvr/services4/srvkm/devices/sgx/sgxkick.c 2008-12-18 15:47:29.000000000 +0100
4954 ******************************************************************************/
4956 +#include <stddef.h>
4957 #include "services_headers.h"
4958 #include "sgxinfo.h"
4959 #include "sgxinfokm.h"
4961 #include "sgxapi_km.h"
4962 +#include "pdump_km.h"
4964 #include "sgx_bridge_km.h"
4966 @@ -36,92 +38,241 @@
4967 #include "sgxutils.h"
4970 +#define CCB_OFFSET_IS_VALID(type, psCCBMemInfo, psCCBKick, offset) \
4971 + ((psCCBKick)->offset + sizeof(type) < (psCCBMemInfo)->ui32AllocSize)
4973 #define CCB_DATA_FROM_OFFSET(type, psCCBMemInfo, psCCBKick, offset) \
4974 ((type *)(((char *)(psCCBMemInfo)->pvLinAddrKM) + \
4975 (psCCBKick)->offset))
4977 -#define CCB_OFFSET_IS_VALID(psCCBMemInfo, psCCBKick, offset) \
4978 - ((psCCBKick)->offset < (psCCBMemInfo)->ui32AllocSize)
4981 PVRSRV_ERROR SGXDoKickKM(IMG_HANDLE hDevHandle, PVR3DIF4_CCB_KICK *psCCBKick)
4983 PVRSRV_ERROR eError;
4984 PVRSRV_KERNEL_SYNC_INFO *psSyncInfo;
4985 PVRSRV_KERNEL_MEM_INFO *psCCBMemInfo = (PVRSRV_KERNEL_MEM_INFO *) psCCBKick->hCCBKernelMemInfo;
4986 - IMG_UINT32 *pui32DstReadOpsPendingVal;
4987 - IMG_UINT32 *pui32DstWriteOpsPendingVal;
4988 + PVR3DIF4_CMDTA_SHARED *psTACmd;
4990 +#if defined(SUPPORT_SGX_HWPERF)
4991 + PVRSRV_DEVICE_NODE *psDeviceNode;
4992 + PVRSRV_SGXDEV_INFO *psDevInfo;
4994 + psDeviceNode = (PVRSRV_DEVICE_NODE *)hDevHandle;
4995 + psDevInfo = (PVRSRV_SGXDEV_INFO *)psDeviceNode->pvDevice;
4998 -#if defined(NO_HARDWARE)
4999 - pui32DstReadOpsPendingVal = IMG_NULL;
5000 - pui32DstWriteOpsPendingVal = IMG_NULL;
5001 +#if defined(SUPPORT_SGX_HWPERF)
5002 + if (psCCBKick->bKickRender)
5004 + ++psDevInfo->ui32KickTARenderCounter;
5006 + ++psDevInfo->ui32KickTACounter;
5009 - if (psCCBKick->hDstKernelSyncInfo != IMG_NULL)
5010 + if (!CCB_OFFSET_IS_VALID(PVR3DIF4_CMDTA_SHARED, psCCBMemInfo, psCCBKick, ui32CCBOffset))
5013 - if (!CCB_OFFSET_IS_VALID(psCCBMemInfo, psCCBKick, ui32DstReadOpsPendingOffset) || !CCB_OFFSET_IS_VALID(psCCBMemInfo, psCCBKick, ui32DstWriteOpsPendingOffset))
5014 + return PVRSRV_ERROR_INVALID_PARAMS;
5016 + psTACmd = CCB_DATA_FROM_OFFSET(PVR3DIF4_CMDTA_SHARED, psCCBMemInfo, psCCBKick, ui32CCBOffset);
5019 + if (psCCBKick->hTA3DSyncInfo)
5021 + psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *)psCCBKick->hTA3DSyncInfo;
5022 + psTACmd->sTA3DDependancy.sWriteOpsCompleteDevVAddr = psSyncInfo->sWriteOpsCompleteDevVAddr;
5024 + psTACmd->sTA3DDependancy.ui32WriteOpPendingVal = psSyncInfo->psSyncData->ui32WriteOpsPending;
5026 + if (psCCBKick->bTADependency)
5028 - PVR_DPF((PVR_DBG_ERROR, "SGXDoKickKM: ui32DstReadOpsPendingOffset or ui32DstWriteOpsPendingOffset out of range"));
5029 + psSyncInfo->psSyncData->ui32WriteOpsPending++;
5033 - psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *) psCCBKick->hDstKernelSyncInfo;
5034 - pui32DstReadOpsPendingVal = CCB_DATA_FROM_OFFSET(IMG_UINT32, psCCBMemInfo, psCCBKick, ui32DstReadOpsPendingOffset);
5035 - pui32DstWriteOpsPendingVal = CCB_DATA_FROM_OFFSET(IMG_UINT32, psCCBMemInfo, psCCBKick, ui32DstWriteOpsPendingOffset);
5038 - *pui32DstReadOpsPendingVal = psSyncInfo->psSyncData->ui32ReadOpsPending;
5039 - *pui32DstWriteOpsPendingVal = psSyncInfo->psSyncData->ui32WriteOpsPending++;
5041 + if (psCCBKick->hTASyncInfo != IMG_NULL)
5043 + psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *)psCCBKick->hTASyncInfo;
5045 + psTACmd->sTQSyncReadOpsCompleteDevVAddr = psSyncInfo->sReadOpsCompleteDevVAddr;
5046 + psTACmd->sTQSyncWriteOpsCompleteDevVAddr = psSyncInfo->sWriteOpsCompleteDevVAddr;
5048 + psTACmd->ui32TQSyncReadOpsPendingVal = psSyncInfo->psSyncData->ui32ReadOpsPending++;
5049 + psTACmd->ui32TQSyncWriteOpsPendingVal = psSyncInfo->psSyncData->ui32WriteOpsPending;
5052 + if (psCCBKick->h3DSyncInfo != IMG_NULL)
5054 + psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *)psCCBKick->h3DSyncInfo;
5056 + psTACmd->s3DTQSyncReadOpsCompleteDevVAddr = psSyncInfo->sReadOpsCompleteDevVAddr;
5057 + psTACmd->s3DTQSyncWriteOpsCompleteDevVAddr = psSyncInfo->sWriteOpsCompleteDevVAddr;
5059 + psTACmd->ui323DTQSyncReadOpsPendingVal = psSyncInfo->psSyncData->ui32ReadOpsPending++;
5060 + psTACmd->ui323DTQSyncWriteOpsPendingVal = psSyncInfo->psSyncData->ui32WriteOpsPending;
5063 + psTACmd->ui32NumTAStatusVals = psCCBKick->ui32NumTAStatusVals;
5064 if (psCCBKick->ui32NumTAStatusVals != 0)
5067 for (i = 0; i < psCCBKick->ui32NumTAStatusVals; i++)
5069 - if (CCB_OFFSET_IS_VALID(psCCBMemInfo, psCCBKick, aui32TAStatusValueOffset[i]))
5071 - IMG_UINT32 *pui32TAStatusValue = CCB_DATA_FROM_OFFSET(IMG_UINT32, psCCBMemInfo, psCCBKick, aui32TAStatusValueOffset[i]);
5072 - psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *)psCCBKick->ahTAStatusSyncInfo[i];
5073 + psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *)psCCBKick->ahTAStatusSyncInfo[i];
5075 - *pui32TAStatusValue = psSyncInfo->psSyncData->ui32ReadOpsPending;
5079 - PVR_DPF((PVR_DBG_ERROR, "SGXDoKickKM: aui32TAStatusValueOffset[%d] out of range", i));
5081 + psTACmd->sCtlTAStatusInfo[i].sStatusDevAddr = psSyncInfo->sReadOpsCompleteDevVAddr;
5083 + psTACmd->sCtlTAStatusInfo[i].ui32StatusValue = psSyncInfo->psSyncData->ui32ReadOpsPending;
5087 + psTACmd->ui32Num3DStatusVals = psCCBKick->ui32Num3DStatusVals;
5088 if (psCCBKick->ui32Num3DStatusVals != 0)
5091 for (i = 0; i < psCCBKick->ui32Num3DStatusVals; i++)
5093 - if (CCB_OFFSET_IS_VALID(psCCBMemInfo, psCCBKick, aui323DStatusValueOffset[i]))
5095 - IMG_UINT32 *pui323DStatusValue = CCB_DATA_FROM_OFFSET(IMG_UINT32, psCCBMemInfo, psCCBKick, aui323DStatusValueOffset[i]);
5096 - psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *)psCCBKick->ah3DStatusSyncInfo[i];
5097 + psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *)psCCBKick->ah3DStatusSyncInfo[i];
5099 - *pui323DStatusValue = psSyncInfo->psSyncData->ui32ReadOpsPending;
5102 + psTACmd->sCtl3DStatusInfo[i].sStatusDevAddr = psSyncInfo->sReadOpsCompleteDevVAddr;
5104 + psTACmd->sCtl3DStatusInfo[i].ui32StatusValue = psSyncInfo->psSyncData->ui32ReadOpsPending;
5109 + psTACmd->ui32NumSrcSyncs = psCCBKick->ui32NumSrcSyncs;
5110 + for (i=0; i<psCCBKick->ui32NumSrcSyncs; i++)
5112 + psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *) psCCBKick->ahSrcKernelSyncInfo[i];
5114 + psTACmd->asSrcSyncs[i].sWriteOpsCompleteDevVAddr = psSyncInfo->sWriteOpsCompleteDevVAddr;
5115 + psTACmd->asSrcSyncs[i].sReadOpsCompleteDevVAddr = psSyncInfo->sReadOpsCompleteDevVAddr;
5118 + psTACmd->asSrcSyncs[i].ui32ReadOpPendingVal = psSyncInfo->psSyncData->ui32ReadOpsPending++;
5120 + psTACmd->asSrcSyncs[i].ui32WriteOpPendingVal = psSyncInfo->psSyncData->ui32WriteOpsPending;
5124 + if (psCCBKick->bFirstKickOrResume && psCCBKick->hRenderSurfSyncInfo != IMG_NULL)
5126 + psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *) psCCBKick->hRenderSurfSyncInfo;
5127 + psTACmd->sWriteOpsCompleteDevVAddr = psSyncInfo->sWriteOpsCompleteDevVAddr;
5128 + psTACmd->sReadOpsCompleteDevVAddr = psSyncInfo->sReadOpsCompleteDevVAddr;
5130 + psTACmd->ui32ReadOpsPendingVal = psSyncInfo->psSyncData->ui32ReadOpsPending;
5131 + psTACmd->ui32WriteOpsPendingVal = psSyncInfo->psSyncData->ui32WriteOpsPending++;
5135 + if (PDumpIsCaptureFrameKM())
5137 + if (psSyncInfo->psSyncData->ui32LastOpDumpVal == 0)
5139 - PVR_DPF((PVR_DBG_ERROR, "SGXDoKickKM: aui323DStatusValueOffset[%d] out of range", i));
5141 + PDUMPCOMMENT("Init render surface last op\r\n");
5143 + PDUMPMEM(IMG_NULL,
5144 + psSyncInfo->psSyncDataMemInfoKM,
5146 + sizeof(PVRSRV_SYNC_DATA),
5148 + MAKEUNIQUETAG(psSyncInfo->psSyncDataMemInfoKM));
5150 + PDUMPMEM(&psSyncInfo->psSyncData->ui32LastOpDumpVal,
5151 + psSyncInfo->psSyncDataMemInfoKM,
5152 + offsetof(PVRSRV_SYNC_DATA, ui32WriteOpsComplete),
5153 + sizeof(psSyncInfo->psSyncData->ui32WriteOpsComplete),
5155 + MAKEUNIQUETAG(psSyncInfo->psSyncDataMemInfoKM));
5158 + psSyncInfo->psSyncData->ui32LastOpDumpVal++;
5164 + if (PDumpIsCaptureFrameKM())
5166 + PDUMPCOMMENT("Shared part of TA command\r\n");
5168 + PDUMPMEM(IMG_NULL, psCCBMemInfo, psCCBKick->ui32CCBOffset, sizeof(PVR3DIF4_CMDTA_SHARED), 0, MAKEUNIQUETAG(psCCBMemInfo));
5170 + if (psCCBKick->hRenderSurfSyncInfo != IMG_NULL)
5172 + IMG_UINT32 ui32HackValue;
5174 + psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *)psCCBKick->hRenderSurfSyncInfo;
5175 + ui32HackValue = psSyncInfo->psSyncData->ui32LastOpDumpVal - 1;
5177 + PDUMPCOMMENT("Hack render surface last op in TA cmd\r\n");
5179 + PDUMPMEM(&ui32HackValue,
5181 + psCCBKick->ui32CCBOffset + offsetof(PVR3DIF4_CMDTA_SHARED, ui32WriteOpsPendingVal),
5182 + sizeof(IMG_UINT32),
5184 + MAKEUNIQUETAG(psCCBMemInfo));
5186 + ui32HackValue = 0;
5187 + PDUMPCOMMENT("Hack render surface read op in TA cmd\r\n");
5189 + PDUMPMEM(&ui32HackValue,
5191 + psCCBKick->ui32CCBOffset + offsetof(PVR3DIF4_CMDTA_SHARED, sReadOpsCompleteDevVAddr),
5192 + sizeof(IMG_UINT32),
5194 + MAKEUNIQUETAG(psCCBMemInfo));
5197 + for (i = 0; i < psCCBKick->ui32NumTAStatusVals; i++)
5199 + psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *)psCCBKick->ahTAStatusSyncInfo[i];
5201 + PDUMPCOMMENT("Hack TA status value in TA cmd\r\n");
5203 + PDUMPMEM(&psSyncInfo->psSyncData->ui32LastOpDumpVal,
5205 + psCCBKick->ui32CCBOffset + offsetof(PVR3DIF4_CMDTA_SHARED, sCtlTAStatusInfo[i].ui32StatusValue),
5206 + sizeof(IMG_UINT32),
5208 + MAKEUNIQUETAG(psCCBMemInfo));
5211 + for (i = 0; i < psCCBKick->ui32Num3DStatusVals; i++)
5213 + psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *)psCCBKick->ah3DStatusSyncInfo[i];
5215 + PDUMPCOMMENT("Hack 3D status value in TA cmd\r\n");
5217 + PDUMPMEM(&psSyncInfo->psSyncData->ui32LastOpDumpVal,
5219 + psCCBKick->ui32CCBOffset + offsetof(PVR3DIF4_CMDTA_SHARED, sCtl3DStatusInfo[i].ui32StatusValue),
5220 + sizeof(IMG_UINT32),
5222 + MAKEUNIQUETAG(psCCBMemInfo));
5227 eError = SGXScheduleCCBCommandKM(hDevHandle, psCCBKick->eCommand, &psCCBKick->sCommand, KERNEL_ID);
5228 if (eError == PVRSRV_ERROR_RETRY)
5231 - psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *) psCCBKick->hDstKernelSyncInfo;
5232 - psSyncInfo->psSyncData->ui32WriteOpsPending--;
5233 + if (psCCBKick->bFirstKickOrResume && psCCBKick->hRenderSurfSyncInfo != IMG_NULL)
5236 + psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *) psCCBKick->hRenderSurfSyncInfo;
5237 + psSyncInfo->psSyncData->ui32WriteOpsPending--;
5240 + for (i=0; i<psCCBKick->ui32NumSrcSyncs; i++)
5242 + psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *) psCCBKick->ahSrcKernelSyncInfo[i];
5243 + psSyncInfo->psSyncData->ui32ReadOpsPending--;
5248 else if (PVRSRV_OK != eError)
5249 @@ -132,70 +283,66 @@
5252 #if defined(NO_HARDWARE)
5253 - if (psCCBKick->ui32NumTAStatusVals != 0)
5256 - for (i = 0; i < psCCBKick->ui32NumTAStatusVals; i++)
5258 - if (CCB_OFFSET_IS_VALID(psCCBMemInfo, psCCBKick, aui32TAStatusValueOffset[i]))
5260 - IMG_UINT32 *pui32TAStatusValue = CCB_DATA_FROM_OFFSET(IMG_UINT32, psCCBMemInfo, psCCBKick, aui32TAStatusValueOffset[i]);
5261 - psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *)psCCBKick->ahTAStatusSyncInfo[i];
5263 - psSyncInfo->psSyncData->ui32ReadOpsComplete = *pui32TAStatusValue;
5268 - if (psCCBKick->bTerminate)
5269 + if (psCCBKick->hTA3DSyncInfo)
5271 - if (psCCBKick->hUpdateDstKernelSyncInfo != IMG_NULL)
5272 + psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *)psCCBKick->hTA3DSyncInfo;
5274 + if (psCCBKick->bTADependency)
5276 - psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *)psCCBKick->hUpdateDstKernelSyncInfo;
5277 - psSyncInfo->psSyncData->ui32WriteOpsComplete = ((pui32DstWriteOpsPendingVal != IMG_NULL) ? *pui32DstWriteOpsPendingVal : psCCBKick->ui32WriteOpsPendingVal) + 1;
5278 + psSyncInfo->psSyncData->ui32WriteOpsComplete = psSyncInfo->psSyncData->ui32WriteOpsPending;
5282 - if (psCCBKick->ui32Num3DStatusVals != 0)
5285 - for (i = 0; i < psCCBKick->ui32Num3DStatusVals; i++)
5287 - if (CCB_OFFSET_IS_VALID(psCCBMemInfo, psCCBKick, aui323DStatusValueOffset[i]))
5289 - IMG_UINT32 *pui323DStatusValue = CCB_DATA_FROM_OFFSET(IMG_UINT32, psCCBMemInfo, psCCBKick, aui323DStatusValueOffset[i]);
5290 - psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *)psCCBKick->ah3DStatusSyncInfo[i];
5291 + if (psCCBKick->hTASyncInfo != IMG_NULL)
5293 + psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *)psCCBKick->hTASyncInfo;
5295 - psSyncInfo->psSyncData->ui32ReadOpsComplete = *pui323DStatusValue;
5299 + psSyncInfo->psSyncData->ui32ReadOpsComplete = psSyncInfo->psSyncData->ui32ReadOpsPending;
5305 + if (psCCBKick->h3DSyncInfo != IMG_NULL)
5307 + psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *)psCCBKick->h3DSyncInfo;
5309 + psSyncInfo->psSyncData->ui32ReadOpsComplete = psSyncInfo->psSyncData->ui32ReadOpsPending;
5312 -IMG_VOID SGXScheduleProcessQueues(PVRSRV_DEVICE_NODE *psDeviceNode)
5314 - PVRSRV_ERROR eError;
5315 - PVRSRV_SGXDEV_INFO *psDevInfo = psDeviceNode->pvDevice;
5316 - PVRSRV_SGX_HOST_CTL *psHostCtl = psDevInfo->psKernelSGXHostCtlMemInfo->pvLinAddrKM;
5317 - IMG_UINT32 ui32PowManFlags;
5318 - PVRSRV_SGX_COMMAND sCommand = {0};
5320 + for (i = 0; i < psCCBKick->ui32NumTAStatusVals; i++)
5322 + psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *)psCCBKick->ahTAStatusSyncInfo[i];
5324 - ui32PowManFlags = psHostCtl->ui32PowManFlags;
5325 - if ((ui32PowManFlags & PVRSRV_USSE_EDM_POWMAN_NO_WORK) != 0)
5326 + psSyncInfo->psSyncData->ui32ReadOpsComplete = psTACmd->sCtlTAStatusInfo[i].ui32StatusValue;
5330 + for (i=0; i<psCCBKick->ui32NumSrcSyncs; i++)
5334 + psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *) psCCBKick->ahSrcKernelSyncInfo[i];
5336 + psSyncInfo->psSyncData->ui32ReadOpsComplete = psSyncInfo->psSyncData->ui32ReadOpsPending;
5340 - sCommand.ui32Data[0] = PVRSRV_CCBFLAGS_PROCESS_QUEUESCMD;
5341 - eError = SGXScheduleCCBCommandKM(psDeviceNode, PVRSRV_SGX_COMMAND_EDM_KICK, &sCommand, ISR_ID);
5342 - if (eError != PVRSRV_OK)
5343 + if (psCCBKick->bTerminateOrAbort)
5345 - PVR_DPF((PVR_DBG_ERROR,"SGXScheduleProcessQueues failed to schedule CCB command: %lu", eError));
5346 + if (psCCBKick->hRenderSurfSyncInfo != IMG_NULL)
5348 + psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *)psCCBKick->hRenderSurfSyncInfo;
5349 + psSyncInfo->psSyncData->ui32WriteOpsComplete = psCCBKick->bFirstKickOrResume ? psSyncInfo->psSyncData->ui32WriteOpsPending : (psCCBKick->ui32WriteOpsPendingVal + 1);
5353 + for (i = 0; i < psCCBKick->ui32Num3DStatusVals; i++)
5355 + psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *)psCCBKick->ah3DStatusSyncInfo[i];
5357 + psSyncInfo->psSyncData->ui32ReadOpsComplete = psTACmd->sCtl3DStatusInfo[i].ui32StatusValue;
5365 diff -Nurd git/drivers/gpu/pvr/services4/srvkm/devices/sgx/sgxreset.c git/drivers/gpu/pvr/services4/srvkm/devices/sgx/sgxreset.c
5366 --- git/drivers/gpu/pvr/services4/srvkm/devices/sgx/sgxreset.c 1970-01-01 01:00:00.000000000 +0100
5367 +++ git/drivers/gpu/pvr/services4/srvkm/devices/sgx/sgxreset.c 2008-12-18 15:47:29.000000000 +0100
5369 +/**********************************************************************
5371 + * Copyright(c) 2008 Imagination Technologies Ltd. All rights reserved.
5373 + * This program is free software; you can redistribute it and/or modify it
5374 + * under the terms and conditions of the GNU General Public License,
5375 + * version 2, as published by the Free Software Foundation.
5377 + * This program is distributed in the hope it will be useful but, except
5378 + * as otherwise stated in writing, without any warranty; without even the
5379 + * implied warranty of merchantability or fitness for a particular purpose.
5380 + * See the GNU General Public License for more details.
5382 + * You should have received a copy of the GNU General Public License along with
5383 + * this program; if not, write to the Free Software Foundation, Inc.,
5384 + * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
5386 + * The full GNU General Public License is included in this distribution in
5387 + * the file called "COPYING".
5389 + * Contact Information:
5390 + * Imagination Technologies Ltd. <gpl-support@imgtec.com>
5391 + * Home Park Estate, Kings Langley, Herts, WD4 8LZ, UK
5393 + ******************************************************************************/
5395 +#include "sgxdefs.h"
5396 +#include "sgxmmu.h"
5397 +#include "services_headers.h"
5398 +#include "sgxinfokm.h"
5399 +#include "sgxconfig.h"
5401 +#include "pdump_km.h"
5404 +#if defined(SGX_FEATURE_MULTIPLE_MEM_CONTEXTS)
5405 +#define SGX_BIF_DIR_LIST_INDEX_EDM 15
5406 +#define SGX_BIF_DIR_LIST_REG_EDM EUR_CR_BIF_DIR_LIST_BASE15
5408 +#define SGX_BIF_DIR_LIST_REG_EDM EUR_CR_BIF_DIR_LIST_BASE0
5412 +static IMG_VOID SGXResetSoftReset(PVRSRV_SGXDEV_INFO *psDevInfo,
5413 + IMG_BOOL bResetBIF,
5414 + IMG_UINT32 ui32PDUMPFlags,
5417 + IMG_UINT32 ui32SoftResetRegVal =
5418 + #ifdef EUR_CR_SOFT_RESET_TWOD_RESET_MASK
5419 + EUR_CR_SOFT_RESET_TWOD_RESET_MASK |
5421 + EUR_CR_SOFT_RESET_DPM_RESET_MASK |
5422 + EUR_CR_SOFT_RESET_TA_RESET_MASK |
5423 + EUR_CR_SOFT_RESET_USE_RESET_MASK |
5424 + EUR_CR_SOFT_RESET_ISP_RESET_MASK |
5425 + EUR_CR_SOFT_RESET_TSP_RESET_MASK;
5427 +#if !defined(PDUMP)
5428 + PVR_UNREFERENCED_PARAMETER(ui32PDUMPFlags);
5433 + ui32SoftResetRegVal |= EUR_CR_SOFT_RESET_BIF_RESET_MASK;
5436 + OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_SOFT_RESET, ui32SoftResetRegVal);
5439 + PDUMPREGWITHFLAGS(EUR_CR_SOFT_RESET, ui32SoftResetRegVal, ui32PDUMPFlags);
5444 +static IMG_VOID SGXResetSleep(PVRSRV_SGXDEV_INFO *psDevInfo,
5445 + IMG_UINT32 ui32PDUMPFlags,
5448 +#if !defined(PDUMP)
5449 + PVR_UNREFERENCED_PARAMETER(ui32PDUMPFlags);
5453 + OSWaitus(1000 * 1000000 / psDevInfo->ui32CoreClockSpeed);
5456 + PDUMPIDLWITHFLAGS(30, ui32PDUMPFlags);
5458 + PDumpRegRead(EUR_CR_SOFT_RESET, ui32PDUMPFlags);
5467 +static IMG_VOID SGXResetInvalDC(PVRSRV_SGXDEV_INFO *psDevInfo,
5468 + IMG_UINT32 ui32PDUMPFlags,
5471 + IMG_UINT32 ui32RegVal;
5474 + ui32RegVal = EUR_CR_BIF_CTRL_INVALDC_MASK;
5475 + OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_BIF_CTRL, ui32RegVal);
5478 + PDUMPREGWITHFLAGS(EUR_CR_BIF_CTRL, ui32RegVal, ui32PDUMPFlags);
5480 + SGXResetSleep(psDevInfo, ui32PDUMPFlags, bPDump);
5483 + OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_BIF_CTRL, ui32RegVal);
5486 + PDUMPREGWITHFLAGS(EUR_CR_BIF_CTRL, ui32RegVal, ui32PDUMPFlags);
5488 + SGXResetSleep(psDevInfo, ui32PDUMPFlags, bPDump);
5490 +#if !defined(SGX_FEATURE_MULTIPLE_MEM_CONTEXTS)
5495 + if (PollForValueKM((IMG_UINT32 *)((IMG_UINT8*)psDevInfo->pvRegsBaseKM + EUR_CR_BIF_MEM_REQ_STAT),
5497 + EUR_CR_BIF_MEM_REQ_STAT_READS_MASK,
5498 + MAX_HW_TIME_US/WAIT_TRY_COUNT,
5499 + WAIT_TRY_COUNT) != PVRSRV_OK)
5501 + PVR_DPF((PVR_DBG_ERROR,"Wait for DC invalidate failed."));
5506 + PDUMPREGPOLWITHFLAGS(EUR_CR_BIF_MEM_REQ_STAT, 0, EUR_CR_BIF_MEM_REQ_STAT_READS_MASK, ui32PDUMPFlags);
5513 +IMG_VOID SGXReset(PVRSRV_SGXDEV_INFO *psDevInfo,
5514 + IMG_UINT32 ui32PDUMPFlags)
5516 + IMG_UINT32 ui32RegVal;
5518 + const IMG_UINT32 ui32BifFaultMask =
5519 + EUR_CR_BIF_INT_STAT_FAULT_MASK;
5521 +#if defined(SGX_FEATURE_MULTIPLE_MEM_CONTEXTS)
5522 + IMG_UINT32 ui32BIFCtrl;
5523 +#if defined(EUR_CR_BIF_MEM_ARB_CONFIG)
5524 + IMG_UINT32 ui32BIFMemArb;
5529 + PVR_UNREFERENCED_PARAMETER(ui32PDUMPFlags);
5532 + psDevInfo->ui32NumResets++;
5534 + PDUMPCOMMENTWITHFLAGS(ui32PDUMPFlags, "Start of SGX reset sequence\r\n");
5536 +#if defined(FIX_HW_BRN_23944)
5538 + ui32RegVal = EUR_CR_BIF_CTRL_PAUSE_MASK;
5539 + OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_BIF_CTRL, ui32RegVal);
5540 + PDUMPREGWITHFLAGS(EUR_CR_BIF_CTRL, ui32RegVal, ui32PDUMPFlags);
5542 + SGXResetSleep(psDevInfo, ui32PDUMPFlags, IMG_TRUE);
5544 + ui32RegVal = OSReadHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_BIF_INT_STAT);
5545 + if (ui32RegVal & ui32BifFaultMask)
5548 + ui32RegVal = EUR_CR_BIF_CTRL_PAUSE_MASK | EUR_CR_BIF_CTRL_CLEAR_FAULT_MASK;
5549 + OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_BIF_CTRL, ui32RegVal);
5550 + PDUMPREGWITHFLAGS(EUR_CR_BIF_CTRL, ui32RegVal, ui32PDUMPFlags);
5552 + SGXResetSleep(psDevInfo, ui32PDUMPFlags, IMG_TRUE);
5554 + ui32RegVal = EUR_CR_BIF_CTRL_PAUSE_MASK;
5555 + OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_BIF_CTRL, ui32RegVal);
5556 + PDUMPREGWITHFLAGS(EUR_CR_BIF_CTRL, ui32RegVal, ui32PDUMPFlags);
5558 + SGXResetSleep(psDevInfo, ui32PDUMPFlags, IMG_TRUE);
5563 + SGXResetSoftReset(psDevInfo, IMG_TRUE, ui32PDUMPFlags, IMG_TRUE);
5565 + SGXResetSleep(psDevInfo, ui32PDUMPFlags, IMG_TRUE);
5569 +#if defined(SGX_FEATURE_MULTIPLE_MEM_CONTEXTS)
5571 + OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_BIF_BANK_SET, ui32RegVal);
5572 + PDUMPREGWITHFLAGS(EUR_CR_BIF_BANK_SET, ui32RegVal, ui32PDUMPFlags);
5573 + OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_BIF_BANK0, ui32RegVal);
5574 + PDUMPREGWITHFLAGS(EUR_CR_BIF_BANK0, ui32RegVal, ui32PDUMPFlags);
5576 +#if defined(EUR_CR_BIF_MEM_ARB_CONFIG)
5579 + ui32BIFMemArb = (12UL << EUR_CR_BIF_MEM_ARB_CONFIG_PAGE_SIZE_SHIFT) |
5580 + (7UL << EUR_CR_BIF_MEM_ARB_CONFIG_BEST_CNT_SHIFT) |
5581 + (12UL << EUR_CR_BIF_MEM_ARB_CONFIG_TTE_THRESH_SHIFT);
5582 + OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_BIF_MEM_ARB_CONFIG, ui32BIFMemArb);
5583 + PDUMPREGWITHFLAGS(EUR_CR_BIF_MEM_ARB_CONFIG, ui32BIFMemArb, ui32PDUMPFlags);
5593 + ui32RegVal = psDevInfo->sBIFResetPDDevPAddr.uiAddr;
5594 + OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_BIF_DIR_LIST_BASE0, ui32RegVal);
5596 + SGXResetSleep(psDevInfo, ui32PDUMPFlags, IMG_FALSE);
5599 + SGXResetSoftReset(psDevInfo, IMG_FALSE, ui32PDUMPFlags, IMG_TRUE);
5600 + SGXResetSleep(psDevInfo, ui32PDUMPFlags, IMG_FALSE);
5602 + SGXResetInvalDC(psDevInfo, ui32PDUMPFlags, IMG_FALSE);
5608 + IMG_UINT32 ui32BifIntStat = OSReadHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_BIF_INT_STAT);
5609 + IMG_DEV_VIRTADDR sBifFault;
5610 + IMG_UINT32 ui32PDIndex, ui32PTIndex;
5612 + if ((ui32BifIntStat & ui32BifFaultMask) == 0)
5620 + sBifFault.uiAddr = OSReadHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_BIF_FAULT);
5621 + PVR_DPF((PVR_DBG_WARNING, "SGXReset: Page fault 0x%x/0x%x", ui32BifIntStat, sBifFault.uiAddr));
5622 + ui32PDIndex = sBifFault.uiAddr >> (SGX_MMU_PAGE_SHIFT + SGX_MMU_PT_SHIFT);
5623 + ui32PTIndex = (sBifFault.uiAddr & SGX_MMU_PT_MASK) >> SGX_MMU_PAGE_SHIFT;
5626 + SGXResetSoftReset(psDevInfo, IMG_TRUE, ui32PDUMPFlags, IMG_FALSE);
5629 + psDevInfo->pui32BIFResetPD[ui32PDIndex] = psDevInfo->sBIFResetPTDevPAddr.uiAddr | SGX_MMU_PDE_VALID;
5630 + psDevInfo->pui32BIFResetPT[ui32PTIndex] = psDevInfo->sBIFResetPageDevPAddr.uiAddr | SGX_MMU_PTE_VALID;
5633 + ui32RegVal = OSReadHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_EVENT_STATUS);
5634 + OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_EVENT_HOST_CLEAR, ui32RegVal);
5635 + ui32RegVal = OSReadHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_EVENT_STATUS2);
5636 + OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_EVENT_HOST_CLEAR2, ui32RegVal);
5638 + SGXResetSleep(psDevInfo, ui32PDUMPFlags, IMG_FALSE);
5641 + SGXResetSoftReset(psDevInfo, IMG_FALSE, ui32PDUMPFlags, IMG_FALSE);
5642 + SGXResetSleep(psDevInfo, ui32PDUMPFlags, IMG_FALSE);
5645 + SGXResetInvalDC(psDevInfo, ui32PDUMPFlags, IMG_FALSE);
5648 + psDevInfo->pui32BIFResetPD[ui32PDIndex] = 0;
5649 + psDevInfo->pui32BIFResetPT[ui32PTIndex] = 0;
5655 +#if defined(SGX_FEATURE_MULTIPLE_MEM_CONTEXTS)
5657 + ui32BIFCtrl = (SGX_BIF_DIR_LIST_INDEX_EDM << EUR_CR_BIF_BANK0_INDEX_EDM_SHIFT);
5658 +#ifdef SGX_FEATURE_2D_HARDWARE
5660 + ui32BIFCtrl |= (SGX_BIF_DIR_LIST_INDEX_EDM << EUR_CR_BIF_BANK0_INDEX_2D_SHIFT);
5662 +#if defined(FIX_HW_BRN_23410)
5664 + ui32BIFCtrl |= (SGX_BIF_DIR_LIST_INDEX_EDM << EUR_CR_BIF_BANK0_INDEX_TA_SHIFT);
5667 + OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_BIF_BANK0, ui32BIFCtrl);
5668 + PDUMPREGWITHFLAGS(EUR_CR_BIF_BANK0, ui32BIFCtrl, ui32PDUMPFlags);
5672 + OSWriteHWReg(psDevInfo->pvRegsBaseKM, SGX_BIF_DIR_LIST_REG_EDM, psDevInfo->sKernelPDDevPAddr.uiAddr);
5673 + PDUMPPDREGWITHFLAGS(SGX_BIF_DIR_LIST_REG_EDM, psDevInfo->sKernelPDDevPAddr.uiAddr, ui32PDUMPFlags, PDUMP_PD_UNIQUETAG);
5675 +#ifdef SGX_FEATURE_2D_HARDWARE
5677 + OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_BIF_TWOD_REQ_BASE, SGX_2D_HEAP_BASE);
5678 + PDUMPREGWITHFLAGS(EUR_CR_BIF_TWOD_REQ_BASE, SGX_2D_HEAP_BASE, ui32PDUMPFlags);
5682 + SGXResetInvalDC(psDevInfo, ui32PDUMPFlags, IMG_TRUE);
5684 + PVR_DPF((PVR_DBG_WARNING,"Soft Reset of SGX"));
5685 + SGXResetSleep(psDevInfo, ui32PDUMPFlags, IMG_TRUE);
5689 + OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_SOFT_RESET, ui32RegVal);
5690 + PDUMPREGWITHFLAGS(EUR_CR_SOFT_RESET, ui32RegVal, ui32PDUMPFlags);
5693 + SGXResetSleep(psDevInfo, ui32PDUMPFlags, IMG_TRUE);
5695 + PDUMPCOMMENTWITHFLAGS(ui32PDUMPFlags, "End of SGX reset sequence\r\n");
5699 diff -Nurd git/drivers/gpu/pvr/services4/srvkm/devices/sgx/sgxtransfer.c git/drivers/gpu/pvr/services4/srvkm/devices/sgx/sgxtransfer.c
5700 --- git/drivers/gpu/pvr/services4/srvkm/devices/sgx/sgxtransfer.c 2009-01-05 20:00:44.000000000 +0100
5701 +++ git/drivers/gpu/pvr/services4/srvkm/devices/sgx/sgxtransfer.c 2008-12-18 15:47:29.000000000 +0100
5702 @@ -43,16 +43,314 @@
5703 #include "pvr_debug.h"
5704 #include "sgxutils.h"
5706 -IMG_EXPORT PVRSRV_ERROR SGXSubmitTransferKM(IMG_HANDLE hDevHandle,
5707 - IMG_DEV_VIRTADDR sHWRenderContextDevVAddr)
5709 +#define CCB_OFFSET_IS_VALID(type, psCCBMemInfo, psKick, offset) \
5710 + ((psKick)->offset + sizeof(type) < (psCCBMemInfo)->ui32AllocSize)
5712 +#define CCB_DATA_FROM_OFFSET(type, psCCBMemInfo, psKick, offset) \
5713 + ((type *)(((char *)(psCCBMemInfo)->pvLinAddrKM) + \
5714 + (psKick)->offset))
5716 +IMG_EXPORT PVRSRV_ERROR SGXSubmitTransferKM(IMG_HANDLE hDevHandle, PVRSRV_TRANSFER_SGX_KICK *psKick)
5718 + PVRSRV_KERNEL_MEM_INFO *psCCBMemInfo = (PVRSRV_KERNEL_MEM_INFO *)psKick->hCCBMemInfo;
5719 PVRSRV_SGX_COMMAND sCommand = {0};
5720 + PVR3DIF4_TRANSFERCMD_SHARED *psTransferCmd;
5721 + PVRSRV_KERNEL_SYNC_INFO *psSyncInfo;
5723 + PVRSRV_ERROR eError;
5725 + if (!CCB_OFFSET_IS_VALID(PVR3DIF4_TRANSFERCMD_SHARED, psCCBMemInfo, psKick, ui32SharedCmdCCBOffset))
5727 + return PVRSRV_ERROR_INVALID_PARAMS;
5729 + psTransferCmd = CCB_DATA_FROM_OFFSET(PVR3DIF4_TRANSFERCMD_SHARED, psCCBMemInfo, psKick, ui32SharedCmdCCBOffset);
5731 + if (psTransferCmd->ui32NumStatusVals > SGXTQ_MAX_STATUS)
5733 + return PVRSRV_ERROR_INVALID_PARAMS;
5736 + if (psKick->ui32StatusFirstSync +
5737 + (psKick->ui32NumSrcSync ? (psKick->ui32NumSrcSync - 1) : 0) +
5738 + (psKick->ui32NumDstSync ? (psKick->ui32NumDstSync - 1) : 0) >
5739 + psTransferCmd->ui32NumStatusVals)
5741 + return PVRSRV_ERROR_INVALID_PARAMS;
5744 + if (psKick->hTASyncInfo != IMG_NULL)
5746 + psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *)psKick->hTASyncInfo;
5748 + psTransferCmd->ui32TASyncWriteOpsPendingVal = psSyncInfo->psSyncData->ui32WriteOpsPending++;
5749 + psTransferCmd->ui32TASyncReadOpsPendingVal = psSyncInfo->psSyncData->ui32ReadOpsPending;
5751 + psTransferCmd->sTASyncWriteOpsCompleteDevVAddr = psSyncInfo->sWriteOpsCompleteDevVAddr;
5752 + psTransferCmd->sTASyncReadOpsCompleteDevVAddr = psSyncInfo->sReadOpsCompleteDevVAddr;
5756 + psTransferCmd->sTASyncWriteOpsCompleteDevVAddr.uiAddr = 0;
5757 + psTransferCmd->sTASyncReadOpsCompleteDevVAddr.uiAddr = 0;
5760 + if (psKick->h3DSyncInfo != IMG_NULL)
5762 + psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *)psKick->h3DSyncInfo;
5764 + psTransferCmd->ui323DSyncWriteOpsPendingVal = psSyncInfo->psSyncData->ui32WriteOpsPending++;
5765 + psTransferCmd->ui323DSyncReadOpsPendingVal = psSyncInfo->psSyncData->ui32ReadOpsPending;
5767 + psTransferCmd->s3DSyncWriteOpsCompleteDevVAddr = psSyncInfo->sWriteOpsCompleteDevVAddr;
5768 + psTransferCmd->s3DSyncReadOpsCompleteDevVAddr = psSyncInfo->sReadOpsCompleteDevVAddr;
5772 + psTransferCmd->s3DSyncWriteOpsCompleteDevVAddr.uiAddr = 0;
5773 + psTransferCmd->s3DSyncReadOpsCompleteDevVAddr.uiAddr = 0;
5776 - sCommand.ui32Data[0] = PVRSRV_CCBFLAGS_TRANSFERCMD;
5777 - sCommand.ui32Data[1] = sHWRenderContextDevVAddr.uiAddr;
5779 - return SGXScheduleCCBCommandKM(hDevHandle, PVRSRV_SGX_COMMAND_EDM_KICK, &sCommand, KERNEL_ID);
5780 + psTransferCmd->ui32NumSrcSync = psKick->ui32NumSrcSync;
5781 + psTransferCmd->ui32NumDstSync = psKick->ui32NumDstSync;
5784 + if(psKick->ui32NumSrcSync > 0)
5786 + psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *)psKick->ahSrcSyncInfo[0];
5788 + psTransferCmd->ui32SrcWriteOpPendingVal = psSyncInfo->psSyncData->ui32WriteOpsPending;
5789 + psTransferCmd->ui32SrcReadOpPendingVal = psSyncInfo->psSyncData->ui32ReadOpsPending;
5791 + psTransferCmd->sSrcWriteOpsCompleteDevAddr = psSyncInfo->sWriteOpsCompleteDevVAddr;
5792 + psTransferCmd->sSrcReadOpsCompleteDevAddr = psSyncInfo->sReadOpsCompleteDevVAddr;
5794 + if(psKick->ui32NumDstSync > 0)
5796 + psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *)psKick->ahDstSyncInfo[0];
5798 + psTransferCmd->ui32DstWriteOpPendingVal = psSyncInfo->psSyncData->ui32WriteOpsPending;
5799 + psTransferCmd->ui32DstReadOpPendingVal = psSyncInfo->psSyncData->ui32ReadOpsPending;
5801 + psTransferCmd->sDstWriteOpsCompleteDevAddr = psSyncInfo->sWriteOpsCompleteDevVAddr;
5802 + psTransferCmd->sDstReadOpsCompleteDevAddr = psSyncInfo->sReadOpsCompleteDevVAddr;
5806 + if (psKick->ui32NumSrcSync > 0)
5808 + psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *)psKick->ahSrcSyncInfo[0];
5809 + psSyncInfo->psSyncData->ui32ReadOpsPending++;
5812 + if (psKick->ui32NumDstSync > 0)
5814 + psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *)psKick->ahDstSyncInfo[0];
5815 + psSyncInfo->psSyncData->ui32WriteOpsPending++;
5819 + if (psKick->ui32NumSrcSync > 1)
5821 + for(i = 1; i < psKick->ui32NumSrcSync; i++)
5823 + psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *)psKick->ahSrcSyncInfo[i];
5825 + psTransferCmd->sCtlStatusInfo[psKick->ui32StatusFirstSync].ui32StatusValue = psSyncInfo->psSyncData->ui32ReadOpsPending++;
5827 + psTransferCmd->sCtlStatusInfo[psKick->ui32StatusFirstSync].sStatusDevAddr = psSyncInfo->sReadOpsCompleteDevVAddr;
5829 + psKick->ui32StatusFirstSync++;
5833 + if (psKick->ui32NumDstSync > 1)
5835 + for(i = 1; i < psKick->ui32NumDstSync; i++)
5837 + psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *)psKick->ahDstSyncInfo[i];
5839 + psTransferCmd->sCtlStatusInfo[psKick->ui32StatusFirstSync].ui32StatusValue = psSyncInfo->psSyncData->ui32WriteOpsPending++;
5841 + psTransferCmd->sCtlStatusInfo[psKick->ui32StatusFirstSync].sStatusDevAddr = psSyncInfo->sWriteOpsCompleteDevVAddr;
5843 + psKick->ui32StatusFirstSync++;
5848 + PDUMPCOMMENT("Shared part of transfer command\r\n");
5849 + PDUMPMEM(IMG_NULL,
5851 + psKick->ui32SharedCmdCCBOffset,
5852 + sizeof(PVR3DIF4_TRANSFERCMD_SHARED),
5854 + MAKEUNIQUETAG(psCCBMemInfo));
5857 + sCommand.ui32Data[0] = PVRSRV_CCBFLAGS_TRANSFERCMD;
5858 + sCommand.ui32Data[1] = psKick->sHWTransferContextDevVAddr.uiAddr;
5860 + eError = SGXScheduleCCBCommandKM(hDevHandle, PVRSRV_SGX_COMMAND_EDM_KICK, &sCommand, KERNEL_ID);
5862 +#if defined(NO_HARDWARE)
5864 + for(i = 0; i < psKick->ui32NumSrcSync; i++)
5866 + psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *)psKick->ahSrcSyncInfo[i];
5867 + psSyncInfo->psSyncData->ui32ReadOpsComplete = psSyncInfo->psSyncData->ui32ReadOpsPending;
5870 + for(i = 0; i < psKick->ui32NumDstSync; i++)
5872 + psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *)psKick->ahDstSyncInfo[i];
5873 + psSyncInfo->psSyncData->ui32WriteOpsComplete = psSyncInfo->psSyncData->ui32WriteOpsPending;
5877 + if (psKick->hTASyncInfo != IMG_NULL)
5879 + psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *)psKick->hTASyncInfo;
5881 + psSyncInfo->psSyncData->ui32WriteOpsComplete = psSyncInfo->psSyncData->ui32WriteOpsPending;
5884 + if (psKick->h3DSyncInfo != IMG_NULL)
5886 + psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *)psKick->h3DSyncInfo;
5888 + psSyncInfo->psSyncData->ui32WriteOpsComplete = psSyncInfo->psSyncData->ui32WriteOpsPending;
5896 +#if defined(SGX_FEATURE_2D_HARDWARE)
5897 +IMG_EXPORT PVRSRV_ERROR SGXSubmit2DKM(IMG_HANDLE hDevHandle, PVRSRV_2D_SGX_KICK *psKick)
5900 + PVRSRV_KERNEL_MEM_INFO *psCCBMemInfo = (PVRSRV_KERNEL_MEM_INFO *)psKick->hCCBMemInfo;
5901 + PVRSRV_SGX_COMMAND sCommand = {0};
5902 + PVR3DIF4_2DCMD_SHARED *ps2DCmd;
5903 + PVRSRV_KERNEL_SYNC_INFO *psSyncInfo;
5904 + IMG_BOOL bDstSyncDone = IMG_FALSE;
5905 + PVRSRV_ERROR eError;
5908 + if (!CCB_OFFSET_IS_VALID(PVR3DIF4_2DCMD_SHARED, psCCBMemInfo, psKick, ui32SharedCmdCCBOffset))
5910 + return PVRSRV_ERROR_INVALID_PARAMS;
5912 + ps2DCmd = CCB_DATA_FROM_OFFSET(PVR3DIF4_2DCMD_SHARED, psCCBMemInfo, psKick, ui32SharedCmdCCBOffset);
5914 + OSMemSet(ps2DCmd, 0, sizeof(*ps2DCmd));
5917 + if (psKick->hTASyncInfo != IMG_NULL)
5919 + psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *)psKick->hTASyncInfo;
5921 + ps2DCmd->sTASyncData.ui32WriteOpPendingVal = psSyncInfo->psSyncData->ui32WriteOpsPending++;
5922 + ps2DCmd->sTASyncData.ui32ReadOpPendingVal = psSyncInfo->psSyncData->ui32ReadOpsPending;
5924 + ps2DCmd->sTASyncData.sWriteOpsCompleteDevVAddr = psSyncInfo->sWriteOpsCompleteDevVAddr;
5925 + ps2DCmd->sTASyncData.sReadOpsCompleteDevVAddr = psSyncInfo->sReadOpsCompleteDevVAddr;
5929 + if (psKick->h3DSyncInfo != IMG_NULL)
5931 + psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *)psKick->h3DSyncInfo;
5933 + ps2DCmd->s3DSyncData.ui32WriteOpPendingVal = psSyncInfo->psSyncData->ui32WriteOpsPending++;
5934 + ps2DCmd->s3DSyncData.ui32ReadOpPendingVal = psSyncInfo->psSyncData->ui32ReadOpsPending;
5936 + ps2DCmd->s3DSyncData.sWriteOpsCompleteDevVAddr = psSyncInfo->sWriteOpsCompleteDevVAddr;
5937 + ps2DCmd->s3DSyncData.sReadOpsCompleteDevVAddr = psSyncInfo->sReadOpsCompleteDevVAddr;
5940 + ps2DCmd->ui32NumSrcSync = psKick->ui32NumSrcSync;
5941 + for (i = 0; i < psKick->ui32NumSrcSync; i++)
5943 + psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *)psKick->ahSrcSyncInfo[i];
5944 + if (psSyncInfo == (PVRSRV_KERNEL_SYNC_INFO *)psKick->hDstSyncInfo)
5946 + ps2DCmd->sSrcSyncData[i].ui32WriteOpPendingVal = psSyncInfo->psSyncData->ui32WriteOpsPending;
5947 + ps2DCmd->sSrcSyncData[i].ui32ReadOpPendingVal = psSyncInfo->psSyncData->ui32ReadOpsPending;
5949 + ps2DCmd->sDstSyncData.ui32WriteOpPendingVal = psSyncInfo->psSyncData->ui32WriteOpsPending++;
5950 + ps2DCmd->sDstSyncData.ui32ReadOpPendingVal = psSyncInfo->psSyncData->ui32ReadOpsPending++;
5952 + bDstSyncDone = IMG_TRUE;
5956 + ps2DCmd->sSrcSyncData[i].ui32WriteOpPendingVal = psSyncInfo->psSyncData->ui32WriteOpsPending;
5957 + ps2DCmd->sSrcSyncData[i].ui32ReadOpPendingVal = psSyncInfo->psSyncData->ui32ReadOpsPending++;
5960 + ps2DCmd->sSrcSyncData[i].sWriteOpsCompleteDevVAddr = psSyncInfo->sWriteOpsCompleteDevVAddr;
5961 + ps2DCmd->sSrcSyncData[i].sReadOpsCompleteDevVAddr = psSyncInfo->sReadOpsCompleteDevVAddr;
5964 + if (psKick->hDstSyncInfo != IMG_NULL)
5966 + psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *)psKick->hDstSyncInfo;
5968 + if (!bDstSyncDone)
5970 + ps2DCmd->sDstSyncData.ui32WriteOpPendingVal = psSyncInfo->psSyncData->ui32WriteOpsPending++;
5971 + ps2DCmd->sDstSyncData.ui32ReadOpPendingVal = psSyncInfo->psSyncData->ui32ReadOpsPending;
5974 + ps2DCmd->sDstSyncData.sWriteOpsCompleteDevVAddr = psSyncInfo->sWriteOpsCompleteDevVAddr;
5975 + ps2DCmd->sDstSyncData.sReadOpsCompleteDevVAddr = psSyncInfo->sReadOpsCompleteDevVAddr;
5980 + PDUMPCOMMENT("Shared part of 2D command\r\n");
5981 + PDUMPMEM(IMG_NULL,
5983 + psKick->ui32SharedCmdCCBOffset,
5984 + sizeof(PVR3DIF4_2DCMD_SHARED),
5986 + MAKEUNIQUETAG(psCCBMemInfo));
5989 + sCommand.ui32Data[0] = PVRSRV_CCBFLAGS_2DCMD;
5990 + sCommand.ui32Data[1] = psKick->sHW2DContextDevVAddr.uiAddr;
5992 + eError = SGXScheduleCCBCommandKM(hDevHandle, PVRSRV_SGX_COMMAND_EDM_KICK, &sCommand, KERNEL_ID);
5994 +#if defined(NO_HARDWARE)
5996 + for(i = 0; i < psKick->ui32NumSrcSync; i++)
5998 + psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *)psKick->ahSrcSyncInfo[i];
5999 + psSyncInfo->psSyncData->ui32ReadOpsComplete = psSyncInfo->psSyncData->ui32ReadOpsPending;
6002 + psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *)psKick->hDstSyncInfo;
6003 + psSyncInfo->psSyncData->ui32WriteOpsComplete = psSyncInfo->psSyncData->ui32WriteOpsPending;
6005 + if (psKick->hTASyncInfo != IMG_NULL)
6007 + psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *)psKick->hTASyncInfo;
6009 + psSyncInfo->psSyncData->ui32WriteOpsComplete = psSyncInfo->psSyncData->ui32WriteOpsPending;
6012 + if (psKick->h3DSyncInfo != IMG_NULL)
6014 + psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *)psKick->h3DSyncInfo;
6016 + psSyncInfo->psSyncData->ui32WriteOpsComplete = psSyncInfo->psSyncData->ui32WriteOpsPending;
6024 diff -Nurd git/drivers/gpu/pvr/services4/srvkm/devices/sgx/sgxutils.c git/drivers/gpu/pvr/services4/srvkm/devices/sgx/sgxutils.c
6025 --- git/drivers/gpu/pvr/services4/srvkm/devices/sgx/sgxutils.c 2009-01-05 20:00:44.000000000 +0100
6026 +++ git/drivers/gpu/pvr/services4/srvkm/devices/sgx/sgxutils.c 2008-12-18 15:47:29.000000000 +0100
6031 +#if defined(SYS_CUSTOM_POWERDOWN)
6032 +PVRSRV_ERROR SysPowerDownMISR(IMG_UINT32 ui32DeviceIndex, IMG_UINT32 ui32CallerID);
6036 +#if defined(SUPPORT_ACTIVE_POWER_MANAGEMENT)
6037 +IMG_VOID SGXTestActivePowerEvent (PVRSRV_DEVICE_NODE *psDeviceNode,
6038 + IMG_UINT32 ui32CallerID)
6040 + PVRSRV_ERROR eError = PVRSRV_OK;
6041 + PVRSRV_SGXDEV_INFO *psDevInfo = psDeviceNode->pvDevice;
6042 + PVRSRV_SGX_HOST_CTL *psSGXHostCtl = psDevInfo->psSGXHostCtl;
6044 + if ((psSGXHostCtl->ui32InterruptFlags & PVRSRV_USSE_EDM_INTERRUPT_ACTIVE_POWER) &&
6045 + !(psSGXHostCtl->ui32PowManFlags & PVRSRV_USSE_EDM_POWMAN_POWEROFF_REQUEST))
6053 +#if defined(SYS_CUSTOM_POWERDOWN)
6057 + eError = SysPowerDownMISR(psDeviceNode->sDevId.ui32DeviceIndex, ui32CallerID);
6059 + eError = PVRSRVSetDevicePowerStateKM(psDeviceNode->sDevId.ui32DeviceIndex,
6060 + PVRSRV_POWER_STATE_D3,
6061 + ui32CallerID, IMG_FALSE);
6062 + if (eError == PVRSRV_OK)
6065 + psSGXHostCtl->ui32NumActivePowerEvents++;
6067 + if ((*(volatile IMG_UINT32 *)(&psSGXHostCtl->ui32PowManFlags)
6068 + & PVRSRV_USSE_EDM_POWMAN_POWEROFF_RESTART_IMMEDIATE) != 0)
6073 + if (ui32CallerID == ISR_ID)
6075 + psDeviceNode->bReProcessDeviceCommandComplete = IMG_TRUE;
6079 + SGXScheduleProcessQueues(psDeviceNode);
6084 + if (eError == PVRSRV_ERROR_RETRY)
6088 + eError = PVRSRV_OK;
6096 + if (eError != PVRSRV_OK)
6098 + PVR_DPF((PVR_DBG_ERROR, "SGXTestActivePowerEvent error:%lu", eError));
6104 #ifdef INLINE_IS_PRAGMA
6105 #pragma inline(SGXAcquireKernelCCBSlot)
6107 @@ -255,147 +328,43 @@
6109 PVRSRVPowerUnlock(ui32CallerID);
6116 -PVRSRV_ERROR CreateCCB(PVRSRV_SGXDEV_INFO *psSGXDevInfo,
6117 - IMG_UINT32 ui32CCBSize,
6118 - IMG_UINT32 ui32AllocGran,
6119 - IMG_UINT32 ui32OverrunSize,
6120 - IMG_HANDLE hDevMemHeap,
6121 - PVRSRV_SGX_CCB **ppsCCB)
6123 - PVRSRV_SGX_CCB *psCCB;
6125 - PVR_UNREFERENCED_PARAMETER(psSGXDevInfo);
6129 - if (OSAllocMem(PVRSRV_OS_PAGEABLE_HEAP,
6130 - sizeof(PVRSRV_SGX_CCB),
6131 - (IMG_VOID **)&psCCB,
6132 - IMG_NULL) != PVRSRV_OK)
6134 - PVR_DPF((PVR_DBG_ERROR,"CreateCCB: psCCB alloc failed"));
6136 - return PVRSRV_ERROR_OUT_OF_MEMORY;
6140 - psCCB->psCCBMemInfo = IMG_NULL;
6141 - psCCB->psCCBCtlMemInfo = IMG_NULL;
6142 - psCCB->pui32CCBLinAddr = IMG_NULL;
6143 - psCCB->pui32WriteOffset = IMG_NULL;
6144 - psCCB->pui32ReadOffset = IMG_NULL;
6147 - psCCB->ui32CCBDumpWOff = 0;
6151 - if ( ui32CCBSize < 0x1000 )
6152 +#if defined(SUPPORT_ACTIVE_POWER_MANAGEMENT)
6153 + if (ui32CallerID != ISR_ID)
6155 - IMG_UINT32 i, ui32PowOfTwo;
6158 - ui32PowOfTwo = 0x1000;
6160 - for (i = 12; i > 0; i--)
6162 - if (ui32CCBSize & ui32PowOfTwo)
6167 - ui32PowOfTwo >>= 1;
6170 - if (ui32CCBSize & (ui32PowOfTwo - 1))
6172 - ui32PowOfTwo <<= 1;
6175 - ui32AllocGran = ui32PowOfTwo;
6179 - ui32AllocGran = 0x1000;
6180 + SGXTestActivePowerEvent(psDeviceNode, ui32CallerID);
6185 - if (PVRSRVAllocDeviceMemKM(IMG_NULL,
6187 - PVRSRV_MEM_READ | PVRSRV_MEM_WRITE | PVRSRV_MEM_EDM_PROTECT | PVRSRV_MEM_NO_SYNCOBJ,
6188 - ui32CCBSize + ui32OverrunSize,
6190 - &psCCB->psCCBMemInfo) != PVRSRV_OK)
6192 - PVR_DPF((PVR_DBG_ERROR,"CreateCCB: CCBMemInfo alloc failed"));
6199 - psCCB->pui32CCBLinAddr = psCCB->psCCBMemInfo->pvLinAddrKM;
6200 - psCCB->sCCBDevAddr = psCCB->psCCBMemInfo->sDevVAddr;
6201 - psCCB->ui32Size = ui32CCBSize;
6202 - psCCB->ui32AllocGran = ui32AllocGran;
6203 +IMG_VOID SGXScheduleProcessQueues(PVRSRV_DEVICE_NODE *psDeviceNode)
6205 + PVRSRV_ERROR eError;
6206 + PVRSRV_SGXDEV_INFO *psDevInfo = psDeviceNode->pvDevice;
6207 + PVRSRV_SGX_HOST_CTL *psHostCtl = psDevInfo->psKernelSGXHostCtlMemInfo->pvLinAddrKM;
6208 + IMG_UINT32 ui32PowManFlags;
6209 + PVRSRV_SGX_COMMAND sCommand = {0};
6212 - if (PVRSRVAllocDeviceMemKM(IMG_NULL,
6214 - PVRSRV_MEM_READ | PVRSRV_MEM_WRITE | PVRSRV_MEM_EDM_PROTECT | PVRSRV_MEM_NO_SYNCOBJ,
6215 - sizeof(PVRSRV_SGX_CCB_CTL),
6217 - &psCCB->psCCBCtlMemInfo) != PVRSRV_OK)
6218 + ui32PowManFlags = psHostCtl->ui32PowManFlags;
6219 + if ((ui32PowManFlags & PVRSRV_USSE_EDM_POWMAN_NO_WORK) != 0)
6221 - PVR_DPF((PVR_DBG_ERROR,"CreateCCB: CCBCtlMemInfo alloc failed"));
6229 - psCCB->pui32WriteOffset = &((PVRSRV_SGX_CCB_CTL *)psCCB->psCCBCtlMemInfo->pvLinAddrKM)->ui32WriteOffset;
6230 - psCCB->pui32ReadOffset = &((PVRSRV_SGX_CCB_CTL *)psCCB->psCCBCtlMemInfo->pvLinAddrKM)->ui32ReadOffset;
6233 - *psCCB->pui32WriteOffset = 0;
6234 - *psCCB->pui32ReadOffset = 0;
6244 - if (psCCB->psCCBMemInfo)
6245 + sCommand.ui32Data[0] = PVRSRV_CCBFLAGS_PROCESS_QUEUESCMD;
6246 + eError = SGXScheduleCCBCommandKM(psDeviceNode, PVRSRV_SGX_COMMAND_EDM_KICK, &sCommand, ISR_ID);
6247 + if (eError != PVRSRV_OK)
6249 - PVRSRVFreeDeviceMemKM(IMG_NULL, psCCB->psCCBMemInfo, IMG_FALSE);
6250 + PVR_DPF((PVR_DBG_ERROR,"SGXScheduleProcessQueues failed to schedule CCB command: %lu", eError));
6253 - OSFreeMem(PVRSRV_OS_PAGEABLE_HEAP, 0, psCCB, IMG_NULL);
6255 - return PVRSRV_ERROR_OUT_OF_MEMORY;
6259 -IMG_VOID DestroyCCB(PVRSRV_SGX_CCB *psCCB, IMG_UINT32 ui32PFlags)
6261 - PVRSRVFreeDeviceMemKM(IMG_NULL, psCCB->psCCBMemInfo, IMG_FALSE);
6263 - PVRSRVFreeDeviceMemKM(IMG_NULL, psCCB->psCCBCtlMemInfo, IMG_FALSE);
6265 - if (!(ui32PFlags & PFLAGS_POWERDOWN))
6269 - OSFreeMem(PVRSRV_OS_PAGEABLE_HEAP, 0, psCCB, IMG_NULL);
6275 IMG_VOID DumpBufferArray(PPVR3DIF4_KICKTA_DUMP_BUFFER psBufferArray,
6276 IMG_UINT32 ui32BufferArrayLength,
6277 @@ -513,18 +482,6 @@
6278 psSGXInternalDevInfo->bForcePTOff = (IMG_BOOL)psDevInfo->bForcePTOff;
6279 psSGXInternalDevInfo->ui32RegFlags = (IMG_BOOL)psDevInfo->ui32RegFlags;
6281 -#if defined(SUPPORT_SGX_EVENT_OBJECT)
6282 - if (psDevInfo->psSGXEventObject)
6284 - PVRSRV_EVENTOBJECT *psEventObject = psDevInfo->psSGXEventObject;
6285 - psSGXInternalDevInfo->hOSEvent = psEventObject->hOSEventKM;
6289 - psSGXInternalDevInfo->hOSEvent = IMG_NULL;
6294 psSGXInternalDevInfo->hCtlKernelMemInfoHandle =
6295 (IMG_HANDLE)psDevInfo->psKernelSGXHostCtlMemInfo;
6296 @@ -532,11 +489,11 @@
6300 -static IMG_VOID SGXCleanupRequest(PVRSRV_SGXDEV_INFO *psSGXDevInfo,
6301 +static IMG_VOID SGXCleanupRequest(PVRSRV_DEVICE_NODE *psDeviceNode,
6302 IMG_DEV_VIRTADDR *psHWDataDevVAddr,
6303 - IMG_BOOL bContextCleanup)
6304 + IMG_UINT32 ui32ResManRequestFlag)
6306 - IMG_UINT32 ui32ResManRequestFlag = 0;
6307 + PVRSRV_SGXDEV_INFO *psSGXDevInfo = (PVRSRV_SGXDEV_INFO *)psDeviceNode->pvDevice;
6308 PVRSRV_KERNEL_MEM_INFO *psSGXHostCtlMemInfo = psSGXDevInfo->psKernelSGXHostCtlMemInfo;
6309 PVRSRV_SGX_HOST_CTL *psSGXHostCtl = (PVRSRV_SGX_HOST_CTL *)psSGXHostCtlMemInfo->pvLinAddrKM;
6310 IMG_UINT32 ui32PowManFlags;
6311 @@ -554,25 +511,18 @@
6313 if (psSGXDevInfo->ui32CacheControl & SGX_BIF_INVALIDATE_PDCACHE)
6315 - ui32ResManRequestFlag |= PVRSRV_USSE_EDM_RESMAN_CLEANUP_INVALPD;
6316 + psSGXHostCtl->ui32ResManFlags |= PVRSRV_USSE_EDM_RESMAN_CLEANUP_INVALPD;
6317 psSGXDevInfo->ui32CacheControl ^= SGX_BIF_INVALIDATE_PDCACHE;
6319 if (psSGXDevInfo->ui32CacheControl & SGX_BIF_INVALIDATE_PTCACHE)
6321 - ui32ResManRequestFlag |= PVRSRV_USSE_EDM_RESMAN_CLEANUP_INVALPT;
6322 + psSGXHostCtl->ui32ResManFlags |= PVRSRV_USSE_EDM_RESMAN_CLEANUP_INVALPT;
6323 psSGXDevInfo->ui32CacheControl ^= SGX_BIF_INVALIDATE_PTCACHE;
6325 - if (bContextCleanup)
6327 - ui32ResManRequestFlag |= PVRSRV_USSE_EDM_RESMAN_CLEANUP_RC_REQUEST;
6331 - ui32ResManRequestFlag |= PVRSRV_USSE_EDM_RESMAN_CLEANUP_RT_REQUEST;
6336 psSGXHostCtl->sResManCleanupData.uiAddr = psHWDataDevVAddr->uiAddr;
6338 psSGXHostCtl->ui32ResManFlags |= ui32ResManRequestFlag;
6342 PDUMPMEM(IMG_NULL, psSGXHostCtlMemInfo, offsetof(PVRSRV_SGX_HOST_CTL, ui32ResManFlags), sizeof(IMG_UINT32), PDUMP_FLAGS_CONTINUOUS, hUniqueTag);
6345 + SGXScheduleProcessQueues(psDeviceNode);
6348 #if !defined(NO_HARDWARE)
6349 if(PollForValueKM ((volatile IMG_UINT32 *)(&psSGXHostCtl->ui32ResManFlags),
6350 PVRSRV_USSE_EDM_RESMAN_CLEANUP_COMPLETE,
6353 typedef struct _SGX_HW_RENDER_CONTEXT_CLEANUP_
6355 - PVRSRV_SGXDEV_INFO *psDevInfo;
6356 - IMG_DEV_VIRTADDR sHWDataDevVAddr;
6357 + PVRSRV_DEVICE_NODE *psDeviceNode;
6358 + IMG_DEV_VIRTADDR sHWRenderContextDevVAddr;
6359 IMG_HANDLE hBlockAlloc;
6360 PRESMAN_ITEM psResItem;
6361 } SGX_HW_RENDER_CONTEXT_CLEANUP;
6363 PVR_UNREFERENCED_PARAMETER(ui32ProcessID);
6364 PVR_UNREFERENCED_PARAMETER(ui32Param);
6366 - SGXCleanupRequest(psCleanup->psDevInfo,
6367 - &psCleanup->sHWDataDevVAddr, IMG_TRUE);
6368 + SGXCleanupRequest(psCleanup->psDeviceNode,
6369 + &psCleanup->sHWRenderContextDevVAddr, PVRSRV_USSE_EDM_RESMAN_CLEANUP_RC_REQUEST);
6371 OSFreeMem(PVRSRV_OS_PAGEABLE_HEAP,
6372 sizeof(SGX_HW_RENDER_CONTEXT_CLEANUP),
6373 @@ -636,8 +589,34 @@
6377 +typedef struct _SGX_HW_TRANSFER_CONTEXT_CLEANUP_
6379 + PVRSRV_DEVICE_NODE *psDeviceNode;
6380 + IMG_DEV_VIRTADDR sHWTransferContextDevVAddr;
6381 + IMG_HANDLE hBlockAlloc;
6382 + PRESMAN_ITEM psResItem;
6383 +} SGX_HW_TRANSFER_CONTEXT_CLEANUP;
6385 +static PVRSRV_ERROR SGXCleanupHWTransferContextCallback(IMG_UINT32 ui32ProcessID, IMG_PVOID pvParam, IMG_UINT32 ui32Param)
6387 + SGX_HW_TRANSFER_CONTEXT_CLEANUP *psCleanup = (SGX_HW_TRANSFER_CONTEXT_CLEANUP *)pvParam;
6389 + PVR_UNREFERENCED_PARAMETER(ui32ProcessID);
6390 + PVR_UNREFERENCED_PARAMETER(ui32Param);
6392 + SGXCleanupRequest(psCleanup->psDeviceNode,
6393 + &psCleanup->sHWTransferContextDevVAddr, PVRSRV_USSE_EDM_RESMAN_CLEANUP_TC_REQUEST);
6395 + OSFreeMem(PVRSRV_OS_PAGEABLE_HEAP,
6396 + sizeof(SGX_HW_TRANSFER_CONTEXT_CLEANUP),
6398 + psCleanup->hBlockAlloc);
6404 -IMG_HANDLE SGXRegisterHWRenderContextKM(PVRSRV_SGXDEV_INFO *psSGXDevInfo, IMG_DEV_VIRTADDR *psHWRenderContextDevVAddr)
6405 +IMG_HANDLE SGXRegisterHWRenderContextKM(IMG_HANDLE psDeviceNode, IMG_DEV_VIRTADDR *psHWRenderContextDevVAddr)
6407 PVRSRV_ERROR eError;
6408 IMG_HANDLE hBlockAlloc;
6412 psCleanup->hBlockAlloc = hBlockAlloc;
6413 - psCleanup->psDevInfo = psSGXDevInfo;
6414 - psCleanup->sHWDataDevVAddr = *psHWRenderContextDevVAddr;
6415 + psCleanup->psDeviceNode = (PVRSRV_DEVICE_NODE *)psDeviceNode;
6416 + psCleanup->sHWRenderContextDevVAddr = *psHWRenderContextDevVAddr;
6418 psResItem = ResManRegisterRes(RESMAN_TYPE_HW_RENDER_CONTEXT,
6419 (IMG_VOID *)psCleanup,
6420 @@ -682,25 +661,173 @@
6424 -IMG_VOID SGXFlushHWRenderTargetKM(PVRSRV_SGXDEV_INFO *psDevInfo, IMG_DEV_VIRTADDR sHWRTDataSetDevVAddr)
6425 +PVRSRV_ERROR SGXUnregisterHWRenderContextKM(IMG_HANDLE hHWRenderContext)
6427 - PVR_ASSERT(sHWRTDataSetDevVAddr.uiAddr != IMG_NULL);
6428 + PVRSRV_ERROR eError;
6429 + SGX_HW_RENDER_CONTEXT_CLEANUP *psCleanup;
6431 - SGXCleanupRequest(psDevInfo, &sHWRTDataSetDevVAddr, IMG_FALSE);
6432 + PVR_ASSERT(hHWRenderContext != IMG_NULL);
6434 + psCleanup = (SGX_HW_RENDER_CONTEXT_CLEANUP *)hHWRenderContext;
6436 + eError = ResManFreeResByPtr(psCleanup->psResItem, IMG_TRUE);
6442 -PVRSRV_ERROR SGXUnregisterHWRenderContextKM(IMG_HANDLE hHWRenderContext)
6443 +IMG_HANDLE SGXRegisterHWTransferContextKM(IMG_HANDLE psDeviceNode, IMG_DEV_VIRTADDR *psHWTransferContextDevVAddr)
6445 PVRSRV_ERROR eError;
6446 - SGX_HW_RENDER_CONTEXT_CLEANUP *psCleanup;
6447 + IMG_HANDLE hBlockAlloc;
6448 + SGX_HW_TRANSFER_CONTEXT_CLEANUP *psCleanup;
6449 + PRESMAN_ITEM psResItem;
6451 - PVR_ASSERT(hHWRenderContext != IMG_NULL);
6452 + eError = OSAllocMem(PVRSRV_OS_PAGEABLE_HEAP,
6453 + sizeof(SGX_HW_TRANSFER_CONTEXT_CLEANUP),
6454 + (IMG_VOID **)&psCleanup,
6457 - psCleanup = (SGX_HW_RENDER_CONTEXT_CLEANUP *)hHWRenderContext;
6458 + if (eError != PVRSRV_OK)
6460 + PVR_DPF((PVR_DBG_ERROR, "SGXRegisterHWTransferContextKM: Couldn't allocate memory for SGX_HW_TRANSFER_CONTEXT_CLEANUP structure"));
6464 + psCleanup->hBlockAlloc = hBlockAlloc;
6465 + psCleanup->psDeviceNode = (PVRSRV_DEVICE_NODE *)psDeviceNode;
6466 + psCleanup->sHWTransferContextDevVAddr = *psHWTransferContextDevVAddr;
6468 + psResItem = ResManRegisterRes(RESMAN_TYPE_HW_TRANSFER_CONTEXT,
6469 + (IMG_VOID *)psCleanup,
6471 + &SGXCleanupHWTransferContextCallback,
6474 + if (psResItem == IMG_NULL)
6476 + PVR_DPF((PVR_DBG_ERROR, "SGXRegisterHWTransferContextKM: ResManRegisterRes failed"));
6477 + OSFreeMem(PVRSRV_OS_PAGEABLE_HEAP,
6478 + sizeof(SGX_HW_TRANSFER_CONTEXT_CLEANUP),
6480 + psCleanup->hBlockAlloc);
6485 + psCleanup->psResItem = psResItem;
6487 + return (IMG_HANDLE)psCleanup;
6491 +PVRSRV_ERROR SGXUnregisterHWTransferContextKM(IMG_HANDLE hHWTransferContext)
6493 + PVRSRV_ERROR eError;
6494 + SGX_HW_TRANSFER_CONTEXT_CLEANUP *psCleanup;
6496 + PVR_ASSERT(hHWTransferContext != IMG_NULL);
6498 + psCleanup = (SGX_HW_TRANSFER_CONTEXT_CLEANUP *)hHWTransferContext;
6500 + eError = ResManFreeResByPtr(psCleanup->psResItem, IMG_TRUE);
6505 +#if defined(SGX_FEATURE_2D_HARDWARE)
6506 +typedef struct _SGX_HW_2D_CONTEXT_CLEANUP_
6508 + PVRSRV_DEVICE_NODE *psDeviceNode;
6509 + IMG_DEV_VIRTADDR sHW2DContextDevVAddr;
6510 + IMG_HANDLE hBlockAlloc;
6511 + PRESMAN_ITEM psResItem;
6512 +} SGX_HW_2D_CONTEXT_CLEANUP;
6514 +static PVRSRV_ERROR SGXCleanupHW2DContextCallback(IMG_UINT32 ui32ProcessID, IMG_PVOID pvParam, IMG_UINT32 ui32Param)
6516 + SGX_HW_2D_CONTEXT_CLEANUP *psCleanup = (SGX_HW_2D_CONTEXT_CLEANUP *)pvParam;
6518 + PVR_UNREFERENCED_PARAMETER(ui32ProcessID);
6519 + PVR_UNREFERENCED_PARAMETER(ui32Param);
6521 + SGXCleanupRequest(psCleanup->psDeviceNode,
6522 + &psCleanup->sHW2DContextDevVAddr, PVRSRV_USSE_EDM_RESMAN_CLEANUP_2DC_REQUEST);
6524 + OSFreeMem(PVRSRV_OS_PAGEABLE_HEAP,
6525 + sizeof(SGX_HW_2D_CONTEXT_CLEANUP),
6527 + psCleanup->hBlockAlloc);
6533 +IMG_HANDLE SGXRegisterHW2DContextKM(IMG_HANDLE psDeviceNode, IMG_DEV_VIRTADDR *psHW2DContextDevVAddr)
6535 + PVRSRV_ERROR eError;
6536 + IMG_HANDLE hBlockAlloc;
6537 + SGX_HW_2D_CONTEXT_CLEANUP *psCleanup;
6538 + PRESMAN_ITEM psResItem;
6540 + eError = OSAllocMem(PVRSRV_OS_PAGEABLE_HEAP,
6541 + sizeof(SGX_HW_2D_CONTEXT_CLEANUP),
6542 + (IMG_VOID **)&psCleanup,
6545 + if (eError != PVRSRV_OK)
6547 + PVR_DPF((PVR_DBG_ERROR, "SGXRegisterHW2DContextKM: Couldn't allocate memory for SGX_HW_2D_CONTEXT_CLEANUP structure"));
6551 + psCleanup->hBlockAlloc = hBlockAlloc;
6552 + psCleanup->psDeviceNode = (PVRSRV_DEVICE_NODE *)psDeviceNode;
6553 + psCleanup->sHW2DContextDevVAddr = *psHW2DContextDevVAddr;
6555 + psResItem = ResManRegisterRes(RESMAN_TYPE_HW_2D_CONTEXT,
6556 + (IMG_VOID *)psCleanup,
6558 + &SGXCleanupHW2DContextCallback,
6561 + if (psResItem == IMG_NULL)
6563 + PVR_DPF((PVR_DBG_ERROR, "SGXRegisterHW2DContextKM: ResManRegisterRes failed"));
6564 + OSFreeMem(PVRSRV_OS_PAGEABLE_HEAP,
6565 + sizeof(SGX_HW_2D_CONTEXT_CLEANUP),
6567 + psCleanup->hBlockAlloc);
6572 + psCleanup->psResItem = psResItem;
6574 + return (IMG_HANDLE)psCleanup;
6578 +PVRSRV_ERROR SGXUnregisterHW2DContextKM(IMG_HANDLE hHW2DContext)
6580 + PVRSRV_ERROR eError;
6581 + SGX_HW_2D_CONTEXT_CLEANUP *psCleanup;
6583 + PVR_ASSERT(hHW2DContext != IMG_NULL);
6585 + psCleanup = (SGX_HW_2D_CONTEXT_CLEANUP *)hHW2DContext;
6587 eError = ResManFreeResByPtr(psCleanup->psResItem, IMG_TRUE);
6594 +IMG_VOID SGXFlushHWRenderTargetKM(IMG_HANDLE psDeviceNode, IMG_DEV_VIRTADDR sHWRTDataSetDevVAddr)
6596 + PVR_ASSERT(sHWRTDataSetDevVAddr.uiAddr != IMG_NULL);
6598 + SGXCleanupRequest((PVRSRV_DEVICE_NODE *)psDeviceNode, &sHWRTDataSetDevVAddr, PVRSRV_USSE_EDM_RESMAN_CLEANUP_RT_REQUEST);
6601 diff -Nurd git/drivers/gpu/pvr/services4/srvkm/devices/sgx/sgxutils.h git/drivers/gpu/pvr/services4/srvkm/devices/sgx/sgxutils.h
6602 --- git/drivers/gpu/pvr/services4/srvkm/devices/sgx/sgxutils.h 2009-01-05 20:00:44.000000000 +0100
6603 +++ git/drivers/gpu/pvr/services4/srvkm/devices/sgx/sgxutils.h 2008-12-18 15:47:29.000000000 +0100
6605 IMG_BOOL bDumpPolls);
6609 +#if defined(SUPPORT_ACTIVE_POWER_MANAGEMENT)
6611 +IMG_VOID SGXTestActivePowerEvent(PVRSRV_DEVICE_NODE *psDeviceNode,
6612 + IMG_UINT32 ui32CallerID);
6616 PVRSRV_ERROR SGXScheduleCCBCommandKM(PVRSRV_DEVICE_NODE *psDeviceNode,
6617 PVRSRV_SGX_COMMAND_TYPE eCommandType,
6619 IMG_UINT32 ui32CallerID);
6622 +IMG_VOID SGXScheduleProcessQueues(PVRSRV_DEVICE_NODE *psDeviceNode);
6625 IMG_BOOL SGXIsDevicePowered(PVRSRV_DEVICE_NODE *psDeviceNode);
6628 -IMG_HANDLE SGXRegisterHWRenderContextKM(PVRSRV_SGXDEV_INFO *psSGXDevInfo, IMG_DEV_VIRTADDR *psHWRenderContextDevVAddr);
6629 +IMG_HANDLE SGXRegisterHWRenderContextKM(IMG_HANDLE psSGXDevInfo, IMG_DEV_VIRTADDR *psHWRenderContextDevVAddr);
6632 -IMG_VOID SGXFlushHWRenderTargetKM(PVRSRV_SGXDEV_INFO *psSGXDevInfo, IMG_DEV_VIRTADDR psHWRTDataSetDevVAddr);
6633 +IMG_HANDLE SGXRegisterHWTransferContextKM(IMG_HANDLE psSGXDevInfo, IMG_DEV_VIRTADDR *psHWTransferContextDevVAddr);
6636 +IMG_VOID SGXFlushHWRenderTargetKM(IMG_HANDLE psSGXDevInfo, IMG_DEV_VIRTADDR psHWRTDataSetDevVAddr);
6639 PVRSRV_ERROR SGXUnregisterHWRenderContextKM(IMG_HANDLE hHWRenderContext);
6642 +PVRSRV_ERROR SGXUnregisterHWTransferContextKM(IMG_HANDLE hHWTransferContext);
6644 +#if defined(SGX_FEATURE_2D_HARDWARE)
6646 +IMG_HANDLE SGXRegisterHW2DContextKM(IMG_HANDLE psSGXDevInfo, IMG_DEV_VIRTADDR *psHW2DContextDevVAddr);
6649 +PVRSRV_ERROR SGXUnregisterHW2DContextKM(IMG_HANDLE hHW2DContext);
6652 diff -Nurd git/drivers/gpu/pvr/services4/srvkm/env/linux/env_data.h git/drivers/gpu/pvr/services4/srvkm/env/linux/env_data.h
6653 --- git/drivers/gpu/pvr/services4/srvkm/env/linux/env_data.h 2009-01-05 20:00:44.000000000 +0100
6654 +++ git/drivers/gpu/pvr/services4/srvkm/env/linux/env_data.h 2008-12-18 15:47:29.000000000 +0100
6656 #define PVRSRV_MAX_BRIDGE_IN_SIZE 0x1000
6657 #define PVRSRV_MAX_BRIDGE_OUT_SIZE 0x1000
6659 +typedef struct _PVR_PCI_DEV_TAG
6661 + struct pci_dev *psPCIDev;
6662 + HOST_PCI_INIT_FLAGS ePCIFlags;
6663 + IMG_BOOL abPCIResourceInUse[DEVICE_COUNT_RESOURCE];
6666 typedef struct _ENV_DATA_TAG
6670 IMG_VOID *pvISRCookie;
6671 struct tasklet_struct sMISRTasklet;
6672 - struct pci_dev *psPCIDev;
6673 - IMG_BOOL abPCIResourceInUse[DEVICE_COUNT_RESOURCE];
6677 diff -Nurd git/drivers/gpu/pvr/services4/srvkm/env/linux/event.c git/drivers/gpu/pvr/services4/srvkm/env/linux/event.c
6678 --- git/drivers/gpu/pvr/services4/srvkm/env/linux/event.c 1970-01-01 01:00:00.000000000 +0100
6679 +++ git/drivers/gpu/pvr/services4/srvkm/env/linux/event.c 2008-12-18 15:47:29.000000000 +0100
6681 +/**********************************************************************
6683 + * Copyright(c) 2008 Imagination Technologies Ltd. All rights reserved.
6685 + * This program is free software; you can redistribute it and/or modify it
6686 + * under the terms and conditions of the GNU General Public License,
6687 + * version 2, as published by the Free Software Foundation.
6689 + * This program is distributed in the hope it will be useful but, except
6690 + * as otherwise stated in writing, without any warranty; without even the
6691 + * implied warranty of merchantability or fitness for a particular purpose.
6692 + * See the GNU General Public License for more details.
6694 + * You should have received a copy of the GNU General Public License along with
6695 + * this program; if not, write to the Free Software Foundation, Inc.,
6696 + * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
6698 + * The full GNU General Public License is included in this distribution in
6699 + * the file called "COPYING".
6701 + * Contact Information:
6702 + * Imagination Technologies Ltd. <gpl-support@imgtec.com>
6703 + * Home Park Estate, Kings Langley, Herts, WD4 8LZ, UK
6705 + ******************************************************************************/
6707 +#ifndef AUTOCONF_INCLUDED
6708 + #include <linux/config.h>
6711 +#include <linux/version.h>
6712 +#include <asm/io.h>
6713 +#include <asm/page.h>
6714 +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,22))
6715 +#include <asm/system.h>
6717 +#include <linux/mm.h>
6718 +#include <linux/slab.h>
6719 +#include <linux/vmalloc.h>
6720 +#include <linux/delay.h>
6721 +#include <linux/pci.h>
6723 +#include <linux/string.h>
6724 +#include <linux/sched.h>
6725 +#include <linux/interrupt.h>
6726 +#include <asm/hardirq.h>
6727 +#include <linux/timer.h>
6728 +#include <linux/capability.h>
6729 +#include <asm/uaccess.h>
6731 +#include "img_types.h"
6732 +#include "services_headers.h"
6734 +#include "pvrmmap.h"
6736 +#include "env_data.h"
6740 +typedef struct PVRSRV_LINUX_EVENT_OBJECT_LIST_TAG
6743 + struct list_head sList;
6745 +} PVRSRV_LINUX_EVENT_OBJECT_LIST;
6748 +typedef struct PVRSRV_LINUX_EVENT_OBJECT_TAG
6750 + struct completion sCompletion;
6751 + struct list_head sList;
6752 + IMG_HANDLE hResItem;
6753 + PVRSRV_LINUX_EVENT_OBJECT_LIST *psLinuxEventObjectList;
6754 +} PVRSRV_LINUX_EVENT_OBJECT;
6756 +PVRSRV_ERROR LinuxEventObjectListCreate(IMG_HANDLE *phEventObjectList)
6758 + PVRSRV_LINUX_EVENT_OBJECT_LIST *psEvenObjectList;
6760 + if(OSAllocMem(PVRSRV_OS_NON_PAGEABLE_HEAP, sizeof(PVRSRV_LINUX_EVENT_OBJECT_LIST),
6761 + (IMG_VOID **)&psEvenObjectList, IMG_NULL) != PVRSRV_OK)
6763 + PVR_DPF((PVR_DBG_ERROR, "LinuxEventObjectCreate: failed to allocate memory for event list"));
6764 + return PVRSRV_ERROR_OUT_OF_MEMORY;
6767 + INIT_LIST_HEAD(&psEvenObjectList->sList);
6769 + rwlock_init(&psEvenObjectList->sLock);
6771 + *phEventObjectList = (IMG_HANDLE *) psEvenObjectList;
6776 +PVRSRV_ERROR LinuxEventObjectListDestroy(IMG_HANDLE hEventObjectList)
6779 + PVRSRV_LINUX_EVENT_OBJECT_LIST *psEvenObjectList = (PVRSRV_LINUX_EVENT_OBJECT_LIST *) hEventObjectList ;
6781 + if(psEvenObjectList)
6783 + if (!list_empty(&psEvenObjectList->sList))
6785 + PVR_DPF((PVR_DBG_ERROR, "LinuxEventObjectListDestroy: Event List is not empty"));
6786 + return PVRSRV_ERROR_GENERIC;
6788 + OSFreeMem(PVRSRV_OS_NON_PAGEABLE_HEAP, sizeof(PVRSRV_LINUX_EVENT_OBJECT_LIST), psEvenObjectList, IMG_NULL);
6794 +PVRSRV_ERROR LinuxEventObjectDelete(IMG_HANDLE hOSEventObjectList, IMG_HANDLE hOSEventObject, IMG_BOOL bResManCallback)
6796 + if(hOSEventObjectList)
6798 + PVRSRV_LINUX_EVENT_OBJECT_LIST *psLinuxEventObjectList = (PVRSRV_LINUX_EVENT_OBJECT_LIST*)hOSEventObjectList;
6799 + if(hOSEventObject)
6801 + PVRSRV_LINUX_EVENT_OBJECT *psLinuxEventObject = (PVRSRV_LINUX_EVENT_OBJECT *)hOSEventObject;
6802 + write_lock_bh(&psLinuxEventObjectList->sLock);
6803 + list_del(&psLinuxEventObject->sList);
6804 + write_unlock_bh(&psLinuxEventObjectList->sLock);
6807 + if(!bResManCallback && psLinuxEventObject->hResItem)
6809 + if(ResManFreeResByPtr(psLinuxEventObject->hResItem, IMG_FALSE) != PVRSRV_OK)
6811 + return PVRSRV_ERROR_GENERIC;
6815 + OSFreeMem(PVRSRV_OS_NON_PAGEABLE_HEAP, sizeof(PVRSRV_LINUX_EVENT_OBJECT), psLinuxEventObject, IMG_NULL);
6820 + return PVRSRV_ERROR_GENERIC;
6824 +static PVRSRV_ERROR LinuxEventObjectDeleteCallback(IMG_UINT32 ui32ProcessID, IMG_PVOID pvParam, IMG_UINT32 ui32Param)
6828 + PVRSRV_LINUX_EVENT_OBJECT *psLinuxEventObject = (PVRSRV_LINUX_EVENT_OBJECT *)pvParam;
6829 + if(psLinuxEventObject->psLinuxEventObjectList)
6831 + IMG_HANDLE hOSEventObjectList = (IMG_HANDLE)psLinuxEventObject->psLinuxEventObjectList;
6832 + return LinuxEventObjectDelete(hOSEventObjectList,(IMG_HANDLE) psLinuxEventObject, IMG_TRUE);
6835 + return PVRSRV_ERROR_GENERIC;
6837 +PVRSRV_ERROR LinuxEventObjectAdd(IMG_HANDLE hOSEventObjectList, IMG_HANDLE *phOSEventObject)
6839 + PVRSRV_LINUX_EVENT_OBJECT *psLinuxEventObject;
6840 + PVRSRV_LINUX_EVENT_OBJECT_LIST *psLinuxEventObjectList = (PVRSRV_LINUX_EVENT_OBJECT_LIST*)hOSEventObjectList;
6843 + if(OSAllocMem(PVRSRV_OS_NON_PAGEABLE_HEAP, sizeof(PVRSRV_LINUX_EVENT_OBJECT),
6844 + (IMG_VOID **)&psLinuxEventObject, IMG_NULL) != PVRSRV_OK)
6846 + PVR_DPF((PVR_DBG_ERROR, "LinuxEventObjectAdd: failed to allocate memory "));
6847 + return PVRSRV_ERROR_OUT_OF_MEMORY;
6850 + INIT_LIST_HEAD(&psLinuxEventObject->sList);
6852 + init_completion(&psLinuxEventObject->sCompletion);
6855 + psLinuxEventObject->psLinuxEventObjectList = psLinuxEventObjectList;
6857 + psLinuxEventObject->hResItem = (IMG_HANDLE)ResManRegisterRes(RESMAN_TYPE_EVENT_OBJECT,
6858 + psLinuxEventObject,
6860 + &LinuxEventObjectDeleteCallback,
6863 + write_lock_bh(&psLinuxEventObjectList->sLock);
6864 + list_add(&psLinuxEventObject->sList, &psLinuxEventObjectList->sList);
6865 + write_unlock_bh(&psLinuxEventObjectList->sLock);
6867 + *phOSEventObject = psLinuxEventObject;
6872 +PVRSRV_ERROR LinuxEventObjectSignal(IMG_HANDLE hOSEventObjectList)
6874 + PVRSRV_LINUX_EVENT_OBJECT *psLinuxEventObject;
6875 + PVRSRV_LINUX_EVENT_OBJECT_LIST *psLinuxEventObjectList = (PVRSRV_LINUX_EVENT_OBJECT_LIST*)hOSEventObjectList;
6876 + struct list_head *psListEntry, *psListEntryTemp, *psList;
6877 + psList = &psLinuxEventObjectList->sList;
6879 + list_for_each_safe(psListEntry, psListEntryTemp, psList)
6881 + psLinuxEventObject = list_entry(psListEntry, PVRSRV_LINUX_EVENT_OBJECT, sList);
6882 + complete(&psLinuxEventObject->sCompletion);
6888 +PVRSRV_ERROR LinuxEventObjectWait(IMG_HANDLE hOSEventObject, IMG_UINT32 ui32MSTimeout)
6890 + PVRSRV_LINUX_EVENT_OBJECT *psLinuxEventObject = (PVRSRV_LINUX_EVENT_OBJECT *) hOSEventObject;
6892 +#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,10))
6893 + if(wait_for_completion_timeout(&psLinuxEventObject->sCompletion, msecs_to_jiffies(ui32MSTimeout)) == 0)
6895 + return PVRSRV_ERROR_TIMEOUT;
6898 + wait_for_completion(&psLinuxEventObject->sCompletion);
6902 diff -Nurd git/drivers/gpu/pvr/services4/srvkm/env/linux/event.h git/drivers/gpu/pvr/services4/srvkm/env/linux/event.h
6903 --- git/drivers/gpu/pvr/services4/srvkm/env/linux/event.h 1970-01-01 01:00:00.000000000 +0100
6904 +++ git/drivers/gpu/pvr/services4/srvkm/env/linux/event.h 2008-12-18 15:47:29.000000000 +0100
6906 +/**********************************************************************
6908 + * Copyright(c) 2008 Imagination Technologies Ltd. All rights reserved.
6910 + * This program is free software; you can redistribute it and/or modify it
6911 + * under the terms and conditions of the GNU General Public License,
6912 + * version 2, as published by the Free Software Foundation.
6914 + * This program is distributed in the hope it will be useful but, except
6915 + * as otherwise stated in writing, without any warranty; without even the
6916 + * implied warranty of merchantability or fitness for a particular purpose.
6917 + * See the GNU General Public License for more details.
6919 + * You should have received a copy of the GNU General Public License along with
6920 + * this program; if not, write to the Free Software Foundation, Inc.,
6921 + * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
6923 + * The full GNU General Public License is included in this distribution in
6924 + * the file called "COPYING".
6926 + * Contact Information:
6927 + * Imagination Technologies Ltd. <gpl-support@imgtec.com>
6928 + * Home Park Estate, Kings Langley, Herts, WD4 8LZ, UK
6930 + ******************************************************************************/
6932 +PVRSRV_ERROR LinuxEventObjectListCreate(IMG_HANDLE *phEventObjectList);
6933 +PVRSRV_ERROR LinuxEventObjectListDestroy(IMG_HANDLE hEventObjectList);
6934 +PVRSRV_ERROR LinuxEventObjectAdd(IMG_HANDLE hOSEventObjectList, IMG_HANDLE *phOSEventObject);
6935 +PVRSRV_ERROR LinuxEventObjectDelete(IMG_HANDLE hOSEventObjectList, IMG_HANDLE hOSEventObject, IMG_BOOL bResManCallback);
6936 +PVRSRV_ERROR LinuxEventObjectSignal(IMG_HANDLE hOSEventObjectList);
6937 +PVRSRV_ERROR LinuxEventObjectWait(IMG_HANDLE hOSEventObject, IMG_UINT32 ui32MSTimeout);
6938 diff -Nurd git/drivers/gpu/pvr/services4/srvkm/env/linux/kbuild/Makefile git/drivers/gpu/pvr/services4/srvkm/env/linux/kbuild/Makefile
6939 --- git/drivers/gpu/pvr/services4/srvkm/env/linux/kbuild/Makefile 1970-01-01 01:00:00.000000000 +0100
6940 +++ git/drivers/gpu/pvr/services4/srvkm/env/linux/kbuild/Makefile 2008-12-18 15:47:29.000000000 +0100
6943 +# Copyright(c) 2008 Imagination Technologies Ltd. All rights reserved.
6945 +# This program is free software; you can redistribute it and/or modify it
6946 +# under the terms and conditions of the GNU General Public License,
6947 +# version 2, as published by the Free Software Foundation.
6949 +# This program is distributed in the hope it will be useful but, except
6950 +# as otherwise stated in writing, without any warranty; without even the
6951 +# implied warranty of merchantability or fitness for a particular purpose.
6952 +# See the GNU General Public License for more details.
6954 +# You should have received a copy of the GNU General Public License along with
6955 +# this program; if not, write to the Free Software Foundation, Inc.,
6956 +# 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
6958 +# The full GNU General Public License is included in this distribution in
6959 +# the file called "COPYING".
6961 +# Contact Information:
6962 +# Imagination Technologies Ltd. <gpl-support@imgtec.com>
6963 +# Home Park Estate, Kings Langley, Herts, WD4 8LZ, UK
6970 +KBUILDROOT = ../../../..
6972 +INCLUDES = -I$(EURASIAROOT)/include4 \
6973 + -I$(EURASIAROOT)/services4/include \
6974 + -I$(EURASIAROOT)/services4/srvkm/env/linux \
6975 + -I$(EURASIAROOT)/services4/srvkm/include \
6976 + -I$(EURASIAROOT)/services4/srvkm/bridged \
6977 + -I$(EURASIAROOT)/services4/srvkm/devices/sgx \
6978 + -I$(EURASIAROOT)/services4/system/$(PVR_SYSTEM) \
6979 + -I$(EURASIAROOT)/services4/system/include
6982 +SOURCES = $(KBUILDROOT)/srvkm/env/linux/osfunc.c \
6983 + $(KBUILDROOT)/srvkm/env/linux/mmap.c \
6984 + $(KBUILDROOT)/srvkm/env/linux/module.c \
6985 + $(KBUILDROOT)/srvkm/env/linux/pdump.c \
6986 + $(KBUILDROOT)/srvkm/env/linux/proc.c \
6987 + $(KBUILDROOT)/srvkm/env/linux/pvr_bridge_k.c \
6988 + $(KBUILDROOT)/srvkm/env/linux/pvr_debug.c \
6989 + $(KBUILDROOT)/srvkm/env/linux/mm.c \
6990 + $(KBUILDROOT)/srvkm/env/linux/mutex.c \
6991 + $(KBUILDROOT)/srvkm/env/linux/event.c
6993 +SOURCES += $(KBUILDROOT)/srvkm/common/buffer_manager.c \
6994 + $(KBUILDROOT)/srvkm/common/devicemem.c \
6995 + $(KBUILDROOT)/srvkm/common/deviceclass.c \
6996 + $(KBUILDROOT)/srvkm/common/handle.c \
6997 + $(KBUILDROOT)/srvkm/common/hash.c \
6998 + $(KBUILDROOT)/srvkm/common/metrics.c \
6999 + $(KBUILDROOT)/srvkm/common/pvrsrv.c \
7000 + $(KBUILDROOT)/srvkm/common/queue.c \
7001 + $(KBUILDROOT)/srvkm/common/ra.c \
7002 + $(KBUILDROOT)/srvkm/common/resman.c \
7003 + $(KBUILDROOT)/srvkm/common/power.c \
7004 + $(KBUILDROOT)/srvkm/common/mem.c \
7005 + $(KBUILDROOT)/srvkm/bridged/bridged_pvr_bridge.c \
7006 + $(KBUILDROOT)/srvkm/devices/sgx/sgxinit.c \
7007 + $(KBUILDROOT)/srvkm/devices/sgx/sgxreset.c \
7008 + $(KBUILDROOT)/srvkm/devices/sgx/sgxutils.c \
7009 + $(KBUILDROOT)/srvkm/devices/sgx/sgxkick.c \
7010 + $(KBUILDROOT)/srvkm/devices/sgx/sgxtransfer.c \
7011 + $(KBUILDROOT)/srvkm/devices/sgx/mmu.c \
7012 + $(KBUILDROOT)/srvkm/devices/sgx/pb.c \
7013 + $(KBUILDROOT)/srvkm/common/perproc.c \
7014 + $(KBUILDROOT)/../services4/system/$(PVR_SYSTEM)/sysconfig.c \
7015 + $(KBUILDROOT)/../services4/system/$(PVR_SYSTEM)/sysutils.c \
7016 + $(KBUILDROOT)/srvkm/devices/sgx/sgx2dcore.c
7019 +INCLUDES += -I$(EURASIAROOT)/services4/srvkm/hwdefs
7023 diff -Nurd git/drivers/gpu/pvr/services4/srvkm/env/linux/mm.c git/drivers/gpu/pvr/services4/srvkm/env/linux/mm.c
7024 --- git/drivers/gpu/pvr/services4/srvkm/env/linux/mm.c 2009-01-05 20:00:44.000000000 +0100
7025 +++ git/drivers/gpu/pvr/services4/srvkm/env/linux/mm.c 2008-12-18 15:47:29.000000000 +0100
7028 #include <linux/slab.h>
7029 #include <linux/highmem.h>
7030 +#include <linux/sched.h>
7032 #include "img_defs.h"
7033 #include "services.h"
7034 @@ -1078,7 +1079,11 @@
7035 #if defined(DEBUG_LINUX_SLAB_ALLOCATIONS)
7036 ui32Flags |= SLAB_POISON|SLAB_RED_ZONE;
7038 +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24)
7039 return kmem_cache_create(pszName, Size, Align, ui32Flags, NULL);
7041 + return kmem_cache_create(pszName, Size, Align, ui32Flags, NULL, NULL);
7046 @@ -1445,9 +1450,6 @@
7048 LinuxMemAreaTypeToString(LINUX_MEM_AREA_TYPE eMemAreaType)
7050 - PVR_ASSERT(LINUX_MEM_AREA_TYPE_COUNT == 5);
7051 - PVR_ASSERT(eMemAreaType < LINUX_MEM_AREA_TYPE_COUNT);
7054 switch(eMemAreaType)
7056 diff -Nurd git/drivers/gpu/pvr/services4/srvkm/env/linux/module.c git/drivers/gpu/pvr/services4/srvkm/env/linux/module.c
7057 --- git/drivers/gpu/pvr/services4/srvkm/env/linux/module.c 2009-01-05 20:00:44.000000000 +0100
7058 +++ git/drivers/gpu/pvr/services4/srvkm/env/linux/module.c 2008-12-18 15:47:29.000000000 +0100
7060 ******************************************************************************/
7062 #ifndef AUTOCONF_INCLUDED
7063 -// #include <linux/config.h>
7064 + #include <linux/config.h>
7067 #include <linux/init.h>
7069 #include <linux/version.h>
7070 #include <linux/fs.h>
7071 #include <linux/proc_fs.h>
7073 #if defined(LDM_PLATFORM)
7074 #include <linux/platform_device.h>
7077 +#if defined(LDM_PCI)
7078 +#include <linux/pci.h>
7081 +#if defined(DEBUG) && defined(PVR_MANUAL_POWER_CONTROL)
7082 +#include <asm/uaccess.h>
7085 #include "img_defs.h"
7086 #include "services.h"
7087 #include "kerneldisplay.h"
7090 #include "pvr_bridge_km.h"
7093 +#include "pvrmodule.h"
7095 #define CLASSNAME "powervr"
7096 #define DRVNAME "pvrsrvkm"
7097 #define DEVNAME "pvrsrvkm"
7100 -MODULE_AUTHOR("Imagination Technologies Ltd. <gpl-support@imgtec.com>");
7101 -MODULE_LICENSE("GPL");
7102 MODULE_SUPPORTED_DEVICE(DEVNAME);
7104 static int debug = DBGPRIV_WARNING;
7105 @@ -99,24 +107,75 @@
7109 +#if defined(LDM_PLATFORM) || defined(LDM_PCI)
7111 #if defined(LDM_PLATFORM)
7112 -static int PVRSRVDriverRemove(struct platform_device *device);
7113 -static int PVRSRVDriverProbe(struct platform_device *device);
7114 -static int PVRSRVDriverSuspend(struct platform_device *device, pm_message_t state);
7115 -static void PVRSRVDriverShutdown(struct platform_device *device);
7116 -static int PVRSRVDriverResume(struct platform_device *device);
7117 +#define LDM_DEV struct platform_device
7118 +#define LDM_DRV struct platform_driver
7119 +#if defined(LDM_PCI)
7124 -static struct platform_driver powervr_driver = {
7125 +#if defined(LDM_PCI)
7126 +#define LDM_DEV struct pci_dev
7127 +#define LDM_DRV struct pci_driver
7130 +//static void PVRSRVClassDeviceRelease(struct class_device *class_device);
7132 +/*static struct class powervr_class = {
7133 + .name = CLASSNAME,
7134 + .release = PVRSRVClassDeviceRelease
7137 +#if defined(LDM_PLATFORM)
7138 +static int PVRSRVDriverRemove(LDM_DEV *device);
7139 +static int PVRSRVDriverProbe(LDM_DEV *device);
7141 +#if defined(LDM_PCI)
7142 +static void PVRSRVDriverRemove(LDM_DEV *device);
7143 +static int PVRSRVDriverProbe(LDM_DEV *device, const struct pci_device_id *id);
7145 +static int PVRSRVDriverSuspend(LDM_DEV *device, pm_message_t state);
7146 +static void PVRSRVDriverShutdown(LDM_DEV *device);
7147 +static int PVRSRVDriverResume(LDM_DEV *device);
7149 +#if defined(LDM_PCI)
7150 +struct pci_device_id powervr_id_table[] __devinitdata = {
7151 + { PCI_DEVICE(SYS_SGX_DEV_VENDOR_ID, SYS_SGX_DEV_DEVICE_ID2) },
7155 +MODULE_DEVICE_TABLE(pci, powervr_id_table);
7158 +static LDM_DRV powervr_driver = {
7159 +#if defined(LDM_PLATFORM)
7165 +#if defined(LDM_PCI)
7167 + .id_table = powervr_id_table,
7169 .probe = PVRSRVDriverProbe,
7170 +#if defined(LDM_PLATFORM)
7171 .remove = PVRSRVDriverRemove,
7173 +#if defined(LDM_PCI)
7174 + .remove = __devexit_p(PVRSRVDriverRemove),
7176 .suspend = PVRSRVDriverSuspend,
7177 .resume = PVRSRVDriverResume,
7178 .shutdown = PVRSRVDriverShutdown,
7181 +LDM_DEV *gpsPVRLDMDev;
7184 +#if defined(LDM_PLATFORM)
7185 static void PVRSRVDeviceRelease(struct device *device);
7187 static struct platform_device powervr_device = {
7188 @@ -126,18 +185,79 @@
7189 .release = PVRSRVDeviceRelease
7195 +static ssize_t PVRSRVShowDev(struct class_device *pClassDevice, char *buf)
7197 + PVR_TRACE(("PVRSRVShowDev(pClassDevice=%p)", pClassDevice));
7199 -static int PVRSRVDriverProbe(struct platform_device *pDevice)
7200 + return snprintf(buf, PAGE_SIZE, "%d:0\n", AssignedMajorNumber);
7203 +//static CLASS_DEVICE_ATTR(dev, S_IRUGO, PVRSRVShowDev, NULL);
7205 +/*static void PVRSRVClassDeviceRelease(struct class_device *pClassDevice)
7207 + PVR_TRACE(("PVRSRVClassDeviceRelease(pClassDevice=%p)", pClassDevice));
7209 + kfree(pClassDevice);
7212 +#if defined(LDM_PLATFORM)
7213 +static int PVRSRVDriverProbe(LDM_DEV *pDevice)
7215 +#if defined(LDM_PCI)
7216 +static int __devinit PVRSRVDriverProbe(LDM_DEV *pDevice, const struct pci_device_id *id)
7219 SYS_DATA *psSysData;
7220 PVRSRV_ERROR eError;
7221 + //struct class_device *pClassDevice;
7224 - PVR_DPF((PVR_DBG_WARNING, "PVRSRVDriverProbe(pDevice=%p)", pDevice));
7225 + PVR_TRACE(("PVRSRVDriverProbe(pDevice=%p)", pDevice));
7227 - pDevice->dev.driver_data = NULL;
7228 + pDevice->dev.driver_data = NULL;
7229 + /*pClassDevice = kmalloc(sizeof(*pClassDevice), GFP_KERNEL);
7231 + if (pClassDevice == IMG_NULL)
7233 + PVR_DPF((PVR_DBG_ERROR,
7234 + "PVRSRVDriverProbe(pDevice=%p): no memory for class device instance.",
7240 + memset(pClassDevice, 0, sizeof(*pClassDevice));
7242 + pDevice->dev.driver_data = (void *)pClassDevice;
7245 + strncpy(pClassDevice->class_id, DEVNAME, BUS_ID_SIZE);
7247 + pClassDevice->class = &powervr_class;
7248 + pClassDevice->dev = &pDevice->dev;
7251 + if ((error = class_device_register(pClassDevice)) != 0)
7253 + kfree(pClassDevice);
7255 + PVR_DPF((PVR_DBG_ERROR,
7256 + "PVRSRVDriverProbe(pDevice=%p): class_device_register failed (%d)",
7261 + if ((error = class_device_create_file(pClassDevice, &class_device_attr_dev)) != 0)
7263 + PVR_DPF((PVR_DBG_ERROR,
7264 + "PVRSRVDriverProbe(pDevice=%p): class_device_create_file failed (%d)",
7271 @@ -149,37 +269,34 @@
7273 if (SysAcquireData(&psSysData) != PVRSRV_OK)
7275 + gpsPVRLDMDev = pDevice;
7277 if (SysInitialise() != PVRSRV_OK)
7282 - eError = PVRSRVResManConnect(RESMAN_KERNEL_PROCESSID, IMG_TRUE);
7283 - if(eError != PVRSRV_OK)
7285 - PVR_DPF((PVR_DBG_ERROR,"PVRSRVDriverProbe: Failed to connect to resource manager"));
7294 -static int PVRSRVDriverRemove(struct platform_device *pDevice)
7295 +#if defined (LDM_PLATFORM)
7296 +static int PVRSRVDriverRemove(LDM_DEV *pDevice)
7298 +#if defined(LDM_PCI)
7299 +static void __devexit PVRSRVDriverRemove(LDM_DEV *pDevice)
7302 SYS_DATA *psSysData;
7304 - PVR_DPF((PVR_DBG_WARNING, "PVRSRVDriverRemove(pDevice=%p)", pDevice));
7305 + PVR_TRACE(("PVRSRVDriverRemove(pDevice=%p)", pDevice));
7307 - if(PVRSRVResManConnect(RESMAN_KERNEL_PROCESSID, IMG_FALSE) != PVRSRV_OK)
7312 if (SysAcquireData(&psSysData) == PVRSRV_OK)
7314 SysDeinitialise(psSysData);
7316 + gpsPVRLDMDev = IMG_NULL;
7320 @@ -189,68 +306,131 @@
7324 + //class_device_unregister((struct class_device *)pDevice->dev.driver_data);
7327 + pDevice->dev.driver_data = 0;
7330 +#if defined (LDM_PLATFORM)
7333 +#if defined (LDM_PCI)
7339 -static void PVRSRVDriverShutdown(struct platform_device *pDevice)
7340 +static void PVRSRVDriverShutdown(LDM_DEV *pDevice)
7342 - PVR_DPF((PVR_DBG_WARNING, "PVRSRVDriverShutdown(pDevice=%p)", pDevice));
7343 + PVR_TRACE(("PVRSRVDriverShutdown(pDevice=%p)", pDevice));
7345 (void) PVRSRVSetPowerStateKM(PVRSRV_POWER_STATE_D3);
7349 -static int PVRSRVDriverSuspend(struct platform_device *pDevice, pm_message_t state)
7350 +static int PVRSRVDriverSuspend(LDM_DEV *pDevice, pm_message_t state)
7353 - PVR_DPF((PVR_DBG_WARNING,
7354 - "PVRSRVDriverSuspend(pDevice=%p)",
7356 +#if !(defined(DEBUG) && defined(PVR_MANUAL_POWER_CONTROL))
7357 + PVR_TRACE(( "PVRSRVDriverSuspend(pDevice=%p)", pDevice));
7359 if (PVRSRVSetPowerStateKM(PVRSRV_POWER_STATE_D3) != PVRSRV_OK)
7369 -static int PVRSRVDriverResume(struct platform_device *pDevice)
7370 +static int PVRSRVDriverResume(LDM_DEV *pDevice)
7372 - PVR_DPF((PVR_DBG_WARNING, "PVRSRVDriverResume(pDevice=%p)", pDevice));
7373 +#if !(defined(DEBUG) && defined(PVR_MANUAL_POWER_CONTROL))
7374 + PVR_TRACE(("PVRSRVDriverResume(pDevice=%p)", pDevice));
7376 if (PVRSRVSetPowerStateKM(PVRSRV_POWER_STATE_D0) != PVRSRV_OK)
7386 +#if defined(LDM_PLATFORM)
7387 static void PVRSRVDeviceRelease(struct device *pDevice)
7389 PVR_DPF((PVR_DBG_WARNING, "PVRSRVDeviceRelease(pDevice=%p)", pDevice));
7395 +#if defined(DEBUG) && defined(PVR_MANUAL_POWER_CONTROL)
7396 +static IMG_UINT32 gPVRPowerLevel;
7398 +int PVRProcSetPowerLevel(struct file *file, const char *buffer, unsigned long count, void *data)
7400 + char data_buffer[2];
7401 + IMG_UINT32 PVRPowerLevel;
7403 + if (count != sizeof(data_buffer))
7409 + if (copy_from_user(data_buffer, buffer, count))
7411 + if (data_buffer[count - 1] != '\n')
7413 + PVRPowerLevel = data_buffer[0] - '0';
7414 + if (PVRPowerLevel != gPVRPowerLevel)
7416 + if (PVRPowerLevel != 0)
7418 + if (PVRSRVSetPowerStateKM(PVRSRV_POWER_STATE_D3) != PVRSRV_OK)
7425 + if (PVRSRVSetPowerStateKM(PVRSRV_POWER_STATE_D0) != PVRSRV_OK)
7431 + gPVRPowerLevel = PVRPowerLevel;
7437 +int PVRProcGetPowerLevel(char *page, char **start, off_t off, int count, int *eof, void *data)
7440 + *start = (char *)1;
7441 + return printAppend(page, count, 0, "%lu\n", gPVRPowerLevel);
7448 static int PVRSRVOpen(struct inode unref__ * pInode, struct file unref__ * pFile)
7452 - PVR_DPF((PVR_DBG_MESSAGE, "PVRSRVOpen"));
7454 - LinuxLockMutex(&gPVRSRVLock);
7455 + LinuxLockMutex(&gPVRSRVLock);
7457 if (PVRSRVResManConnect(PVRSRVRESMAN_PROCESSID_FIND, IMG_TRUE) != PVRSRV_OK)
7462 - LinuxUnLockMutex(&gPVRSRVLock);
7463 + LinuxUnLockMutex(&gPVRSRVLock);
7471 - PVR_DPF((PVR_DBG_MESSAGE, "PVRSRVRelease"));
7473 if (PVRSRVResManConnect(PVRSRVRESMAN_PROCESSID_FIND, IMG_FALSE) != PVRSRV_OK)
7476 @@ -274,9 +452,12 @@
7477 static int __init PVRCore_Init(void)
7480 -#if !defined(LDM_PLATFORM)
7481 +#if !(defined(LDM_PLATFORM) || defined(LDM_PCI))
7482 PVRSRV_ERROR eError;
7486 + PVR_TRACE(("PVRCore_Init"));
7489 AssignedMajorNumber = register_chrdev(0, DEVNAME, &pvrsrv_fops);
7495 - PVR_DPF((PVR_DBG_WARNING, "PVRCore_Init: major device %d", AssignedMajorNumber));
7496 + PVR_TRACE(("PVRCore_Init: major device %d", AssignedMajorNumber));
7499 if (CreateProcEntries ())
7500 @@ -313,9 +494,19 @@
7504 +#if defined(LDM_PLATFORM) || defined(LDM_PCI)
7505 + /*if ((error = class_register(&powervr_class)) != 0)
7507 + PVR_DPF((PVR_DBG_ERROR, "PVRCore_Init: unable to register class (%d)", error));
7512 #if defined(LDM_PLATFORM)
7513 if ((error = platform_driver_register(&powervr_driver)) != 0)
7515 + //class_unregister(&powervr_class);
7517 PVR_DPF((PVR_DBG_ERROR, "PVRCore_Init: unable to register platform driver (%d)", error));
7520 @@ -324,11 +515,25 @@
7521 if ((error = platform_device_register(&powervr_device)) != 0)
7523 platform_driver_unregister(&powervr_driver);
7524 + //class_unregister(&powervr_class);
7526 PVR_DPF((PVR_DBG_ERROR, "PVRCore_Init: unable to register platform device (%d)", error));
7532 +#if defined(LDM_PCI)
7533 + if ((error = pci_register_driver(&powervr_driver)) != 0)
7535 + //class_unregister(&powervr_class);
7537 + PVR_DPF((PVR_DBG_ERROR, "PVRCore_Init: unable to register PCI driver (%d)", error));
7545 if ((eError = SysInitialise()) != PVRSRV_OK)
7546 @@ -343,20 +548,12 @@
7551 - eError = PVRSRVResManConnect(RESMAN_KERNEL_PROCESSID, IMG_TRUE);
7552 - if(eError != PVRSRV_OK)
7554 - PVR_DPF((PVR_DBG_ERROR,"PVRCore_Init: Failed to connect to resource manager"));
7564 - (void) PVRSRVResManConnect(RESMAN_KERNEL_PROCESSID, IMG_FALSE);
7567 RemoveProcEntries();
7568 @@ -370,23 +567,34 @@
7569 static void __exit PVRCore_Cleanup(void)
7571 SYS_DATA *psSysData;
7572 -#if !defined(LDM_PLATFORM)
7573 +#if !(defined(LDM_PLATFORM) || defined (LDM_PCI))
7574 PVRSRV_ERROR eError;
7578 + PVR_TRACE(("PVRCore_Cleanup"));
7580 SysAcquireData(&psSysData);
7581 - unregister_chrdev(AssignedMajorNumber, DRVNAME);
7583 + /*if (unregister_chrdev(AssignedMajorNumber, DRVNAME))
7585 + PVR_DPF((PVR_DBG_ERROR," can't unregister device major %d", AssignedMajorNumber));
7587 + unregister_chrdev(AssignedMajorNumber, DRVNAME);
7589 +#if defined(LDM_PLATFORM) || defined(LDM_PCI)
7591 +#if defined(LDM_PCI)
7592 + pci_unregister_driver(&powervr_driver);
7595 #if defined (LDM_PLATFORM)
7596 platform_device_unregister(&powervr_device);
7597 platform_driver_unregister(&powervr_driver);
7599 - eError = PVRSRVResManConnect(RESMAN_KERNEL_PROCESSID, IMG_FALSE);
7600 - if (eError != PVRSRV_OK)
7602 - PVR_DPF((PVR_DBG_ERROR,"KernelResManDisconnect: Failed to disconnect"));
7606 + //class_unregister(&powervr_class);
7610 SysDeinitialise(psSysData);
7614 RemoveProcEntries();
7616 - PVR_DPF((PVR_DBG_WARNING,"unloading"));
7617 + PVR_TRACE(("PVRCore_Cleanup: unloading"));
7620 module_init(PVRCore_Init);
7621 diff -Nurd git/drivers/gpu/pvr/services4/srvkm/env/linux/osfunc.c git/drivers/gpu/pvr/services4/srvkm/env/linux/osfunc.c
7622 --- git/drivers/gpu/pvr/services4/srvkm/env/linux/osfunc.c 2009-01-05 20:00:44.000000000 +0100
7623 +++ git/drivers/gpu/pvr/services4/srvkm/env/linux/osfunc.c 2008-12-18 15:47:29.000000000 +0100
7625 #include "env_data.h"
7630 +#define EVENT_OBJECT_TIMEOUT_MS (100)
7632 extern PVRSRV_LINUX_MUTEX gPVRSRVLock;
7635 psEnvData->bLISRInstalled = IMG_FALSE;
7638 - psEnvData->psPCIDev = NULL;
7641 *ppvEnvSpecificData = psEnvData;
7646 PVR_ASSERT(!psEnvData->bMISRInstalled);
7647 PVR_ASSERT(!psEnvData->bLISRInstalled);
7648 - PVR_ASSERT(psEnvData->psPCIDev == NULL);
7650 OSFreeMem(PVRSRV_OS_PAGEABLE_HEAP, 0x1000, psEnvData->pvBridgeData, IMG_NULL);
7652 @@ -1189,57 +1188,62 @@
7655 #if defined(CONFIG_PCI) && (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0))
7656 -PVRSRV_ERROR OSPCIAcquireDev(IMG_VOID *pvSysData, IMG_UINT16 ui16VendorID, IMG_UINT16 ui16DeviceID, HOST_PCI_INIT_FLAGS eFlags)
7658 +IMG_HANDLE OSPCISetDev(IMG_VOID *pvPCICookie, HOST_PCI_INIT_FLAGS eFlags)
7660 - SYS_DATA *psSysData = (SYS_DATA *)pvSysData;
7661 - ENV_DATA *psEnvData = (ENV_DATA *)psSysData->pvEnvSpecificData;
7664 + PVR_PCI_DEV *psPVRPCI;
7666 - if (psEnvData->psPCIDev != NULL)
7668 - PVR_DPF((PVR_DBG_ERROR, "OSPCIAcquireDev: A device has already been acquired"));
7669 - return PVRSRV_ERROR_GENERIC;
7671 + PVR_TRACE(("OSPCISetDev"));
7673 - psEnvData->psPCIDev = pci_get_device(ui16VendorID, ui16DeviceID, psEnvData->psPCIDev);
7674 - if (psEnvData->psPCIDev == NULL)
7675 + if(OSAllocMem(PVRSRV_OS_PAGEABLE_HEAP, sizeof(*psPVRPCI), (IMG_VOID *)&psPVRPCI, IMG_NULL) != PVRSRV_OK)
7677 - PVR_DPF((PVR_DBG_ERROR, "OSPCIAcquireDev: Couldn't acquire device"));
7678 - return PVRSRV_ERROR_GENERIC;
7679 + PVR_DPF((PVR_DBG_ERROR, "OSPCISetDev: Couldn't allocate PVR PCI structure"));
7683 - err = pci_enable_device(psEnvData->psPCIDev);
7684 + psPVRPCI->psPCIDev = (struct pci_dev *)pvPCICookie;
7685 + psPVRPCI->ePCIFlags = eFlags;
7687 + err = pci_enable_device(psPVRPCI->psPCIDev);
7690 - PVR_DPF((PVR_DBG_ERROR, "OSPCIAcquireDev: Couldn't enable device (%d)", err));
7691 - return PVRSRV_ERROR_GENERIC;
7692 + PVR_DPF((PVR_DBG_ERROR, "OSPCISetDev: Couldn't enable device (%d)", err));
7696 - if (eFlags & HOST_PCI_INIT_FLAG_BUS_MASTER)
7697 - pci_set_master(psEnvData->psPCIDev);
7698 + if (psPVRPCI->ePCIFlags & HOST_PCI_INIT_FLAG_BUS_MASTER)
7699 + pci_set_master(psPVRPCI->psPCIDev);
7702 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
7704 - psEnvData->abPCIResourceInUse[i] = IMG_FALSE;
7705 + psPVRPCI->abPCIResourceInUse[i] = IMG_FALSE;
7709 + return (IMG_HANDLE)psPVRPCI;
7712 -PVRSRV_ERROR OSPCIIRQ(IMG_VOID *pvSysData, IMG_UINT32 *pui32IRQ)
7713 +IMG_HANDLE OSPCIAcquireDev(IMG_UINT16 ui16VendorID, IMG_UINT16 ui16DeviceID, HOST_PCI_INIT_FLAGS eFlags)
7715 - SYS_DATA *psSysData = (SYS_DATA *)pvSysData;
7716 - ENV_DATA *psEnvData = (ENV_DATA *)psSysData->pvEnvSpecificData;
7717 + struct pci_dev *psPCIDev;
7719 - if (psEnvData->psPCIDev == NULL)
7720 + psPCIDev = pci_get_device(ui16VendorID, ui16DeviceID, NULL);
7721 + if (psPCIDev == NULL)
7723 - PVR_DPF((PVR_DBG_ERROR, "OSPCIIRQ: Device hasn't been acquired"));
7724 - return PVRSRV_ERROR_GENERIC;
7725 + PVR_DPF((PVR_DBG_ERROR, "OSPCIAcquireDev: Couldn't acquire device"));
7729 - *pui32IRQ = psEnvData->psPCIDev->irq;
7730 + return OSPCISetDev((IMG_VOID *)psPCIDev, eFlags);
7733 +PVRSRV_ERROR OSPCIIRQ(IMG_HANDLE hPVRPCI, IMG_UINT32 *pui32IRQ)
7735 + PVR_PCI_DEV *psPVRPCI = (PVR_PCI_DEV *)hPVRPCI;
7737 + *pui32IRQ = psPVRPCI->psPCIDev->irq;
7741 @@ -1254,19 +1258,12 @@
7744 static IMG_UINT32 OSPCIAddrRangeFunc(enum HOST_PCI_ADDR_RANGE_FUNC eFunc,
7745 - IMG_VOID *pvSysData,
7746 + IMG_HANDLE hPVRPCI,
7747 IMG_UINT32 ui32Index
7751 - SYS_DATA *psSysData = (SYS_DATA *)pvSysData;
7752 - ENV_DATA *psEnvData = (ENV_DATA *)psSysData->pvEnvSpecificData;
7754 - if (psEnvData->psPCIDev == NULL)
7756 - PVR_DPF((PVR_DBG_ERROR, "OSPCIAddrRangeFunc: Device hasn't been acquired"));
7759 + PVR_PCI_DEV *psPVRPCI = (PVR_PCI_DEV *)hPVRPCI;
7761 if (ui32Index >= DEVICE_COUNT_RESOURCE)
7763 @@ -1278,32 +1275,32 @@
7766 case HOST_PCI_ADDR_RANGE_FUNC_LEN:
7767 - return pci_resource_len(psEnvData->psPCIDev, ui32Index);
7768 + return pci_resource_len(psPVRPCI->psPCIDev, ui32Index);
7769 case HOST_PCI_ADDR_RANGE_FUNC_START:
7770 - return pci_resource_start(psEnvData->psPCIDev, ui32Index);
7771 + return pci_resource_start(psPVRPCI->psPCIDev, ui32Index);
7772 case HOST_PCI_ADDR_RANGE_FUNC_END:
7773 - return pci_resource_end(psEnvData->psPCIDev, ui32Index);
7774 + return pci_resource_end(psPVRPCI->psPCIDev, ui32Index);
7775 case HOST_PCI_ADDR_RANGE_FUNC_REQUEST:
7781 - err = pci_request_region(psEnvData->psPCIDev, ui32Index, "PowerVR");
7782 + err = pci_request_region(psPVRPCI->psPCIDev, ui32Index, "PowerVR");
7785 PVR_DPF((PVR_DBG_ERROR, "OSPCIAddrRangeFunc: pci_request_region_failed (%d)", err));
7789 - psEnvData->abPCIResourceInUse[ui32Index] = IMG_TRUE;
7790 + psPVRPCI->abPCIResourceInUse[ui32Index] = IMG_TRUE;
7793 case HOST_PCI_ADDR_RANGE_FUNC_RELEASE:
7794 - if (psEnvData->abPCIResourceInUse[ui32Index])
7795 + if (psPVRPCI->abPCIResourceInUse[ui32Index])
7797 - pci_release_region(psEnvData->psPCIDev, ui32Index);
7798 - psEnvData->abPCIResourceInUse[ui32Index] = IMG_FALSE;
7799 + pci_release_region(psPVRPCI->psPCIDev, ui32Index);
7800 + psPVRPCI->abPCIResourceInUse[ui32Index] = IMG_FALSE;
7804 @@ -1314,62 +1311,160 @@
7808 -IMG_UINT32 OSPCIAddrRangeLen(IMG_VOID *pvSysData, IMG_UINT32 ui32Index)
7809 +IMG_UINT32 OSPCIAddrRangeLen(IMG_HANDLE hPVRPCI, IMG_UINT32 ui32Index)
7811 - return OSPCIAddrRangeFunc(HOST_PCI_ADDR_RANGE_FUNC_LEN, pvSysData, ui32Index);
7812 + return OSPCIAddrRangeFunc(HOST_PCI_ADDR_RANGE_FUNC_LEN, hPVRPCI, ui32Index);
7815 -IMG_UINT32 OSPCIAddrRangeStart(IMG_VOID *pvSysData, IMG_UINT32 ui32Index)
7816 +IMG_UINT32 OSPCIAddrRangeStart(IMG_HANDLE hPVRPCI, IMG_UINT32 ui32Index)
7818 - return OSPCIAddrRangeFunc(HOST_PCI_ADDR_RANGE_FUNC_START, pvSysData, ui32Index);
7819 + return OSPCIAddrRangeFunc(HOST_PCI_ADDR_RANGE_FUNC_START, hPVRPCI, ui32Index);
7822 -IMG_UINT32 OSPCIAddrRangeEnd(IMG_VOID *pvSysData, IMG_UINT32 ui32Index)
7823 +IMG_UINT32 OSPCIAddrRangeEnd(IMG_HANDLE hPVRPCI, IMG_UINT32 ui32Index)
7825 - return OSPCIAddrRangeFunc(HOST_PCI_ADDR_RANGE_FUNC_END, pvSysData, ui32Index);
7826 + return OSPCIAddrRangeFunc(HOST_PCI_ADDR_RANGE_FUNC_END, hPVRPCI, ui32Index);
7829 -PVRSRV_ERROR OSPCIRequestAddrRange(IMG_VOID *pvSysData,
7830 - IMG_UINT32 ui32Index
7833 +PVRSRV_ERROR OSPCIRequestAddrRange(IMG_HANDLE hPVRPCI,
7834 + IMG_UINT32 ui32Index)
7836 - return OSPCIAddrRangeFunc(HOST_PCI_ADDR_RANGE_FUNC_REQUEST, pvSysData, ui32Index) == 0 ? PVRSRV_ERROR_GENERIC : PVRSRV_OK;
7837 + return OSPCIAddrRangeFunc(HOST_PCI_ADDR_RANGE_FUNC_REQUEST, hPVRPCI, ui32Index) == 0 ? PVRSRV_ERROR_GENERIC : PVRSRV_OK;
7840 -PVRSRV_ERROR OSPCIReleaseAddrRange(IMG_VOID *pvSysData, IMG_UINT32 ui32Index)
7841 +PVRSRV_ERROR OSPCIReleaseAddrRange(IMG_HANDLE hPVRPCI, IMG_UINT32 ui32Index)
7843 - return OSPCIAddrRangeFunc(HOST_PCI_ADDR_RANGE_FUNC_RELEASE, pvSysData, ui32Index) == 0 ? PVRSRV_ERROR_GENERIC : PVRSRV_OK;
7844 + return OSPCIAddrRangeFunc(HOST_PCI_ADDR_RANGE_FUNC_RELEASE, hPVRPCI, ui32Index) == 0 ? PVRSRV_ERROR_GENERIC : PVRSRV_OK;
7847 -PVRSRV_ERROR OSPCIReleaseDev(IMG_VOID *pvSysData)
7848 +PVRSRV_ERROR OSPCIReleaseDev(IMG_HANDLE hPVRPCI)
7850 - SYS_DATA *psSysData = (SYS_DATA *)pvSysData;
7851 - ENV_DATA *psEnvData = (ENV_DATA *)psSysData->pvEnvSpecificData;
7852 + PVR_PCI_DEV *psPVRPCI = (PVR_PCI_DEV *)hPVRPCI;
7855 - if (psEnvData->psPCIDev == NULL)
7856 + PVR_TRACE(("OSPCIReleaseDev"));
7859 + for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
7862 + if (psPVRPCI->abPCIResourceInUse[i])
7864 + PVR_TRACE(("OSPCIReleaseDev: Releasing Address range %d", i));
7865 + pci_release_region(psPVRPCI->psPCIDev, i);
7866 + psPVRPCI->abPCIResourceInUse[i] = IMG_FALSE;
7870 + pci_disable_device(psPVRPCI->psPCIDev);
7872 + OSFreeMem(PVRSRV_OS_PAGEABLE_HEAP, sizeof(*psPVRPCI), (IMG_VOID *)psPVRPCI, IMG_NULL);
7877 +PVRSRV_ERROR OSPCISuspendDev(IMG_HANDLE hPVRPCI)
7879 + PVR_PCI_DEV *psPVRPCI = (PVR_PCI_DEV *)hPVRPCI;
7883 + PVR_TRACE(("OSPCISuspendDev"));
7886 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
7888 - if (psEnvData->abPCIResourceInUse[i])
7889 + if (psPVRPCI->abPCIResourceInUse[i])
7891 - PVR_TRACE(("OSPCIReleaseDev: Releasing Address range %d", i));
7892 - pci_release_region(psEnvData->psPCIDev, i);
7893 - psEnvData->abPCIResourceInUse[i] = IMG_FALSE;
7894 + pci_release_region(psPVRPCI->psPCIDev, i);
7898 - pci_disable_device(psEnvData->psPCIDev);
7899 + err = pci_save_state(psPVRPCI->psPCIDev);
7902 + PVR_DPF((PVR_DBG_ERROR, "OSPCISuspendDev: pci_save_state_failed (%d)", err));
7903 + return PVRSRV_ERROR_GENERIC;
7906 - psEnvData->psPCIDev = NULL;
7907 + pci_disable_device(psPVRPCI->psPCIDev);
7909 + err = pci_set_power_state(psPVRPCI->psPCIDev, PCI_D3cold);
7915 + PVR_DPF((PVR_DBG_WARNING, "OSPCISuspendDev: device doesn't support PCI PM"));
7918 + PVR_DPF((PVR_DBG_ERROR, "OSPCISuspendDev: can't enter requested power state"));
7921 + PVR_DPF((PVR_DBG_ERROR, "OSPCISuspendDev: pci_set_power_state failed (%d)", err));
7928 +PVRSRV_ERROR OSPCIResumeDev(IMG_HANDLE hPVRPCI)
7930 + PVR_PCI_DEV *psPVRPCI = (PVR_PCI_DEV *)hPVRPCI;
7934 + PVR_TRACE(("OSPCIResumeDev"));
7936 + err = pci_set_power_state(psPVRPCI->psPCIDev, PCI_D0);
7942 + PVR_DPF((PVR_DBG_WARNING, "OSPCIResumeDev: device doesn't support PCI PM"));
7945 + PVR_DPF((PVR_DBG_ERROR, "OSPCIResumeDev: can't enter requested power state"));
7946 + return PVRSRV_ERROR_GENERIC;
7948 + PVR_DPF((PVR_DBG_ERROR, "OSPCIResumeDev: pci_set_power_state failed (%d)", err));
7949 + return PVRSRV_ERROR_GENERIC;
7952 + err = pci_restore_state(psPVRPCI->psPCIDev);
7955 + PVR_DPF((PVR_DBG_ERROR, "OSPCIResumeDev: pci_restore_state failed (%d)", err));
7956 + return PVRSRV_ERROR_GENERIC;
7959 + err = pci_enable_device(psPVRPCI->psPCIDev);
7962 + PVR_DPF((PVR_DBG_ERROR, "OSPCIResumeDev: Couldn't enable device (%d)", err));
7963 + return PVRSRV_ERROR_GENERIC;
7966 + if (psPVRPCI->ePCIFlags & HOST_PCI_INIT_FLAG_BUS_MASTER)
7967 + pci_set_master(psPVRPCI->psPCIDev);
7970 + for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
7972 + if (psPVRPCI->abPCIResourceInUse[i])
7974 + err = pci_request_region(psPVRPCI->psPCIDev, i, "PowerVR");
7977 + PVR_DPF((PVR_DBG_ERROR, "OSPCIResumeDev: pci_request_region_failed (region %d, error %d)", i, err));
7988 typedef struct TIMER_CALLBACK_DATA_TAG
7989 @@ -1418,7 +1513,7 @@
7991 psTimerCBData->pfnTimerFunc = pfnTimerFunc;
7992 psTimerCBData->pvData = pvData;
7993 - psTimerCBData->bActive = IMG_TRUE;
7994 + psTimerCBData->bActive = IMG_FALSE;
7998 @@ -1434,14 +1529,36 @@
7999 psTimerCBData->sTimer.data = (IMG_UINT32)psTimerCBData;
8000 psTimerCBData->sTimer.expires = psTimerCBData->ui32Delay + jiffies;
8002 + return (IMG_HANDLE)psTimerCBData;
8006 +PVRSRV_ERROR OSRemoveTimer (IMG_HANDLE hTimer)
8008 + TIMER_CALLBACK_DATA *psTimerCBData = (TIMER_CALLBACK_DATA*)hTimer;
8011 + OSFreeMem(PVRSRV_OS_NON_PAGEABLE_HEAP, sizeof(TIMER_CALLBACK_DATA), psTimerCBData, IMG_NULL);
8017 +PVRSRV_ERROR OSEnableTimer (IMG_HANDLE hTimer)
8019 + TIMER_CALLBACK_DATA *psTimerCBData = (TIMER_CALLBACK_DATA*)hTimer;
8022 + psTimerCBData->bActive = IMG_TRUE;
8025 add_timer(&psTimerCBData->sTimer);
8027 - return (IMG_HANDLE)psTimerCBData;
8032 -PVRSRV_ERROR OSRemoveTimer (IMG_HANDLE hTimer)
8033 +PVRSRV_ERROR OSDisableTimer (IMG_HANDLE hTimer)
8035 TIMER_CALLBACK_DATA *psTimerCBData = (TIMER_CALLBACK_DATA*)hTimer;
8037 @@ -1451,21 +1568,17 @@
8039 del_timer_sync(&psTimerCBData->sTimer);
8042 - OSFreeMem(PVRSRV_OS_NON_PAGEABLE_HEAP, sizeof(TIMER_CALLBACK_DATA), psTimerCBData, IMG_NULL);
8048 PVRSRV_ERROR OSEventObjectCreate(const IMG_CHAR *pszName, PVRSRV_EVENTOBJECT *psEventObject)
8051 PVRSRV_ERROR eError = PVRSRV_OK;
8055 - struct completion *psCompletion;
8060 @@ -1478,26 +1591,20 @@
8061 snprintf(psEventObject->szName, EVENTOBJNAME_MAXLENGTH, "PVRSRV_EVENTOBJECT_%d", ui16NameIndex++);
8065 - if(OSAllocMem(PVRSRV_OS_NON_PAGEABLE_HEAP,
8066 - sizeof(struct completion),
8067 - (IMG_VOID **)&psCompletion, IMG_NULL) != PVRSRV_OK)
8068 + if(LinuxEventObjectListCreate(&psEventObject->hOSEventKM) != PVRSRV_OK)
8070 - PVR_DPF((PVR_DBG_ERROR, "OSEventObjectCreate: failed to allocate memory for completion variable"));
8071 - return PVRSRV_ERROR_OUT_OF_MEMORY;
8072 + eError = PVRSRV_ERROR_OUT_OF_MEMORY;
8075 - init_completion(psCompletion);
8077 - psEventObject->hOSEventKM = (IMG_HANDLE) psCompletion;
8081 PVR_DPF((PVR_DBG_ERROR, "OSEventObjectCreate: psEventObject is not a valid pointer"));
8082 - eError = PVRSRV_ERROR_INVALID_PARAMS;
8083 + eError = PVRSRV_ERROR_GENERIC;
8091 @@ -1509,8 +1616,7 @@
8093 if(psEventObject->hOSEventKM)
8095 - struct completion *psCompletion = (struct completion *) psEventObject->hOSEventKM;
8096 - OSFreeMem(PVRSRV_OS_NON_PAGEABLE_HEAP, sizeof(struct completion), psCompletion, IMG_NULL);
8097 + LinuxEventObjectListDestroy(psEventObject->hOSEventKM);
8101 @@ -1527,19 +1633,13 @@
8105 -PVRSRV_ERROR OSEventObjectWait(IMG_HANDLE hOSEventKM, IMG_UINT32 ui32MSTimeout)
8106 +PVRSRV_ERROR OSEventObjectWait(IMG_HANDLE hOSEventKM)
8108 PVRSRV_ERROR eError = PVRSRV_OK;
8112 - LinuxUnLockMutex(&gPVRSRVLock);
8113 -#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,10))
8114 - wait_for_completion_timeout((struct completion *)hOSEventKM, msecs_to_jiffies(ui32MSTimeout));
8116 - wait_for_completion((struct completion *)hOSEventKM);
8118 - LinuxLockMutex(&gPVRSRVLock);
8119 + eError = LinuxEventObjectWait(hOSEventKM, EVENT_OBJECT_TIMEOUT_MS);
8123 @@ -1550,13 +1650,60 @@
8127 +PVRSRV_ERROR OSEventObjectOpen(PVRSRV_EVENTOBJECT *psEventObject,
8128 + IMG_HANDLE *phOSEvent)
8130 + PVRSRV_ERROR eError = PVRSRV_OK;
8134 + if(LinuxEventObjectAdd(psEventObject->hOSEventKM, phOSEvent) != PVRSRV_OK)
8136 + PVR_DPF((PVR_DBG_ERROR, "LinuxEventObjectAdd: failed"));
8137 + eError = PVRSRV_ERROR_INVALID_PARAMS;
8143 + PVR_DPF((PVR_DBG_ERROR, "OSEventObjectCreate: psEventObject is not a valid pointer"));
8144 + eError = PVRSRV_ERROR_INVALID_PARAMS;
8150 +PVRSRV_ERROR OSEventObjectClose(PVRSRV_EVENTOBJECT *psEventObject,
8151 + IMG_HANDLE hOSEventKM)
8153 + PVRSRV_ERROR eError = PVRSRV_OK;
8157 + if(LinuxEventObjectDelete(psEventObject->hOSEventKM, hOSEventKM, IMG_FALSE) != PVRSRV_OK)
8159 + PVR_DPF((PVR_DBG_ERROR, "LinuxEventObjectDelete: failed"));
8160 + eError = PVRSRV_ERROR_INVALID_PARAMS;
8166 + PVR_DPF((PVR_DBG_ERROR, "OSEventObjectDestroy: psEventObject is not a valid pointer"));
8167 + eError = PVRSRV_ERROR_INVALID_PARAMS;
8174 PVRSRV_ERROR OSEventObjectSignal(IMG_HANDLE hOSEventKM)
8176 PVRSRV_ERROR eError = PVRSRV_OK;
8180 - complete_all((struct completion *) hOSEventKM);
8181 + eError = LinuxEventObjectSignal(hOSEventKM);
8185 diff -Nurd git/drivers/gpu/pvr/services4/srvkm/env/linux/pdump.c git/drivers/gpu/pvr/services4/srvkm/env/linux/pdump.c
8186 --- git/drivers/gpu/pvr/services4/srvkm/env/linux/pdump.c 2009-01-05 20:00:44.000000000 +0100
8187 +++ git/drivers/gpu/pvr/services4/srvkm/env/linux/pdump.c 2008-12-18 15:47:29.000000000 +0100
8188 @@ -1205,15 +1205,14 @@
8190 ui32Written = DbgWrite(psStream, &pui8Data[ui32Off], ui32Count, ui32Flags);
8196 if (ui32Written == 0)
8198 - ZwYieldExecution();
8199 + OSReleaseThreadQuanta();
8203 if (ui32Written != 0xFFFFFFFF)
8205 ui32Off += ui32Written;
8206 @@ -1302,6 +1301,14 @@
8207 return bFrameDumped;
8210 +IMG_VOID PDumpRegRead(const IMG_UINT32 ui32RegOffset, IMG_UINT32 ui32Flags)
8212 + __PDBG_PDUMP_STATE_GET_SCRIPT_STRING();
8214 + snprintf(pszScript, SZ_SCRIPT_SIZE_MAX, "RDW :SGXREG:0x%lX\r\n", ui32RegOffset);
8215 + PDumpWriteString2(pszScript, ui32Flags);
8218 IMG_VOID PDumpCycleCountRegRead(const IMG_UINT32 ui32RegOffset, IMG_BOOL bLastFrame)
8220 __PDBG_PDUMP_STATE_GET_SCRIPT_STRING();
8221 diff -Nurd git/drivers/gpu/pvr/services4/srvkm/env/linux/proc.c git/drivers/gpu/pvr/services4/srvkm/env/linux/proc.c
8222 --- git/drivers/gpu/pvr/services4/srvkm/env/linux/proc.c 2009-01-05 20:00:44.000000000 +0100
8223 +++ git/drivers/gpu/pvr/services4/srvkm/env/linux/proc.c 2008-12-18 15:47:29.000000000 +0100
8226 int PVRDebugProcSetLevel(struct file *file, const char *buffer, unsigned long count, void *data);
8227 int PVRDebugProcGetLevel(char *page, char **start, off_t off, int count, int *eof, void *data);
8229 +#ifdef PVR_MANUAL_POWER_CONTROL
8230 +int PVRProcSetPowerLevel(struct file *file, const char *buffer, unsigned long count, void *data);
8231 +int PVRProcGetPowerLevel(char *page, char **start, off_t off, int count, int *eof, void *data);
8235 static struct proc_dir_entry * dir;
8236 @@ -198,6 +203,15 @@
8241 +#ifdef PVR_MANUAL_POWER_CONTROL
8242 + if (CreateProcEntry("power_control", PVRProcGetPowerLevel, PVRProcSetPowerLevel, 0))
8244 + PVR_DPF((PVR_DBG_ERROR, "CreateProcEntries: couldn't make /proc/pvr/power_control"));
8255 RemoveProcEntry("debug_level");
8256 +#ifdef PVR_MANUAL_POWER_CONTROL
8257 + RemoveProcEntry("power_control");
8260 RemoveProcEntry("queue");
8261 RemoveProcEntry("nodes");
8262 diff -Nurd git/drivers/gpu/pvr/services4/srvkm/env/linux/pvr_debug.c git/drivers/gpu/pvr/services4/srvkm/env/linux/pvr_debug.c
8263 --- git/drivers/gpu/pvr/services4/srvkm/env/linux/pvr_debug.c 2009-01-05 20:00:44.000000000 +0100
8264 +++ git/drivers/gpu/pvr/services4/srvkm/env/linux/pvr_debug.c 2008-12-18 15:47:29.000000000 +0100
8267 void PVRDebugSetLevel(IMG_UINT32 uDebugLevel)
8269 - printk(KERN_INFO "PVR: Setting Debug Level = 0x%x",(unsigned int)uDebugLevel);
8270 + printk(KERN_INFO "PVR: Setting Debug Level = 0x%x\n",(unsigned int)uDebugLevel);
8272 gPVRDebugLevel = uDebugLevel;
8274 diff -Nurd git/drivers/gpu/pvr/services4/srvkm/hwdefs/sgxdefs.h git/drivers/gpu/pvr/services4/srvkm/hwdefs/sgxdefs.h
8275 --- git/drivers/gpu/pvr/services4/srvkm/hwdefs/sgxdefs.h 2009-01-05 20:00:44.000000000 +0100
8276 +++ git/drivers/gpu/pvr/services4/srvkm/hwdefs/sgxdefs.h 2008-12-18 15:47:29.000000000 +0100
8279 #include "sgx535defs.h"
8281 +#if defined(SGX520)
8282 +#include "sgx520defs.h"
8284 #if defined(SGX535_V1_1)
8285 #include "sgx535defs.h"
8292 #include "sgxerrata.h"
8293 #include "sgxfeaturedefs.h"
8294 diff -Nurd git/drivers/gpu/pvr/services4/srvkm/hwdefs/sgxerrata.h git/drivers/gpu/pvr/services4/srvkm/hwdefs/sgxerrata.h
8295 --- git/drivers/gpu/pvr/services4/srvkm/hwdefs/sgxerrata.h 2009-01-05 20:00:44.000000000 +0100
8296 +++ git/drivers/gpu/pvr/services4/srvkm/hwdefs/sgxerrata.h 2008-12-18 15:47:29.000000000 +0100
8299 #if SGX_CORE_REV == 120
8301 + #if SGX_CORE_REV == 121
8303 #if SGX_CORE_REV == SGX_CORE_REV_HEAD
8313 #define SGX_CORE_DEFINED
8315 #define FIX_HW_BRN_23281
8316 #define FIX_HW_BRN_23410
8317 #define FIX_HW_BRN_22693
8318 + #define FIX_HW_BRN_22997
8319 + #define FIX_HW_BRN_23030
8321 #if SGX_CORE_REV == 1111
8322 #define FIX_HW_BRN_23281
8323 #define FIX_HW_BRN_23410
8324 #define FIX_HW_BRN_22693
8325 + #define FIX_HW_BRN_22997
8326 + #define FIX_HW_BRN_23030
8328 #if SGX_CORE_REV == 112
8329 #define FIX_HW_BRN_23281
8330 #define FIX_HW_BRN_23410
8331 #define FIX_HW_BRN_22693
8332 + #define FIX_HW_BRN_22997
8333 + #define FIX_HW_BRN_23030
8335 #if SGX_CORE_REV == 113
8336 #define FIX_HW_BRN_23281
8337 diff -Nurd git/drivers/gpu/pvr/services4/srvkm/hwdefs/sgxfeaturedefs.h git/drivers/gpu/pvr/services4/srvkm/hwdefs/sgxfeaturedefs.h
8338 --- git/drivers/gpu/pvr/services4/srvkm/hwdefs/sgxfeaturedefs.h 2009-01-05 20:00:44.000000000 +0100
8339 +++ git/drivers/gpu/pvr/services4/srvkm/hwdefs/sgxfeaturedefs.h 2008-12-18 15:47:29.000000000 +0100
8342 ******************************************************************************/
8344 +#if defined(SGX520)
8345 + #define SGX_CORE_FRIENDLY_NAME "SGX520"
8346 + #define SGX_CORE_ID SGX_CORE_ID_520
8347 + #define SGX_FEATURE_ADDRESS_SPACE_SIZE (28)
8348 + #define SGX_FEATURE_AUTOCLOCKGATING
8351 #define SGX_CORE_FRIENDLY_NAME "SGX530"
8352 #define SGX_CORE_ID SGX_CORE_ID_530
8354 #define SGX_FEATURE_ADDRESS_SPACE_SIZE (32)
8355 #define SGX_FEATURE_MULTIPLE_MEM_CONTEXTS
8356 #define SGX_FEATURE_2D_HARDWARE
8357 - #define SGX_FEATURE_AUTOCLOCKGATING
8359 + #define SGX_FEATURE_AUTOCLOCKGATING
8365 diff -Nurd git/drivers/gpu/pvr/services4/srvkm/include/device.h git/drivers/gpu/pvr/services4/srvkm/include/device.h
8366 --- git/drivers/gpu/pvr/services4/srvkm/include/device.h 2009-01-05 20:00:44.000000000 +0100
8367 +++ git/drivers/gpu/pvr/services4/srvkm/include/device.h 2008-12-18 15:47:29.000000000 +0100
8368 @@ -225,39 +225,40 @@
8369 struct _PVRSRV_DEVICE_NODE_ *psNext;
8370 } PVRSRV_DEVICE_NODE;
8372 -PVRSRV_ERROR PVRSRVRegisterDevice(PSYS_DATA psSysData,
8373 - PVRSRV_ERROR (*pfnRegisterDevice)(PVRSRV_DEVICE_NODE*),
8374 - IMG_UINT32 ui32SOCInterruptBit,
8375 - IMG_UINT32 *pui32DeviceIndex );
8376 +PVRSRV_ERROR IMG_CALLCONV PVRSRVRegisterDevice(PSYS_DATA psSysData,
8377 + PVRSRV_ERROR (*pfnRegisterDevice)(PVRSRV_DEVICE_NODE*),
8378 + IMG_UINT32 ui32SOCInterruptBit,
8379 + IMG_UINT32 *pui32DeviceIndex );
8381 -PVRSRV_ERROR PVRSRVInitialiseDevice(IMG_UINT32 ui32DevIndex);
8382 +PVRSRV_ERROR IMG_CALLCONV PVRSRVInitialiseDevice(IMG_UINT32 ui32DevIndex);
8383 +PVRSRV_ERROR IMG_CALLCONV PVRSRVFinaliseSystem(IMG_BOOL bInitSuccesful);
8385 -PVRSRV_ERROR PVRSRVDeinitialiseDevice(IMG_UINT32 ui32DevIndex);
8386 +PVRSRV_ERROR IMG_CALLCONV PVRSRVDeinitialiseDevice(IMG_UINT32 ui32DevIndex);
8388 #if !defined(USE_CODE)
8390 -IMG_IMPORT PVRSRV_ERROR PollForValueKM(volatile IMG_UINT32* pui32LinMemAddr,
8391 - IMG_UINT32 ui32Value,
8392 - IMG_UINT32 ui32Mask,
8393 - IMG_UINT32 ui32Waitus,
8394 - IMG_UINT32 ui32Tries);
8395 +IMG_IMPORT PVRSRV_ERROR IMG_CALLCONV PollForValueKM(volatile IMG_UINT32* pui32LinMemAddr,
8396 + IMG_UINT32 ui32Value,
8397 + IMG_UINT32 ui32Mask,
8398 + IMG_UINT32 ui32Waitus,
8399 + IMG_UINT32 ui32Tries);
8404 #if defined (USING_ISR_INTERRUPTS)
8405 -PVRSRV_ERROR PollForInterruptKM(IMG_UINT32 ui32Value,
8406 +PVRSRV_ERROR IMG_CALLCONV PollForInterruptKM(IMG_UINT32 ui32Value,
8407 IMG_UINT32 ui32Mask,
8408 IMG_UINT32 ui32Waitus,
8409 IMG_UINT32 ui32Tries);
8413 -PVRSRV_ERROR PVRSRVInit(PSYS_DATA psSysData);
8414 -IMG_VOID PVRSRVDeInit(PSYS_DATA psSysData);
8415 -IMG_BOOL PVRSRVDeviceLISR(PVRSRV_DEVICE_NODE *psDeviceNode);
8416 -IMG_BOOL PVRSRVSystemLISR(IMG_VOID *pvSysData);
8417 -IMG_VOID PVRSRVMISR(IMG_VOID *pvSysData);
8418 +PVRSRV_ERROR IMG_CALLCONV PVRSRVInit(PSYS_DATA psSysData);
8419 +IMG_VOID IMG_CALLCONV PVRSRVDeInit(PSYS_DATA psSysData);
8420 +IMG_BOOL IMG_CALLCONV PVRSRVDeviceLISR(PVRSRV_DEVICE_NODE *psDeviceNode);
8421 +IMG_BOOL IMG_CALLCONV PVRSRVSystemLISR(IMG_VOID *pvSysData);
8422 +IMG_VOID IMG_CALLCONV PVRSRVMISR(IMG_VOID *pvSysData);
8424 #if defined(__cplusplus)
8426 diff -Nurd git/drivers/gpu/pvr/services4/srvkm/include/handle.h git/drivers/gpu/pvr/services4/srvkm/include/handle.h
8427 --- git/drivers/gpu/pvr/services4/srvkm/include/handle.h 2009-01-05 20:00:44.000000000 +0100
8428 +++ git/drivers/gpu/pvr/services4/srvkm/include/handle.h 2008-12-18 15:47:29.000000000 +0100
8430 PVRSRV_HANDLE_TYPE_DISP_BUFFER,
8431 PVRSRV_HANDLE_TYPE_BUF_BUFFER,
8432 PVRSRV_HANDLE_TYPE_SGX_HW_RENDER_CONTEXT,
8433 + PVRSRV_HANDLE_TYPE_SGX_HW_TRANSFER_CONTEXT,
8434 + PVRSRV_HANDLE_TYPE_SGX_HW_2D_CONTEXT,
8435 PVRSRV_HANDLE_TYPE_SHARED_PB_DESC,
8436 PVRSRV_HANDLE_TYPE_MEM_INFO_REF,
8437 PVRSRV_HANDLE_TYPE_SHARED_SYS_MEM_INFO,
8438 - PVRSRV_HANDLE_TYPE_SHARED_EVENT_OBJECT
8439 + PVRSRV_HANDLE_TYPE_SHARED_EVENT_OBJECT,
8440 + PVRSRV_HANDLE_TYPE_EVENT_OBJECT_CONNECT
8441 } PVRSRV_HANDLE_TYPE;
8444 @@ -126,6 +129,11 @@
8447 IMG_UINT32 ui32LastFreeIndexPlusOne;
8451 + IMG_BOOL bVmallocUsed;
8453 } PVRSRV_HANDLE_BASE;
8455 #ifdef PVR_SECURE_HANDLES
8456 diff -Nurd git/drivers/gpu/pvr/services4/srvkm/include/osfunc.h git/drivers/gpu/pvr/services4/srvkm/include/osfunc.h
8457 --- git/drivers/gpu/pvr/services4/srvkm/include/osfunc.h 2009-01-05 20:00:44.000000000 +0100
8458 +++ git/drivers/gpu/pvr/services4/srvkm/include/osfunc.h 2008-12-18 15:47:29.000000000 +0100
8459 @@ -148,14 +148,16 @@
8460 IMG_CHAR* OSStringCopy(IMG_CHAR *pszDest, const IMG_CHAR *pszSrc);
8461 IMG_INT32 OSSNPrintf(IMG_CHAR *pStr, IMG_UINT32 ui32Size, const IMG_CHAR *pszFormat, ...);
8462 #define OSStringLength(pszString) strlen(pszString)
8463 -PVRSRV_ERROR OSPowerManagerConnect(IMG_VOID);
8464 -PVRSRV_ERROR OSPowerManagerDisconnect(IMG_VOID);
8466 PVRSRV_ERROR OSEventObjectCreate(const IMG_CHAR *pszName,
8467 PVRSRV_EVENTOBJECT *psEventObject);
8468 PVRSRV_ERROR OSEventObjectDestroy(PVRSRV_EVENTOBJECT *psEventObject);
8469 PVRSRV_ERROR OSEventObjectSignal(IMG_HANDLE hOSEventKM);
8470 -PVRSRV_ERROR OSEventObjectWait(IMG_HANDLE hOSEventKM, IMG_UINT32 ui32MSTimeout);
8471 +PVRSRV_ERROR OSEventObjectWait(IMG_HANDLE hOSEventKM);
8472 +PVRSRV_ERROR OSEventObjectOpen(PVRSRV_EVENTOBJECT *psEventObject,
8473 + IMG_HANDLE *phOSEvent);
8474 +PVRSRV_ERROR OSEventObjectClose(PVRSRV_EVENTOBJECT *psEventObject,
8475 + IMG_HANDLE hOSEventKM);
8478 PVRSRV_ERROR OSBaseAllocContigMemory(IMG_UINT32 ui32Size, IMG_CPU_VIRTADDR *pLinAddr, IMG_CPU_PHYADDR *pPhysAddr);
8480 typedef IMG_VOID (*PFN_TIMER_FUNC)(IMG_VOID*);
8481 IMG_HANDLE OSAddTimer(PFN_TIMER_FUNC pfnTimerFunc, IMG_VOID *pvData, IMG_UINT32 ui32MsTimeout);
8482 PVRSRV_ERROR OSRemoveTimer (IMG_HANDLE hTimer);
8483 +PVRSRV_ERROR OSEnableTimer (IMG_HANDLE hTimer);
8484 +PVRSRV_ERROR OSDisableTimer (IMG_HANDLE hTimer);
8486 PVRSRV_ERROR OSGetSysMemSize(IMG_UINT32 *pui32Bytes);
8488 @@ -211,17 +215,17 @@
8489 HOST_PCI_INIT_FLAG_BUS_MASTER = 0x1,
8490 HOST_PCI_INIT_FLAG_FORCE_I32 = 0x7fffffff
8491 } HOST_PCI_INIT_FLAGS;
8492 -PVRSRV_ERROR OSPCIAcquireDev(IMG_VOID *pvSysData, IMG_UINT16 ui16VendorID, IMG_UINT16 ui16DeviceID, HOST_PCI_INIT_FLAGS eFlags);
8493 -PVRSRV_ERROR OSPCISetDev(IMG_VOID *pvSysData, IMG_VOID *pvPCICookie, HOST_PCI_INIT_FLAGS eFlags);
8494 -PVRSRV_ERROR OSPCIReleaseDev(IMG_VOID *pvSysData);
8495 -PVRSRV_ERROR OSPCIIRQ(IMG_VOID *pvSysData, IMG_UINT32 *pui32IRQ);
8496 -IMG_UINT32 OSPCIAddrRangeLen(IMG_VOID *pvSysData, IMG_UINT32 ui32Index);
8497 -IMG_UINT32 OSPCIAddrRangeStart(IMG_VOID *pvSysData, IMG_UINT32 ui32Index);
8498 -IMG_UINT32 OSPCIAddrRangeEnd(IMG_VOID *pvSysData, IMG_UINT32 ui32Index);
8499 -PVRSRV_ERROR OSPCIRequestAddrRange(IMG_VOID *pvSysData, IMG_UINT32 ui32Index);
8500 -PVRSRV_ERROR OSPCIReleaseAddrRange(IMG_VOID *pvSysData, IMG_UINT32 ui32Index);
8501 -PVRSRV_ERROR OSPCISuspendDev(IMG_VOID *pvSysData);
8502 -PVRSRV_ERROR OSPCIResumeDev(IMG_VOID *pvSysData);
8503 +IMG_HANDLE OSPCIAcquireDev(IMG_UINT16 ui16VendorID, IMG_UINT16 ui16DeviceID, HOST_PCI_INIT_FLAGS eFlags);
8504 +IMG_HANDLE OSPCISetDev(IMG_VOID *pvPCICookie, HOST_PCI_INIT_FLAGS eFlags);
8505 +PVRSRV_ERROR OSPCIReleaseDev(IMG_HANDLE hPVRPCI);
8506 +PVRSRV_ERROR OSPCIIRQ(IMG_HANDLE hPVRPCI, IMG_UINT32 *pui32IRQ);
8507 +IMG_UINT32 OSPCIAddrRangeLen(IMG_HANDLE hPVRPCI, IMG_UINT32 ui32Index);
8508 +IMG_UINT32 OSPCIAddrRangeStart(IMG_HANDLE hPVRPCI, IMG_UINT32 ui32Index);
8509 +IMG_UINT32 OSPCIAddrRangeEnd(IMG_HANDLE hPVRPCI, IMG_UINT32 ui32Index);
8510 +PVRSRV_ERROR OSPCIRequestAddrRange(IMG_HANDLE hPVRPCI, IMG_UINT32 ui32Index);
8511 +PVRSRV_ERROR OSPCIReleaseAddrRange(IMG_HANDLE hPVRPCI, IMG_UINT32 ui32Index);
8512 +PVRSRV_ERROR OSPCISuspendDev(IMG_HANDLE hPVRPCI);
8513 +PVRSRV_ERROR OSPCIResumeDev(IMG_HANDLE hPVRPCI);
8515 PVRSRV_ERROR OSScheduleMISR(IMG_VOID *pvSysData);
8517 diff -Nurd git/drivers/gpu/pvr/services4/srvkm/include/pdump_km.h git/drivers/gpu/pvr/services4/srvkm/include/pdump_km.h
8518 --- git/drivers/gpu/pvr/services4/srvkm/include/pdump_km.h 2009-01-05 20:00:44.000000000 +0100
8519 +++ git/drivers/gpu/pvr/services4/srvkm/include/pdump_km.h 2008-12-18 15:47:29.000000000 +0100
8521 void PDump3DSignatureRegisters(IMG_UINT32 ui32DumpFrameNum,
8522 IMG_BOOL bLastFrame);
8524 + IMG_VOID PDumpRegRead(const IMG_UINT32 dwRegOffset, IMG_UINT32 ui32Flags);
8526 IMG_VOID PDumpCycleCountRegRead(const IMG_UINT32 dwRegOffset, IMG_BOOL bLastFrame);
8528 void PDumpPerformanceCounterRegisters(IMG_UINT32 ui32DumpFrameNum,
8529 diff -Nurd git/drivers/gpu/pvr/services4/srvkm/include/resman.h git/drivers/gpu/pvr/services4/srvkm/include/resman.h
8530 --- git/drivers/gpu/pvr/services4/srvkm/include/resman.h 2009-01-05 20:00:44.000000000 +0100
8531 +++ git/drivers/gpu/pvr/services4/srvkm/include/resman.h 2008-12-18 15:47:29.000000000 +0100
8535 RESMAN_TYPE_SHARED_PB_DESC = 1,
8536 - RESMAN_TYPE_HW_RENDER_CONTEXT,
8537 + RESMAN_TYPE_HW_RENDER_CONTEXT,
8538 + RESMAN_TYPE_HW_TRANSFER_CONTEXT,
8539 + RESMAN_TYPE_HW_2D_CONTEXT,
8540 RESMAN_TYPE_TRANSFER_CONTEXT,
8544 RESMAN_TYPE_DEVICEMEM_WRAP,
8545 RESMAN_TYPE_DEVICEMEM_ALLOCATION,
8546 RESMAN_TYPE_RESOURCE_PERPROC_DATA,
8547 + RESMAN_TYPE_EVENT_OBJECT,
8548 RESMAN_TYPE_SHARED_MEM_INFO,
8551 diff -Nurd git/drivers/gpu/pvr/services4/srvkm/include/srvkm.h git/drivers/gpu/pvr/services4/srvkm/include/srvkm.h
8552 --- git/drivers/gpu/pvr/services4/srvkm/include/srvkm.h 2009-01-05 20:00:44.000000000 +0100
8553 +++ git/drivers/gpu/pvr/services4/srvkm/include/srvkm.h 2008-12-18 15:47:29.000000000 +0100
8558 -IMG_VOID PVRSRVSetDCState(IMG_UINT32 ui32State);
8559 +IMG_VOID IMG_CALLCONV PVRSRVSetDCState(IMG_UINT32 ui32State);
8561 -PVRSRV_ERROR PVRSRVSaveRestoreLiveSegments(IMG_HANDLE hArena, IMG_PBYTE pbyBuffer, IMG_UINT32 *puiBufSize, IMG_BOOL bSave);
8562 +PVRSRV_ERROR IMG_CALLCONV PVRSRVSaveRestoreLiveSegments(IMG_HANDLE hArena, IMG_PBYTE pbyBuffer, IMG_UINT32 *puiBufSize, IMG_BOOL bSave);
8564 #if defined (__cplusplus)
8566 diff -Nurd git/drivers/gpu/pvr/services4/srvkm/Makefile git/drivers/gpu/pvr/services4/srvkm/Makefile
8567 --- git/drivers/gpu/pvr/services4/srvkm/Makefile 2009-01-05 20:00:44.000000000 +0100
8568 +++ git/drivers/gpu/pvr/services4/srvkm/Makefile 1970-01-01 01:00:00.000000000 +0100
8571 -# Copyright(c) 2008 Imagination Technologies Ltd. All rights reserved.
8573 -# This program is free software; you can redistribute it and/or modify it
8574 -# under the terms and conditions of the GNU General Public License,
8575 -# version 2, as published by the Free Software Foundation.
8577 -# This program is distributed in the hope it will be useful but, except
8578 -# as otherwise stated in writing, without any warranty; without even the
8579 -# implied warranty of merchantability or fitness for a particular purpose.
8580 -# See the GNU General Public License for more details.
8582 -# You should have received a copy of the GNU General Public License along with
8583 -# this program; if not, write to the Free Software Foundation, Inc.,
8584 -# 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
8586 -# The full GNU General Public License is included in this distribution in
8587 -# the file called "COPYING".
8589 -# Contact Information:
8590 -# Imagination Technologies Ltd. <gpl-support@imgtec.com>
8591 -# Home Park Estate, Kings Langley, Herts, WD4 8LZ, UK
8595 -obj-y += env/linux/osfunc.o \
8596 - env/linux/mmap.o \
8598 - env/linux/pdump.o \
8599 - env/linux/proc.o \
8600 - env/linux/pvr_bridge_k.o \
8601 - env/linux/pvr_debug.o \
8605 -obj-y += common/buffer_manager.o \
8606 - common/devicemem.o \
8607 - common/deviceclass.o \
8610 - common/metrics.o \
8617 - bridged/bridged_pvr_bridge.o \
8618 - devices/sgx/sgxinit.o \
8619 - devices/sgx/sgxutils.o \
8620 - devices/sgx/sgxkick.o \
8621 - devices/sgx/sgxtransfer.o \
8622 - devices/sgx/mmu.o \
8623 - devices/sgx/pb.o \
8624 - common/perproc.o \
8625 - ../system/$(CONFIG_PVR_SYSTEM)/sysconfig.o \
8626 - ../system/$(CONFIG_PVR_SYSTEM)/sysutils.o \
8627 - devices/sgx/sgx2dcore.o
8629 -INCLUDES = -I$(src)/env/linux \
8630 - -I$(src)/include \
8631 - -I$(src)/bridged \
8632 - -I$(src)/devices/sgx \
8633 - -I$(src)/include \
8636 -ccflags-y += $(CONFIG_PVR_OPTS) $(INCLUDES)
8638 diff -Nurd git/drivers/gpu/pvr/services4/system/include/syscommon.h git/drivers/gpu/pvr/services4/system/include/syscommon.h
8639 --- git/drivers/gpu/pvr/services4/system/include/syscommon.h 2009-01-05 20:00:44.000000000 +0100
8640 +++ git/drivers/gpu/pvr/services4/system/include/syscommon.h 2008-12-18 15:47:29.000000000 +0100
8642 RA_ARENA *apsLocalDevMemArena[SYS_MAX_LOCAL_DEVMEM_ARENAS];
8644 IMG_CHAR *pszVersionString;
8645 + PVRSRV_EVENTOBJECT *psGlobalEventObject;
8650 PVRSRV_ERROR SysInitialise(IMG_VOID);
8651 +PVRSRV_ERROR SysFinalise(IMG_VOID);
8653 IMG_UINT32 GetCPUTranslatedAddress(IMG_VOID);
8655 diff -Nurd git/drivers/gpu/pvr/services4/system/omap3430/sysconfig.c git/drivers/gpu/pvr/services4/system/omap3430/sysconfig.c
8656 --- git/drivers/gpu/pvr/services4/system/omap3430/sysconfig.c 2009-01-05 20:00:44.000000000 +0100
8657 +++ git/drivers/gpu/pvr/services4/system/omap3430/sysconfig.c 2008-12-18 15:47:29.000000000 +0100
8658 @@ -360,8 +360,15 @@
8660 gsSysSpecificData.ui32SysSpecificData |= SYS_SPECIFIC_DATA_ENABLE_INITDEV;
8666 +PVRSRV_ERROR SysFinalise(IMG_VOID)
8668 #if defined(SYS_USING_INTERRUPTS)
8669 + PVRSRV_ERROR eError;
8671 eError = OSInstallMISR(gpsSysData);
8672 if (eError != PVRSRV_OK)
8674 @@ -388,12 +395,12 @@
8676 gpsSysData->pszVersionString = SysCreateVersionString(gsSGXDeviceMap.sRegsCpuPBase);
8677 if (!gpsSysData->pszVersionString)
8679 - PVR_DPF((PVR_DBG_ERROR,"SysInitialise: Failed to create a system version string"));
8681 + PVR_DPF((PVR_DBG_ERROR,"SysFinalise: Failed to create a system version string"));
8685 - PVR_DPF((PVR_DBG_WARNING, "SysInitialise: Version string: %s", gpsSysData->pszVersionString));
8686 + PVR_DPF((PVR_DBG_WARNING, "SysFinalise: Version string: %s", gpsSysData->pszVersionString));
8689 #if defined(SUPPORT_ACTIVE_POWER_MANAGEMENT)
8692 gsSysSpecificData.ui32SysSpecificData &= ~SYS_SPECIFIC_DATA_ENABLE_LISR;
8696 if (gsSysSpecificData.ui32SysSpecificData & SYS_SPECIFIC_DATA_ENABLE_SYSCLOCKS)
8698 DisableSystemClocks(gpsSysData);
8701 gsSysSpecificData.ui32SysSpecificData |= SYS_SPECIFIC_DATA_ENABLE_LISR;
8709 DisableSGXClocks(gpsSysData);
8712 - PVR_UNREFERENCED_PARAMETER(eNewPowerState);
8713 + PVR_UNREFERENCED_PARAMETER(eNewPowerState );
8717 @@ -718,12 +725,13 @@
8719 PVRSRV_ERROR eError = PVRSRV_OK;
8721 + PVR_UNREFERENCED_PARAMETER(eNewPowerState);
8723 if (ui32DeviceIndex != gui32SGXDeviceID)
8728 - PVR_UNREFERENCED_PARAMETER(eNewPowerState);
8730 #if defined(SUPPORT_ACTIVE_POWER_MANAGEMENT)
8731 if (eCurrentPowerState == PVRSRV_POWER_STATE_D3)
8734 PVR_UNREFERENCED_PARAMETER(eCurrentPowerState);
8741 diff -Nurd git/drivers/gpu/pvr/services4/system/omap3430/sysconfig.h git/drivers/gpu/pvr/services4/system/omap3430/sysconfig.h
8742 --- git/drivers/gpu/pvr/services4/system/omap3430/sysconfig.h 2009-01-05 20:00:44.000000000 +0100
8743 +++ git/drivers/gpu/pvr/services4/system/omap3430/sysconfig.h 2008-12-18 15:47:29.000000000 +0100
8746 #define SYS_OMAP3430_SGX_IRQ 21
8748 -#define SYS_OMAP3430_PM_REGS_SYS_PHYS_BASE 0x48306000
8749 -#define SYS_OMAP3430_PM_REGS_SIZE 0x1000
8751 -#define SYS_OMAP3430_CM_REGS_SYS_PHYS_BASE 0x48004000
8752 -#define SYS_OMAP3430_CM_REGS_SIZE 0x1000
8755 #define SYS_OMAP3430_GP11TIMER_ENABLE_SYS_PHYS_BASE 0x48088024
8756 #define SYS_OMAP3430_GP11TIMER_REGS_SYS_PHYS_BASE 0x48088028
8757 #define SYS_OMAP3430_GP11TIMER_TSICR_SYS_PHYS_BASE 0x48088040
8758 diff -Nurd git/drivers/gpu/pvr/services4/system/omap3430/sysutils.c git/drivers/gpu/pvr/services4/system/omap3430/sysutils.c
8759 --- git/drivers/gpu/pvr/services4/system/omap3430/sysutils.c 2009-01-05 20:00:44.000000000 +0100
8760 +++ git/drivers/gpu/pvr/services4/system/omap3430/sysutils.c 2008-12-18 15:47:29.000000000 +0100
8765 - PVR_DPF((PVR_DBG_ERROR, "EnableSGXClocks: Enabling SGX Clocks"));
8766 + PVR_TRACE(("EnableSGXClocks: Enabling SGX Clocks"));
8768 #if defined(__linux__)
8769 if (psSysSpecData->psSGX_FCK == IMG_NULL)
8770 --- /tmp/omaplfb_linux.c 2009-01-06 10:41:49.000000000 +0100
8771 +++ git/drivers/gpu/pvr/services4/3rdparty/dc_omap3430_linux/omaplfb_linux.c 2009-01-06 10:42:41.000000000 +0100
8773 (void) OMAPLFBVSyncIHandler(psSwapChain);
8776 +#define DISPC_IRQ_VSYNC 0x0002
8778 PVRSRV_ERROR OMAPLFBInstallVSyncISR(OMAPLFB_SWAPCHAIN *psSwapChain)
8781 --- /tmp/Makefile 2009-01-06 11:32:47.000000000 +0100
8782 +++ git/drivers/gpu/pvr/Makefile 2009-01-06 11:39:06.000000000 +0100
8784 services4/srvkm/env/linux/pvr_debug.o \
8785 services4/srvkm/env/linux/mm.o \
8786 services4/srvkm/env/linux/mutex.o \
8787 + services4/srvkm/env/linux/event.o \
8788 services4/srvkm/common/buffer_manager.o \
8789 services4/srvkm/common/devicemem.o \
8790 services4/srvkm/common/deviceclass.o \
8792 services4/srvkm/common/mem.o \
8793 services4/srvkm/bridged/bridged_pvr_bridge.o \
8794 services4/srvkm/devices/sgx/sgxinit.o \
8795 + services4/srvkm/devices/sgx/sgxreset.o \
8796 services4/srvkm/devices/sgx/sgxutils.o \
8797 services4/srvkm/devices/sgx/sgxkick.o \
8798 services4/srvkm/devices/sgx/sgxtransfer.o \