recipes/linux/linux-wrt-2.4.30/316-b44_mii_phy.patch

   1 --- linux-2.4.30.old/drivers/net/b44.c  2005-05-01 23:30:22.000000000 +0400
   2 +++ linux-2.4.30/drivers/net/b44.c      2005-05-10 16:51:24.410654488 +0400
   3 @@ -343,17 +343,14 @@
   4         bw32(B44_IMASK, bp->imask);
   5  }
   6
   7 -static int b44_readphy(struct b44 *bp, int reg, u32 *val)
   8 +static int __b44_readphy(struct b44 *bp, int phy_addr, int reg, u32 *val)
   9  {
  10         int err;
  11
  12 -       if (bp->phy_addr == B44_PHY_ADDR_NO_PHY)
  13 -               return 0;
  14 -
  15         bw32(B44_EMAC_ISTAT, EMAC_INT_MII);
  16         bw32(B44_MDIO_DATA, (MDIO_DATA_SB_START |
  17                              (MDIO_OP_READ << MDIO_DATA_OP_SHIFT) |
  18 -                            (bp->phy_addr << MDIO_DATA_PMD_SHIFT) |
  19 +                            (phy_addr << MDIO_DATA_PMD_SHIFT) |
  20                              (reg << MDIO_DATA_RA_SHIFT) |
  21                              (MDIO_TA_VALID << MDIO_DATA_TA_SHIFT)));
  22         err = b44_wait_bit(bp, B44_EMAC_ISTAT, EMAC_INT_MII, 100, 0);
  23 @@ -362,21 +359,34 @@
  24         return err;
  25  }
  26
  27 -static int b44_writephy(struct b44 *bp, int reg, u32 val)
  28 +static int b44_readphy(struct b44 *bp, int reg, u32 *val)
  29  {
  30         if (bp->phy_addr == B44_PHY_ADDR_NO_PHY)
  31                 return 0;
  32
  33 +       return __b44_readphy(bp, bp->phy_addr, reg, val);
  34 +}
  35 +
  36 +static int __b44_writephy(struct b44 *bp, int phy_addr, int reg, u32 val)
  37 +{
  38         bw32(B44_EMAC_ISTAT, EMAC_INT_MII);
  39         bw32(B44_MDIO_DATA, (MDIO_DATA_SB_START |
  40                              (MDIO_OP_WRITE << MDIO_DATA_OP_SHIFT) |
  41 -                            (bp->phy_addr << MDIO_DATA_PMD_SHIFT) |
  42 +                            (phy_addr << MDIO_DATA_PMD_SHIFT) |
  43                              (reg << MDIO_DATA_RA_SHIFT) |
  44                              (MDIO_TA_VALID << MDIO_DATA_TA_SHIFT) |
  45                              (val & MDIO_DATA_DATA)));
  46         return b44_wait_bit(bp, B44_EMAC_ISTAT, EMAC_INT_MII, 100, 0);
  47  }
  48
  49 +static int b44_writephy(struct b44 *bp, int reg, u32 val)
  50 +{
  51 +       if (bp->phy_addr == B44_PHY_ADDR_NO_PHY)
  52 +               return 0;
  53 +
  54 +       return __b44_writephy(bp, bp->phy_addr, reg, val);
  55 +}
  56 +
  57  static int b44_phy_reset(struct b44 *bp)
  58  {
  59         u32 val;
  60 @@ -1701,7 +1711,7 @@
  61                 u32 mii_regval;
  62
  63                 spin_lock_irq(&bp->lock);
  64 -               err = b44_readphy(bp, data->reg_num & 0x1f, &mii_regval);
  65 +               err = __b44_readphy(bp, data->phy_id & 0x1f, data->reg_num & 0x1f, &mii_regval);
  66                 spin_unlock_irq(&bp->lock);
  67
  68                 data->val_out = mii_regval;
  69 @@ -1714,7 +1724,7 @@
  70                         return -EPERM;
  71
  72                 spin_lock_irq(&bp->lock);
  73 -               err = b44_writephy(bp, data->reg_num & 0x1f, data->val_in);
  74 +               err = __b44_writephy(bp, data->phy_id & 0x1f, data->reg_num & 0x1f, data->val_in);
  75                 spin_unlock_irq(&bp->lock);
  76
  77                 return err;
  78 @@ -1919,6 +1929,11 @@
  79                 printk("%2.2x%c", dev->dev_addr[i],
  80                        i == 5 ? '\n' : ':');
  81
  82 +       /* Initialize phy */
  83 +       spin_lock_irq(&bp->lock);
  84 +       b44_chip_reset(bp);
  85 +       spin_unlock_irq(&bp->lock);
  86 +
  87         return 0;
  88
  89  err_out_iounmap: