1 diff -urN gcc-4.1.2/gcc/config/arm/arm.c ../../../../old-tmp/work/arm-oabi-angstrom-linux/gcc-cross-4.1.2-backup/gcc-4.1.2/gcc/config/arm/arm.c
2 --- gcc-4.1.2/gcc/config/arm/arm.c 2007-05-31 12:39:48.000000000 +1000
3 +++ gcc-4.1.2/gcc/config/arm/arm.c 2007-05-29 17:19:38.000000000 +1000
4 @@ -11427,26 +11427,53 @@
5 /* These encodings assume that AC=1 in the FPA system control
6 byte. This allows us to handle all cases except UNEQ and
10 - case GE: return ARM_GE;
11 - case GT: return ARM_GT;
12 - case LE: return ARM_LS;
13 - case LT: return ARM_MI;
14 - case NE: return ARM_NE;
15 - case EQ: return ARM_EQ;
16 - case ORDERED: return ARM_VC;
17 - case UNORDERED: return ARM_VS;
18 - case UNLT: return ARM_LT;
19 - case UNLE: return ARM_LE;
20 - case UNGT: return ARM_HI;
21 - case UNGE: return ARM_PL;
22 - /* UNEQ and LTGT do not have a representation. */
23 - case UNEQ: /* Fall through. */
24 - case LTGT: /* Fall through. */
25 - default: gcc_unreachable ();
28 + if (!TARGET_MAVERICK)
32 + case GE: return ARM_GE;
33 + case GT: return ARM_GT;
34 + case LE: return ARM_LS;
35 + case LT: return ARM_MI;
36 + case NE: return ARM_NE;
37 + case EQ: return ARM_EQ;
38 + case ORDERED: return ARM_VC;
39 + case UNORDERED: return ARM_VS;
40 + case UNLT: return ARM_LT;
41 + case UNLE: return ARM_LE;
42 + case UNGT: return ARM_HI;
43 + case UNGE: return ARM_PL;
44 + /* UNEQ and LTGT do not have a representation. */
45 + case UNEQ: /* Fall through. */
46 + case LTGT: /* Fall through. */
47 + default: gcc_unreachable ();
56 + case GT: return ARM_VS;
57 + case LE: return ARM_LE;
58 + case LT: return ARM_LT;
59 + case NE: return ARM_NE;
60 + case EQ: return ARM_EQ;
61 + case UNLE: return ARM_VC;
62 + case UNGT: return ARM_GT;
63 + case UNGE: return ARM_GE;
64 + case UNEQ: return ARM_PL;
65 + case LTGT: return ARM_MI;
66 + /* These do not have a representation. */
67 + case GE: /* Fall through. -UNGE wrong atm */
68 + case UNLT: /* Fall through. -LT wrong atm */
69 + case ORDERED: /* Fall through. -AL wrong atm */
70 + case UNORDERED: /* Fall through. -AL wrong atm */
72 + default: gcc_unreachable ();
78 diff -urN gcc-4.1.2/gcc/config/arm/arm.md ../../../../old-tmp/work/arm-oabi-angstrom-linux/gcc-cross-4.1.2-backup/gcc-4.1.2/gcc/config/arm/arm.md
79 --- gcc-4.1.2/gcc/config/arm/arm.md 2007-05-31 12:39:48.000000000 +1000
80 +++ gcc-4.1.2/gcc/config/arm/arm.md 2007-05-29 15:17:18.000000000 +1000
81 @@ -6952,10 +6952,11 @@
82 "operands[1] = arm_gen_compare_reg (LE, arm_compare_op0, arm_compare_op1);"
88 (if_then_else (ge (match_dup 1) (const_int 0))
89 (label_ref (match_operand 0 "" ""))
93 "operands[1] = arm_gen_compare_reg (GE, arm_compare_op0, arm_compare_op1);"
95 "operands[1] = arm_gen_compare_reg (LEU, arm_compare_op0, arm_compare_op1);"
101 (if_then_else (geu (match_dup 1) (const_int 0))
102 @@ -7031,14 +7033,15 @@
103 (if_then_else (ungt (match_dup 1) (const_int 0))
104 (label_ref (match_operand 0 "" ""))
106 - "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)"
107 + "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP || TARGET_MAVERICK)"
108 "operands[1] = arm_gen_compare_reg (UNGT, arm_compare_op0, arm_compare_op1);"
111 -(define_expand "bunlt"
113 +(define_expand "bunlt"
115 (if_then_else (unlt (match_dup 1) (const_int 0))
116 (label_ref (match_operand 0 "" ""))
118 - "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)"
119 + "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP || TARGET_MAVERICK)"
120 "operands[1] = arm_gen_compare_reg (UNLT, arm_compare_op0, arm_compare_op1);"
121 @@ -7049,7 +7052,7 @@
122 (if_then_else (unge (match_dup 1) (const_int 0))
123 (label_ref (match_operand 0 "" ""))
125 - "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)"
126 + "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP || TARGET_MAVERICK)"
127 "operands[1] = arm_gen_compare_reg (UNGE, arm_compare_op0, arm_compare_op1);"
130 @@ -7058,7 +7061,7 @@
131 (if_then_else (unle (match_dup 1) (const_int 0))
132 (label_ref (match_operand 0 "" ""))
134 - "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)"
135 + "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP || TARGET_MAVERICK)"
136 "operands[1] = arm_gen_compare_reg (UNLE, arm_compare_op0, arm_compare_op1);"
139 @@ -7069,7 +7072,7 @@
140 (if_then_else (uneq (match_dup 1) (const_int 0))
141 (label_ref (match_operand 0 "" ""))
143 - "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)"
144 + "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)" ;; || TARGET_MAVERICK
145 "operands[1] = arm_gen_compare_reg (UNEQ, arm_compare_op0, arm_compare_op1);"
148 @@ -7078,7 +7081,7 @@
149 (if_then_else (ltgt (match_dup 1) (const_int 0))
150 (label_ref (match_operand 0 "" ""))
152 - "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)"
153 + "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)" ;; || TARGET_MAVERICK
154 "operands[1] = arm_gen_compare_reg (LTGT, arm_compare_op0, arm_compare_op1);"
157 @@ -7086,7 +7089,7 @@
158 ;; Patterns to match conditional branch insns.
161 -; Special pattern to match UNEQ.
162 +; Special pattern to match UNEQ for FPA and VFP.
163 (define_insn "*arm_buneq"
165 (if_then_else (uneq (match_operand 1 "cc_register" "") (const_int 0))
166 @@ -7102,7 +7105,7 @@
167 (set_attr "length" "8")]
170 -; Special pattern to match LTGT.
171 +; Special pattern to match LTGT for FPA and VFP.
172 (define_insn "*arm_bltgt"
174 (if_then_else (ltgt (match_operand 1 "cc_register" "") (const_int 0))
175 @@ -7118,6 +7121,38 @@
176 (set_attr "length" "8")]
179 +; Special pattern to match GE for MAVERICK.
180 +(define_insn "*arm_bge"
182 + (if_then_else (ge (match_operand 1 "cc_register" "") (const_int 0))
183 + (label_ref (match_operand 0 "" ""))
185 + "TARGET_ARM && (TARGET_MAVERICK)"
187 + gcc_assert (!arm_ccfsm_state);
189 + return \"beq\\t%l0\;bvs\\t%l0\";
191 + [(set_attr "conds" "jump_clob")
192 + (set_attr "length" "8")]
195 +; Special pattern to match UNLT for MAVERICK.
196 +(define_insn "*arm_bunlt"
198 + (if_then_else (unlt (match_operand 1 "cc_register" "") (const_int 0))
199 + (label_ref (match_operand 0 "" ""))
201 + "TARGET_ARM && (TARGET_MAVERICK)"
203 + gcc_assert (!arm_ccfsm_state);
205 + return \"bne\\t%l0\;bvc\\t%l0\";
207 + [(set_attr "conds" "jump_clob")
208 + (set_attr "length" "8")]
211 (define_insn "*arm_cond_branch"
213 (if_then_else (match_operator 1 "arm_comparison_operator"
214 @@ -7137,7 +7172,7 @@
215 (set_attr "type" "branch")]
218 -; Special pattern to match reversed UNEQ.
219 +; Special pattern to match reversed UNEQ for FPA and VFP.
220 (define_insn "*arm_buneq_reversed"
222 (if_then_else (uneq (match_operand 1 "cc_register" "") (const_int 0))
223 @@ -7153,7 +7188,7 @@
224 (set_attr "length" "8")]
227 -; Special pattern to match reversed LTGT.
228 +; Special pattern to match reversed LTGT for FPA and VFP.
229 (define_insn "*arm_bltgt_reversed"
231 (if_then_else (ltgt (match_operand 1 "cc_register" "") (const_int 0))
232 @@ -7169,6 +7204,39 @@
233 (set_attr "length" "8")]
236 +; Special pattern to match reversed GE for MAVERICK.
237 +(define_insn "*arm_bge_reversed"
239 + (if_then_else (ge (match_operand 1 "cc_register" "") (const_int 0))
241 + (label_ref (match_operand 0 "" ""))))]
242 + "TARGET_ARM && (TARGET_MAVERICK)"
244 + gcc_assert (!arm_ccfsm_state);
246 + return \"bne\\t%l0\;bvc\\t%l0\";
248 + [(set_attr "conds" "jump_clob")
249 + (set_attr "length" "8")]
252 +; Special pattern to match reversed UNLT for MAVERICK.
253 +(define_insn "*arm_bunlt_reversed"
255 + (if_then_else (unlt (match_operand 1 "cc_register" "") (const_int 0))
257 + (label_ref (match_operand 0 "" ""))))]
258 + "TARGET_ARM && (TARGET_MAVERICK)"
260 + gcc_assert (!arm_ccfsm_state);
262 + return \"beq\\t%l0\;bvs\\t%l0\";
264 + [(set_attr "conds" "jump_clob")
265 + (set_attr "length" "8")]
269 (define_insn "*arm_cond_branch_reversed"
271 (if_then_else (match_operator 1 "arm_comparison_operator"
272 @@ -7220,8 +7288,9 @@
273 "operands[1] = arm_gen_compare_reg (LE, arm_compare_op0, arm_compare_op1);"
276 +;; broken for cirrus - definitely
278 [(set (match_operand:SI 0 "s_register_operand" "")
279 (ge:SI (match_dup 1) (const_int 0)))]
281 + "TARGET_ARM && !(TARGET_HARD_FLOAT && TARGET_MAVERICK)"
282 "operands[1] = arm_gen_compare_reg (GE, arm_compare_op0, arm_compare_op1);"
283 @@ -7227,6 +7296,14 @@
284 "operands[1] = arm_gen_compare_reg (GE, arm_compare_op0, arm_compare_op1);"
287 +;;; DO NOT add patterns for SGE these can not be represented with MAVERICK
288 +; (define_expand "sge"
289 +; [(set (match_operand:SI 0 "s_register_operand" "")
290 +; (ge:SI (match_dup 1) (const_int 0)))]
291 +; "TARGET_ARM && (TARGET_MAVERICK)"
292 +; "gcc_unreachable ();"
296 [(set (match_operand:SI 0 "s_register_operand" "")
297 (lt:SI (match_dup 1) (const_int 0)))]
298 @@ -7248,6 +7325,7 @@
299 "operands[1] = arm_gen_compare_reg (LEU, arm_compare_op0, arm_compare_op1);"
302 +;; broken for cirrus - maybe
303 (define_expand "sgeu"
304 [(set (match_operand:SI 0 "s_register_operand" "")
305 (geu:SI (match_dup 1) (const_int 0)))]
306 @@ -7255,6 +7333,14 @@
307 "operands[1] = arm_gen_compare_reg (GEU, arm_compare_op0, arm_compare_op1);"
310 +;;; DO NOT add patterns for SGEU these may not be represented with MAVERICK?
311 +; (define_expand "sgeu"
312 +; [(set (match_operand:SI 0 "s_register_operand" "")
313 +; (ge:SI (match_dup 1) (const_int 0)))]
314 +; "TARGET_ARM && (TARGET_MAVERICK)"
315 +; "gcc_unreachable ();"
318 (define_expand "sltu"
319 [(set (match_operand:SI 0 "s_register_operand" "")
320 (ltu:SI (match_dup 1) (const_int 0)))]
321 @@ -7281,7 +7367,7 @@
322 (define_expand "sungt"
323 [(set (match_operand:SI 0 "s_register_operand" "")
324 (ungt:SI (match_dup 1) (const_int 0)))]
325 - "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)"
326 + "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP || TARGET_MAVERICK)"
327 "operands[1] = arm_gen_compare_reg (UNGT, arm_compare_op0,
330 @@ -7289,23 +7375,32 @@
331 (define_expand "sunge"
332 [(set (match_operand:SI 0 "s_register_operand" "")
333 (unge:SI (match_dup 1) (const_int 0)))]
334 - "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)"
335 + "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP || TARGET_MAVERICK)"
336 "operands[1] = arm_gen_compare_reg (UNGE, arm_compare_op0,
341 (define_expand "sunlt"
342 [(set (match_operand:SI 0 "s_register_operand" "")
343 (unlt:SI (match_dup 1) (const_int 0)))]
344 - "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)"
345 + "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)"
346 "operands[1] = arm_gen_compare_reg (UNLT, arm_compare_op0,
350 +;;; DO NOT add patterns for SUNLT these can't be represented with MAVERICK
351 +; (define_expand "sunlt"
352 +; [(set (match_operand:SI 0 "s_register_operand" "")
353 +; (unlt:SI (match_dup 1) (const_int 0)))]
354 +; "TARGET_ARM && (TARGET_MAVERICK)"
355 +; "gcc_unreachable ();"
358 (define_expand "sunle"
359 [(set (match_operand:SI 0 "s_register_operand" "")
360 (unle:SI (match_dup 1) (const_int 0)))]
361 - "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)"
362 + "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP || TARGET_MAVERICK)"
363 "operands[1] = arm_gen_compare_reg (UNLE, arm_compare_op0,
366 @@ -7371,7 +7466,7 @@
367 enum rtx_code code = GET_CODE (operands[1]);
370 - if (code == UNEQ || code == LTGT)
371 + if (code == UNEQ || code == LTGT || code == GE || code == UNLT || code == ORDERED || code == UNORDERED)
374 ccreg = arm_gen_compare_reg (code, arm_compare_op0, arm_compare_op1);
375 @@ -7390,7 +7485,8 @@
376 enum rtx_code code = GET_CODE (operands[1]);
379 - if (code == UNEQ || code == LTGT)
380 + if (code == UNEQ || code == LTGT || code == GE || code == UNLT || code == ORDERED || code == UNORDERED)
384 /* When compiling for SOFT_FLOAT, ensure both arms are in registers.
385 @@ -7409,13 +7505,13 @@
386 (if_then_else:DF (match_operand 1 "arm_comparison_operator" "")
387 (match_operand:DF 2 "s_register_operand" "")
388 (match_operand:DF 3 "arm_float_add_operand" "")))]
389 - "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)"
390 + "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP || TARGET_MAVERICK)"
393 enum rtx_code code = GET_CODE (operands[1]);
396 - if (code == UNEQ || code == LTGT)
397 + if (code == UNEQ || code == LTGT || code == GE || code == UNLT || code == ORDERED || code == UNORDERED)
400 ccreg = arm_gen_compare_reg (code, arm_compare_op0, arm_compare_op1);