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riscv: Add support for SPI on Kendryte K210
2021-01-18
Sean Anderson
riscv: Add support for SPI on Kendryte K210
Reviewed-by: Rick Chen <rick@
andes
tech.com>
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2021-01-18
Atish Patra
doc: qemu-riscv: Fix opensbi build instructions
Reviewed-by: Rick Chen <rick@
andes
tech.com>
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2020-12-14
Leo Yu-Chi Liang
riscv: Complete efi header for RV32/64
...by: Leo Yu-Chi Liang <ycliang@
andes
tech.com>
Cc: rick@
andes
tech.com
Cc: alankao@
andes
tech.com
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2020-12-14
Leo Yu-Chi Liang
riscv: Fix efi header size for RV32
...by: Leo Yu-Chi Liang <ycliang@
andes
tech.com>
Cc: rick@
andes
tech.com
Cc: alankao@
andes
tech.com
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2020-12-14
Atish Patra
riscv: Fix efi header for RV32
Reviewed-by: Rick Chen <rick@
andes
tech.com>
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2020-12-14
Heinrich Schuchardt
riscv: qemu: enable distro boot from scsi
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2020-12-14
Heinrich Schuchardt
riscv: reset after crash
Reviewed-by: Rick Chen <rick@
andes
tech.com>
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2020-12-14
Brad Kim
riscv: fix the wrong swap value register
Reviewed-by: Leo Liang <ycliang@
andes
tech.com>
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2020-11-17
Sean Anderson
pinctrl: k210: Rename power domains to match datasheet
Reviewed-by: Rick Chen <rick@
andes
tech.com>
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2020-11-17
Sean Anderson
pinctrl: k210: Fix inverted IE and OE for I2C
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2020-11-17
Heinrich Schuchardt
doc: qemu-riscv: describe attaching a disk image
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2020-11-17
Heinrich Schuchardt
riscv: enable SATA disk on QEMU RISC-V
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2020-11-17
Heinrich Schuchardt
riscv: sort SPECIFIC_OPTIONS
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2020-10-26
Pragnesh Patel
riscv: fu540: dts: Correct reg size of clint node
Reviewed-by: Rick Chen <rick@
andes
tech.com>
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2020-10-26
Sean Anderson
riscv: Move timer portions of SiFive CLINT to drivers...
Reviewed-by: Rick Chen <rick@
andes
tech.com>
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2020-10-26
Sean Anderson
timer: Add _TIMER suffix to Andes PLMT Kconfig
timer: Add _TIMER suffix to
Andes
PLMT Kconfig
Reviewed-by: Rick Chen <rick@
andes
tech.com>
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2020-10-26
Sean Anderson
riscv: Move Andes PLMT driver to drivers/timer
riscv: Move
Andes
PLMT driver to drivers/timer
Reviewed-by: Rick Chen <rick@
andes
tech.com>
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2020-10-26
Sean Anderson
riscv: k210: Reduce DMA block size
Reviewed-by: Rick Chen <rick@
andes
tech.com>
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2020-10-26
Sean Anderson
riscv: Only enable OF_BOARD_FIXUP for S-Mode
Reviewed-by: Leo Liang <ycliang@
andes
tech.com>
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2020-10-26
Heinrich Schuchardt
clk: kendryte: no need to check argument of free()
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2020-09-30
Sean Anderson
riscv: Add some comments to start.S
Reviewed-by: Rick Chen <rick@
andes
tech.com>
Reviewed-by: Leo Liang <ycliang@
andes
tech.com>
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2020-09-30
Sean Anderson
riscv: Ensure gp is NULL or points to valid data
Reviewed-by: Rick Chen <rick@
andes
tech.com>
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2020-09-30
Sean Anderson
riscv: Consolidate fences into AMOs for available_harts_lock
Reviewed-by: Rick Chen <rick@
andes
tech.com>
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2020-09-30
Sean Anderson
riscv: Clear pending IPIs on initialization
Reviewed-by: Rick Chen <rick@
andes
tech.com>
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2020-09-30
Sean Anderson
riscv: Use a valid bit to ignore already-pending IPIs
Reviewed-by: Rick Chen <rick@
andes
tech.com>
Reviewed-by: Leo Liang <ycliang@
andes
tech.com>
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2020-09-30
Sean Anderson
riscv: Match memory barriers between send_ipi_many...
Reviewed-by: Rick Chen <rick@
andes
tech.com>
Reviewed-by: Leo Liang <ycliang@
andes
tech.com>
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2020-09-30
Sean Anderson
Revert "riscv: Clear pending interrupts before enabling...
Reviewed-by: Rick Chen <rick@
andes
tech.com>
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2020-09-30
Sean Anderson
riscv: Update SiFive device tree for new CLINT driver
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2020-09-30
Sean Anderson
riscv: Update Kendryte device tree for new CLINT driver
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2020-09-30
Sean Anderson
riscv: clk: Add CLINT clock to kendryte clock driver
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2020-09-30
Sean Anderson
riscv: Rework Sifive CLINT as UCLASS_TIMER driver
Unlike
Andes
's PLMT/PLIC (which AFAIK never...
Unlike with the
Andes
PLMT, the Sifive CLINT is also...
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2020-09-30
Sean Anderson
riscv: Clean up initialization in Andes PLIC
riscv: Clean up initialization in
Andes
PLIC
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2020-09-30
Sean Anderson
riscv: Rework Andes PLMT as a UCLASS_TIMER driver
riscv: Rework
Andes
PLMT as a UCLASS_TIMER driver
Reviewed-by: Rick Chen <rick@
andes
tech.com>
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2020-09-30
Sean Anderson
timer: Add a test for timer_timebase_fallback
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2020-09-30
Sean Anderson
timer: Add helper for drivers using timebase fallback
Reviewed-by: Rick Chen <rick@
andes
tech.com>
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2020-09-30
Sean Anderson
riscv: Rework riscv timer driver to only support S...
Reviewed-by: Rick Chen <rick@
andes
tech.com>
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2020-09-30
Bin Meng
ram: sifive: Remove regmap dependency
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2020-09-30
Bin Meng
ram: sifive: Check return value on clk_enable()
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2020-09-30
Heinrich Schuchardt
doc/sipeed/maix: describe RESET and BOOT button
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2020-09-30
Heinrich Schuchardt
doc: correct kflash settings for Maix One Dock
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2020-09-30
Pragnesh Patel
cmd: irq: disable CMD_IRQ for riscv arch
Reviewed-by: Rick Chen <rick@
andes
tech.com>
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2020-08-25
Heinrich Schuchardt
cmd: provide command sbi
Reviewed-by: Rick Chen <rick@
andes
tech.com>
Tested-by: Rick Chen <rick@
andes
tech.com>
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2020-08-25
Heinrich Schuchardt
configs: defconfig for Sipeed Maix in S-mode
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2020-08-25
Heinrich Schuchardt
riscv: fix building with CONFIG_SPL_SMP=n
Reviewed-by: Rick Chen <rick@
andes
tech.com>
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2020-08-25
Heinrich Schuchardt
clk: kendryte/pll.h: do not redefine nop()
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2020-08-25
Bin Meng
ram: sifive: Fix compiler warnings for 32-bit
Reviewed-by: Rick Chen <rick@
andes
tech.com>
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2020-08-25
Bin Meng
riscv: fu540: Use correct API to get L2 cache controller...
Reviewed-by: Rick Chen <rick@
andes
tech.com>
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2020-08-14
Pragnesh Patel
common/board_f: make sure to call fix_fdt() before...
Reviewed-by: Rick Chen <rick@
andes
tech.com>
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2020-08-14
Heinrich Schuchardt
riscv: additional crash information
Reviewed-by: Rick Chen <rick@
andes
tech.com>
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2020-08-14
Heinrich Schuchardt
cmd: exception: unaligned data access on RISC-V
Reviewed-by: Rick Chen <rick@
andes
tech.com>
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2020-08-14
Heinrich Schuchardt
doc: riscv: debug UART for MAIX
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2020-08-14
Heinrich Schuchardt
doc: riscv: Update documentation for Sipeed MAIX boards
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2020-08-14
Heinrich Schuchardt
riscv: sifive: fu540: redundant initialization
Reviewed-by: Rick Chen <rick@
andes
tech.com>
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2020-08-14
Heinrich Schuchardt
riscv: remove redundant logical constraint.
Reviewed-by: Rick Chen <rick@
andes
tech.com>
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2020-08-14
Bin Meng
riscv: sifive/fu540: Move SPL related functions to...
Reviewed-by: Leo Liang <ycliang@
andes
tech.com>
Reviewed-by: Rick Chen <rick@
andes
tech.com>
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2020-08-14
Bin Meng
riscv: sifive/fu540: Drop NET_RANDOM_ETHADDR
Reviewed-by: Leo Liang <ycliang@
andes
tech.com>
Reviewed-by: Rick Chen <rick@
andes
tech.com>
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2020-08-14
Bin Meng
riscv: sifive/fu540: kconfig: Move FU540 driver related...
Reviewed-by: Rick Chen <rick@
andes
tech.com>
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2020-08-14
Bin Meng
riscv: sifive/fu540: spl: Rename soc_spl_init()
Reviewed-by: Rick Chen <rick@
andes
tech.com>
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2020-08-14
Bin Meng
riscv: sifive/fu540: spl: Drop our own version of board_init_f()
Reviewed-by: Rick Chen <rick@
andes
tech.com>
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2020-08-14
Bin Meng
riscv: Call spl_board_init_f() in the generic SPL board_init_f()
Reviewed-by: Rick Chen <rick@
andes
tech.com>
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2020-08-04
Sagar Shrikant Kadam
configs: reset: fu540: enable dm reset framework for...
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2020-08-04
Sagar Shrikant Kadam
sifive: reset: add DM based reset driver for SiFive...
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2020-08-04
Sagar Shrikant Kadam
fu540: dtsi: add reset producer and consumer entries
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2020-08-04
Sagar Shrikant Kadam
fu540: prci: use common reset indexes defined in binding...
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2020-08-04
Sagar Shrikant Kadam
dt-bindings: prci: add indexes for reset signals available...
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2020-07-24
Bin Meng
ram: sifive: Avoid using hardcoded ram base and size
Reviewed-by: Leo Liang <ycliang@
andes
tech.com>
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2020-07-24
Bin Meng
riscv: dts: hifive-unleashed-a00: Make memory node...
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2020-07-24
Rick Chen
riscv: ae350: Use fdtdec_get_addr_size_auto_noparent...
Signed-off-by: Rick Chen <rick@
andes
tech.com>
Acked-by: Leo Liang <ycliang@
andes
tech.com>
Tested-by: Leo Liang <ycliang@
andes
tech.com>
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2020-07-24
Leo Yu-Chi Liang
riscv: Fix linking error when building u-boot-spl with...
Signed-off by: Leo Liang <ycliang@
andes
tech.com>
Cc: rick@
andes
tech.com
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2020-07-24
Michal Simek
serial: Fix SIFIVE debug serial dependency
Reviewed-by: Leo Liang <ycliang@
andes
tech.com>
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2020-07-24
Bin Meng
riscv: qemu: Add syscon reboot and poweroff support
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2020-07-24
Bin Meng
sysreset: syscon: Support value property
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2020-07-24
Bin Meng
sysreset: syscon: Don't assume default value for offset...
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2020-07-24
Bin Meng
Revert "Revert "riscv: sifive: fu540: Add gpio-restart...
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2020-07-24
Bin Meng
Revert "riscv: Allow use of reset drivers"
Reviewed-by: Leo Liang <ycliang@
andes
tech.com>
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2020-07-24
Bin Meng
azure: gitlab: travis: Update OpenSBI used for RISC...
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2020-07-24
Jagan Teki
sifive: fu540: Enable SF distro bootcmd
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2020-07-24
Jagan Teki
sifive: fu540: Add boot flash script offset, size
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2020-07-24
Jagan Teki
sifive: fu540: Mark the default env as SPI flash
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2020-07-24
Jagan Teki
env: Enable SPI flash env for SiFive FU540
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2020-07-24
Jagan Teki
sifive: fu540: Add Booting from SPI
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2020-07-24
Jagan Teki
sifive: fu540: Add runtime boot mode detection
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2020-07-24
Pragnesh Patel
riscv: sifive: fu540: Enable SiFive PWM driver
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2020-07-24
Bin Meng
riscv: Make SiFive HiFive Unleashed board boot again
Tested-by: Leo Liang <ycliang@
andes
tech.com>
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2020-07-03
Heinrich Schuchardt
riscv: use log functions in fdt_fixup
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2020-07-03
Pragnesh Patel
riscv: sifive: fu540: enable all cache ways from U...
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2020-07-03
Atish Patra
riscv: Use optimized version of fdtdec_get_addr_size_no_parent
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2020-07-03
Atish Patra
riscv: Do not return error if reserved node already...
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2020-07-03
Bin Meng
doc: qemu-riscv: Update QEMU run command
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2020-07-03
Bin Meng
riscv: sifive: fu540: Add gpio-restart support
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2020-07-03
Bin Meng
riscv: Do not build reset.c if SYSRESET is on
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2020-07-02
Bin Meng
riscv: Enable CONFIG_OF_BOARD_FIXUP by default for...
Reviewed-by: Rick Chen <rick@
andes
tech.com>
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2020-07-02
Bin Meng
riscv: Expand the DT size before copy reserved memory...
Reported-by: Rick Chen <rick@
andes
tech.com>
Reviewed-by: Rick Chen <rick@
andes
tech.com>
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2020-07-02
Bin Meng
riscv: Avoid the reserved memory fixup if src and dst...
Reviewed-by: Rick Chen <rick@
andes
tech.com>
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2020-07-02
Bin Meng
riscv: fu540: dts: Correct reg size of otp and dmc...
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2020-07-02
Bin Meng
riscv: fu540: dts: Remove the unnecessary space in...
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2020-07-02
Sean Anderson
riscv: sbi: Add newline to error message
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2020-07-01
Sagar Shrikant Kadam
riscv: cpu: check and append L1 cache to cpu features
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2020-07-01
Sagar Shrikant Kadam
riscv: cpu: correctly handle the setting of CPU_FEAT_MMU bit
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2020-07-01
Sagar Shrikant Kadam
uclass: cpu: fix to display proper CPU features
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