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ARM: perf: remove confusing comment from v7 perf events backend
2011-07-07 Will DeaconARM: perf: remove confusing comment from v7 perf events...
Signed-off-by: Will Deacon <will.deacon@arm.com>
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2011-07-07 Will DeaconARM: proc: add proc info for Cortex-A15MP using classic...
Signed-off-by: Will Deacon <will.deacon@arm.com>
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2011-07-07 Pawel MollARM: proc: add Cortex-A5 proc info
Signed-off-by: Will Deacon <will.deacon@arm.com>
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2011-07-07 Pawel MollARM: proc: convert v7 proc infos into a common macro
Signed-off-by: Will Deacon <will.deacon@arm.com>
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2011-07-07 Will DeaconARM: vfp: add VFPv4 capability detection and populate...
Signed-off-by: Will Deacon <will.deacon@arm.com>
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2011-07-07 Will DeaconARM: hwcaps: add new HWCAP defines for ARMv7-A
Signed-off-by: Will Deacon <will.deacon@arm.com>
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2011-07-07 Will DeaconARM: hwcaps: use shifts instead of hardcoded constants
Signed-off-by: Will Deacon <will.deacon@arm.com>
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2011-07-07 Will DeaconMerge branch 'arm/proc-macros' of git://git.linaro...
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2011-05-11 Santosh ShilimkarARM: GIC: Convert GIC library to use the IO relaxed...
Cc: Will Deacon <will.deacon@arm.com>
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2011-05-11 Will DeaconARM: gic: use handle_fasteoi_irq for SPIs
Signed-off-by: Will Deacon <will.deacon@arm.com>
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2011-05-11 Colin CrossARM: tegra: irq: Add tegra_eoi
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2011-05-11 Colin CrossARM: tegra: irq: Move legacy_irq.c into irq.c
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2011-05-11 Colin CrossARM: tegra: irq: Remove PM support
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2011-05-11 Colin CrossARM: tegra: irq: convert to gic arch extensions
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2011-05-11 Will DeaconARM: tegra: update GPIO chained IRQ handler to use...
Signed-off-by: Will Deacon <will.deacon@arm.com>
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2011-05-11 Will DeaconARM: nmk: update GPIO chained IRQ handler to entry...
Signed-off-by: Will Deacon <will.deacon@arm.com>
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2011-05-11 Will DeaconARM: msm: update GPIO chained IRQ handler to use entry...
Signed-off-by: Will Deacon <will.deacon@arm.com>
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2011-05-11 Will DeaconARM: s5pv310: update IRQ combiner to use chained entry...
Signed-off-by: Will Deacon <will.deacon@arm.com>
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2011-05-11 Will DeaconARM: omap: update GPIO chained IRQ handler to use entry...
Signed-off-by: Will Deacon <will.deacon@arm.com>
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2010-12-15 Will DeaconARM: hw_breakpoint: do not fail initcall if monitor...
Signed-off-by: Will Deacon <will.deacon@arm.com>
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2010-12-06 Will DeaconARM: hw_breakpoint: fix warnings generated by sparse
Signed-off-by: Will Deacon <will.deacon@arm.com>
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2010-12-06 Will DeaconARM: ptrace: fix style issue with hw_breakpoint interface
Signed-off-by: Will Deacon <will.deacon@arm.com>
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2010-12-06 Will DeaconARM: hw_breakpoint: disallow per-cpu breakpoints without...
Signed-off-by: Will Deacon <will.deacon@arm.com>
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2010-12-06 Will DeaconARM: hw_breakpoint: unify single-stepping code for...
Signed-off-by: Will Deacon <will.deacon@arm.com>
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2010-12-06 Will DeaconARM: hw_breakpoint: do not allocate new breakpoints...
Signed-off-by: Will Deacon <will.deacon@arm.com>
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2010-12-06 Will DeaconARM: hw_breakpoint: don't advertise reserved breakpoints
Signed-off-by: Will Deacon <will.deacon@arm.com>
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2010-12-06 Will DeaconARM: hw_breakpoint: disable preemption during debug...
Signed-off-by: Will Deacon <will.deacon@arm.com>
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2010-12-06 Will DeaconARM: hw_breakpoint: correct and simplify alignment...
Signed-off-by: Will Deacon <will.deacon@arm.com>
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2010-12-06 Will DeaconARM: hw_breakpoint: reset control registers in hotplug...
Signed-off-by: Will Deacon <will.deacon@arm.com>
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2010-12-06 Will DeaconARM: hw_breakpoint: ensure OS lock is clear before...
Signed-off-by: Will Deacon <will.deacon@arm.com>
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2010-11-25 Will DeaconARM: perf: separate PMU backends into multiple files
Signed-off-by: Will Deacon <will.deacon@arm.com>
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2010-11-25 Will DeaconARM: perf: encode PMU name in arm_pmu structure
Signed-off-by: Will Deacon <will.deacon@arm.com>
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2010-11-25 Will DeaconARM: perf: add _init() functions to PMUs
Signed-off-by: Will Deacon <will.deacon@arm.com>
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2010-11-25 Will DeaconARM: perf: avoid exposing internal stop function for...
Signed-off-by: Will Deacon <will.deacon@arm.com>
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2010-11-25 Will DeaconARM: perf: consolidate common PMU behaviour
Signed-off-by: Will Deacon <will.deacon@arm.com>
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