struct dentry *dentry;
struct clk_mapping *mapping;
struct cpufreq_frequency_table *freq_table;
+ unsigned int nr_freqs;
};
#define CLK_ENABLE_ON_INIT (1 << 0)
struct cpufreq_frequency_table *freq_table,
unsigned long rate);
+long clk_rate_div_range_round(struct clk *clk, unsigned int div_min,
+ unsigned int div_max, unsigned long rate);
+
#define SH_CLK_MSTP32(_parent, _enable_reg, _enable_bit, _flags) \
{ \
.parent = _parent, \