mmc: core: support HPI send command

[pandora-kernel.git] / include / linux / mmc / mmc.h

diff --git a/include/linux/mmc/mmc.h b/include/linux/mmc/mmc.h
index ed8fca8..0e71356 100644 (file)
--- a/include/linux/mmc/mmc.h
+++ b/include/linux/mmc/mmc.h
@@ -270,19 +270,31 @@ struct _mmc_csd {
  * EXT_CSD fields
  */
 
+#define EXT_CSD_FLUSH_CACHE            32      /* W */
+#define EXT_CSD_CACHE_CTRL             33      /* R/W */
+#define EXT_CSD_POWER_OFF_NOTIFICATION 34      /* R/W */
+#define EXT_CSD_GP_SIZE_MULT           143     /* R/W */
 #define EXT_CSD_PARTITION_ATTRIBUTE    156     /* R/W */
 #define EXT_CSD_PARTITION_SUPPORT      160     /* RO */
+#define EXT_CSD_HPI_MGMT               161     /* R/W */
 #define EXT_CSD_RST_N_FUNCTION         162     /* R/W */
+#define EXT_CSD_SANITIZE_START         165     /* W */
 #define EXT_CSD_WR_REL_PARAM           166     /* RO */
 #define EXT_CSD_ERASE_GROUP_DEF                175     /* R/W */
 #define EXT_CSD_PART_CONFIG            179     /* R/W */
 #define EXT_CSD_ERASED_MEM_CONT                181     /* RO */
 #define EXT_CSD_BUS_WIDTH              183     /* R/W */
 #define EXT_CSD_HS_TIMING              185     /* R/W */
+#define EXT_CSD_POWER_CLASS            187     /* R/W */
 #define EXT_CSD_REV                    192     /* RO */
 #define EXT_CSD_STRUCTURE              194     /* RO */
 #define EXT_CSD_CARD_TYPE              196     /* RO */
+#define EXT_CSD_OUT_OF_INTERRUPT_TIME  198     /* RO */
 #define EXT_CSD_PART_SWITCH_TIME        199     /* RO */
+#define EXT_CSD_PWR_CL_52_195          200     /* RO */
+#define EXT_CSD_PWR_CL_26_195          201     /* RO */
+#define EXT_CSD_PWR_CL_52_360          202     /* RO */
+#define EXT_CSD_PWR_CL_26_360          203     /* RO */
 #define EXT_CSD_SEC_CNT                        212     /* RO, 4 bytes */
 #define EXT_CSD_S_A_TIMEOUT            217     /* RO */
 #define EXT_CSD_REL_WR_SEC_C           222     /* RO */
@@ -294,6 +306,14 @@ struct _mmc_csd {
 #define EXT_CSD_SEC_ERASE_MULT         230     /* RO */
 #define EXT_CSD_SEC_FEATURE_SUPPORT    231     /* RO */
 #define EXT_CSD_TRIM_MULT              232     /* RO */
+#define EXT_CSD_PWR_CL_200_195         236     /* RO */
+#define EXT_CSD_PWR_CL_200_360         237     /* RO */
+#define EXT_CSD_PWR_CL_DDR_52_195      238     /* RO */
+#define EXT_CSD_PWR_CL_DDR_52_360      239     /* RO */
+#define EXT_CSD_POWER_OFF_LONG_TIME    247     /* RO */
+#define EXT_CSD_GENERIC_CMD6_TIME      248     /* RO */
+#define EXT_CSD_CACHE_SIZE             249     /* RO, 4 bytes */
+#define EXT_CSD_HPI_FEATURES           503     /* RO */
 
 /*
  * EXT_CSD field definitions
@@ -303,7 +323,9 @@ struct _mmc_csd {
 
 #define EXT_CSD_PART_CONFIG_ACC_MASK   (0x7)
 #define EXT_CSD_PART_CONFIG_ACC_BOOT0  (0x1)
-#define EXT_CSD_PART_CONFIG_ACC_BOOT1  (0x2)
+#define EXT_CSD_PART_CONFIG_ACC_GP0    (0x4)
+
+#define EXT_CSD_PART_SUPPORT_PART_EN   (0x1)
 
 #define EXT_CSD_CMD_SET_NORMAL         (1<<0)
 #define EXT_CSD_CMD_SET_SECURE         (1<<1)
@@ -328,10 +350,20 @@ struct _mmc_csd {
 #define EXT_CSD_SEC_ER_EN      BIT(0)
 #define EXT_CSD_SEC_BD_BLK_EN  BIT(2)
 #define EXT_CSD_SEC_GB_CL_EN   BIT(4)
+#define EXT_CSD_SEC_SANITIZE   BIT(6)  /* v4.5 only */
 
 #define EXT_CSD_RST_N_EN_MASK  0x3
 #define EXT_CSD_RST_N_ENABLED  1       /* RST_n is enabled on card */
 
+#define EXT_CSD_NO_POWER_NOTIFICATION  0
+#define EXT_CSD_POWER_ON               1
+#define EXT_CSD_POWER_OFF_SHORT                2
+#define EXT_CSD_POWER_OFF_LONG         3
+
+#define EXT_CSD_PWR_CL_8BIT_MASK       0xF0    /* 8 bit PWR CLS */
+#define EXT_CSD_PWR_CL_4BIT_MASK       0x0F    /* 8 bit PWR CLS */
+#define EXT_CSD_PWR_CL_8BIT_SHIFT      4
+#define EXT_CSD_PWR_CL_4BIT_SHIFT      0
 /*
  * MMC_SWITCH access modes
  */