/*
- * (C) Copyright 2000, 2001
+ * (C) Copyright 2000-2004
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
ulong erase_blk_tout; /* maximum block erase timeout */
ulong write_tout; /* maximum write timeout */
ulong buffer_write_tout; /* maximum buffer write timeout */
-
+ ushort vendor; /* the primary vendor id */
+ ushort cmd_reset; /* Vendor specific reset command */
+ ushort interface; /* used for x8/x16 adjustments */
#endif
} flash_info_t;
#define FLASH_CFI_BY16 0x02
#define FLASH_CFI_BY32 0x04
#define FLASH_CFI_BY64 0x08
+/* convert between bit value and numeric value */
+#define CFI_FLASH_SHIFT_WIDTH 3
+/*
+ * Values for the flash device interface
+ */
+#define FLASH_CFI_X8 0x00
+#define FLASH_CFI_X16 0x01
+#define FLASH_CFI_X8X16 0x02
+/* convert between bit value and numeric value */
+#define CFI_FLASH_SHIFT_WIDTH 3
/* Prototypes */
extern unsigned long flash_init (void);
/* board/?/flash.c */
#if defined(CFG_FLASH_PROTECTION)
extern int flash_real_protect(flash_info_t *info, long sector, int prot);
+extern void flash_read_user_serial(flash_info_t * info, void * buffer, int offset, int len);
+extern void flash_read_factory_serial(flash_info_t * info, void * buffer, int offset, int len);
#endif /* CFG_FLASH_PROTECTION */
/*-----------------------------------------------------------------------
#define AMD_ID_LV116DT 0xC7 /* 29LV116DT ( 2 M x 8, top boot sect) */
#define AMD_ID_LV016B 0xc8 /* 29LV016 ID ( 2 M x 8) */
+#define AMD_ID_PL160CB 0x22452245 /* 29PL160CB ID (16 M, bottom boot sect */
+
#define AMD_ID_LV400T 0x22B922B9 /* 29LV400T ID ( 4 M, top boot sector) */
#define AMD_ID_LV400B 0x22BA22BA /* 29LV400B ID ( 4 M, bottom boot sect) */
-#define AMD_ID_LV033C 0xA3 /* 29LV033C ID ( 4M x 8 ) */
+#define AMD_ID_LV033C 0xA3 /* 29LV033C ID ( 4 M x 8) */
+#define AMD_ID_LV065D 0x93 /* 29LV065D ID ( 8 M x 8) */
#define AMD_ID_LV800T 0x22DA22DA /* 29LV800T ID ( 8 M, top boot sector) */
#define AMD_ID_LV800B 0x225B225B /* 29LV800B ID ( 8 M, bottom boot sect) */
#define AMD_ID_LV160T 0x22C422C4 /* 29LV160T ID (16 M, top boot sector) */
#define AMD_ID_LV160B 0x22492249 /* 29LV160B ID (16 M, bottom boot sect) */
+#define AMD_ID_DL163T 0x22282228 /* 29DL163T ID (16 M, top boot sector) */
+#define AMD_ID_DL163B 0x222B222B /* 29DL163B ID (16 M, bottom boot sect) */
+
#define AMD_ID_LV320T 0x22F622F6 /* 29LV320T ID (32 M, top boot sector) */
#define AMD_ID_LV320B 0x22F922F9 /* 29LV320B ID (32 M, bottom boot sect) */
#define AMD_ID_DL640 0x227E227E /* 29DL640D ID (64 M, dual boot sectors)*/
#define AMD_ID_MIRROR 0x227E227E /* 1st ID word for MirrorBit family */
-#define AMD_ID_LV128U_2 0x22122212 /* 2d ID word for AM29LV128M at 0x38 */
-#define AMD_ID_LV128U_3 0x22002200 /* 3d ID word for AM29LV128M at 0x3c */
+#define AMD_ID_LV640U_2 0x220C220C /* 2d ID word for AM29LV640M at 0x38 */
+#define AMD_ID_LV640U_3 0x22012201 /* 3d ID word for AM29LV640M at 0x3c */
+#define AMD_ID_LV128U_2 0x22122212 /* 2d ID word for AM29LV128M at 0x38 */
+#define AMD_ID_LV128U_3 0x22002200 /* 3d ID word for AM29LV128M at 0x3c */
+
+#define AMD_ID_LV320B_2 0x221A221A /* 2d ID word for AM29LV320MB at 0x38 */
+#define AMD_ID_LV320B_3 0x22002200 /* 3d ID word for AM29LV320MB at 0x3c */
#define AMD_ID_LV640U 0x22D722D7 /* 29LV640U ID (64 M, uniform sectors) */
#define FUJI_ID_29F800BA 0x22582258 /* MBM29F800BA ID (8M) */
#define FUJI_ID_29F800TA 0x22D622D6 /* MBM29F800TA ID (8M) */
+#define FUJI_ID_29LV650UE 0x22d722d7 /* MBM29LV650UE/651UE ID (8M = 128 x 32kWord) */
#define SST_ID_xF200A 0x27892789 /* 39xF200A ID ( 2M = 128K x 16 ) */
#define SST_ID_xF400A 0x27802780 /* 39xF400A ID ( 4M = 256K x 16 ) */
#define SST_ID_xF800A 0x27812781 /* 39xF800A ID ( 8M = 512K x 16 ) */
#define SST_ID_xF160A 0x27822782 /* 39xF800A ID (16M = 1M x 16 ) */
+#define SST_ID_xF040 0xBFD7BFD7 /* 39xF040 ID (512KB = 4Mbit x 8) */
#define STM_ID_F040B 0xE2 /* M29F040B ID ( 4M = 512K x 8 ) */
/* 8 64K x 8 uniform sectors */
#define INTEL_ID_28F640C3T 0x88CC88CC /* 64M = 4M x 16 top boot sector */
#define INTEL_ID_28F640C3B 0x88CD88CD /* 64M = 4M x 16 bottom boot sector */
-#define INTEL_ID_28F128J3 0x89189818 /* 16M = 8M x 16 x 128 */
-#define INTEL_ID_28F640J5 0x00150015 /* 64M = 128K x 64 */
-#define INTEL_ID_28F320J3A 0x00160016 /* 32M = 128K x 32 */
-#define INTEL_ID_28F640J3A 0x00170017 /* 64M = 128K x 64 */
-#define INTEL_ID_28F128J3A 0x00180018 /* 128M = 128K x 128 */
+#define INTEL_ID_28F128J3 0x89188918 /* 16M = 8M x 16 x 128 */
+#define INTEL_ID_28F320J5 0x00140014 /* 32M = 128K x 32 */
+#define INTEL_ID_28F640J5 0x00150015 /* 64M = 128K x 64 */
+#define INTEL_ID_28F320J3A 0x00160016 /* 32M = 128K x 32 */
+#define INTEL_ID_28F640J3A 0x00170017 /* 64M = 128K x 64 */
+#define INTEL_ID_28F128J3A 0x00180018 /* 128M = 128K x 128 */
+#define INTEL_ID_28F256L18T 0x880D880D /* 256M = 128K x 255 + 32k x 4 */
#define INTEL_ID_28F160S3 0x00D000D0 /* 16M = 512K x 32 (64kB x 32) */
#define INTEL_ID_28F320S3 0x00D400D4 /* 32M = 512K x 64 (64kB x 64) */
#define FLASH_AMDL324T 0x0014 /* AMD AM29DL324 */
#define FLASH_AMDL324B 0x0015
+#define FLASH_AMDLV033C 0x0018
+#define FLASH_AMDLV065D 0x001A
+
#define FLASH_AMDL640 0x0016 /* AMD AM29DL640D */
#define FLASH_AMD016 0x0018 /* AMD AM29F016D */
#define FLASH_SST400A 0x0042 /* SST 39xF400A ID ( 4M = 256K x 16 ) */
#define FLASH_SST800A 0x0044 /* SST 39xF800A ID ( 8M = 512K x 16 ) */
#define FLASH_SST160A 0x0046 /* SST 39xF160A ID ( 16M = 1M x 16 ) */
+#define FLASH_SST040 0x000E /* SST 39xF040 ID (512KB = 4Mbit x 8 ) */
#define FLASH_STM800AB 0x0051 /* STM M29WF800AB ( 8M = 512K x 16 ) */
#define FLASH_STMW320DT 0x0052 /* STM M29W320DT (32 M, top boot sector) */
#define FLASH_28F320C3B 0x009F /* Intel 28F320C3B ( 32M = 2M x 16 ) */
#define FLASH_28F640C3T 0x00A0 /* Intel 28F640C3T ( 64M = 4M x 16 ) */
#define FLASH_28F640C3B 0x00A1 /* Intel 28F640C3B ( 64M = 4M x 16 ) */
-#define FLASH_AMLV128U 0x00A2 /* AMD 29LV128M ( 128M = 8M x 16 ) */
+#define FLASH_AMLV320U 0x00A2 /* AMD 29LV320M ( 32M = 2M x 16 ) */
+#define FLASH_AMLV640U 0x00A4 /* AMD 29LV640M ( 64M = 4M x 16 ) */
+#define FLASH_AMLV128U 0x00A6 /* AMD 29LV128M ( 128M = 8M x 16 ) */
+#define FLASH_AMLV320B 0x00A7 /* AMD 29LV320MB ( 32M = 2M x 16 ) */
+#define FLASH_AMLV320T 0x00A8 /* AMD 29LV320MT ( 32M = 2M x 16 ) */
+/* Intel 28F256L18T 256M = 128K x 255 + 32k x 4 */
+#define FLASH_28F256L18T 0x00B0
+#define FLASH_AMDL163T 0x00B2 /* AMD AM29DL163T (2M x 16 ) */
+#define FLASH_AMDL163B 0x00B3
+
+#define FLASH_FUJLV650 0x00B4 /* Fujitsu MBM 29LV650UE/651UE */
#define FLASH_UNKNOWN 0xFFFF /* unknown flash type */
git.openpandora.org / pandora-u-boot.git / blobdiff