*/
#define CFG_SYS_SDRAM_BASE 0x00000000 /* DDR is system memory */
-#define CONFIG_SYS_DDR_SDRAM_CLK_CNTL (DDR_SDRAM_CLK_CNTL_SS_EN | \
+#define CFG_SYS_DDR_SDRAM_CLK_CNTL (DDR_SDRAM_CLK_CNTL_SS_EN | \
DDR_SDRAM_CLK_CNTL_CLK_ADJUST_05)
#define CFG_83XX_DDR_USES_CS0
/*
* The reserved memory
*/
-#define CONFIG_SYS_FLASH_BASE 0xF0000000
+#define CFG_SYS_FLASH_BASE 0xF0000000
/* Reserve 768 kB for Mon */
/*
* Initial RAM Base Address Setup
*/
-#define CONFIG_SYS_INIT_RAM_ADDR 0xE6000000 /* Initial RAM address */
-#define CONFIG_SYS_INIT_RAM_SIZE 0x1000 /* End of used area in RAM */
+#define CFG_SYS_INIT_RAM_ADDR 0xE6000000 /* Initial RAM address */
+#define CFG_SYS_INIT_RAM_SIZE 0x1000 /* End of used area in RAM */
/*
* Init Local Bus Memory Controller:
*
/*
* FLASH on the Local Bus
*/
-#define CONFIG_SYS_FLASH_SIZE 256 /* max FLASH size is 256M */
+#define CFG_SYS_FLASH_SIZE 256 /* max FLASH size is 256M */
-#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
+#define CFG_SYS_FLASH_BANKS_LIST { CFG_SYS_FLASH_BASE }
/* I2C */
#define CFG_SYS_NUM_I2C_BUSES 4
-#define CONFIG_SYS_I2C_MAX_HOPS 1
-#define CONFIG_SYS_I2C_BUSES {{0, {I2C_NULL_HOP} }, \
+#define CFG_SYS_I2C_MAX_HOPS 1
+#define CFG_SYS_I2C_BUSES {{0, {I2C_NULL_HOP} }, \
{0, {{I2C_MUX_PCA9547, 0x70, 2} } }, \
{0, {{I2C_MUX_PCA9547, 0x70, 1} } }, \
{1, {I2C_NULL_HOP} } }
#if defined(CONFIG_CMD_NAND)
#define CONFIG_NAND_KMETER1
-#define CFG_SYS_NAND_BASE CONFIG_SYS_KMBEC_FPGA_BASE
+#define CFG_SYS_NAND_BASE CFG_SYS_KMBEC_FPGA_BASE
#endif
/*
* have to be in the first 8 MB of memory, since this is
* the maximum mapped by the Linux kernel during initialization.
*/
-#define CONFIG_SYS_BOOTMAPSZ (8 << 20)
+#define CFG_SYS_BOOTMAPSZ (8 << 20)
/*
* Environment