[PATCH] x86_64: moving phys_proc_id and cpu_core_id to cpuinfo_x86

[pandora-kernel.git] / include / asm-x86_64 / processor.h

diff --git a/include/asm-x86_64/processor.h b/include/asm-x86_64/processor.h
index 87a282b..3b3c121 100644 (file)
--- a/include/asm-x86_64/processor.h
+++ b/include/asm-x86_64/processor.h
@@ -12,7 +12,6 @@
 #include <asm/types.h>
 #include <asm/sigcontext.h>
 #include <asm/cpufeature.h>
-#include <linux/config.h>
 #include <linux/threads.h>
 #include <asm/msr.h>
 #include <asm/current.h>
@@ -20,6 +19,7 @@
 #include <asm/mmsegment.h>
 #include <asm/percpu.h>
 #include <linux/personality.h>
+#include <linux/cpumask.h>
 
 #define TF_MASK                0x00000100
 #define IF_MASK                0x00000200
@@ -65,8 +65,15 @@ struct cpuinfo_x86 {
         __u32   x86_power;     
        __u32   extended_cpuid_level;   /* Max extended CPUID function supported */
        unsigned long loops_per_jiffy;
+#ifdef CONFIG_SMP
+       cpumask_t llc_shared_map;       /* cpus sharing the last level cache */
+#endif
        __u8    apicid;
+#ifdef CONFIG_SMP
        __u8    booted_cores;   /* number of cores as seen by OS */
+       __u8    phys_proc_id;   /* Physical Processor id. */
+       __u8    cpu_core_id;    /* Core id. */
+#endif
 } ____cacheline_aligned;
 
 #define X86_VENDOR_INTEL 0
@@ -93,6 +100,7 @@ extern char ignore_irq13;
 extern void identify_cpu(struct cpuinfo_x86 *);
 extern void print_cpu_info(struct cpuinfo_x86 *);
 extern unsigned int init_intel_cacheinfo(struct cpuinfo_x86 *c);
+extern unsigned short num_cache_leaves;
 
 /*
  * EFLAGS bits
@@ -273,13 +281,6 @@ struct thread_struct {
 #define INIT_MMAP \
 { &init_mm, 0, 0, NULL, PAGE_SHARED, VM_READ | VM_WRITE | VM_EXEC, 1, NULL, NULL }
 
-#define STACKFAULT_STACK 1
-#define DOUBLEFAULT_STACK 2 
-#define NMI_STACK 3 
-#define DEBUG_STACK 4 
-#define MCE_STACK 5
-#define N_EXCEPTION_STACKS 5  /* hw limit: 7 */
-
 #define start_thread(regs,new_rip,new_rsp) do { \
        asm volatile("movl %0,%%fs; movl %0,%%es; movl %0,%%ds": :"r" (0));      \
        load_gs_index(0);                                                       \
@@ -361,9 +362,6 @@ struct extended_sigtable {
        struct extended_signature sigs[0];
 };
 
-/* '6' because it used to be for P6 only (but now covers Pentium 4 as well) */
-#define MICROCODE_IOCFREE      _IO('6',0)
-
 
 #define ASM_NOP1 K8_NOP1
 #define ASM_NOP2 K8_NOP2
@@ -484,4 +482,6 @@ extern unsigned long boot_option_idle_override;
 /* Boot loader type from the setup header */
 extern int bootloader_type;
 
+#define HAVE_ARCH_PICK_MMAP_LAYOUT 1
+
 #endif /* __ASM_X86_64_PROCESSOR_H */