x86, pci: introduce pci=ioapicreroute kernel cmdline option

[pandora-kernel.git] / include / asm-x86 / io_apic.h

diff --git a/include/asm-x86/io_apic.h b/include/asm-x86/io_apic.h
index 0c9e17c..a39670a 100644 (file)
--- a/include/asm-x86/io_apic.h
+++ b/include/asm-x86/io_apic.h
@@ -1,7 +1,7 @@
 #ifndef __ASM_IO_APIC_H
 #define __ASM_IO_APIC_H
 
-#include <asm/types.h>
+#include <linux/types.h>
 #include <asm/mpspec.h>
 #include <asm/apicdef.h>
 
@@ -11,6 +11,15 @@
  * Copyright (C) 1997, 1998, 1999, 2000 Ingo Molnar
  */
 
+/* I/O Unit Redirection Table */
+#define IO_APIC_REDIR_VECTOR_MASK      0x000FF
+#define IO_APIC_REDIR_DEST_LOGICAL     0x00800
+#define IO_APIC_REDIR_DEST_PHYSICAL    0x00000
+#define IO_APIC_REDIR_SEND_PENDING     (1 << 12)
+#define IO_APIC_REDIR_REMOTE_IRR       (1 << 14)
+#define IO_APIC_REDIR_LEVEL_TRIGGER    (1 << 15)
+#define IO_APIC_REDIR_MASKED           (1 << 16)
+
 /*
  * The structure of the IO-APIC:
  */
@@ -110,21 +119,34 @@ extern int nr_ioapic_registers[MAX_IO_APICS];
  * MP-BIOS irq configuration table structures:
  */
 
-struct mp_ioapic_routing {
-       int apic_id;
-       int gsi_base;
-       int gsi_end;
-       u32 pin_programmed[4];
+#define MP_MAX_IOAPIC_PIN 127
+
+struct mp_config_ioapic {
+       unsigned long mp_apicaddr;
+       unsigned int mp_apicid;
+       unsigned char mp_type;
+       unsigned char mp_apicver;
+       unsigned char mp_flags;
+};
+
+struct mp_config_intsrc {
+       unsigned int mp_dstapic;
+       unsigned char mp_type;
+       unsigned char mp_irqtype;
+       unsigned short mp_irqflag;
+       unsigned char mp_srcbus;
+       unsigned char mp_srcbusirq;
+       unsigned char mp_dstirq;
 };
 
 /* I/O APIC entries */
-extern struct mpc_config_ioapic mp_ioapics[MAX_IO_APICS];
+extern struct mp_config_ioapic mp_ioapics[MAX_IO_APICS];
 
 /* # of MP IRQ source entries */
 extern int mp_irq_entries;
 
 /* MP IRQ source entries */
-extern struct mpc_config_intsrc mp_irqs[MAX_IRQ_SOURCES];
+extern struct mp_config_intsrc mp_irqs[MAX_IRQ_SOURCES];
 
 /* non-0 if default (table-less) MP configuration */
 extern int mpc_default_type;
@@ -135,8 +157,19 @@ extern int sis_apic_bug;
 /* 1 if "noapic" boot option passed */
 extern int skip_ioapic_setup;
 
+/* 1 if "noapic" boot option passed */
+extern int noioapicquirk;
+
+/* -1 if "noapic" boot option passed */
+extern int noioapicreroute;
+
+/* 1 if the timer IRQ uses the '8259A Virtual Wire' mode */
+extern int timer_through_8259;
+
 static inline void disable_ioapic_setup(void)
 {
+       noioapicquirk = 1;
+       noioapicreroute = -1;
        skip_ioapic_setup = 1;
 }
 
@@ -160,6 +193,8 @@ extern void ioapic_init_mappings(void);
 
 #else  /* !CONFIG_X86_IO_APIC */
 #define io_apic_assign_pci_irqs 0
+static const int timer_through_8259 = 0;
+static inline void ioapic_init_mappings(void) { }
 #endif
 
 #endif