Merge gregkh@master.kernel.org:/pub/scm/linux/kernel/git/jejb/scsi-rc-fixes-2.6

[pandora-kernel.git] / include / asm-powerpc / system.h

diff --git a/include/asm-powerpc/system.h b/include/asm-powerpc/system.h
index 65f5a7b..4c9f522 100644 (file)
--- a/include/asm-powerpc/system.h
+++ b/include/asm-powerpc/system.h
@@ -39,7 +39,6 @@
 #define read_barrier_depends()  do { } while(0)
 
 #define set_mb(var, value)     do { var = value; mb(); } while (0)
-#define set_wmb(var, value)    do { var = value; wmb(); } while (0)
 
 #ifdef __KERNEL__
 #ifdef CONFIG_SMP
@@ -54,6 +53,15 @@
 #define smp_read_barrier_depends()     do { } while(0)
 #endif /* CONFIG_SMP */
 
+/*
+ * This is a barrier which prevents following instructions from being
+ * started until the value of the argument x is known.  For example, if
+ * x is a variable loaded from memory, this prevents following
+ * instructions from being executed until the load has been performed.
+ */
+#define data_barrier(x)        \
+       asm volatile("twi 0,%0,0; isync" : : "r" (x) : "memory");
+
 struct task_struct;
 struct pt_regs;
 
@@ -220,8 +228,8 @@ __xchg_u32(volatile void *p, unsigned long val)
 "      stwcx.  %3,0,%2 \n\
        bne-    1b"
        ISYNC_ON_SMP
-       : "=&r" (prev), "=m" (*(volatile unsigned int *)p)
-       : "r" (p), "r" (val), "m" (*(volatile unsigned int *)p)
+       : "=&r" (prev), "+m" (*(volatile unsigned int *)p)
+       : "r" (p), "r" (val)
        : "cc", "memory");
 
        return prev;
@@ -240,8 +248,8 @@ __xchg_u64(volatile void *p, unsigned long val)
 "      stdcx.  %3,0,%2 \n\
        bne-    1b"
        ISYNC_ON_SMP
-       : "=&r" (prev), "=m" (*(volatile unsigned long *)p)
-       : "r" (p), "r" (val), "m" (*(volatile unsigned long *)p)
+       : "=&r" (prev), "+m" (*(volatile unsigned long *)p)
+       : "r" (p), "r" (val)
        : "cc", "memory");
 
        return prev;
@@ -299,8 +307,8 @@ __cmpxchg_u32(volatile unsigned int *p, unsigned long old, unsigned long new)
        ISYNC_ON_SMP
        "\n\
 2:"
-       : "=&r" (prev), "=m" (*p)
-       : "r" (p), "r" (old), "r" (new), "m" (*p)
+       : "=&r" (prev), "+m" (*p)
+       : "r" (p), "r" (old), "r" (new)
        : "cc", "memory");
 
        return prev;
@@ -322,8 +330,8 @@ __cmpxchg_u64(volatile unsigned long *p, unsigned long old, unsigned long new)
        ISYNC_ON_SMP
        "\n\
 2:"
-       : "=&r" (prev), "=m" (*p)
-       : "r" (p), "r" (old), "r" (new), "m" (*p)
+       : "=&r" (prev), "+m" (*p)
+       : "r" (p), "r" (old), "r" (new)
        : "cc", "memory");
 
        return prev;
@@ -365,8 +373,11 @@ __cmpxchg(volatile void *ptr, unsigned long old, unsigned long new,
  * powers of 2 writes until it reaches sufficient alignment).
  *
  * Based on this we disable the IP header alignment in network drivers.
+ * We also modify NET_SKB_PAD to be a cacheline in size, thus maintaining
+ * cacheline alignment of buffers.
  */
-#define NET_IP_ALIGN   0
+#define NET_IP_ALIGN   0
+#define NET_SKB_PAD    L1_CACHE_BYTES
 #endif
 
 #define arch_align_stack(x) (x)