Pull sn2-mmio-writes into release branch

[pandora-kernel.git] / include / asm-ia64 / processor.h

diff --git a/include/asm-ia64/processor.h b/include/asm-ia64/processor.h
index 09b9902..128fefd 100644 (file)
--- a/include/asm-ia64/processor.h
+++ b/include/asm-ia64/processor.h
@@ -50,7 +50,8 @@
 #define IA64_THREAD_PM_VALID   (__IA64_UL(1) << 2)     /* performance registers valid? */
 #define IA64_THREAD_UAC_NOPRINT        (__IA64_UL(1) << 3)     /* don't log unaligned accesses */
 #define IA64_THREAD_UAC_SIGBUS (__IA64_UL(1) << 4)     /* generate SIGBUS on unaligned acc. */
-                                                       /* bit 5 is currently unused */
+#define IA64_THREAD_MIGRATION  (__IA64_UL(1) << 5)     /* require migration
+                                                          sync at ctx sw */
 #define IA64_THREAD_FPEMU_NOPRINT (__IA64_UL(1) << 6)  /* don't log any fpswa faults */
 #define IA64_THREAD_FPEMU_SIGFPE  (__IA64_UL(1) << 7)  /* send a SIGFPE for fpswa faults */
 
@@ -559,6 +560,23 @@ ia64_eoi (void)
 
 #define cpu_relax()    ia64_hint(ia64_hint_pause)
 
+static inline int
+ia64_get_irr(unsigned int vector)
+{
+       unsigned int reg = vector / 64;
+       unsigned int bit = vector % 64;
+       u64 irr;
+
+       switch (reg) {
+       case 0: irr = ia64_getreg(_IA64_REG_CR_IRR0); break;
+       case 1: irr = ia64_getreg(_IA64_REG_CR_IRR1); break;
+       case 2: irr = ia64_getreg(_IA64_REG_CR_IRR2); break;
+       case 3: irr = ia64_getreg(_IA64_REG_CR_IRR3); break;
+       }
+
+       return test_bit(bit, &irr);
+}
+
 static inline void
 ia64_set_lrr0 (unsigned long val)
 {