" blmi " #fail \
: \
: "r" (ptr), "I" (1) \
- : "ip", "lr", "cc", "memory"); \
+ : "ip", "lr", "cc"); \
+ smp_mb(); \
})
#define __down_op_ret(ptr,fail) \
" mov %0, ip" \
: "=&r" (ret) \
: "r" (ptr), "I" (1) \
- : "ip", "lr", "cc", "memory"); \
+ : "ip", "lr", "cc"); \
+ smp_mb(); \
ret; \
})
#define __up_op(ptr,wake) \
({ \
+ smp_mb(); \
__asm__ __volatile__( \
"@ up_op\n" \
"1: ldrex lr, [%0]\n" \
" blle " #wake \
: \
: "r" (ptr), "I" (1) \
- : "ip", "lr", "cc", "memory"); \
+ : "ip", "lr", "cc"); \
})
/*
" blne " #fail \
: \
: "r" (ptr), "I" (RW_LOCK_BIAS) \
- : "ip", "lr", "cc", "memory"); \
+ : "ip", "lr", "cc"); \
+ smp_mb(); \
})
#define __up_op_write(ptr,wake) \
({ \
+ smp_mb(); \
__asm__ __volatile__( \
"@ up_op_read\n" \
"1: ldrex lr, [%0]\n" \
" blcs " #wake \
: \
: "r" (ptr), "I" (RW_LOCK_BIAS) \
- : "ip", "lr", "cc", "memory"); \
+ : "ip", "lr", "cc"); \
})
#define __down_op_read(ptr,fail) \
#define __up_op_read(ptr,wake) \
({ \
+ smp_mb(); \
__asm__ __volatile__( \
"@ up_op_read\n" \
"1: ldrex lr, [%0]\n" \
" bleq " #wake \
: \
: "r" (ptr), "I" (1) \
- : "ip", "lr", "cc", "memory"); \
+ : "ip", "lr", "cc"); \
})
#else
" blmi " #fail \
: \
: "r" (ptr), "I" (1) \
- : "ip", "lr", "cc", "memory"); \
+ : "ip", "lr", "cc"); \
+ smp_mb(); \
})
#define __down_op_ret(ptr,fail) \
" mov %0, ip" \
: "=&r" (ret) \
: "r" (ptr), "I" (1) \
- : "ip", "lr", "cc", "memory"); \
+ : "ip", "lr", "cc"); \
+ smp_mb(); \
ret; \
})
#define __up_op(ptr,wake) \
({ \
+ smp_mb(); \
__asm__ __volatile__( \
"@ up_op\n" \
" mrs ip, cpsr\n" \
" blle " #wake \
: \
: "r" (ptr), "I" (1) \
- : "ip", "lr", "cc", "memory"); \
+ : "ip", "lr", "cc"); \
})
/*
" blne " #fail \
: \
: "r" (ptr), "I" (RW_LOCK_BIAS) \
- : "ip", "lr", "cc", "memory"); \
+ : "ip", "lr", "cc"); \
+ smp_mb(); \
})
#define __up_op_write(ptr,wake) \
" blcs " #wake \
: \
: "r" (ptr), "I" (RW_LOCK_BIAS) \
- : "ip", "lr", "cc", "memory"); \
+ : "ip", "lr", "cc"); \
+ smp_mb(); \
})
#define __down_op_read(ptr,fail) \
#define __up_op_read(ptr,wake) \
({ \
+ smp_mb(); \
__asm__ __volatile__( \
"@ up_op_read\n" \
" mrs ip, cpsr\n" \
" bleq " #wake \
: \
: "r" (ptr), "I" (1) \
- : "ip", "lr", "cc", "memory"); \
+ : "ip", "lr", "cc"); \
})
#endif