* 2) If > 64MB of memory space is required, the IXP4xx can be configured
* to use indirect registers to access PCI (as we do below for I/O
* transactions). This allows for up to 128MB (0x48000000 to 0x4fffffff)
- * of memory on the bus. The disadvantadge of this is that every
+ * of memory on the bus. The disadvantage of this is that every
* PCI access requires three local register accesses plus a spinlock,
* but in some cases the performance hit is acceptable. In addition,
* you cannot mmap() PCI devices in this case.
* fallback to the default.
*/
static inline void __iomem *
-__ixp4xx_ioremap(unsigned long addr, size_t size, unsigned long flags)
+__ixp4xx_ioremap(unsigned long addr, size_t size, unsigned int mtype)
{
if((addr < 0x48000000) || (addr > 0x4fffffff))
- return __ioremap(addr, size, flags);
+ return __arm_ioremap(addr, size, mtype);
return (void *)addr;
}
#define memcpy_fromio(a,c,l) _memcpy_fromio((a),(c),(l))
#define memcpy_toio(c,a,l) _memcpy_toio((c),(a),(l))
-#define eth_io_copy_and_sum(s,c,l,b) \
- eth_copy_and_sum((s),__mem_pci(c),(l),(b))
+#endif
-static inline int
-check_signature(const unsigned char __iomem *bus_addr, const unsigned char *signature,
- int length)
-{
- int retval = 0;
- do {
- if (readb(bus_addr) != *signature)
- goto out;
- bus_addr++;
- signature++;
- length--;
- } while (length);
- retval = 1;
-out:
- return retval;
-}
+#ifndef CONFIG_PCI
-#endif
+#define __io(v) v
+
+#else
/*
* IXP4xx does not have a transparent cpu -> PCI I/O translation
#define ioport_map(port, nr) ((void __iomem*)(port + PIO_OFFSET))
#define ioport_unmap(addr)
+#endif // !CONFIG_PCI
#endif // __ASM_ARM_ARCH_IO_H