static void _dispc_set_scaling(enum omap_plane plane,
u16 orig_width, u16 orig_height,
u16 out_width, u16 out_height,
- bool ilace)
+ bool ilace, bool five_taps)
{
int fir_hinc;
int fir_vinc;
- int hscaleup, vscaleup, five_taps;
+ int hscaleup, vscaleup;
int fieldmode = 0;
int accu0 = 0;
int accu1 = 0;
hscaleup = orig_width <= out_width;
vscaleup = orig_height <= out_height;
- five_taps = orig_height > out_height * 2;
_dispc_set_scale_coef(plane, hscaleup, vscaleup, five_taps);
}
}
+static unsigned long calc_fclk_five_taps(u16 width, u16 height,
+ u16 out_width, u16 out_height, enum omap_color_mode color_mode)
+{
+ u32 fclk = 0;
+ /* FIXME venc pclk? */
+ u64 tmp, pclk = dispc_pclk_rate();
+
+ if (height > out_height) {
+ /* FIXME get real display PPL */
+ unsigned int ppl = 800;
+
+ tmp = pclk * height * out_width;
+ do_div(tmp, 2 * out_height * ppl);
+ fclk = tmp;
+
+ if (height > 2 * out_height) {
+ tmp = pclk * (height - 2 * out_height) * out_width;
+ do_div(tmp, 2 * out_height * (ppl - out_width));
+ fclk = max(fclk, (u32) tmp);
+ }
+ }
+
+ if (width > out_width) {
+ tmp = pclk * width;
+ do_div(tmp, out_width);
+ fclk = max(fclk, (u32) tmp);
+
+ if (color_mode == OMAP_DSS_COLOR_RGB24U)
+ fclk <<= 1;
+ }
+
+ return fclk;
+}
+
+static unsigned long calc_fclk(u16 width, u16 height,
+ u16 out_width, u16 out_height,
+ enum omap_color_mode color_mode, bool five_taps)
+{
+ unsigned int hf, vf;
+
+ if (five_taps)
+ return calc_fclk_five_taps(width, height,
+ out_width, out_height, color_mode);
+
+ /*
+ * FIXME how to determine the 'A' factor
+ * for the no downscaling case ?
+ */
+
+ if (width > 3 * out_width)
+ hf = 4;
+ else if (width > 2 * out_width)
+ hf = 3;
+ else if (width > out_width)
+ hf = 2;
+ else
+ hf = 1;
+
+ if (height > out_height)
+ vf = 2;
+ else
+ vf = 1;
+
+ /* FIXME venc pclk? */
+ return dispc_pclk_rate() * vf * hf;
+}
+
static int _dispc_setup_plane(enum omap_plane plane,
enum omap_channel channel_out,
u32 paddr, u16 screen_width,
u8 rotation, int mirror)
{
const int maxdownscale = cpu_is_omap34xx() ? 4 : 2;
- bool five_taps = height > out_height * 2;
+ bool five_taps = 0;
bool fieldmode = 0;
int cconv = 0;
unsigned offset0, offset1;
s32 row_inc;
s32 pix_inc;
+ u16 frame_height = height;
if (paddr == 0)
return -EINVAL;
+ if (ilace && height >= out_height)
+ fieldmode = 1;
+
+ if (ilace) {
+ if (fieldmode)
+ height /= 2;
+ pos_y /= 2;
+ out_height /= 2;
+
+ DSSDBG("adjusting for ilace: height %d, pos_y %d, "
+ "out_height %d\n",
+ height, pos_y, out_height);
+ }
+
if (plane == OMAP_DSS_GFX) {
if (width != out_width || height != out_height)
return -EINVAL;
}
} else {
/* video plane */
- if (width > (2048 >> five_taps))
- return -EINVAL;
+
+ unsigned long fclk;
if (out_width < width / maxdownscale ||
out_width > width * 8)
default:
return -EINVAL;
}
- }
- if (ilace && height >= out_height)
- fieldmode = 1;
+ /* Must use 5-tap filter? */
+ five_taps = height > out_height * 2;
+
+ /* Try to use 5-tap filter whenever possible. */
+ if (cpu_is_omap34xx() && !five_taps &&
+ height > out_height && width <= 1024) {
+ fclk = calc_fclk_five_taps(width, height,
+ out_width, out_height, color_mode);
+ if (fclk <= dispc_fclk_rate())
+ five_taps = true;
+ }
+
+ if (width > (2048 >> five_taps))
+ return -EINVAL;
+
+ fclk = calc_fclk(width, height, out_width, out_height,
+ color_mode, five_taps);
+
+ DSSDBG("required fclk rate = %lu Hz\n", fclk);
+ DSSDBG("current fclk rate = %lu Hz\n", dispc_fclk_rate());
+
+ if (fclk > dispc_fclk_rate())
+ return -EINVAL;
+ }
calc_rotation_offset(rotation, mirror,
- screen_width, width, height, color_mode,
+ screen_width, width, frame_height, color_mode,
fieldmode,
&offset0, &offset1, &row_inc, &pix_inc);
DSSDBG("offset0 %u, offset1 %u, row_inc %d, pix_inc %d\n",
offset0, offset1, row_inc, pix_inc);
- if (ilace) {
- if (fieldmode)
- height /= 2;
- pos_y /= 2;
- out_height /= 2;
-
- DSSDBG("adjusting for ilace: height %d, pos_y %d, "
- "out_height %d\n",
- height, pos_y, out_height);
- }
-
_dispc_set_channel_out(plane, channel_out);
_dispc_set_color_mode(plane, color_mode);
if (plane != OMAP_DSS_GFX) {
_dispc_set_scaling(plane, width, height,
out_width, out_height,
- ilace);
+ ilace, five_taps);
_dispc_set_vid_size(plane, out_width, out_height);
_dispc_set_vid_color_conv(plane, cconv);
}
return r;
}
+unsigned long dispc_lclk_rate(void)
+{
+ int lcd;
+ unsigned long r;
+ u32 l;
+
+ l = dispc_read_reg(DISPC_DIVISOR);
+
+ lcd = FLD_GET(l, 23, 16);
+
+ r = dispc_fclk_rate();
+
+ return r / lcd;
+}
+
unsigned long dispc_pclk_rate(void)
{
int lcd, pcd;
}
if (errors & DISPC_IRQ_SYNC_LOST) {
+ struct omap_overlay_manager *manager = NULL;
+ bool enable = false;
+
DSSERR("SYNC_LOST, disabling LCD\n");
+
for (i = 0; i < omap_dss_get_num_overlay_managers(); ++i) {
struct omap_overlay_manager *mgr;
mgr = omap_dss_get_overlay_manager(i);
if (mgr->id == OMAP_DSS_CHANNEL_LCD) {
+ manager = mgr;
+ enable = mgr->display->state ==
+ OMAP_DSS_DISPLAY_ACTIVE;
mgr->display->disable(mgr->display);
break;
}
}
+
+ if (manager) {
+ for (i = 0; i < omap_dss_get_num_overlays(); ++i) {
+ struct omap_overlay *ovl;
+ ovl = omap_dss_get_overlay(i);
+
+ if (!(ovl->caps & OMAP_DSS_OVL_CAP_DISPC))
+ continue;
+
+ if (ovl->id != 0 && ovl->manager == manager)
+ dispc_enable_plane(ovl->id, 0);
+ }
+
+ dispc_go(manager->id);
+ mdelay(50);
+ if (enable)
+ manager->display->enable(manager->display);
+ }
}
if (errors & DISPC_IRQ_SYNC_LOST_DIGIT) {
+ struct omap_overlay_manager *manager = NULL;
+ bool enable = false;
+
DSSERR("SYNC_LOST_DIGIT, disabling TV\n");
+
for (i = 0; i < omap_dss_get_num_overlay_managers(); ++i) {
struct omap_overlay_manager *mgr;
mgr = omap_dss_get_overlay_manager(i);
if (mgr->id == OMAP_DSS_CHANNEL_DIGIT) {
+ manager = mgr;
+ enable = mgr->display->state ==
+ OMAP_DSS_DISPLAY_ACTIVE;
mgr->display->disable(mgr->display);
break;
}
}
+
+ if (manager) {
+ for (i = 0; i < omap_dss_get_num_overlays(); ++i) {
+ struct omap_overlay *ovl;
+ ovl = omap_dss_get_overlay(i);
+
+ if (!(ovl->caps & OMAP_DSS_OVL_CAP_DISPC))
+ continue;
+
+ if (ovl->id != 0 && ovl->manager == manager)
+ dispc_enable_plane(ovl->id, 0);
+ }
+
+ dispc_go(manager->id);
+ mdelay(50);
+ if (enable)
+ manager->display->enable(manager->display);
+ }
}
if (errors & DISPC_IRQ_OCP_ERR) {
omap_dispc_set_irqs();
}
+void dispc_enable_sidle(void)
+{
+ REG_FLD_MOD(DISPC_SYSCONFIG, 2, 4, 3); /* SIDLEMODE: smart idle */
+}
+
+void dispc_disable_sidle(void)
+{
+ REG_FLD_MOD(DISPC_SYSCONFIG, 1, 4, 3); /* SIDLEMODE: no idle */
+}
+
static void _omap_dispc_initial_config(void)
{
u32 l;