mbxfb: Improvements and new features

[pandora-kernel.git] / drivers / video / mbx / reg_bits.h

diff --git a/drivers/video/mbx/reg_bits.h b/drivers/video/mbx/reg_bits.h
index 9a24fb0..5f14b4b 100644 (file)
--- a/drivers/video/mbx/reg_bits.h
+++ b/drivers/video/mbx/reg_bits.h
@@ -215,7 +215,7 @@
 /* GSCADR graphics stream control address register fields */
 #define GSCADR_STR_EN  (1 << 31)
 #define GSCADR_COLKEY_EN       (1 << 30)
-#define GSCADR_COLKEYSCR       (1 << 29)
+#define GSCADR_COLKEYSRC       (1 << 29)
 #define GSCADR_BLEND_M Fld(2,27)
 #define GSCADR_BLEND_NONE      ((0x0) << FShft(GSCADR_BLEND_M))
 #define GSCADR_BLEND_INV       ((0x1) << FShft(GSCADR_BLEND_M))
@@ -303,6 +303,67 @@
 #define VSADR_YSTART           Fld(11,0)
 #define Vsadr_Ystart(x)                ((x) << FShft(VSADR_YSTART))
 
+/* VSCTRL - Video Surface Control Register */
+#define VSCTRL_VPIXFMT         Fld(4,27)
+#define VSCTRL_VPIXFMT_YUV12   ((0x9) << FShft(VSCTRL_VPIXFMT))
+#define VSCTRL_VPIXFMT_UY0VY1  ((0xc) << FShft(VSCTRL_VPIXFMT))
+#define VSCTRL_VPIXFMT_VY0UY1  ((0xd) << FShft(VSCTRL_VPIXFMT))
+#define VSCTRL_VPIXFMT_Y0UY1V  ((0xe) << FShft(VSCTRL_VPIXFMT))
+#define VSCTRL_VPIXFMT_Y0VY1U  ((0xf) << FShft(VSCTRL_VPIXFMT))
+#define VSCTRL_GAMMA_EN                (1 << 26)
+#define VSCTRL_CSC_EN          (1 << 25)
+#define VSCTRL_COSITED         (1 << 22)
+#define VSCTRL_VSWIDTH         Fld(11,11)
+#define Vsctrl_Width(Pixels) /* Video Width [1-2048] */ \
+                       (((Pixels) - 1) << FShft(VSCTRL_VSWIDTH))
+#define VSCTRL_VSHEIGHT                Fld(11,0)
+#define Vsctrl_Height(Pixels) /* Video Height [1-2048] */ \
+                       (((Pixels) - 1) << FShft(VSCTRL_VSHEIGHT))
+
+/* VBBASE - Video Blending Base Register */
+#define VBBASE_GLALPHA         Fld(8,24)
+#define Vbbase_Glalpha(x)      ((x) << FShft(VBBASE_GLALPHA))
+
+#define VBBASE_COLKEY          Fld(24,0)
+#define Vbbase_Colkey(x)       ((x) << FShft(VBBASE_COLKEY))
+
+/* VCMSK - Video Color Key Mask Register */
+#define VCMSK_COLKEY_M         Fld(24,0)
+#define Vcmsk_colkey_m(x)      ((x) << FShft(VCMSK_COLKEY_M))
+
+/* VSCADR - Video Stream Control Rddress Register */
+#define VSCADR_STR_EN          (1 << 31)
+#define VSCADR_COLKEY_EN       (1 << 30)
+#define VSCADR_COLKEYSRC       (1 << 29)
+#define VSCADR_BLEND_M         Fld(2,27)
+#define VSCADR_BLEND_NONE      ((0x0) << FShft(VSCADR_BLEND_M))
+#define VSCADR_BLEND_INV       ((0x1) << FShft(VSCADR_BLEND_M))
+#define VSCADR_BLEND_GLOB      ((0x2) << FShft(VSCADR_BLEND_M))
+#define VSCADR_BLEND_PIX       ((0x3) << FShft(VSCADR_BLEND_M))
+#define VSCADR_BLEND_POS       Fld(2,24)
+#define VSCADR_BLEND_GFX       ((0x0) << FShft(VSCADR_BLEND_POS))
+#define VSCADR_BLEND_VID       ((0x1) << FShft(VSCADR_BLEND_POS))
+#define VSCADR_BLEND_CUR       ((0x2) << FShft(VSCADR_BLEND_POS))
+#define VSCADR_VBASE_ADR       Fld(23,0)
+#define Vscadr_Vbase_Adr(x)    ((x) << FShft(VSCADR_VBASE_ADR))
+
+/* VUBASE - Video U Base Register */
+#define VUBASE_UVHALFSTR       (1 << 31)
+#define VUBASE_UBASE_ADR       Fld(24,0)
+#define Vubase_Ubase_Adr(x)    ((x) << FShft(VUBASE_UBASE_ADR))
+
+/* VVBASE - Video V Base Register */
+#define VVBASE_VBASE_ADR       Fld(24,0)
+#define Vvbase_Vbase_Adr(x)    ((x) << FShft(VVBASE_VBASE_ADR))
+
+/* VSADR - Video Stride Address Register */
+#define VSADR_SRCSTRIDE                Fld(10,22)
+#define Vsadr_Srcstride(x)     ((x) << FShft(VSADR_SRCSTRIDE))
+#define VSADR_XSTART           Fld(11,11)
+#define Vsadr_Xstart(x)                ((x) << FShft(VSADR_XSTART))
+#define VSADR_YSTART           Fld(11,0)
+#define Vsadr_Ystart(x)                ((x) << FShft(VSADR_YSTART))
+
 /* HCCTRL - Hardware Cursor Register fields */
 #define HCCTRL_CUR_EN  (1 << 31)
 #define HCCTRL_COLKEY_EN       (1 << 29)
@@ -479,6 +540,30 @@
 #define DINTRE_HBLNK1_EN       (1 << 1)
 #define DINTRE_HBLNK0_EN       (1 << 0)
 
+/* DINTRS - Display Interrupt Status Register */
+#define DINTRS_CUR_OR_S                (1 << 18)
+#define DINTRS_STR2_OR_S       (1 << 17)
+#define DINTRS_STR1_OR_S       (1 << 16)
+#define DINTRS_CUR_UR_S                (1 << 6)
+#define DINTRS_STR2_UR_S       (1 << 5)
+#define DINTRS_STR1_UR_S       (1 << 4)
+#define DINTRS_VEVENT1_S       (1 << 3)
+#define DINTRS_VEVENT0_S       (1 << 2)
+#define DINTRS_HBLNK1_S                (1 << 1)
+#define DINTRS_HBLNK0_S                (1 << 0)
+
+/* DINTRE - Display Interrupt Enable Register */
+#define DINTRE_CUR_OR_EN       (1 << 18)
+#define DINTRE_STR2_OR_EN      (1 << 17)
+#define DINTRE_STR1_OR_EN      (1 << 16)
+#define DINTRE_CUR_UR_EN       (1 << 6)
+#define DINTRE_STR2_UR_EN      (1 << 5)
+#define DINTRE_STR1_UR_EN      (1 << 4)
+#define DINTRE_VEVENT1_EN      (1 << 3)
+#define DINTRE_VEVENT0_EN      (1 << 2)
+#define DINTRE_HBLNK1_EN       (1 << 1)
+#define DINTRE_HBLNK0_EN       (1 << 0)
+
 
 /* DLSTS - display load status register */
 #define DLSTS_RLD_ADONE        (1 << 23)