Configuration options:
[0] - PCI bus of device (optional)
- If bus/slot is not specified, the first available PCI
- device will be used.
+ If bus / slot is not specified, the first available PCI
+ device will be used.
[1] - PCI slot of device (optional)
*/
/*
das1800, since they have the best documented code. Driver
cb_pcidas64.c uses the same DMA controller.
- As far as I can tell, the About interrupt doesnt work if Sample is
+ As far as I can tell, the About interrupt doesn't work if Sample is
also enabled. It turns out that About really isn't needed, since
we always count down samples read.
| PLX_DEMAND_MODE_BIT)
#define DMA_TRANSFER_BITS (\
-/* descriptors in PCI memory*/ PLX_DESC_IN_PCI_BIT \
+/* descriptors in PCI memory*/ PLX_DESC_IN_PCI_BIT \
/* interrupt at end of block */ | PLX_INTR_TERM_COUNT \
/* from board to PCI */ | PLX_XFER_LOCAL_TO_PCI)
/* timer gate (when enabled) */
u8 utcGate[4]; /* 1 extra allows simple range check */
- /* shadow registers affect other registers, but cant be read back */
+ /* shadow registers affect other registers, but can't be read back */
/* The macros below update these on writes */
u16 intMask; /* interrupt mask */
u16 intClearMask; /* interrupt clear mask */
#define RtdAdcFifoGet(dev) \
readw(devpriv->las1+LAS1_ADC_FIFO)
-/* Read two ADC data values (DOESNT WORK) */
+/* Read two ADC data values (DOESN'T WORK) */
#define RtdAdcFifoGet2(dev) \
readl(devpriv->las1+LAS1_ADC_FIFO)
DPRINTK("rtd520: PCI latency = %d\n", pci_latency);
}
- /* Undocumented EPLD version (doesnt match RTD driver results) */
+ /* Undocumented EPLD version (doesn't match RTD driver results) */
/*DPRINTK ("rtd520: Reading epld from %p\n",
devpriv->las0+0);
epld_version = readl (devpriv->las0+0);
}
/* Show board configuration */
- printk("%s:", dev->board_name);
+ printk(KERN_INFO "%s:", dev->board_name);
/*
* Allocate the subdevice structures. alloc_subdevice() is a
return ret;
}
dev->irq = devpriv->pci_dev->irq;
- printk("( irq=%u )", dev->irq);
+ printk(KERN_INFO "( irq=%u )", dev->irq);
ret = rtd520_probe_fifo_depth(dev);
if (ret < 0)
}
RtdDma0Mode(dev, DMA_MODE_BITS);
- RtdDma0Source(dev, DMAS_ADFIFO_HALF_FULL); /* set DMA trigger source */
+ /* set DMA trigger source */
+ RtdDma0Source(dev, DMAS_ADFIFO_HALF_FULL);
} else {
printk(KERN_INFO "( no IRQ->no DMA )");
}
CHAN_ARRAY_SET(devpriv->chanBipolar, chanIndex);
} else if (range < thisboard->rangeUniStart) { /* second batch are +-10 */
r |= 0x100; /* +-10 range */
- r |= ((range - thisboard->range10Start) & 0x7) << 4; /* gain */
+ /* gain */
+ r |= ((range - thisboard->range10Start) & 0x7) << 4;
CHAN_ARRAY_SET(devpriv->chanBipolar, chanIndex);
} else { /* last batch is +10 */
r |= 0x200; /* +10 range */
- r |= ((range - thisboard->rangeUniStart) & 0x7) << 4; /* gain */
+ /* gain */
+ r |= ((range - thisboard->rangeUniStart) & 0x7) << 4;
CHAN_ARRAY_CLEAR(devpriv->chanBipolar, chanIndex);
}
/*
"instructions" read/write data in "one-shot" or "software-triggered"
mode (simplest case).
- This doesnt use interrupts.
+ This doesn't use interrupts.
Note, we don't do any settling delays. Use a instruction list to
select, delay, then read.
/*printk ("rtd520: Got 0x%x after %d usec\n", d, ii+1); */
d = d >> 3; /* low 3 bits are marker lines */
if (CHAN_ARRAY_TEST(devpriv->chanBipolar, 0))
- data[n] = d + 2048; /* convert to comedi unsigned data */
+ /* convert to comedi unsigned data */
+ data[n] = d + 2048;
else
data[n] = d;
}
}
/*
- Stop a running data aquisition.
+ Stop a running data acquisition.
*/
static int rtd_ai_cancel(struct comedi_device *dev, struct comedi_subdevice *s)
{