gige_write32(dev, SSB_GIGE_PCICFG + offset, value);
}
-static int __devinit ssb_gige_pci_read_config(struct pci_bus *bus,
- unsigned int devfn, int reg,
- int size, u32 *val)
+static int ssb_gige_pci_read_config(struct pci_bus *bus, unsigned int devfn,
+ int reg, int size, u32 *val)
{
struct ssb_gige *dev = container_of(bus->ops, struct ssb_gige, pci_ops);
unsigned long flags;
return PCIBIOS_SUCCESSFUL;
}
-static int __devinit ssb_gige_pci_write_config(struct pci_bus *bus,
- unsigned int devfn, int reg,
- int size, u32 val)
+static int ssb_gige_pci_write_config(struct pci_bus *bus, unsigned int devfn,
+ int reg, int size, u32 val)
{
struct ssb_gige *dev = container_of(bus->ops, struct ssb_gige, pci_ops);
unsigned long flags;
return PCIBIOS_SUCCESSFUL;
}
-static int __devinit ssb_gige_probe(struct ssb_device *sdev,
- const struct ssb_device_id *id)
+static int ssb_gige_probe(struct ssb_device *sdev,
+ const struct ssb_device_id *id)
{
struct ssb_gige *dev;
u32 base, tmslow, tmshigh;