if (!cs->txrx_word)
return -EINVAL;
- retval = spi_bitbang_setup_transfer(spi, NULL);
+ retval = bitbang->setup_transfer(spi, NULL);
if (retval < 0)
return retval;
/**
* spi_bitbang_cleanup - default cleanup for per-word I/O loops
*/
-void spi_bitbang_cleanup(const struct spi_device *spi)
+void spi_bitbang_cleanup(struct spi_device *spi)
{
kfree(spi->controller_state);
}
* hardware that basically exposes a shift register) or per-spi_transfer
* (which takes better advantage of hardware like fifos or DMA engines).
*
- * Drivers using per-word I/O loops should use (or call) spi_bitbang_setup and
- * spi_bitbang_cleanup to handle those spi master methods. Those methods are
- * the defaults if the bitbang->txrx_bufs routine isn't initialized.
+ * Drivers using per-word I/O loops should use (or call) spi_bitbang_setup,
+ * spi_bitbang_cleanup and spi_bitbang_setup_transfer to handle those spi
+ * master methods. Those methods are the defaults if the bitbang->txrx_bufs
+ * routine isn't initialized.
*
* This routine registers the spi_master, which will process requests in a
* dedicated task, keeping IRQs unblocked most of the time. To stop
/* this task is the only thing to touch the SPI bits */
bitbang->busy = 0;
bitbang->workqueue = create_singlethread_workqueue(
- bitbang->master->dev.parent->bus_id);
+ bitbang->master->cdev.dev->bus_id);
if (bitbang->workqueue == NULL) {
status = -EBUSY;
goto err1;
while (!list_empty(&bitbang->queue) && limit--) {
spin_unlock_irq(&bitbang->lock);
- dev_dbg(&bitbang->master->dev, "wait for queue\n");
+ dev_dbg(bitbang->master->cdev.dev, "wait for queue\n");
msleep(10);
spin_lock_irq(&bitbang->lock);
}
spin_unlock_irq(&bitbang->lock);
if (!list_empty(&bitbang->queue)) {
- dev_err(&bitbang->master->dev, "queue didn't empty\n");
+ dev_err(bitbang->master->cdev.dev, "queue didn't empty\n");
return -EBUSY;
}